Final Exam ECE3670

December 12, 2013 1:30 pm

Time: 3 Hours
Instructions
1. Read all questions
2. Answer all questions
3. Assume open circuit loads unless otherwise specified
Rubric for design problems (Questions 1-3)
100% - Correct answer with complete explanation
-30% - Fails to meet one design criteria, but other wise correct
-60% - Fails to meet two design criteria, but other wise correct
-10% - Incorrect units, but otherwise correct answer
-20% - Exceeds limits for power supply or otherwise biases devices in an useable state
-10 to 20% - Math or analysis error per incidence (more if it is serious)

Unless otherwise specified assume

For BJTs assume 2N3904
For MOSFETs assume Vt=1.5V, k=10 mA/V2

Enter NAME and STUDENT NUMBER:

________________________________
STUDENT NUMBER
________________________________
WRITE NAME IN FULL ON THIS LINE
_______________________________
PRINT NAME IN FULL ON THIS LINE

Marks
10

1. Design an H-biased common emitter amplifier with a) output bias point of 4-8V, b) gain
greater than 30 and a total power of less than 1 mW dissipated in RC. VCC=+9V Find R1,
R2, RC and RE

10

2. Design a differential amplifier to achieve a) single sided gain greater than 15, b) Rin>2
0k ohms. Output differential voltage swing should be greater than 3Vp-p. Use a
current mirror to bias the amplifier. For biasing purposes assume the inputs are
grounded. Vdd=15V Vss=-15V If a common mode voltage of +3V were added, how
would the power dissipation change in each transistor?

Marks
10

3. Design an emitter follower based regulated power supply. The output voltage is to be 5.76.3V. VIN will range from 10 to 12V. If the maximum power that can be dissipated in the
transistor is 1W, what is the maximum current that can be supplied to the load resistor RL?

Marks
8

4. For a common emitter amplifier, if the supply voltage is increased will the high frequency
cutoff frequency change? Assume IC remains constant. Why?

5. Draw the equivalent circuit diagram for the common emitter amplifier shown below
including the parasitic capacitance C1. In terms of the amplifier gain what would the
formula be for the equivalent input capacitance including only C1?

6. What is the gain of the common source amplifier with an RS of 2k? VCC=+9V. Rb is
assumed to be large. How much power is dissipated in T1?

7. Design a Wein-bridge oscillator for an oscillation frequency of 1500Hz. Include some

form of non-linear gain to prevent saturation of the output. What would the output
amplitude of your oscillator be?

8. For an CMOS inverter PCox = 40 A/V2 , Vth= 0.25V and VDD=1.8 V. For a CL=200 fF,
what W/L ratio is required to achieve a risetime of 0.1 ns. Assuming output rising to 0.9
VDD. How much energy is dissipated each clock cycle?

Formula Sheet
BJT
I
V
V
gm = C
re = T T
VT
IE IC
VT = 26mV (T = 25C )

$V '
V
r = T = & T )
IB
% IC (

V
rO = A
IC

=
+1

iC = I S e

vBE
VT

FET

gm = knVOV =

2
"
1 2%
1
1
2
2
I D = kn $ (VGS Vt ) VDS VDS
I D = kn (VGS Vt ) = knVOV
'
#
2 &
2
2

2I D
VOV

For CE amplifier

Rin = RB

( + 1)(re + RE )

Av =

( RC RL )

Rout = RC

re + RE

For Emitter follower

Rin = RB

( + 1)[re + ( ro

C = f

C je
IC
+
VT % V ( mje
''1 be **
& V je )

C =

For CE amplifier RL' = ro RC RL

1

fH =
'
2Cin RSIG

For CS amplifier
gm ( RD RL )
Rin = Av =
1+ gm RS

#
R
R &
Rout = ro %re + SIG B (
+1 '
$

RL ) Av 1

C jc
" V % mjc
$$1+ cb ''
# V jc &

Cin = C + C (1+ gm RL' )

Rout = RD

Av =

2RD I D
VOV

'
RSIG
= r

[ r + (R
x

RSIG )

For Differential amplifier

RC
R
Ad = gm RC
single side ACM = C
re + RE
2REE
CMRR = 20log

Ad
ACM

1
CR

Rout = 2 ( RC

Rid = 2( + 1)( re + RE ) Active load Ad = gm ( roNPN roPNP )

Wien BridgeOscillator

o =

CMRR = gm REE

R2
= 2 L( j ) =
R1

1+

R2
R1

$
1 '
3 + j&CR
)
%
CR (

Digital Circuits

Ron

1
1
=
" %
"W %
W
COX $ ' (VDD Vth ) kn' $ ' (VDD Vth )
#L&
#L&

2
CLVDD
2
Pav =
= fCLVDD

I peak

t rise

%
1 " W %" V
kn $ '$ DD Vth '
# 2
&
2 # L &

4
Ronp CL
3

Relaxation oscillator

R1
R1 + R2

= CR

% 1+ (
T = 2 log'
*
& 1 )

t fall

4
Ronn CL
3

ro )

2N3904

Zener Data