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TIM E.

THERING
Jupiter, FL 33458
(561) 320-2450 home
(561) 351-5946 cell
email: timthering13@gmail.com

SUMMARY OF WORK EXPERIENCE

2.0 & 3.0, SATA, GBE, SPI, I2C, HDA, LPC bus, and other supporting interfaces.

Great trouble shooting skills including using DVMs, high speed oscilloscopes, logic analyzers and
microscopes.

Adept working in a team environment or independently when required.

Working knowledge of WiFi and Blue-Tooth ( BT )implementations.

Adept at High Definition Audio (HDA) & AC97 audio codec implementation

Expert with Orcad / Cadence Printed Circuit Board design tools including Constraint Manager,
High Speed option, Miniaturization option, PCB stack ups & impedance calculations, differential
pair calculations & phase matching and advanced design options.

Experience with Flex circuits & Rigid-flex boards, etc.

Have in-depth experience with Printed Circuit Board vendor requirements and fabrication techniques. Can
generate complete release packages for production and/or proto-type PCB vendor.

I have eighteen years experience in the Medical Electronic industry as a design engineer, Project Engineer
and Electronic Project Leader.

My background includes digital design; multi-embedded CPU design, analog design; PLD & CPLD design
and project management. Ten years in the commercial computer industry. Seven years in the Biometrics
Industry.

Excellent working knowledge of designing for EMI and ESD compliance.

Excellent working knowledge of DFM/DFT.

I work very well with SW engineers and mechanical engineers (multi-disciplinary team environment). LCD
flat panel experience with LVDS, HDMI, Display port and CMOS interfaces. I have implemented several
hot-swappable Smart Battery designs.

Skills include constrained designs with controlled impedance, HDI high-density layout skills, latest SMT
technology and manufacturing processes.

EDUCATION
BSEE - FLORIDA ATLANTIC UNIVERSITY Boca Raton, Florida 1981 Honors

EMPLOYMENT HISTORY
Senior Electrical Engineer 10-2015 to present - Independent Design Professional - Jupiter
Florida
Senior Hardware Engineer 7/2013 to 9/2015 congatec Inc. Worked on designing Type 10 and Q7 COM
modules with 4GB DDR3 memory and GBE (GigE Ethernet). Interfaces include but not limited to: DDR3, USB 2.0
& 3.0, PCIe gen 2 & 3, I2C, SmBus, LPC bus, eMMC, SPI bus, LVDS, Display Port, HDMI, HAD (High Definition
Audio), switching regulators, DC-DC regulators, etc. Performed high speed interface compliance testing for USB &
Ethernet. Set up Cadence development environments in our design center. Performed DC-DC regulator EVT on
COMe modules.

Staff Engineer 5/2006 to 7/2013 Cross Match Technologies; Palm Beach Gardens, Florida
Major contributor to the development of Avenger. Responsible for the Intel architecture and carrier board design as
well as its implementation. Developed the hardware architecture for the SEEK product and a majority of the
hardware design (HAD, USB, Ethernet, CF, SD etc). It is a portable multi-modal biometric acquisition device that
runs Windows XP and is based on Intel Atom architecture. I designed multiple Biometric products based on USB
2.0 to be compliant with the electrical specifications of USB 2.0. I created a company OrCAD CIS database for
CMT and trained the engineering staff on the intricacies of the Cadence Allegro tool suite. I am the in-house
resource for doing high-speed designs. My extensive experience in controlled impedance stack ups and constraint
driven designs has allowed for very low EMI footprints. I was the project leader for creating a critical demo system
in 2 months, delivered on time and working. Worked on a research project for inductive power transfer to power
portable products and charge Smart Batteries. I am currently the Lead Engineer working on a 3 rd Generation Intel
Atom design integrating multi-modal Biometrics into a portable design capable of running Windows 7. Worked on
Freescale ARM board layout.

Principle Electrical Engineer 5/2000 to 5/2006 DRS TS INC./ WALKABOUT


COMPUTERS INC/; West Palm Beach, Florida - I was a member of a development team that designed 3
generations of ruggedised tablet (pen and touch based) computers based on Intel chipsets. I use OrCAD CIS and
Cadence Allegro Performance for circuit board layout and flex-circuit design. I implemented an OrCAD CIS
database for use in our Centrino design. We brought up our 1 st pass board in less than 1 week running windows. I
designed many OEM modules for integration; GPS, GPRS and Bluetooth. I designed many of the 14 power supplies
in the Centrino design, Cardbus interface, controlled impedance calculations and many others. I was an in house ISO
9001-2000 auditor and wrote the Engineering ISO Process.

Electronic Project Leader 7/1987 to 4/2000 GE MARQUETTE MEDICAL SYSTEMS;


Jupiter, Florida - I was responsible for all of the electronic design in our divisions products. My responsibilities
included systems design, circuit design and CAD work necessary to produce all types of printed circuit boards. I was
responsible for design through release of electronic products to production. I supervised the work of other electrical
engineers.
I designed a video graphics controller for VME bus using PALS, high-speed logic, VRAM, DRAM and a
TMS34010 graphics controller. I designed hardware that would allow single pixel horizontal scrolling. The back-end
logic in this design runs at 63MHz.
I designed a VME interface/controller for a thermal printer using a TMS34010 graphics controller. This design was
implemented with FAST logic, PALs, VRAM and DRAM. This design multiplexed the serial data from the VRAM
array into a single serial stream for the thermal print head. It also provided the stepper motor controller clock and
control lines.
I designed a hybrid VME/ISA back plane that allowed a Intel processor be a slave on the VME bus.
This allowed for the use of standard off-the-shelf ISA peripheral cards (SCSI HD controllers, network interfaces,
keyboard etc.).
I designed a high-speed video buffer/driver for driving multiple RGB analog monitors from one source.
..I designed a proprietary back plane that allowed interface of other divisions products. This back plane incorporated
a DC-DC converter and an RS-422 interface to a main console.

I designed a low power 16 channel Intra-cardiac ECG analog signal acquisition board set with A/D, FLASH
memory and Motorola 56001 DSP. This board communicated using the high-speed serial port on the DSP.
I designed a second DSP board, which communicated with the first via the high-speed serial port (DSP-DSP). This
board has high speed SRAM, FLASH memory and D/A converters. It also has a proprietary serial interface that
connects to a proprietary back plane (previously mentioned).
..I redesigned the video controller and the thermal printer controller using the latest CPLDS, FPGAS and fine pitch
SMT. This allowed combining three 6U VME cards onto one 6U card. This card was backward compatible with the
previous generation and could be configured to replace any or all of the three cards it replaced.
I designed a VME slave processor board to replace one that we were using from another product line. The new card
was fine pitch surface mount and used CPLDS and SRAMS along with FCT bus logic. There was a dual port
memory scheme using bus request/grant. This board also incorporated a DUART with an RS-422 interface to
communicate with the remote signal acquisition system. This design fit on a 3U card.
I designed a master processor board to replace one that we were using from another product line. It boasted doubled
clock speed and double memory at a fraction of the original. It has one in-system programmable logic device on it
for all of the logic. There is also FLASH memory and a DUART with a RS-232 interface for debugging. This design
fit on a 3U card.
I combined the master and slave processor boards onto one board using one large (240 pin pqfp) in system logic
device. There is now enough FLASH memory for all five of the VME processors. This board is in production now.
I redesigned a thermal printer controller to reduce EMI and enhance manufacturability. This is a single board with
very high density SMT using one interface to program multiple ISP logic devices.
I used Synario and State Cad design environments for logic design and am in the transition to VHDL. I use PCAD,
Veribest and OrCAD for schematic capture. I used CANVAS for mechanical illustrations and MS WORD for
windows for text documentation, Micro Soft Project, Micro Soft Source Safe, Micro Soft Excel, and Visio just to
name a few.
I work closely with contract manufacturers and off site production personnel. I was a member of the team that
achieved ISO9001 certification for our group and the CE mark for our product. I am familiar with GMP (good
manufacturing practices).

Project Engineer - 9.84 to 7.87 - EMERGENT TECHNOLOGY CORP., Boca Raton, Florida Began employment with ETC just after the company was incorporated. Project accomplishments included designing
and developing a three-channel FM modem for data base collection. Performed ESD testing of P.C. based product
and implemented changes to decrease susceptibility. I was the project engineer for a portable 64180 processor based
data acquisition unit. I worked with vendors developing custom components for this system; developed the
packaging concepts, hardware user interface, power control circuitry to maximize battery, and wrote the design
specification for the unit.

Development Engineer - 11.81 to 8.84 - LITTON DATAMEDIX, Boca Raton, Florida Redesigned
and implemented the main memory (EPROM) of the PECGASYS product - a Z80 based intelligent terminal system.
Designed and implemented a pseudo paged memory (static CMOS), for the AMU - a NSC800 based ambulatory data
acquisition system. Performed experiments and extensive testing to reduce the AMUs susceptibility to E.S.D.,
resulting in changes to internal shielding and system design. Performed all system internal interconnection work
(selection, test & documentation) on the Guardian Telemetry unit. Developed a method of detecting pattern
sensitivity in 64K static RAMS which were undetected by the factory. Product engineer for PECGASYS/AMU
system. Supported other product lines.

Software:
OrCAD CIS & Allegro CIS Schematic Capture
Cadence Allegro Performance PCB Design with Miniaturization Option
Polar Instruments Impedance Calculator and Stack up Builder
CAM350
Windows XP, Win 7, Win 8.1
Office 2010 Suite (WORD, EXCEL, ACCESS, POWERPOINT, MS PROJECT
Planta

Lotus Notes
VISIO
PCAD
AGILE
TENROX