Академический Документы
Профессиональный Документы
Культура Документы
Agenda:
Day1:
Morning session: [Theory session]
Day2:
Morning session: [25% theory 75% practical]
Placement
Placement using cadence FE [Hands on]
Congestion analysis
Congestion analysis using Cadence FE [Hands on]
Setup timing analysis
Setup timing analysis using Cadence FE [Hands on]
Other QOR checks after placement
Clock Tree Synthesis (CTS)
CTS using Cadence FE [Hands on session]
Power analysis [Static (Active/Leakage) & Dynamic]
Power Analysis using Cadence FE [Hands on session]
Hold timing analysis
Hold timing analysis using cadence FE. [Hands on session]
Other QOR checks after CTS
Afternoon session: [25% theory 75% practical]
Routing
Routing using cadence FE [Hands on session]
Physical verification [DRC/LVS]
Physical verification and fixing using Cadence FE [Hands on session]
Transition, capacitance analysis.
Transition, capacitance fixing using Cadence FE [Hand on session]
Introduction to ECOs [Hands on session]
Research scope.
Lab requirements:
1) Cadence First Encounter installed in PCs with 2 participants : 1 PC ratio
2) All the PCs with Linux OS [Of course cadence FE is installed on only linux/solaries]
3) Class setup (Projector/board) in the lab. (All the theory + Practical sessions will run parallel in
the lab)
Eligible attendees:
Faculty with back ground knowledge of Digital Design, EDC & Network theory.
Should be good at UNIX / Linux OS usage.
TCL scripting knowledge is an added advantage.