Академический Документы
Профессиональный Документы
Культура Документы
1144-001
PAC II
8086
Transistors
29K
(1978)
MHz
5-10
386
275K
(1985)
16-33
Pentium 4F
(2004)
125M
2800-3800
Core i7 (2008)
Xeon E7 (2011)
731M
2.2B
2667-3333
~2400
Instruction
Set
Architecture
(ISA)
Compiler
Assembly
Assembly
Assembly
Assembler
Library
Library
Library
Loader
DLL
DLL
DLL
Object
File
Object
File
Object File
Linker
Executable
Outline
Assembly primer
Addressing modes
Arithmetic operations
Condition codes:
Jump and branches loops
Procedures the stack
CPU
Addresses
PC
Registers
Data
Condition
Codes
Instructions
Execution context
PC: Program counter
Address of next instruction
Called EIP (IA32) or RIP (x86-64)
Registers
Heavily used program data
Condition codes
Info of recent arithmetic operation
Used for conditional branching
Object Code
Program Data
OS Data
Transfer control
Output file
is p
text
binary
binary
Static libraries
(.a)
sum.s
gcc S sum.c
gcc c sum.s
sum:
pushl %ebp
movl %esp,%ebp
movl 12(%ebp),%eax
addl 8(%ebp),%eax
popl %ebp
ret
objdump d sum.o
sum.o
80483c4:
55 89 e5 8b 45 0c 03 45 08 5d c3
Note: If your platform is 64-bit, you may want to force it to generate 32-bit assembly
by gcc m32 S sum.c to get the above output.
sum.s
sum:
pushl %ebp
movl %esp,%ebp
movl 12(%ebp),%eax
addl 8(%ebp),%eax
popl %ebp
ret
sum.o
80483c4:
55 89 e5 8b 45 0c 03 45 08 5d c3
general purpose
Origin
Integer Registers (IA32)
(mostly obsolete)
%eax
%ax
%ah
%al
accumulate
%ecx
%cx
%ch
%cl
counter
%edx
%dx
%dh
%dl
data
%ebx
%bx
%bh
%bl
base
%esi
%si
source
index
%edi
%di
destination
index
%esp
%sp
%ebp
%bp
stack
pointer
base
pointer
16-bit virtual registers
(backwards compatibility)
Operand Types
movl
Dest
Src,Dest
C Analog
Imm
temp = 0x4;
Reg
temp2 = temp1;
Mem
Reg
movl (%eax),%edx
*p = -147;
*p = temp;
temp = *p;
No memory-to-memory instruction
Outline
Assembly primer
Addressing modes
Arithmetic operations
Condition codes:
Jump and branches loops
Procedures the stack
(R)
Mem[Reg[R]]
swap:
pushl %ebp
movl %esp,%ebp
pushl %ebx
Set
Up
movl
movl
movl
movl
movl
movl
popl
popl
ret
8(%ebp), %edx
12(%ebp), %ecx
(%edx), %ebx
(%ecx), %eax
%eax, (%edx)
%ebx, (%ecx)
%ebx
%ebp
Body
Finish
Understanding Swap
123
Address
0x124
456
0x120
0x11c
%eax
0x118
Offset
%edx
%ecx
%ebx
%esi
yp
12
0x120
0x110
xp
0x124
0x10c
Rtn adr
0x108
%ebp
%edi
0x104
-4
%esp
%ebp
0x114
0x104
movl
movl
movl
movl
movl
movl
8(%ebp), %edx
12(%ebp), %ecx
(%edx), %ebx
(%ecx), %eax
%eax, (%edx)
%ebx, (%ecx)
#
#
#
#
#
#
0x100
edx
ecx
ebx
eax
*xp
*yp
=
=
=
=
=
=
xp
yp
*xp (t0)
*yp (t1)
t1
t0
Understanding Swap
123
Address
0x124
456
0x120
0x11c
%eax
%edx
0x118
Offset
0x124
%ecx
%ebx
%esi
yp
12
0x120
0x110
xp
0x124
0x10c
Rtn adr
0x108
%ebp
%edi
0x104
-4
%esp
%ebp
0x114
0x104
movl
movl
movl
movl
movl
movl
8(%ebp), %edx
12(%ebp), %ecx
(%edx), %ebx
(%ecx), %eax
%eax, (%edx)
%ebx, (%ecx)
#
#
#
#
#
#
0x100
edx
ecx
ebx
eax
*xp
*yp
=
=
=
=
=
=
xp
yp
*xp (t0)
*yp (t1)
t1
t0
Understanding Swap
123
Address
0x124
456
0x120
0x11c
%eax
0x118
%edx
0x124
%ecx
0x120
Offset
%ebx
%esi
yp
12
0x120
0x110
xp
0x124
0x10c
Rtn adr
0x108
%ebp
%edi
0x104
-4
%esp
%ebp
0x114
0x104
movl
movl
movl
movl
movl
movl
8(%ebp), %edx
12(%ebp), %ecx
(%edx), %ebx
(%ecx), %eax
%eax, (%edx)
%ebx, (%ecx)
#
#
#
#
#
#
0x100
edx
ecx
ebx
eax
*xp
*yp
=
=
=
=
=
=
xp
yp
*xp (t0)
*yp (t1)
t1
t0
Understanding Swap
123
Address
0x124
456
0x120
0x11c
%eax
0x118
%edx
0x124
%ecx
0x120
%ebx
Offset
123
%esi
yp
12
0x120
0x110
xp
0x124
0x10c
Rtn adr
0x108
%ebp
%edi
0x104
-4
%esp
%ebp
0x114
0x104
movl
movl
movl
movl
movl
movl
8(%ebp), %edx
12(%ebp), %ecx
(%edx), %ebx
(%ecx), %eax
%eax, (%edx)
%ebx, (%ecx)
#
#
#
#
#
#
0x100
edx
ecx
ebx
eax
*xp
*yp
=
=
=
=
=
=
xp
yp
*xp (t0)
*yp (t1)
t1
t0
Understanding Swap
123
Address
0x124
456
0x120
0x11c
%eax
456
%edx
0x124
%ecx
0x120
%ebx
0x118
Offset
123
%esi
yp
12
0x120
0x110
xp
0x124
0x10c
Rtn adr
0x108
%ebp
%edi
0x104
-4
%esp
%ebp
0x114
0x104
movl
movl
movl
movl
movl
movl
8(%ebp), %edx
12(%ebp), %ecx
(%edx), %ebx
(%ecx), %eax
%eax, (%edx)
%ebx, (%ecx)
#
#
#
#
#
#
0x100
edx
ecx
ebx
eax
*xp
*yp
=
=
=
=
=
=
xp
yp
*xp (t0)
*yp (t1)
t1
t0
Understanding Swap
456
Address
0x124
456
0x120
0x11c
%eax
456
456
%edx
0x124
%ecx
0x120
%ebx
0x118
Offset
123
%esi
yp
12
0x120
0x110
xp
0x124
0x10c
Rtn adr
0x108
%ebp
%edi
0x104
-4
%esp
%ebp
0x114
0x104
movl
movl
movl
movl
movl
movl
8(%ebp), %edx
12(%ebp), %ecx
(%edx), %ebx
(%ecx), %eax
%eax, (%edx)
%ebx, (%ecx)
#
#
#
#
#
#
0x100
edx
ecx
ebx
eax
*xp
*yp
=
=
=
=
=
=
xp
yp
*xp (t0)
*yp (t1)
t1
t0
Understanding Swap
456
Address
0x124
123
0x120
0x11c
%eax
456
%edx
0x124
%ecx
0x120
%ebx
0x118
Offset
123
%esi
yp
12
0x120
0x110
xp
0x124
0x10c
Rtn adr
0x108
%ebp
%edi
0x104
-4
%esp
%ebp
0x114
0x104
movl
movl
movl
movl
movl
movl
8(%ebp), %edx
12(%ebp), %ecx
(%edx), %ebx
(%ecx), %eax
%eax, (%edx)
%ebx, (%ecx)
#
#
#
#
#
#
0x100
edx
ecx
ebx
eax
*xp
*yp
=
=
=
=
=
=
xp
yp
*xp (t0)
*yp (t1)
t1
t0
Index register
(no %esp)
Scale
(1,2,4,8)
Constant
displacement
Mem[Reg[Rb]+S*Reg[Ri]+ D]
Special Cases
(Rb,Ri)
D(Rb,Ri)
(Rb,Ri,S)
Mem[Reg[Rb]+Reg[Ri]]
Mem[Reg[Rb]+Reg[Ri]+D]
Mem[Reg[Rb]+S*Reg[Ri]]
unsigned
int
long int
char
short
float
double
char *
4
4
4
1
2
4
8
4
4
4
4
1
2
4
8
4
x86-64
4
4
8
1
2
4
8
8
Carnegie Mellon
0xf000
%ecx
0x0100
Expression
Address Computation
Address
0x8(%edx)
0xf000
+ 0x8
0x8+%edx
0xf008
0xf008
(%edx,%ecx)
0xf000
+ 0x100
%edx+%ecx
0xf100
0xf100
(%edx,%ecx,4)
0xf000
+ 4*0x100
%edx+4*%ecx
0xf400
0xf400
0x80(,%edx,2)
2*%edx+0x80
2*0xf000
+ 0x80
0x1e080
0x1e080
Carnegie Mellon
lea instruction
leal Src, Dest
Src is address mode expression
Set Dest to address denoted by expression
2 common uses
Computing address
;t <- x+x*2
;return t<<2
Outline
Assembly primer
Addressing modes
Arithmetic operations
Condition codes:
Jump and branches loops
Procedures the stack
Carnegie Mellon
Arithmetic Operations
addl
subl
imull
incl
decl
negl
notl
Src, Dest
Src, Dest
Src, Dest
Dest
Dest
Dest
Dest
sall
sarl
xorl
andl
orl
Src, Dest
Src, Dest
Src, Dest
Src, Dest
Src, Dest
Dest
Dest
Dest
Dest
Dest
= Dest
= Dest
= Dest
= Dest
= Dest
<< Src
>> Src
^ Src
& Src
| Src
Carnegie Mellon
foo:
pushl
movl
%ebp
%esp, %ebp
movl
movl
leal
sall
leal
addl
addl
imull
8(%ebp), %ecx
12(%ebp), %edx
(%edx,%edx,2), %eax
$4, %eax
4(%ecx,%eax), %eax
%ecx, %edx
16(%ebp), %edx
%edx, %eax
popl
ret
%ebp
Set
Up
Body
Finish
Carnegie Mellon
Understanding arithmetic
8(%ebp), %ecx
12(%ebp), %edx
(%edx,%edx,2), %eax
$4, %eax
4(%ecx,%eax), %eax
%ecx, %edx
16(%ebp), %edx
%edx, %eax
Stack
#
#
#
#
#
#
#
#
ecx
edx
eax
eax
eax
edx
edx
eax
Offset
16
12
Rtn Addr
= x
0 Old %ebp
= y
= y*3
*= 16 (t4)
= t4 +x+4 (t5)
= x+y (t1)
+= z (t2)
= t2 * t5 (rval)
%ebp
Carnegie Mellon
Observations
Instructions in
different order
from C code
Some expressions
require multiple
instructions
Some instructions
cover multiple
expressions
8(%ebp), %ecx
12(%ebp), %edx
(%edx,%edx,2), %eax
$4, %eax
4(%ecx,%eax), %eax
%ecx, %edx
16(%ebp), %edx
%edx, %eax
#
#
#
#
#
#
#
#
ecx
edx
eax
eax
eax
edx
edx
eax
= x
= y
= y*3
*= 16 (t4)
= t4 +x+4 (t5)
= x+y (t1)
+= z (t2)
= t2 * t5 (rval)
Carnegie Mellon
Another Example
bar:
pushl %ebp
movl %esp,%ebp
movl
xorl
sarl
andl
12(%ebp),%eax
8(%ebp),%eax
$17,%eax
$8185,%eax
movl
xorl
sarl
andl
12(%ebp),%eax
8(%ebp),%eax
$17,%eax
$8185,%eax
popl %ebp
ret
#
#
#
#
eax
eax
eax
eax
=
=
=
=
y
x^y
(t1)
t1>>17
(t2)
t2 & mask (rval)
Set
Up
Body
Finish
Carnegie Mellon
General purpose
registers
Stack top
Stack frame
%eip
CF
Instruction pointer
ZF
SF
OF
Condition codes
Outline
Assembly primer
Addressing modes
Arithmetic operations
Condition codes
Jump and branches loops
Procedures the stack
Carnegie Mellon
Carnegie Mellon
Carnegie Mellon
ZF
~ZF
SF
~SF
~(SF^OF)&~ZF
~(SF^OF)
(SF^OF)
(SF^OF)|ZF
~CF&~ZF
CF
Equal / Zero
Not Equal / Not Zero
Negative
Nonnegative
Greater (Signed)
Greater or Equal (Signed)
Less (Signed)
Less or Equal (Signed)
Above (unsigned)
Below (unsigned)
Carnegie Mellon
%ah
%eax
movl 12(%ebp),%eax
cmpl %eax,8(%ebp)
setg %al
movzbl %al,%eax
#
#
#
#
eax = y
Compare x : y
al = x > y
Zero rest of %eax
%al
Outline
Assembly primer
Addressing modes
Arithmetic operations
Condition codes
Jump and branches loops
Procedures the stack
Carnegie Mellon
Jumping
jX Instruction: Jump to different part of
code depending on condition codes
jX
Condition
Description
jmp
Unconditional
je
ZF
Equal / Zero
jne
~ZF
js
SF
Negative
jns
~SF
Nonnegative
jg
~(SF^OF)&~ZF
Greater (Signed)
jge
~(SF^OF)
jl
(SF^OF)
Less (Signed)
jle
(SF^OF)|ZF
ja
~CF&~ZF
Above (unsigned)
jb
CF
Below (unsigned)
Carnegie Mellon
absdiff:
pushl %ebp
movl
%esp, %ebp
movl
8(%ebp), %edx
movl
12(%ebp), %eax
cmpl
%eax, %edx
jle
.L6
subl
%eax, %edx
movl
%edx, %eax
jmp .L7
.L6:
subl %edx, %eax
.L7:
popl %ebp
ret
Setup
Body1
Body2a
Body2b
Finish
int result;
if (x <= y) goto Else;
result = x-y;
goto Exit;
Else:
result = y-x;
Exit:
return result;
}
absdiff:
pushl %ebp
movl
%esp, %ebp
movl
8(%ebp), %edx
movl
12(%ebp), %eax
cmpl
%eax, %edx
jle
.L6
subl
%eax, %edx
movl
%edx, %eax
jmp .L7
.L6:
subl %edx, %eax
.L7:
popl %ebp
ret
Carnegie Mellon
Setup
Body1
Body2a
Body2b
Finish
int result;
if (x <= y) goto Else;
result = x-y;
goto Exit;
Else:
result = y-x;
Exit:
return result;
}
absdiff:
pushl %ebp
movl
%esp, %ebp
movl
8(%ebp), %edx
movl
12(%ebp), %eax
cmpl
%eax, %edx
jle
.L6
subl
%eax, %edx
movl
%edx, %eax
jmp .L7
.L6:
subl %edx, %eax
.L7:
popl %ebp
ret
Carnegie Mellon
Setup
Body1
Body2a
Body2b
Finish
int result;
if (x <= y) goto Else;
result = x-y;
goto Exit;
Else:
result = y-x;
Exit:
return result;
}
absdiff:
pushl %ebp
movl
%esp, %ebp
movl
8(%ebp), %edx
movl
12(%ebp), %eax
cmpl
%eax, %edx
jle
.L6
subl
%eax, %edx
movl
%edx, %eax
jmp .L7
.L6:
subl %edx, %eax
.L7:
popl %ebp
ret
Carnegie Mellon
Setup
Body1
Body2a
Body2b
Finish
int result;
if (x <= y) goto Else;
result = x-y;
goto Exit;
Else:
result = y-x;
Exit:
return result;
}
absdiff:
pushl %ebp
movl
%esp, %ebp
movl
8(%ebp), %edx
movl
12(%ebp), %eax
cmpl
%eax, %edx
jle
.L6
subl
%eax, %edx
movl
%edx, %eax
jmp .L7
.L6:
subl %edx, %eax
.L7:
popl %ebp
ret
Carnegie Mellon
Setup
Body1
Body2a
Body2b
Finish
Carnegie Mellon
Goto Version
int pcount_do(unsigned x)
{
int result = 0;
loop:
result += x & 0x1;
x >>= 1;
if (x)
goto loop;
return result;
}
Carnegie Mellon
Goto Version
int pcount_do(unsigned x) {
int result = 0;
loop:
result += x & 0x1;
x >>= 1;
if (x)
goto loop;
return result;
}
Registers:
%edx
x
%ecx
result
movl
.L2:
movl
andl
addl
shrl
jne
$0, %ecx
%edx, %eax
$1, %eax
%eax, %ecx
%edx
.L2
#
result = 0
# loop:
#
#
#
#
t = x & 1
result += t
x >>= 1
If !0, goto loop
Carnegie Mellon
while (Test)
Body
loop:
Body
if (Test)
goto loop
Goto Version
if (!Test)
goto done;
loop:
Body
if (Test)
goto loop;
done:
Carnegie Mellon
Init;
if (!Test)
goto done;
loop:
Body
Update
if (Test)
goto loop;
done:
Carnegie Mellon
Goto Version
int pcount_for_gt(unsigned x) {
int i;
int result = 0;
Init
i = 0;
if (!(i < WSIZE)) !Test
goto done;
loop:
Body
{
unsigned mask = 1 << i;
result += (x & mask) != 0;
}
i++; Update
if (i < WSIZE) Test
goto loop;
done:
return result;
}
Carnegie Mellon
Why?
C Code
val = Test
? Then_Expr
: Else_Expr;
Goto Version
tval = Then_Expr;
result = Else_Expr;
t = Test;
if (t) result = tval;
return result;
Carnegie Mellon
Risky Computations
val = p ? *p : 0;
Carnegie Mellon
ja
jmp
8048422 <switch_eg+0x12>
*0x8048660(,%eax,4)
Carnegie Mellon
Jump Table
0x8048660:
0x8048670:
0x08048422
0x08048422
0x08048432
0x0804844b
0x0804843b
0x0804844b
Address
Value
0x8048660
0x8048422
0x8048664
0x8048432
0x8048668
0x804843b
0x804866c
0x8048429
0x8048670
0x8048422
0x8048674
0x804844b
0x8048678
0x804844b
0x08048429
Carnegie Mellon
8048422:
8048427:
8048429:
804842e:
8048430:
8048432:
8048435:
8048439:
804843b:
804843e:
8048440:
8048443:
8048446:
8048449:
804844b:
8048450:
8048453:
8048454:
mov
jmp
mov
xchg
jmp
mov
imul
jmp
mov
mov
sar
idivl
add
jmp
mov
sub
pop
ret
$0x2,%eax
8048453 <switch_eg+0x43>
$0x1,%eax
%ax,%ax
8048446 <switch_eg+0x36>
0x10(%ebp),%eax
0xc(%ebp),%eax
8048453 <switch_eg+0x43>
0xc(%ebp),%edx
%edx,%eax
$0x1f,%edx
0x10(%ebp)
0x10(%ebp),%eax
8048453 <switch_eg+0x43>
$0x1,%eax
0x10(%ebp),%eax
%ebp
Outline
Assembly primer
Addressing modes
Arithmetic operations
Condition codes
Jump and branches loops
Procedures the stack
Carnegie Mellon
IA32 Stack
Region of memory
managed with stack
discipline
Register %esp
contains
address of top
element
Bottom
increasing
Addresses
Stack
Grows
Down
Carnegie Mellon
pushl src
Increasing
Addresses
Stack
Grows
Down
-4
Carnegie Mellon
popl dst
Bottom
Increasing
Addresses
to dst
Increment %esp by 4
+4
Stack
Grows
Down
Carnegie Mellon
ret
Return address:
Carnegie Mellon
e8 3d 06 00 00
50
call
pushl
call 8048b90
0x110
0x110
0x10c
0x10c
0x108 123
0x108 123
0x104 0x8048553
%esp 0x108
%esp 0x104
%eip 0x804854e
%eip 0x8048b90
8048b90 <main>
%eax
Carnegie Mellon
c3
ret
ret
0x110
0x110
0x10c
0x10c
0x108 123
0x108 123
0x104 0x8048553
0x8048553
%esp 0x104
%esp 0x108
%eip 0x8048591
%eip 0x8048553
Carnegie Mellon
Carnegie Mellon
who();
Example
Call Chain
yoo
who()
{
amI();
amI();
}
who
amI()
{
amI();
}
Procedure amI() is recursive
amI
amI
amI
amI
Carnegie Mellon
Stack Frames
Previous
Frame
Contents
Local variables
Return information
Temporary space
Frame for
proc
Stack Pointer: %esp
Management
Stack Top
Carnegie Mellon
Example
yoo()
{
who();
yoo
%ebp
yoo yoo
who
amI
amI
amI
Stack
%esp
amI
Carnegie Mellon
Example
yoo()
{ who()
{
amI();
who();
amI();
}
}
Stack
yoo
yoo yoo
who
%ebp
amI
amI
amI
amI
who
%esp
Carnegie Mellon
Example
yoo()
{ who()
{
amI()
{
amI();
who();
amI();
amI();
Stack
yoo
yoo yoo
who
amI
who
amI
%ebp
amI
amI
%esp
amI
Carnegie Mellon
Example
yoo()
{ who()
{
amI()
{
amI();
who();
amI()
amI();
amI();
}
amI();
Stack
yoo
yoo yoo
who
amI
who
amI
amI
amI
amI
%ebp
amI
%esp
Carnegie Mellon
Example
yoo()
{ who()
{
amI()
{
amI();
who();
amI()
amI(); amI()
amI();
{
}
amI();
}
amI();
Stack
yoo
yoo yoo
who
amI
who
amI
amI
amI
amI
amI
%ebp
amI
%esp
Carnegie Mellon
Example
yoo()
{ who()
{
amI()
{
amI();
who();
amI()
amI();
amI();
}
amI();
Stack
yoo
yoo yoo
who
amI
who
amI
amI
amI
amI
%ebp
amI
%esp
Carnegie Mellon
Example
yoo()
{ who()
{
amI()
{
amI();
who();
amI();
amI();
Stack
yoo
yoo yoo
who
amI
who
amI
%ebp
amI
amI
%esp
amI
Carnegie Mellon
Example
yoo()
{ who()
{
amI();
who();
amI();
}
}
Stack
yoo
yoo yoo
who
%ebp
amI
amI
amI
amI
who
%esp
Carnegie Mellon
Example
yoo()
{ who()
{
amI()
{
amI();
who();
amI();
amI();
Stack
yoo
yoo yoo
who
amI
who
amI
%ebp
amI
amI
%esp
amI
Carnegie Mellon
Example
yoo()
{ who()
{
amI();
who();
amI();
}
}
Stack
yoo
yoo yoo
who
%ebp
amI
amI
amI
amI
who
%esp
Carnegie Mellon
Example
yoo()
{
who();
yoo
%ebp
yoo yoo
who
amI
amI
amI
Stack
%esp
amI
Carnegie Mellon
Arguments
Return Addr
Old %ebp
Saved
Registers
+
Local
Variables
Stack pointer
%esp
Argument
Build
Carnegie Mellon
Revisiting swap
void call_swap() {
swap(&course1, &course2);
}
call_swap:
subl
movl
movl
call
$8, %esp
$course2, 4(%esp)
$course1, (%esp)
swap
Resulting
Stack
%esp
&course2
subl
&course1
%esp
Rtn adr
%esp
call
Carnegie Mellon
Revisiting swap
swap:
pushl %ebp
void swap(int *xp, int *yp)
movl %esp, %ebp
{
pushl %ebx
int t0 = *xp;
int t1 = *yp;
movl 8(%ebp), %edx
*xp = t1;
movl 12(%ebp), %ecx
*yp = t0;
movl (%edx), %ebx
}
movl (%ecx), %eax
movl %eax, (%edx)
movl %ebx, (%ecx)
popl
popl
ret
%ebx
%ebp
Set
Up
Body
Finish
Carnegie Mellon
swap Setup #1
Entering Stack
Resulting Stack
%ebp
%ebp
&course2
yp
&course1
xp
Rtn adr
%esp
Rtn adr
Old %ebp
swap:
pushl %ebp
movl %esp,%ebp
pushl %ebx
%esp
Carnegie Mellon
swap Setup #2
Entering Stack
Resulting Stack
%ebp
&course2
yp
&course1
xp
Rtn adr
%esp
Rtn adr
Old %ebp
swap:
pushl %ebp
movl %esp,%ebp
pushl %ebx
%ebp
%esp
Carnegie Mellon
swap Setup #3
Entering Stack
Resulting Stack
%ebp
&course2
yp
&course1
xp
Rtn adr
%esp
swap:
pushl %ebp
movl %esp,%ebp
pushl %ebx
Rtn adr
Old %ebp
%ebp
Old %ebx
%esp
Carnegie Mellon
swap Body
Entering Stack
Resulting Stack
%ebp
&course2
&course1
Rtn adr
%esp
movl 8(%ebp),%edx
movl 12(%ebp),%ecx
. . .
4 Rtn adr
# get xp
# get yp
Old %ebp
%ebp
Old %ebx
%esp
Carnegie Mellon
swap Finish
Stack Before Finish
Resulting Stack
%ebp
yp
yp
xp
xp
Rtn adr
Rtn adr
Old %ebp
%ebp
Old %ebx
%esp
popl
popl
%ebx
%ebp
%esp
Carnegie Mellon
who:
movl 8(%ebp), %edx
addl $18243, %edx
ret
Carnegie Mellon
Callee Save
Carnegie Mellon
IA32/Linux+Windows Register
Usage
Caller-Save
Temporaries
%eax
%edx
Callee-Save
Temporaries
%ecx
%ebx
%esi
%eax
%esp, %ebp
%edi
%esp
%ebp
Recursive Function
pcount_r:
/* Recursive popcount */
int pcount_r(unsigned x) {
if (x == 0)
return 0;
else return
(x & 1) + pcount_r(x >> 1);
}
Registers
Carnegie Mellon
pushl %ebp
movl
%esp,%ebp
pushl %ebx
subl
$4,%esp
movl
8(%ebp),%ebx
movl
$0,%eax
testl %ebx,%ebx
je .L3
movl
%ebx,%eax
shrl
%eax
movl
%eax,(%esp)
call pcount_r
movl %ebx,%edx
andl
$1,%edx
leal
(%edx,%eax),%eax
.L3:
addl
$4,%esp
popl
%ebx
popl
%ebp
ret
Carnegie Mellon
Recursive Call #1
/* Recursive popcount */
int pcount_r(unsigned x) {
if (x == 0)
return 0;
else return
(x & 1) + pcount_r(x >> 1);
}
pcount_r:
pushl %ebp
movl %esp,%ebp
pushl %ebx
subl $4,%esp
movl 8(%ebp),%ebx
Actions
x
Rtn adr
Old %ebp
%ebp
Old %ebx
%ebx x
%esp
Carnegie Mellon
Recursive Call #2
/* Recursive popcount */
int pcount_r(unsigned x) {
if (x == 0)
return 0;
else return
(x & 1) + pcount_r(x >> 1);
}
Actions
If x == 0 (%eax),
return
%ebx x
movl $0,%eax
testl %ebx,%ebx
je
.L3
.L3:
ret
Carnegie Mellon
Recursive Call #3
/* Recursive popcount */
int pcount_r(unsigned x) {
if (x == 0)
return 0;
else return
(x & 1) + pcount_r(x >> 1);
}
Actions
movl %ebx,%eax
shrl %eax
movl %eax,(%esp)
call pcount_r
Rtn adr
Old %ebp
%ebp
Old %ebx
%ebx x
x >> 1
%esp
Carnegie Mellon
Recursive Call #4
/* Recursive popcount */
int pcount_r(unsigned x) {
if (x == 0)
return 0;
else return
(x & 1) + pcount_r(x >> 1);
}
movl
%ebx,%edx
andl
$1,%edx
leal
(%edx,%eax),%eax
Actions
Effect
%ebx x
Carnegie Mellon
Recursive Call #5
/* Recursive popcount */
int pcount_r(unsigned x) {
if (x == 0)
return 0;
else return
(x & 1) + pcount_r(x >> 1);
}
L3:
addl $4,%esp
popl %ebx
popl %ebp
ret
Actions
%ebp
Restore %ebx,%ebp
Restore %esp
%esp
Rtn adr
Old %ebp
%ebp
%ebx
Old %ebx
%esp
Old %ebx
Conclusions
Till Now, we have seen:
Hardware: transistors gates
digital structures microarchitecture
(datapath + control unit)
Software: bits data (signed,
unsigned, floating points, ..) +
Instructions