Soft Single Switched DC-DC Converters With Coupled Inductors

Implementation of PWM Soft single switched DC-DC converters with coupled inductors
CHAPTER 1
INTRODUCTION
In order to reduce the size and weight of switching converters and increase power
density, a high switching frequency is required. However, in hard-switching
converters,
as
electromagnetic
the
switching
interference
frequency
increases,
switching
losses
and
increase. To solve this problem, soft-switching
converters are indispensable. In recent years, great amount of research is done to

develop soft-switching techniques in dc-dc converters. In these converters, it is
desirable to control the output voltage by pulse width modulation (PWM) because of
its simplicity and constant frequency. A low number of components, particularly
active components, is also desirable. Quasi-resonant converters do not have any extra
switch to provide soft-switching conditions; however, they must be controlled by the
variation of switching frequency. Furthermore, zero-voltage transition, zero-current
transition, and active clamped converters are PWM controlled but require at least
two switches, which increases the complexity of power and control circuits.
PWM
soft-single-switched (SSS) converters and lossless passive snubbers, enjoy all the
mentioned advantages, usually at the cost of additional current and voltage stresses.
However, they usually have a large number of passive elements, which makes the
converter implementation difficult. The lossless passive snubber circuit is simple and
easy to implement. However, in this converter, a soft-switching condition is not
achieved for the switch turnoff instant. Furthermore, an additional diode is added in
the main power path, which would further increase the converter conduction losses. In
this project, a family of PWM SSS converters without any substantial increase in
voltage and current stresses is presented. Furthermore, in this converter family,
the number of additional components is not high. The switch in all proposed
converters is turned on under zero-current-switching (ZCS) condition and is turned
off at almost zero-voltage-switching (ZVS) condition. The converter main diode turns
on under ZVS condition and turns off under zero-voltage zero-current switching
(ZVZCS) conditions. Furthermore, an auxiliary diode turns on under ZVS condition
and turns off under ZCS condition. The proposed method can be easily applied to
single-switch converters such as buck, boost, and buck-boost. Cuk, SFP1C, and Zeta.
Furthermore, it can be applied to isolated single-switch converters such as forward,
Flyback, isolated CUK, isolated SFP1C, and isolated Zeta.
Page1
1.1 ELECTROMAGNETIC INTERFERENCE:

As the name suggests, it is related with the disturbance caused
due to electromagnetic waves to the operation of the dc-dc. converter or any other
electronic circuit Because of the rapid changes in voltages and currents within a
switching converter, power electronic equipment is a source of electromagnetic
interference with other equipment as well as with its own proper operation. The
electromagnetic or more devices to work together without interfering with one
another. Susceptibility is a measure
of a
device's
sensitivity
to
external
interference. Because a good receiving antenna is a good transmitting antenna,

devices with susceptibility are usually devices that generate electromagnetic
interference. Government regulation is monitored through regulatory agencies. The
regulation dealing with computer generated electromagnetic interference not only
specifies the amount of electromagnetic interference that is acceptable but also the
testing methods used to measure electromagnetic interference. Testing and
approval is usually done by private companies authorized to perform testing. For there
to be an electromagnetic interference problem there must be: (1) a source of RF
power, such as a digital device, (2) coupling interference is transmitted in two forms:
radiated and conducted. The switching converters supplied by the power lines
generate conducted noise into the power lines that is usually several orders of
magnitude higher than the radiated noise into free space. Metal cabinets used for
housing power converters reduce the radiated component of the electromagnetic
interference. Conducted noise consists of two categories commonly known as the
differential mode and the common mode. The differential mode noise is a current or a
voltage measured between the lines of the source, that is, a line-to-line voltage or the
line current 1 dm. the common mode noise is a voltage or current measured between
the power lines are present in general on both the input lines and the output lines. Any
filter design has to take into account both of these modes of noise. Governments
regulate the amount of radio frequency interference that any equipment can produce
so that computers and televisions, for example, do not interfere with each other
Several terms are important in dealing with this subject. Electromagnetic interference
is, actually, the production of unwanted RF energy. Electromagnetic compatibility is
the ability of two via es and ground, such as I cm. Both differential mode and
Page2
common mode noise a transmission line to (3) a radiating structure or antenna. Two
examples illustrate the problem:
Desktop PC:A new desktop personal computer is placed on a turntable in an
electromagnetic compatibility chamber which is a shielded room lined with absorbing
pyramids. Three meters away there is a broadband antenna connected to a spectrum
analyzer. As the personal computer rotates on the turntable, a technician scans across
the frequency spectrum. The tests reveal an unwanted emission at one half the clock
speeds of the Pentium microprocessor, and it appears to be worse when the back of
the personal computer faces the antenna- The personal computer fails its test. A small
probe, called a sniffer, is used to localize the source of emission. Not only does the
Pentium radiate but other devices connected to it radiate. A graphics card operating at
the Pentium clock speed also radiates and it is on the back side of the personal
computer from which radiation is strongest. The problem is resolved by rearranging
the positions of the cards in the personal computer and adding more screws to the
cover lid of the metal card box to prevent leakage.
Compact disc player on aircraft: It happened that the controls of a jet aircraft went haywire the reason of which
the pilot could not find out. After talking to the flight staff it was learnt that a
passenger had turned on his compact disc player. Whenever the player was on, the
display controls of the plane showed dubious signals. The compact disc player and
others like it were subjected to tests in an electromagnetic compatibility
and found to have radiation at the frequency of the air navigation
system.
The
players were several months old
and the aluminum case had oxidized, forming an insulating layer. Aluminum
oxide, or alumina, is a good insulator and radiation was leaking out. Although
emitting little energy, the compact disc player was at a seat next to a window and only
a couple of meters from the jet's navigation antenna. On the other hand, the navigation
beacon could he 100 km away,
giving
the
compact
disc
player
(100000/2)*(100000/2) = 25*100000000 or 94 dB advantage as an interfering source.

A better box design is required.
Page3
1.2 GENERATION OF ELECTROMAGNETIC INTERFERENCE:

Switching waveforms are inherent in all switching converters. Because of short rise
and fall times, these waveforms contain significant energy levels at harmonic
frequencies in the radio frequency region, several orders above the fundamental
frequency. The transmission of the differential mode noise is through the input line to
the utility system and through the dc-side network to the load on the power converter.
Moreover, conduction paths through stray capacitances between components and due
to magnetic coupling between circuits must also be considered.
Fig.1.1. Block diagram of overhead line interference
Fig.1.2. Waveforms of interference pulses
The transmission of the common mode noise is entirely through parasitic or stray
capacitors and stray electric and magnetic fields. These stray capacitances exist
between various system components and between components and ground. For safety
reasons, most power electronic equipment has a grounded cabinet. The noise
appearing on the ground line contributes significantly to the electromagnetic
interference.
Page4
CHAPTER 2
SOFT SWITCHING
2.1 Introduction:
The high operating efficiency of switched mode power supplies (SMPS)
resulted in widespread acceptance in all power processing applications. The design
demand is forever moving towards higher power densities. This requirement leads to
processing of power at higher switching frequencies. In the conventional SMPS,
higher frequency of operation leads to high switching losses and associated problems.
The concept of soft switching addresses several of these problems. This chapter gives
an overview of soft switching converters.
Historically, the linear power supplies were common during the late 1950's
and 1960's. The controlling devices in these power supplies operate in the active
region. Consequently, power dissipation is large; this power loss is transformed into
heat. The efficiency is therefore poor. The power density is low. Search for higher
efficiency and power density lead to Switched Mode Power Supplies. Here, the
devices are switched either ON or OFF. The control is by pulse width modulation Soft
Switching Converters (PWM). In conventional PWM SMPS, the switches turn-on to
full current from full voltage and turn-of to full voltage from full current as shown in
fig 2.1. Such switching is referred as hard switching. The switching losses during hard
switching are considerable.
Fig.2.1. Hard Switching

An ideal switch takes a finite time to switch-on (tr) and switch-off (tf ). During the
switch-on time the device voltage is defined. During switch-off the device current is
Page5
defined. The second quantity during switching (device current during turn-on and
device voltage during turn-off) is decided by the external circuit to the switch. By
making use of the above characteristics of the devices, attempts are made to minimize
the switching losses. Snubber circuits were used in conventional SMPS to reduce the
switching losses. Snubber circuits are effective, to a limited extent, in reducing the
device stress during the switching transitions. However, they do not reduce the
switching losses appreciably; they only shift the power loss from the switches to the
snubber resistors. Soft switching converters address these issues in a more efficient
way as explained below.
2.2 Soft Switching Converters:
Most soft switching converters rely on the process of resonance. Resonant
switching techniques reduce the switching losses to practically zero; the switching
frequency then may be increased to hundreds of kHz to achieve higher power density.
Such converters in general are classified as Soft switching converters. The
distinguishing feature of the soft switched converters is that, they switch ON and OFF
at zero current and/or zero voltage.
Soft Switching Converters have the following advantages
1. Circuit operation is possible at much higher frequencies, giving scope for reducing
the size of energy storage elements in the converter.
2. di/dt and dv/dt stresses on the switching devices are reduced; noise and interference
are reduced.
3. The parasitic elements of the circuit such as leakage inductance of transformer,
device junction capacitances etc., contribute to well defined desirable switching
transitions leading to low or no switching losses.
The switching techniques in the resonant converter employ zero voltage
switching and/or zero current switching. In zero current switching, the device turns-on
with zero current and turns off after the current drops to zero. In zero voltage
switching, the switch turns-off at zero voltage and turns-on after the device voltage
drops to zero. Fig. 2.2 illustrates the ZVS and ZCS switching trajectory.
Page6
Fig.2.2.Switching strategy
In the ZVS converters, the voltage across the device is brought to zero by
external means, just prior to turn-on, thus eliminating the turn-on losses. During the
turn-off process, the rate of voltage raise is limited by external means (by a capacitor
in shunt with the main switch), so that the device current falls to zero before the
voltage rises substantially i.e. Assisted turn-off.
In the ZCS converters, the current through the device is brought to zero by
external means, just prior to turn-off. Thus the turn-off losses as well as the voltage
spikes due to stray inductance are totally eliminated. During the turn-on process, the
current raise is slowed down by external means (by an inductor in series with the
main switch), so that the device voltage falls to zero before the current becomes
appreciable i.e. assisted turn-on.
2.3 Hard Switching and Soft Switching Techniques:
In the 1970s, conventional PWM power converters were operated in a
switched mode operation. Power switches have to cut off the load current within the
turn-on and turn-off times under the hard switching conditions. Hard switching refers
to the stressful switching behavior of the power electronic devices. The switching
trajectory of a hard-switched power device is shown in Fig.1. During the turn-on and
turn-off processes, the power device has to withstand high voltage and current
simultaneously, resulting in high switching losses and stress. Dissipative passive
snubbers are usually added to the power circuits so that the dv/dt and di/dt of the
power devices could be reduced, and the switching loss and stress be diverted to the
passive snubber circuits. However, the switching loss is proportional to the switching
frequency, thus limiting the maximum switching frequency of the power converters.
Typical converter switching frequency was limited to a few tens of kilo-Hertz
Page7
(typically 20kHz to 50kHz) in early 1980s. The stray inductive and capacitive
components in the power circuits and power devices still cause considerable transient
effects, which in turn give rise to electromagnetic interference (EMI) problems. Fig.2
shows ideal switching waveforms and typical practical waveforms of the switch
voltage. The transient ringing effects are major causes of EMI.
In the 1980s, lots of research efforts were diverted towards the use of
resonant converters. The concept was to incorporate resonant tanks in the converters
to create oscillatory (usually sinusoidal) voltage and/or current waveforms so that
zero voltage switching (ZVS) or zero current switching (ZCS) conditions can be
created for the power switches. The reduction of switching loss and the continual
improvement of power switches allow the switching frequency of the resonant
converters to reach hundreds of kilo-Hertz (typically 100kHz to 500kHz).
Consequently, magnetic sizes can be reduced and the power density of the converters
increased. Various forms of resonant converters have been proposed and developed.
However, most of the resonant converters suffer several problems. When compared
with the conventional PWM converters, the resonant current and voltage of resonant
converters have high peak values, leading to higher conduction loss and higher V and
I ratings requirements for the power devices. Also, many resonant converters require
frequency modulation (FM) for output regulation. Variable switching frequency
operation makes the filter design and control more complicated.
In late 1980s and throughout 1990s, further improvements have been made in
converter technology. New generations of soft-switched converters that combine the
advantages of conventional PWM converters and resonant converters have been
developed. These soft-switched converters have switching waveforms similar to those
of conventional PWM converters except that the rising and falling edges of the
waveforms are smoothed with no transient spikes. Unlike the resonant converters,
new soft-switched converters usually utilize the resonance in a controlled manner.
Resonance is allowed to occur just before and during the turn-on and turn-off
processes so as to create ZVS and ZCS conditions. Other than that, they behave just
like conventional PWM converters. With simple modifications, many customized
control integrated control (IC) circuits designed for conventional converters can be
employed for soft-switched converters. Because the switching loss and stress have
been reduced, soft-switched converter can be operated at the very high frequency
(typically 500kHz to a few Mega-Hertz). Soft- switching converters also provide an
Page8
effective solution to suppress EMI and have been applied to DC-DC, AC-DC and DCAC converters. This chapter covers the basic technology of resonant and softswitching converters. Various forms of soft-switching techniques such as ZVS, ZCS,
voltage clamping, zero transition methods etc. are addressed. The emphasis is placed
on the basic operating principle and practicality of the converters without using much
mathematical analysis.
I
Safe Operating Area
On
Hard-switching
snubbered
Soft-switching
Off
Fig.2.3.Typical switching trajectories of power switches
Fig.2.4.Typical switching waveforms of (a) hard-switched and (b) soft-switched

devices
Page9
2.4 Resonant Switch

Prior to the availability of fully controllable power switches, thyristors were
the major power devices used in power electronic circuits. Each thyristor requires a
commutation circuit, which usually consists of a LC resonant circuit, for forcing the
current to zero in the turn-off process. This mechanism is in fact a type of zero-current
turn-off process. With the recent advancement in semiconductor technology, the
voltage and current handling capability, and the switching speed of fully controllable
switches have significantly been improved. In many high power applications,
controllable switches such as GTOs and IGBTs have replaced thyristors. However,
the use of resonant circuit for achieving zero-current-switching (ZCS) and/or zerovoltage-switching (ZVS) has also emerged as a new technology for power converters.
The concept of resonant switch that replaces conventional power switch is introduced
in this section.
A resonant switch is a sub-circuit comprising a semiconductor switch S and
resonant elements, Lr and Cr. The switch S can be implemented by a unidirectional or
bidirectional switch, which determines the operation mode of the resonant switch.
Two types of resonant switches, including zero-current (ZC) resonant switch and
zero-voltage (ZV) resonant switches, are shown in Fig.3 and Fig.4, respectively.
Lr
Lr
Cr
S
(a)
Cr
(b)
Fig.2.5.Zero-current (ZC) resonant switch.
Lr
Lr
Cr
S
S
Cr
(a)
(b)
Fig.2.6.Zero-voltage (ZV) resonant switch.
Page10
2.5 ZC resonant switch

In a ZC resonant switch, an inductor Lr is connected in series with a power
switch S in order to achieve zero-current-switching (ZCS). If the switch S is a
unidirectional switch, the switch current is allowed to resonate in the positive half
cycle only. The resonant switch is said to operate in half-wave mode. If a diode is
connected in anti- parallel with the unidirectional switch, the switch current can flow
in both directions. In this case, the resonant switch can operate in full-wave mode. At
turn-on, the switch current will rise slowly from zero. It will then oscillate, because of
the resonance between Lr and Cr. Finally, the switch can be commutated at the next
zero current duration. The objective of this type of switch is to shape the switch
current waveform during conduction time in order to create a zero-current condition
for the switch to turn off.
2.5.1 ZV resonant switch
In a ZV resonant switch, a capacitor Cr is connected in parallel with the switch
S for achieving zero-voltage-switching (ZVS). If the switch S is a unidirectional
switch, the voltage across the capacitor Cr can oscillate freely in both positive and
negative half-cycle. Thus, the resonant switch can operate in full-wave mode. If a
diode is connected in anti-parallel with the unidirectional switch, the resonant
capacitor voltage is clamped by the diode to zero during the negative half-cycle. The
resonant switch will then operate in half-wave mode. The objective of a ZV switch is
to use the resonant circuit to shape the switch voltage waveform during the off time in
order to create a zero-voltage condition for the switch to turn on.
2.5.2 ZCS-QRCs
A ZCS-QRC designed for half-wave operation is illustrated with a buck type
dc-dc converter. The schematic is shown in Fig.5(a). It is formed by replacing the
power switch in conventional PWM buck converter with the ZC resonant switch in
Fig.3(a). The circuit waveforms in steady state are shown in Fig.5(b). The output filter
inductor Lf is sufficiently large so that its current is approximately constant. Prior to
turning the switch on, the output current Io freewheels through the output diode Df.
The resonant capacitor voltage VCr equals zero. At t0, the switch is turned on with
ZCS. A quasi-sinusoidal current IS flows through Lr and Cr, the output filter, and the
load. S is then softly commutated at t2 with ZCS again. During and after the gate
pulse, the resonant capacitor voltage VCr rises and then decays at a rate depending on
the output current. Output voltage regulation is achieved by controlling the switching
Page11
frequency. Operation and characteristics of the converter depend mainly on the design
of the resonant circuit Lr - Cr. The following parameters are defined: voltage
conversion ratio M, characteristic impedance Zr, resonant frequency fr, normalized
load resistance r, normalized switching frequency .
M =
Zr =
fr =
Vo
Vi
(1a)
Lr
Cr
(1b)
1
2 Lr C r
(1c)
r=
RL
Zr
(1d)
fs
fr
(1e)
It can be seen from the waveforms that if Io > Vi / Zr, IS will not come back to zero
naturally and the switch will have to be forced off, thus resulting in turn-off losses.
The relationships between M and at different r are shown in Fig.5(c). It can
be seen that M is sensitive to the load variation. At light load conditions, the unused
energy is stored in Cr, leading to an increase in the output voltage. Thus, the switching
frequency has to be controlled, in order to regulate the output voltage.
S CR1
Lr
Lf
Io
iLr
Vi
VCr Cr
Df
Cf
Fig.2.7a.Schematic diagram.
Page12
RL Vo
gate signal
to S
Vi/Zr
IO
ILr
t0
t1
VDS
Vi
VCr
Vi
Fig.2.7b.Circuits waveforms.
1
0.9
10
0.8
r =2
0.7
0.6
0.5
0.5
0.4
0.3
0.2
0.1
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Fig.2.7c.Relationship between M and .

Fig.2.7c.Half-wave, quasi-resonant buck converter with ZCS
If an anti-parallel diode is connected across the switch, the converter will be operating
in full-wave mode. The circuit schematic is shown in Fig.6(a). The circuit waveforms
in steady state are shown in Fig.6(b). The operation is similar to the one in half-wave
mode. However, the inductor current is allowed to reverse through the anti-parallel
diode and the duration for the resonant stage is lengthened. This permits excess
energy in the resonant circuit at light loads to be transferred back to the voltage source
Vi. This significantly reduces the dependence of Vo on the output load. The
Page13
relationships between M and at different r are shown in Fig.6(c). It can be seen that
M is insensitive to load variation.
S
iLr
Lr
Vi
Lf
VCr Cr
Df
Io
Cf
RL Vo
Fig.2.8a.Schematic diagram.
gate signal
to S
Vi/Zr
ILr
IO
t0
t1
VDS
VCr
Fig.2.8b.Circuit waveforms.
1
0.9
r =1-10
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Fig.2.8c.Relationship between M and .

Fig.2.8.Full-wave, quasi-resonant buck converter with ZCS
By replacing the switch in the conventional converters, a family of QRC with ZCS is
shown in Fig.7.
Page14
2.6 Comparisons between ZCS and ZVS

ZCS can eliminate the switching losses at turn-off and reduce the switching losses at
turn-on. As a relatively large capacitor is connected across the output diode during
resonance, the converter operation becomes insensitive to the diodes junction
capacitance. The major limitations associated with ZCS when power mosfets are used
are the capacitive turn-on losses. Thus, the switching loss is proportional to the
switching frequency. During turn-on, considerable rate of change of voltage can be
coupled to the gate drive circuit through the Miller capacitor, thus increasing
switching loss and noise. Another limitation is that the switches are under high current
stress, resulting in high conduction loss.
C1
D1
L1
D1
S1
L1
S1
BUCK
C1
C1
L1
BOOST
L1
C1
D1
D1
C1
D1
BUCK/
BOOST
L1
S1
D1
L1
S1
C1
C1
L1
CUK
D1
L1
C1
D1
C1
L1
SEPIC
D1
Page15
L1
C1
D1
C1
FLYBACK
L1
L1
D1
D1
C1
C1
FORWARD
L1
L1
D1
D1
C1
Fig.2.9.A family of quasi-resonant converter with ZCS

capacitance. The major limitations associated with ZCS when power mosfets
are used are the capacitive turn-on losses. Thus, the switching loss is proportional to
the switching frequency. During turn-on, considerable rate of change of voltage can
be coupled to the gate drive circuit through the Miller capacitor, thus increasing
switching.
It should be noted that ZCS is particularly effective in reducing switching loss for
power devices (such as IGBT) with large tail current in the turn-off process.
ZVS eliminates the capacitive turn-on loss. It is suitable for high-frequency
operation. For single-ended configuration, the switches could suffer from excessive
voltage stress, which is proportional to the load. It will be shown in Section 15.5 that
the maximum voltage across switches in half-bridge and full-bridge configurations is
clamped to the input voltage.
For both ZCS and ZVS, output regulation of the resonant converters can be
achieved by variable frequency control. ZCS operates with constant on-time control,
while ZVS operates with constant off-time control. With a wide input and load range,
both techniques have to operate with a wide switching frequency range, making it not
easy to design resonant converters optimally.
Page16
Fig.2.10.Block Diagram
DC source:
It is the first stage of this project. So it is give the DC supply to Inverter. The DC
source may be Battery or fuel cell or rectified from AC source
Soft single switched Boost Converter:
Boost converter is used to convert low voltage dc to high voltage dc .switching
operate in high frequency. High switching frequency generates EMI and high voltage
stress. This voltage stress should be reduced using soft switch technique .the auxiliary
circuit is used to achieve soft switching
Filter.
Rectifier converts AC to DC. This output has ripples. It is filtered with a help of LC
filters.
Load:
The output has DC output voltage. It is used to run the motor, battery charging, and
telecommunication applications.
Micro controller:
Micro controller is used to generate triggering pulse for mosfets. It is used to control
the outputs. Micro controller have more advantage compare then analog circuits and
micro processor such as fast response, low cost, small size and etc.
Driver:
It is also called as power amplifier because it is used to amplify- the pulse output from
micro controller. It is also called as opto coupler IC. It provides isolation between
microcontroller and power circuits.
Regulated Power supply (RPS):
RPS give 5V supply for micro controller and 12V supply for driver. It is converted
from AC supply. AC supply is step down using step down transformer
Page17
2.7 MODES OF OPERATION:

The proposed converter has six distinct operating modes in a switching cycle.
Mode 1 [t0t1]:
Before the first mode, it is assumed that the main switch is off and Iin flows
through the main diode Do, and thus, the Cr voltage is equal to Vo. At t0, the switch
is turned on under ZCS condition due to series inductor Lrl.

ILr1 (t) = (Vo/Lr1) (t-to)
(2.1)
t1=t1-to = (Lr1 Iin)/Vo
... (2.2)
Fig.2.11.Mode 1
Mode2 [t1-t2]:
At tl, the Lr1 current has reached Iin, and the diode Do current has reached
zero. Thus, the diode do turnoff is under ZCS. In addition, due to the existence of Cr
and based on (3), the Do voltage rises slowly and is considered ZVS. Consequently,
the Do turnoff is ZVZCS. In this mode, Lrl starts to resonate with Cr. This mode ends
when the Cr voltage reaches zero.
Vcr (t ) = Vo cos(r (t t1))
I lr1 (t ) = Iin +
(2.3)
Vo
sin(r (t t1))
Zr
r = 2 fr =
1
Lr1Cr
Zr = Lr1 / Cr
t 2 = t 2 t1 = / 2r
Page18
Fig.2.12.Mode 2
Mode 3 [t2-t3]:
When Vcr reaches zero, diode D1 starts to conduct under ZVS condition, and
the Cr voltage is clamped at zero. Since the total ampere turns of Lr2 and Lrl should
stay constant. Furthermore, the Lr1 current is equal to the sum of the input current and
the Lrl current. The interval of this mode and the previous mode is effectively the
converter duty cycle. This mode ends when the switch is turned off.
( Iin +
Vo
) N1 = I Lr1 N1 + I Lr 2 N 2
Zr
Ilr1 = Iin +
Ilr 2 =
Vo
(n + 1) Zr
Vo
(n + 1) Zr
t 3 = DTs (t1 + t 2)
Fig2.13.Mode 3
Mode 4 [t3 t4]:
By turning the switch off, the ampere turn of Lr1 is transferred to Lr2, and now,
the Lr2 ampere turn is the sum of its previous ampere turn plus the Lr1 ampere turn as
Page19
described by
I Lr1 N1 + I Lr 2 N 2 = I1N 2
where ILr1 and ILr2 are the values of the coupled inductor currents in the previous mode
and I1 is the Lr2 current at t3. Thus, by substituting (8) and (9) in (11), the following is
obtained
Vo
)
Zr
The resonant capacitor charges by Lm plus the Lr2 current until its voltage reaches V0.
I1 = Ilr 2(t 3) = 1 / n( Iin +
The switch voltage, Cr voltage, and Lr2 current during this mode are
1
Vsw(t ) = (n + 1) Zr ( Iin + I1) sin( r (t t 3))
n
1
Vcr (t ) = nZr ( Iin + I1) sin( r (t t 3))
n
1
ILr 2(t ) = ( Iin + I1) cos( r (t t 3)) Iin
n
It can be observed from (13) that the switch is turned off under ZVS condition at the
beginning of this mode. However, in practice, due to the small leakage inductance of
the coupled inductors, a small voltage spike appears across the switch, and then, the
switch voltage rises slowly to its final value. Thus, actually, the switch is turned off
under almost ZVS condition even though the spike peak is usually much smaller than
the switch maximum voltage.
At t4, Vcr reaches Vo; thus, the duration of this mode and the maximum voltage stress of
the switch are
t 4 = t 4 t 3 =
n
Vo
sin 1 (
)
r
Vo + (n + 1) ZrIin
1
Vsw max = Vsw(t 4) = (1 + )Vo
n
Page20
Fig.2.14.Mode 4
Mode 5 [t4-t5]:
This mode begins when the Cr voltage reaches Vo and the diode Do turns on
under ZVS condition. In this mode, the Lrl current decreases linearly. At t5, the Lr2
current reaches zero, and the diode D1 turns off under ZCS condition.
I2 = (
n + 1 2 2 2(n + 1)Vo
Iin Iin
) Iin +
n
n 2 Zr
ILr 2(t ) = I 2
Vo
(t t 4)
Lr 2
t 5 = t 5 t 4 =
Lr 2 I 2
Vo
Fig.2.15.Mode 5
Mode 6 [t5-t6]:
In this mode, /in freewheels through the diode Do, and the current through the
resonant inductors remains zero and the voltage across the resonant capacitor stays at
Vo. The converter operations in continuous conduction mode (CCM) and

discontinuous conduction mode (DCM) are similar. However, CCM is preferred since
Page21
the energy stored in the leakage inductance of the coupled inductors in this condition
is less than that in DCM.
t 6 = (1 D )Ts (t 4 + t 5)
Fig.2.16.Mode 6
Conventional Circuit Drawbacks:
More switching loss
More EMI
High voltage stress and current stress
Required more components for achieving soft switching
Complex control circuit.
Advantages:
Less switching losses due to soft switching
1ess voltage and current stress
No need for additional switches for soft switching
High step up voltage
Simple control method
Better voltage control due to PWM technology
Applications:
Speed control of DC motor
Power supply for DC drives
Battery charging
Back up for server system.
2.8 PWM DC-DC CONVERTERS

2.8.1 POWER STAGES OF THE PWM DC-DC CONVERTERS
The full-bridge and half-bridge converters is shown in fig.2.9 and fig.2.10 are
Page22
mostly used in high power applications.
Fig.2.17. Full-Bridge Converter
Fig. 2.18. Half-Bridge Converter

Pulses of opposite polarity are produced on the primary and secondary windings of
the transformer by switching of the transistor.
In a connection with the halfbridge inverter, the capacitors Cd1 and Cd2 establish a
voltage midpoint between zero and the input dc voltage. The input voltage is equally
divided between the capacitors. The relationship between the input and output voltage
for the halfbridge is
Vo N 2
=
.D
Vd N1
And for the full bridge is
Vo
N
= 2 2 .D
Vd
N1
Where duty cycle is D = Ton T and 0<D<0.5
Page23
Comparison of the fullbridge (FB) converter with the halfbridge (HB) converter for
identical input and output voltages and power ratings requires the following turns
ratio:
N2
N2
= 2
N1 HB
N1 FB
Neglecting the ripple in the current through the filter inductor at the output and
assuming the transformer magnetizing current to be negligible in both circuits, the
transistor currents IC are given by
( I C ) HB = 2( I C ) FB
2.8.2 PWM STRATEGIES FOR FULL-BRIDGE CONVERTER
The conventional control diagram used for hard driven converters is shown in
Fig.2.11. The transistors (T1, T2) and (T3, T4) are switched as pairs alternatively at
the selected switching frequency, which alternately places the transformer primary
across the input supply U for same interval ton. The maximum duty cycle is
50%(D=0.5).
A disadvantage of this switching mode is that when all four switches are turned off,
the energy stored in the leakage inductance of the power transformer causes severe
ringing with junction capacitance of switching devices.
Fig.2.19. Waveforms Of Hard Switching Converter With Conventional PWM

The control scheme in Fig. 2.12 is almost the same as previous except that the duty
cycle in one leg (transistors T1, T4) is constant (D=0.5) and in second leg (transistors
T2, T3) is variable in a range between zero and 50%.
Page24
Fig.2.20. waveforms of converter with modified PWM control

Both legs (transistors T1, T4 and T2, T3) of the bridge operate with a 50% duty cycle,
and the phase shift between the legs is controlled. When the two legs operate in phase,
the differential voltage applied to the transformer is zero, and zero DC output voltage
is obtained. When the two legs of the bridge are in opposite phase, the differential
voltage applied to the transformer, and also the output voltage is maximal.
Fig.2.21. waveforms of converter with phase-shifted PWM control

The phase shift pulse width modulation (PS-PWM) leads to asymmetrical switching
waveforms. The leading leg consists of transistors T1, T4 and the lagging leg consists
of transistors T2, T3. The transistor currents in these legs are not symmetrical. The
PS-PWM control strategy leads to zero-voltage turn-on of the transistors in both of
legs, as it is evident from oscillograms as shown in fig. 2.14 and 2.15
Page25
.
Fig.2.22. Oscillogram
Transistor voltage uCE1 and current iC1 in the leading leg at turnon and turnoff
Fig.2.23. Oscillogram
Transistor voltage uCE2 and current iC2 in the lagging leg at turnon and turnoff
2.9. Soft Switching PWM Converters
The soft switching PWM converter is defined here as the combination of converter
topologies and switching strategies that result in zerovoltage and/or zerocurrent
switching. They are called also pseudoresonant, quasi-resonant, resonant transition,
clamped voltage topologies and other. In these converters the resonant transition is
employed only during a short switching interval. The output voltage is usually
controlled by PWM with constant switching frequency.
Soft switching PWM converters can be classified as follows:
1 ZVS PWM converters
2 ZCS PWM converters
3 ZVS ZCS PWM converters
Page26
2.9.1 ZVS PWM Converters

The simplest ZVS PWM full bridge converter is shown in Fig. 2.16. The converter
snubbers consist of capacitances C1C4 and inductance LR, which are represented by
transistor and diode output capacitances and transformer leakage inductance
respectively.
Fig.2.24. Full-Bridge ZVS PWM converter

The transistors (MOSFETs or IGBTs) in leading or lagging leg are turnedon while
their respective anti-parallel diodes conduct. Since the transistor voltage is zero during
the entire turn-on transition, switching loss does not occur at turnon.
Fig.2.25. Switch (transistor MOSFET T1 and its body diode D1) voltage Uds1 and
current Ids1 during turnon and
turnoff (leading leg)
Page27
Fig.2.26.Switch (transistor MOSFET T2 and its body diode D2) voltage Uds2 and
currentI2 during turnon and turnoff (lagging leg)
By utilising small snubber capacitors C1 C4 the turnoff losses are sufficiently
reduced. If the transistor turnoff time is sufficiently fast, then the transistor is
switched fully off before the collector voltage rises significantly above zero, and thus
negligible turnoff switching loss is incurred. The ZVS converter exhibits low
primaryside switching loss and generated EMI. However, conduction losses are
increased with respect to an ideal hard switching PWM full bridge topology.
At light load, the leakage inductance energy is not sufficient to ensure zero
voltage switching in the lagging leg of the converter. This critical load condition is
also a function of the line condition. The worst case is high input voltage when more
capacitive energy is required. Another consideration is the delay time from the turn
off T4 until the turnon of T1 and vice versa. If the delay time td is too short, then the
device capacitance may not be fully discharged. However, if the delay time td2 is too
long, the capacitor voltage will peak, continue to resonate and drop. Fortunately, the
time of peak charge is relative independent of the input voltage and load condition
and is equal to one quarter of LRC time constant
Page28
Fig.2.27.Transistor voltage Uce1 and current Ic1 at turnoff detail

The secondaryside diodes switch at zero current. This leads to switching losses and
ringing as a result of interaction of diodes capacitance with the leakage inductance of
the transformer. Additional snubber circuitry is usually required, for prevention of
excessive diode voltage stress. To remove the above-mentioned disadvantages a lot of
derivations of the ZVS PWM converters were developed. The penalty for the
improvement is usually higher complexity of the converter topology.
2.10 ZCS PWM Converters
The ZCS PWM converters can be derived from the ZVS PWM converters by
applying the duality principle.
Fig.2.28. Basic circuit diagram of the FB ZCS-PWM converter

The transformer leakage inductance, the rectifiers junction capacitances, and the
transformer winding capacitances can be utilised in this circuit.Similar to the FB
ZVSPWM converter, the FBZCSPWM converter also uses phaseshift control at
Page29
constant
switching
frequency
to
achieve
required
converter
operation.
Fig.2.29.Idealised waveforms of the FB ZCS PWM converter

The switches must have reverse-voltage blocking capability. The switch can be
implemented by an IGBT or a MOSFET in series with a reverse blocking diode, an
IGBT with reversevoltage blocking capability, a MCT, or a GTO. An important
advantage of the circuit is that the rectifier diodes do not suffer from reverse recovery
problem since they commutate with zerovoltage switching. This feature makes the
converter attractive for applications with high output voltage e. g. power factor
correction circuits, where the rectifiers suffer from severe reverserecovery problems
when conventional PWM, ZVSQRC, or ZVS PWM converter techniques are used.
The efficiency of the converter drops significantly at low line and heavy load since
the switches begin to lose zero current switching.
Fig.2.30.Switch S1 voltage and current during turn-on and turn-off
Page30
Fig.2.31.Switch S3 voltage and current during turn-on and turn-off
Table 2.1 some dual characteristics of the FB ZVS PWM converter and FB ZCS
PWM converter
2.11 Zero-Voltage Zero-Current Switching PWM Converters

The operating frequency of IGBTs is normally limited to 20-30 kHz because of their
current tailing problem. To operate IGBTs at higher switching frequencies, it is
required to reduce the turn-off switching losses. ZVS with substantial external
capacitor or ZCS can be a solution. The ZCS, however, is deemed more effective
since the minority carriers are swept out before turning off.
The zero-voltage zero-current switching (ZVZCS) PWM converters are derived from
the full-bridge phase-shifted zero-voltage (FB-PS-ZVS) PWM converters. The PSZVS PWM converter is often used in many applications because this topology permits
all switching devices to operate under zero-voltage switching by using circuit
parasitics such a transformer leakage inductance and devices junction
capacitance.
Page31
However, because of phase-shifted PWM control, the converter has a disadvantage

that circulating current flows through a transformer and switching devices during
freewheeling intervals.
The circulating current is a sum of the reflected output current and transformer
primary magnetizing current. Due to circulating current, RMS current stresses of the
transformer and switching devices are still high compared with that of the
conventional hard-switching PWM full-bridge converter . To decrease the circulating
current to zero and thus to achieve zero-current switching for lagging leg, various
snubbers and/or clamps connected mostly at secondary side oftransformer are applied.
Fig.2.32.Principle of the ZVZCS Converter Operation

Hence, the converter achieves nearly zero-current switching for the lagging leg
(transistors T2, T3) due to minimised circulating current during interval of lagging leg
transition and achieves zero-voltage switching for leading leg (transistors T1 and T3).
An example of ZVZCS PWM converter is shown in Fig.2.27. ZVS of the leading leg
is achieved by the same manner as that of the ZVS full-bridge PWM converter, while
the ZCS of the lagging leg is achieved by resetting the primary current during
freewheeling period by using active clamp in the secondary side, which needs an
additional active switch. Oscillogram of the collector-emitter voltage uCE2 and
collector current iC2 in the lagging leg at turnon and turnoff . The transistor is
turned-on at zero voltage and turned-off at zerocurrent. The circulating current does
not occur, only negligible magnetizing current flows during freewheeling interval
through primary winding of transformer. This combination of switching is very
effective for IGBT transistors, which have problems at turn-off due to tail current
effect. The converter is operating very well at nominal load, but it is not capable
operating over wide load range (from no-load conditions to short circuit) with zerovoltage or zero-current switching for all power switches.
Page32
Fig.2.33.ZVZCS DC-DC PWM converter
Fig.2.34.Improved ZVZCS DC-DC PWM converter

The auxiliary transformer TR2 is the main part of the auxiliary circuits in this
converter.
The transformer TR2 should have considerably large air-gap to ensure sufficiently
high magnetizing current im2 and at the same time to prevent core saturation. The
saw-tooth magnetizing current im2 ensures the zero-voltage turn-off of the transistors
T1, T4 not only at light load but also at no-load conditions.
Simultaneously, charging or discharging of the capacitors C1, C4 by magnetizing
current im2 avoids high current spikes at transistors T1, T4 turn-on at light load and
no-load.
In order not to loose the zero-current turn-off of the transistors T2, T3 at short circuit,
it is necessary to charge up the capacitor Cs to the rated value of the voltage. The
capacitor Cs can be charged from the rectifier GB1, which is connected to the
Page33
secondary winding of the auxiliary transformer TR2. Soft switching and reduction of
circulating currents for full load range are achieved in this converter. The converter is
especially suited for application where short circuit and no-load are normal states of
the converter operation, e.g. arc welding.
Page34
CHAPTER 3
ZERO VOLTAGE SWITCHING PWM CONVERTERS
3.1INTRODUCTION
As one of the typical resonant- type ZVS techniques, the ZVS-QRC technique
eliminates the capacitive turn on loss which plagues zcs-QRCS and pwm converters.
the drain-to-source voltage of the power MOSFET in a ZVS-QRC is shaped to zero
prior to turn on, thus eliminating turn-on switching loss and the miller effect. In
addition the active switch in a ZVS-QRC technique for high frequency conversion
where MOSFETS are
employed. however,the ZVS-QRC technique has several
limitations first,the power switch in a single-ended ZVS-QRC suffers from a high

voltage stress which is proportional to the load range. Using the buck ZVS-QRC as an
example, for a 10% to 100% load range, the peak voltage stress of the power switch
can be 11 times the input voltage. Therefore, a high voltage MOSFET accompanied
by on resistance and large input capacitance has to be used, resulting in a substantial
increase in conduction losses and the gate drive loss. Second, a wide switching
frequency range is required for ZVS-QRC to operate with a wide input voltage and
load range. The wide frequency range makes optimization of the power transformer,
input and output filters, control circuit, and gate drive circuit difficult. For example, to
decrease the conduction loss power MOSFETs with a low on resistance are
preferred. However, MOSFETS with low on resistance are accompained by large
input capacitances which can cause significant drive losses at high frequency
operation especially at high line and light load.
Another n limitation of the ZVS-QRC technique is severe parasitic ringing
between the resonant inductor and the diode junction capacitance. Due to the presence
of the large resonant inductor, this parasitic ringing is enhanced as compared to its
PWM counterpart. In a practical circuit, the severe parasitic ringing not only increases
switching loss and switching loss and switching noise, but may result in possible
instability in the closed-loop system.
In principle, the voltage stress of the power switch in a ZVS-QRC can be reduced
at the expense of a partial loss of ZVS at light load. This may not cause a thermal
problem, since the switch conduction loss is low at light load. In a real circuit,
however to operate a ZVS-QRC in an adequate frequency range, an external capacitor
Page35
as part of the resonant capacitor usually needs to be placed in parallel with the power
switch. In this case, the partial loss of the ZVS at light load may not be allowed,
considering both high switching loss and high switching noise. In particular, the
switching frequency increases as load current decreases, thus the capacitive turn-on
loss can easily become intolerable at light load. With a wide load range, optimization
of ZVS-QRCs is very difficult to achieve. Employing an auxiliary switch across the
resonant inductor in a ZVS-QRC allows the new converter to operate with much
reduced circulating energy and with a constant frequency. It is also shown that the use
of a saturable inductor can further improve the performance of the proposed ZVSPWM converters.
3.2 A Family Of ZVS-PWM Converters
3.2.1 ZVS-PWM Switching Cell
The concept of ZVS quasi-resonant switch was introduced to perform a systematic
analysis of topologies and features of the ZVS_QRCs. By incorporating the PWM
switching cell concept, a ZVS quasi-resonant switching cell can be derived. In this
figure, S is the active switch, D is the rectifying diode, Lf is the energy storage
inductor, Cr is the resonant capacitor, and Lr is the resonant inductor. To achieve ZVS,
the off-time of the power switch is fixed. The output voltage is regulated by varying
the on-time of the switch. By adding an auxiliary switch(S1) across the resonant
inductor, the ZVS-PWM switching cell shown in fig.3.2(b) is obtained. This auxiliary
switch makes the off-time of the power switch(S) controllable. It enables the
converter to regulate the output while operating at a fixed switching frequency.
In the ZVS quasi-resonant switching cell, the resonant inductor begins to oscillate
with the resonant capacitor after the power switch is turned off. The power switch is
turned on with ZVS after the resonance brings Cr voltage zero. The off-time of the
power switch is determined by the resonant period of the resonant components. Thus
a ZVS-QRC operates with constant off-time control. Consequently, a ZVS-QRC
operating with a wide input voltage or load range has a wide frequency range.
In fig.3.1(b), S1 is turned on before the power switch is turned off. When the
power switch is turned off, the resonant inductor current freewheels through S1 for a
period of time. During this freewheel time , the energy stored in the resonant inductor
remains unchanged until S1 is turned off, when the resonant inductor begins to
oscillate with resonant capacitor. The power switch is turned on after the resonance
Page36
brings the capacitor voltage to zero. By controlling the time interval of the
freewheeling stage, the off-time of the power switch can be varied, enabling the
converter to operate with a fixed frequency.
Fig.3.1(a) ZVS quasi-resonant switching cell
Fig.3.1(b) ZVS-PWM Switching cell

To introduce the principle of operation of the ZVS-PWM converters, the buck ZVSPWM converter is used as an example. The circuit schematic and key waveforms of
the buck ZVS-PWM converter are shown in fig.3.2. It can be seen that the new circuit
differs from a buck ZVS-QRC by an additional auxiliary switch placed in parallel
with the resonant inductor. The output filter inductor is considered as a current source
I O in the analysis. As shown in fig.3.3 five topological stages exist with in one
switching cycle.
(1)T0-T1: Before time To, the power switch S is conducting, and the rectifier diode D
is off. At time To, S is turned off. The freewheeling diode D is off, and the resonant
inductor current remains at Io value during this interval. The resonant capacitor is
charged linearly by Io until its voltage reaches the input voltage. The equivalent
circuit of this topological stage is shown in fig.3.3(a).This time interval is given by:
To1 =
CrVi
Io
(3.1)
Page37
(2)T1-T2:At time T1, D starts to conduct. The Lr current still remains constant by
circulating through the auxiliary switch S1. Therefore, the energy stored in the
resonant inductor (which is used to achieve ZVS for S) stays unchanged.
(3)T2-T3: At time T2, S1 is turned off, and the resonance between Lr and Cr begins.
This interval lasts until T3, when resonance brigs VCr to zero and the antiparallel
diode of S starts to conduct. This time period is approximately three quarters of the
resonant period,i.e.,
T23 =
3
Lr Cr
4
(3.2)
(4)T3-T4: S is turned on with ZVS during this time interval. The Lr current increases
linearly while the diode D current decreases. At T4, diode D is turned off with ZCS.
(5)T4-T0: S1 is turned on with ZVS before S is turned off. This interval lasts until t0,
when S is turned off and the cycle is turned off.
Fig.3.2(a) Buck ZVS-PWM converter
Page38
Fig.3.2(b)Buck ZVS-PWM converter waveforms
Page39
Fig.3.3 Equivalent Circuits for five operation stages

From the above description, it can be seen that the operation of th ZVs siS-PWM buck
converter differs from that of the buck ZVS-QRC by possessing an extra freewheeling
stage (T1-T2) during which the resonant inductor current flows through S1 and
remains constant. Constant-Frequency operation is achieved by controlling this
freewheeling diode time interval(T1-T2). Furthermore, the resonant interval (T2-T3)
can be relatively short with respect to the switching period. In this way, the operation
of the proposed circuit is similar o that of the conventional PWM converter during
most portions of a switching cycle. Compared to a ZVS-QRC, the size of the resonant
components becomes much smaller, an circulating energy of the circuit is much
Page40
reduced.
The design strategy for the proposed buck ZVS-PWM converter is quite different
from that of the buck ZVS-QRC. To limit the switch stress voltage, the circuit can be
designed to operate with ZVS only relatively heavy load (e.g., above 50 % load).
Thus the maximum voltage stress of the active switch is approximately three times the
input voltage at full load. At light load, ZVS is partially lost. This does not cause a
thermal problem since the conduction loss is generated.
Page41
Chapter 4
Zero- current Switching PWM converters
4.1 Introduction
Due to continuous improvement of switching characteristics, lower conduction losses,
and lower cost, IGBTs are gaining wide acceptance in switched-mode power
converters/inverters. since IGBT is a minority- carrier device, it exhibits a current tail
at turnoff, which causes considerably high turn-off switching losses. To operate
IGBTs at relatively high switching frequencies, either the ZVS or the ZCS technique
can be employed to reduce switching losses. Basically, the ZVS eliminates the
capacitive turn-on loss and reduces the turn-off switching loss by slowing down the
voltage rise and thereby reducing the overlap between the switch voltage and the
switch current. This technique can be effe, tive when applied to a fast IGBT with a
relatively small current tail.
For slow IGBTs, however, a large external resonant capacitor is required to
reduce the turn-off switching loss effectively. But this may not be tolerable from the
circuit point of view because of topology and design constraints. The ZCS technique
eliminates the voltage and current overlap by forcing the switch current to zero before
the switch voltage rises. Thus ZCS is deemed more effective than ZVS in reducing
IGBT switching losses, particularly for slow devices.
Compared to the ZVS converter topologies the ZCS converter topologies are
less mature. For high- frequency power conversion, the ZCS-QRC technique is most
frequently used. This technique offers ZCS power transistor and ZVS for the rectifier
diode. The diode junction capacitance and the transformer leakage inductance are
utilized to achieve soft-switching.
One of the major limitations of the ZCS-QRC technique is high circulating
energy caused by the resonant inductor which is in series with the power transistor.
As a result, the power switch suffers from a high current stress, and the rectifier from
a high voltage stress. The second limitation is severe parasitic ringing on the power
switch. Since the output capacitance of the power switch is not utilized, it oscillates
with the resonant inductor when the switch is turned off. This low frequency parasitic
ringing not only causes significant switching loss and noise, but also increases the
voltage stress of the power switch. The third limitation of the ZCS-QRC technique is
Page42
capacitive turn-on loss and noise of the power switch. The capacitive turn-on loss
problem may not be severe for power converters using IGBTs or BJTs, since these
devices have relatively low output capacitance, and the operating frequency is also
relatively low. For high frequency power conversion in which power MOSFETs are
used as the power switch, however, this capacitive turn-on loss can be significant.
Another limitation is variable frequency operation, since the ZCS-QRCs operate with
constant on-time control.
This chapter presents a family of ZCS-PWM converters. Employing an
auxiliary switch in series with the resonant capacitor in a ZCS-QRC allows the new
converter to operate with constant frequency and much reduced circulating energy.
The ZCS-PWM converters can also be derived by simply applying circuit duality to
the ZVS-PWM converters. The ZCS-PWM technique is an extension of the ZCSQRC technique.
4.2 A Family of ZCS-PWM Converters
4.2.1. ZCS-PWM Switch
Figure 4.1(a) shows the basic configuration of the ZCS quasi-resonant
switching cell, where Lr and Cr are the resonant inductor and resonant capacitor,
respectively. In the ZCS quasi-resonant switching cell, the resonant inductor begins to
oscillate with the resonant capacitor when the power switch is turned on. The power
switch is turned off with ZCS after the resonance brings switch current to zero. To
achieve ZCS for the power switch, the on-time of the power switch, which is
determined by the resonant period of the resonant tank, is fixed. The output voltage is
regulated by varying the off-time of the switch. Thus a ZCS-QRC operates with
constant on-time control. Consequently, a ZCS-QRC operating with a wide input
voltage or load range has a wide frequency range.
By inserting an auxiliary switch (S1) in series with the resonant capacitor, the
ZCS-PWM switching cell is shown in fig.4.1(b) is obtained. In the ZCS-PWM
switching cell, S1 is is off when the power switch is turned on. The resonance
between Lr and Cr does not occur until S1 is turned on. When S1 is turned on, Lr
starts to resonate with Cr . After the resonance brings the Lr current to zero, S is
turned off with ZCS. Therefore, the function of S1 is to hold off the resonance for a
period of time. By controlling the hold-off time period, the on-time of the power
switch can be varied, enabling the ZCS-PWM converters to regulate the output while
Page43
operating at a fixed switching frequency.

In principle, the power switch in fig.4.1 can be implemented with either a halfwave or a full-wave switch. Since all the ZCS-PWM converters can be operated with
fixed frequency , different implementation of the power switch does not significantly
affect the basic characteristics of the converter. In practice, since the implementation
of the half-wave switch requires the use of a diode in series with the power transistor,
it will increase the conduction loss of the converter. To simplify the analysis, only the
full-wave version is discussed in the following the section.
Fig.4.1(a) ZCS quasi-resonant switching cell
Fig.4.1(b) ZCS-PWM switching cell

For each ZCS-PWM converter, the auxiliary switch can be implemented in two
ways as shown in 4.2. With different implementation, both the operation and the
performance of a ZCS-PWM converter are slightly different. In the following section,
the buck ZVS-PWM converter is used as an example to introduce the principle of
operation of the ZCS-PWM converters.
Page44
Fig.4.2 Two ZCS-PWM switching cells with different implementation of the

auxiliary switch
4.2.2 Buck ZCS-PWM converter

4.2.2.1 Buck ZCS-PWM Converter
Figure 4.3 shows the circuit schematic and the waveforms of the ZCS-PWM
buck converter. This converter can be derived by replacing the PWM switching cell of
the buck converter with ZCS-PWM switching cell shown in fig.4.2(a). This converter
differs from the buck ZCS-QRC by the introduction of an auxiliary switch which in
series with the resonant capacitor. To simplify the analysis, the input filter inductor
and the output filter capacitor are assumed to be sufficiently large to be considered a
Page45
dc current source( I i ) and a voltage source( Vo ) respectively. As shown in fig.4.4, this

converter has five topological stages in steady-state operation.
(a)T0-T1: Before time To, the power switch (S) is off, and the rectifier diode is
conducting. At time To, S is turned on. The resonant inductor current increases
linearly until it reaches I o at T1. Meanwhile, the current through the freewheeling
diode D decreases at a rate of Vi Lr . This time interval is given by:
T01 =
I o Lr
Vi
(4.1)
(b)T1-T2: At time T1, the current through the rectifier diode reduces to zero and the
diode is turned off with ZCS. Since the auxiliary switch(S1) is off, no resonance
occurs between Lr and Cr . This operating stage is equivalent to the transistor on
stage of the PWM buck converter.
(C)T2-T3: S1 is turned on at T2, initiating the resonance between Lr and Cr . This
resonance first introduces a positive current peaking on the power switch. During this
time, the Lr current or the S current is:
I Lr = I o +
Vi
1
sin
2 L C
Zo
r r
(4.2)
Where Z n = Lr Cr is the characteristic impedance of the resonant tank. After a

quarter of the resonant period, the power switch current reaches its peak value, I S peak
I S peak = I o +
Vi
Zo
(4.3)
At the end of this time interval, the current through S1 starts to reverse. This time
period is s constant:
T23 = Lr Cr
(4.4)
(d)T3-T4: Lr and Cr continue to resonate, and the anti-parallel diode of S1 is in

conduction during this time interval. During this time, the Lr current is given by:
I Lr = I o
Vi
1
sin
2 L C
Zn
r r
(4.5)
After one quarter of the resonant period, this resonance will bring the Lr current to a
Page46
negative peak value if:
Vi
> Io
Zn
At this moment, the gate-drive signals for S and S1 can be disabled at the same time,
so both S and S1 are turned off with ZCS. It can be seen that the worst operating
condition occurs at full load and low line. The resonant inductor current flows
through the anti-parallel diode S when it goes negative. This interval lasts until T3 ,
when the current through the anti-parallel diode S decays to zero and is turned off.
This operating stage is topologically identical to the previous one.
(e)T4-T5: At T4, Cr is still biased with certain voltage. During this time interval, Cr
is quickly discharged by current I o .
(f)T5-T0: Cr is discharged to zero voltage at T4. The L f current freewheels through
D during this time interval. This operating stage is identical to the freewheeling stage
of the PWM buck converter. This interval lasts until To, when S is turned off, and the
switching cycle is repeated.
Page47
Fig.4.3 Buck ZCS-PWM converter and its waveforms
Page48
Fig.4.4 Equivalent Circuits for different operating modes of the buck ZCS-PWM
converter
Page49
CHAPTER 5
SIMULATION RESULTS
Fig.5.1a.Proposed Circuit Diagram

The PWM controlled soft single switched boost converter circuit diagram as shown in
the fig.5.1a. It is used to less DC voltage to high DC voltage with minimum switching
loss and less voltage stress. 5.1b shows the input voltage and fig.5.1c shows the gate
pulse and Vds voltage across switch. fig 5.1d shows the output voltage and fig.5.1f
shows the comparison graph between input (vs) output voltage.
Fig.5.1b.Input DC Voltage
Page50
Fig.5.1c.Switching Pulse (ii) Corresponding Voltage across the Switch
Fig.5.1d.Output Voltage
Fig.5.1e.Output current
Page51
Fig.5.1f.comparison of input vs output voltage

Voltage Stress:
In fig 5.2a and 5.2c shows the convention and propsed boost circuit diagram.
Fig 5.2b and 5.2d shows the gate pulse and switch voltage for conventional and
proposed circuit diagram. From fig 5.2b conventional circuit has high voltage stress
and no ZVS switching. But fig 5.2d active the ZVS and low voltage stress across
switch thus the proposed circuit reduce the voltage stress.
Fig.5.2a.Conventional boost converter
Fig.5.2b. Gate pulse and Vds voltage
Page52
Fig.5.2c. Proposed circuit diagram
Fig.5.2d. Gate pulse and Vds voltage

Open loop system:
The output voltage change with respect to input voltage. It is shown in fig.
5.3b and 5.3c. fig 5.3a shows the open loop system circuit diagram. In this circuit
initially 50v is applied after 0.4 sec 10% voltage should be rised . thus changes shown
in fig.
Fig.5.3a.Open loop circuit Diagram
Page53
Fig.5.3b.Input voltage with Disturbance
Fig.5.3c.Output voltage with disturbance
Closed loop system:

Closed loop system is used to control the output voltage. The output voltage is
compared with set value. Commparator gives the difference batween two signals it is
called as error. Error signal is given to PI controller. PI controller adjust Kp and Ki
gains based on the error signals. It is compared with one triangle carrier signal. It
generates a PWM pulse. It is given to MOSFET thus PWM pulse is generated. It is
control the output voltage. Fig.5.4a shows the closed loop system and fig.5.4b shows
the regulated output voltage with disturbance.
Page54
Fig.5.4a.Closed Loop Circuit Diagram
Fig.5.4b.output voltage with Disturbance
Page55
CONCLUSION
The PWM soft single switched boost converter is simulated in both open and closed
loop system. Open loop system explains about switching stress. Voltage stress should
be reduced using soft switching technique. This converter does not require any extra
switch to achieve soft switching, which considerably simplifies the control circuit.
PWM technique is used to control the output voltage. Thus PWM and soft switching
technique are improving the proposed converter performance. The output side voltage
regulation is achieved through closed loop system.
Page56
FUTURE SCOPE
The proposed topology can be extended to other non isolated single switch DC-DC
converters such as buck, buck-boost, Cuk, Sepic, and Zeta. It can be extended to
isolated single switch DC-DC converters such as forward, Flyback, isolated Cuk,
isolated Sepic, isolated Zeta.
Page57
REFERENCES
1) Mohammad Reza Amini, Student Member, IEEE, and Hosein Farzanehfard,
Member, IEEE Novel family of PWM soft- single switched DC-DC
converters with coupled inductors IEEE Trans. Industrial electronics,
Vol.56, no.6,june 2009.
2)
E. S. da Silva, E. A. A. Coelho, L. C. Freitas, J. B. Vieira, and V. J. Farias,

A soft-single-switched forward converter with low stresses and two derived
structures IEEE Trans. Power Elect'ran., vol. 19, no. 2, pp. 388395, Mar.
2004.
3)
E. Adib and FF Farzanehfard, Family of isolated zero-voltage transition

PWM converters JET Power Electron., vol. I, no. I, pp. 144-153, Mar. 2008.
4)
T. F. Wu, Y. S. Fai, J. C. Hung, and Y. M. Chen, Boost converter with

coupled inductors and buck-boost type of active clamp IEEE Trans. Jnd.
Electron., vol. 55, no. I, pp. 154-162, Jan. 2008.
5) N. Mohan, T. M. Undeland, andW. P. Robbins, Power Electronics, 3rd

ed.New York: Wiley, 2003, pp. 682690.
6) K. Fujiwara and H. Nomura, A novel lossless passive snubber for
softswitching boost-type converters, IEEE Trans. Power Electron., vol. 14,
no. 6, pp. 10651069, Nov. 1999.
7) S. S. Lee and G.W.Moon, Full ZVS-range transient current buildup
halfbridge converter with different ZVS operations to load variation, IEEE
Trans. Ind. Electron., vol. 55, no. 6, pp. 25572559, Jun. 2008.
8) P. Das and G. Moschopoulos, A comparative study of zero-currenttransition
PWM converters, IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 13191328,
Mar. 2007.
9) J. L. Russi, M. L. D. S. Martins, L. Schuch, J. R. Pinheiro, and H. L. Hey,
Synthesis methodology for multipole ZVT converters, IEEE Trans. Ind.
Electron., vol. 54, no. 3, pp. 17831795, Mar. 2007.
Page58

Soft Single Switched DC-DC Converters With Coupled Inductors

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Implementation of PWM Soft single switched DC-DC converters with coupled inductors

increase. To solve this problem, soft-switching

converters are indispensable. In recent years, great amount of research is done to

1.1 ELECTROMAGNETIC INTERFERENCE:

interference. Because a good receiving antenna is a good transmitting antenna,

players were several months old

(100000/2)*(100000/2) = 25*100000000 or 94 dB advantage as an interfering source.

1.2 GENERATION OF ELECTROMAGNETIC INTERFERENCE:

Fig.1.1. Block diagram of overhead line interference

Fig.1.2. Waveforms of interference pulses

Fig.2.1. Hard Switching

Safe Operating Area

Fig.2.3.Typical switching trajectories of power switches

Fig.2.4.Typical switching waveforms of (a) hard-switched and (b) soft-switched

2.4 Resonant Switch

Fig.2.5.Zero-current (ZC) resonant switch.

Fig.2.6.Zero-voltage (ZV) resonant switch.

2.5 ZC resonant switch

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

Fig.2.7c.Relationship between M and .

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

Fig.2.8c.Relationship between M and .

2.6 Comparisons between ZCS and ZVS

Fig.2.9.A family of quasi-resonant converter with ZCS

2.7 MODES OF OPERATION:

is turned on under ZCS condition due to series inductor Lrl.

t1=t1-to = (Lr1 Iin)/Vo

Vo. The converter operations in continuous conduction mode (CCM) and

More switching loss

High voltage stress and current stress

Required more components for achieving soft switching

Complex control circuit.

Less switching losses due to soft switching

1ess voltage and current stress

No need for additional switches for soft switching

High step up voltage

Simple control method

Better voltage control due to PWM technology

Speed control of DC motor

Power supply for DC drives

Back up for server system.

2.8 PWM DC-DC CONVERTERS

mostly used in high power applications.

Fig.2.17. Full-Bridge Converter

Fig. 2.18. Half-Bridge Converter

Fig.2.19. Waveforms Of Hard Switching Converter With Conventional PWM

Fig.2.20. waveforms of converter with modified PWM control

Fig.2.21. waveforms of converter with phase-shifted PWM control

2.9.1 ZVS PWM Converters

Fig.2.24. Full-Bridge ZVS PWM converter

Fig.2.27.Transistor voltage Uce1 and current Ic1 at turnoff detail

Fig.2.28. Basic circuit diagram of the FB ZCS-PWM converter

Fig.2.29.Idealised waveforms of the FB ZCS PWM converter

Fig.2.30.Switch S1 voltage and current during turn-on and turn-off

Fig.2.31.Switch S3 voltage and current during turn-on and turn-off

2.11 Zero-Voltage Zero-Current Switching PWM Converters

However, because of phase-shifted PWM control, the converter has a disadvantage

Fig.2.32.Principle of the ZVZCS Converter Operation

Fig.2.33.ZVZCS DC-DC PWM converter

Fig.2.34.Improved ZVZCS DC-DC PWM converter

employed. however,the ZVS-QRC technique has several

limitations first,the power switch in a single-ended ZVS-QRC suffers from a high

Fig.3.1(a) ZVS quasi-resonant switching cell

Fig.3.1(b) ZVS-PWM Switching cell

(100000/2)(100000/2) = 25100000000 or 94 dB advantage as an interfering source.