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Objectives
Understand the input/output characteristics of a linear
amplifier
Understand how to use the model of an ideal operational
amplifier (op amp) in circuit analysis
Amplifiers
Ideal amplifier increases the amplitude of a signal without
affecting the phase relationships of different components of
the signal
An amplifier is modeled as a two-port device
Gain:
I/O Impedances:
Zin = Vin / Iin
Zout = Vout / Iout
Assumptions:
1.
2.
It has infinite gain. The difference between the input voltages must
be 0:
V+=VIt has zero output impedance. The output voltage dose not depend
on the output current.
3.
Inverting Amplifier
iF
i+=0,i-=0
i1
V+=0
V+=V-=0
i1=iF+i-iF
Vin=Ri1+VVout=V--RFiF
Vout
RF
Au
Vin
R
Non-Inverting Amplifier
iF
i+=i-=0
V+= Vin
i1=iF-i-iF
i1
+
V+= V
=
= 1 +
Vout
RF
Au
1
Vin
R
10
Voltage Follower
High input impedance and low output impedance
Isolate the source from the rest of the circuit
RF=0 and R=
Vout
RF
Au
1
1
Vin
R
Vout Vin
11
Inverting Summer
Vout
RF
RF
( V1
V2 )
R1
R2
R1 R2 RF
Vout (V1 V2 )
12
Noninverting Summer
R1
= 1+
1
RF
1 + 2 + 3
3
13
Difference Amplifier
1.
RF
Vout1 V1
R1
15
2.
RF
V V3
V2
R2 RF
Noninverting amplifier
Vout 2
RF
RF
RF
(1
)V3 (1
)(
)V2
R1
R1 R2 RF
Superposition
Vout
RF
RF
RF
RF
V1 (1
)(
)V2
(V2 V1 ) ( R1 R2 R )
R1
R1 R2 RF
R
16
Difference Amplifier
Analysis with ideal op amp model
i-=0
V
Vout R1 V1RF
R1 RF
i+=0
RF
V
V2
R2 RF
V-=V+
RF
Vout R1 V1RF
V2
R2 RF
R1 RF
R
Vout F (V2 V1 )
R
17
Example
R1=10k , R2=20k , V1=-1V , V2=1V , Vout?
V1
R1
V2
Vo1 V1 1V
R1
R1
R2
+ V (1 R2 )V 3V
o2
2
R2
R2
Vout
Vout
R2
(Vo 2 Vo1 )
R1
20
(3 1) 8V
10
R1
18
Integrator
V-= V+ =0
iin=Vin /R
iout=CdVout/dt
iin=-iout
Vin
dVout
C
R
dt
t
Vout
Vin ( )d
RC 0
19
Discussions:
If a DC voltage is applied
as an input to an ideal
integrator, how does the
output change over time?
What is the output given
a sinusoidal input?
t
t
0
90
20
Differentiator
iout
iin
V-= V+ =0
iout=Vout/R
iin=CdVin/dt
iin=-iout
Vout
dVin
RC
dt
21
Discussions:
How is the output signal
look like if (a) a square
wave, (b) a triangular
wave, and (c) a sine wave
input signal is applied?
22
Real Op Amp
The input impedance of a real op amp is not infinite
Does not have infinite gain
The maximum output voltage can be obtained from the amplifier is
about 1.4 V less then the supply voltage
Rail-to-rail input (and/or output) op-amps can work with input
(and/or output) signals very close to the power supply rails.
Delay in response
Slew rate/Rise time
Slew rate: the maximum time rate of change possible for the
output voltage
Rise time: the time required for the output voltage to go from
10% to 90% of its final value
24
Bandwidth
Gain bandwidth product (GBP): the product of the open loop
gain and the bandwidth at the at gain
GBP is a constant along the open-loop gain curve
Fall-off frequency
25
Sample Datasheet
26
27
Instrumentation Amplifier
Very high input impedance
Large CMRR
Capability to amplifier low-level signals in a noisy environment
Consistent bandwidth over a large range of gains
28
i-= i+ =0
V-=V+
V3 V1 I1R2
V2 V4 I1R2
V1 V2 I1R1
V3 I ( R3 R4 ) Vout
i-= i+ =0
R4V3 Vout R3
V-=V+ V V3 IR3
R2
R2
V3 ( 1)V1 V2
R1
R1
R2
R2
V4 V1 ( 1)V2
R1
R1
R5 ( R3 R4 )
R4
Vout
V4 V3
R3 ( R3 R5 )
R3
R3 R4
R5
V
V4 V
R3 R5
Vout
R4
R2
[ (1 2 )](V2 V1 )
R3
R1
29
Comparator
No negative feedback, and the circuit exhibits infinite gain
Comparator
Vref
Vin
Vin
Vref
Vout
Vout
+Vsat
+Vsat
0
-Vsat
Vin
0
Vref
Vin
Vref
-Vsat
Schmitt Trigger
A comparator with hysteresis
To convert analog signals to digital signals (signal
conditioning, function generation)
Non inverting
Inverting
32
R1
V
Vsat VTL
R1 R2
33
Initial Condition:
Vout=+Vsat
V+=VTH
When Vin
Vin>VTH
Vout: +Vsat -Vsat
V+=VTL
Vout
+Vsat
VTL
O
-Vsat
VTH
Vin
When Vin
Vin<VTL
Vout: -Vsat +Vsat
34
Vout
+Vsat
VTL
O
-Vsat
VTH
Vin
R1
VTH
Vsat
R1 R2
R1
VTL
Vsat
R1 R2
35
Example
The input is a sinusoidal
signal. Whats the output?
Vi
VTH
t
VTL
Vout
Vsat
t
-Vsat
36
When Vout=-Vsat
R2
R1
Vin
Vsat 0
R1 R2
R1 R2
VTH
R1
Vsat
R2
When Vout=+Vsat
R2
R1
Vin
Vsat 0
R1 R2
R1 R2
R1
VTL Vsat
R2
37
Vout
Vsat
VTH
VTL
O
-Vsat
Vin
R1
VTH Vsat
R2
R1
VTL Vsat
R2
38
R1
VTH
Vsat
R1 R2
R1
VTL
Vsat
R1 R2
39
VC
Vsat
VTH
Vout
Vsat
0
-Vsat
Assuming Vout=+Vsat -> V+=VTH
The capacitor is being charged by Vout (Vc(0)=0)
Vc when Vc<VTH, V-<V+ -> Vout unchanged
when Vc>VTH, V->V+
VC
VTH
t
VTL
-Vsat
VC
Frequency and Period V
TH
2R1
T = 2RC ln 1+
R2
VTL
Vout
1
f=
T
Vsat
t
0
- Vsat
42
Vout?
R2=3k
V1
R1=1k
Vout
2 mA
R3=1k
43