Вы находитесь на странице: 1из 5

The motherboard common signal definition

CLK_CPU_BCLK [1:0]

Bus clock

H_PWRGOOD

Power OK signal

H_CPURESET #

Reset signal

H_VID [6:0]

Voltage identification signal

H_GTLREF

GTL reference voltage

CPU_BSEL [2:0]
H_TEST [1:2]
H_PROCHOT #

I/O
I
I/O

Bus select signal


CPU detection signal
CPU overtemperature indication

H_THRM #

Thermal alarm signal

PM_THRMTRIP

Thermal alarm signal

H_IGNNE #

To ignore numerical error signal

H_INIT #

Initialization

H_INTR

Maskable interrupt

H_20M #

Address bit 20 mask signal

H_FERR #

Floating-point error signal

H_SMI #

A system management interrupt signal

H_STPCLK #

Stop the clock signal

DPRSLPVR

Deep sleep - the regulator signal

DPRSTP #

Depth stop signal

H_CPUSLP #

CPU sleep signal

H_A [31:3] #

I/O

Address bus signals

H_D [63:0] #

I/O

Data bus

H_REQ [4:0] #

I/O

Command request

H_TRDY #

I/O

Target ready

H_ADS #

I/O

Address Strobe

H_ADSTB [1:0] #

I/O

Address Strobe

H_AP [1:0] #

I/O

Address parity

H_DBSY #

I/O

Data bus is busy

H_DP [3:0] #

I/O

Data parity

MA_A [13:0]

Memory address

M_DQ [63:0]

I/O

M_DM [7:0]

M_DQS [7:0]

I/O

Data strobe

M_CKE [3:0]

Clock allows

M_CK [4:0] / MA_CK # [4:0]

Clock output

M_CS [3:0] #

Chip select

M_BA [1:0]

Bank Select

M_RAS #

Row address

M_CAS #

Column address

M_WE #

Write enable

NB_CRT_HSYNC

Horizontal synchronizing signal

NB_CRT_VSYNC

Vertical synchronizing signal

NB_CRT_RED

The red analog signals output

NB_CRT_GREEN

The Green analog signal output

NB_CRT_BLUE

The Blue analog signal output

NB_CRT_REFSET

Resistance setting

TV_DACB / DACC

TV signal transmission

DMA

Data lines
Data Masking

Direct access to memory

PCI_AD [31:0]

I/O

Address data bus

PCI_PAR

I/O

Parity signals

PCI_C / BE [3:0] #

I/O

Instruction or byte Enable


Bus - Peripheral Component
Interconnect bus

PCI
PCI_REQ #

Request

PCI_GNT #

Guarantee

PCI_RST #

Reset signal

PCI_FRAME #

I/O

Cycle framework

PCI_IRDY #

I/O

Master device ready signal

PCI_TRDY #

I/O

Signal from the device is ready

PCI_STOP #

I/O

Stop

PCI_DEVSEL #

I/O

Device select signal

PCI_IDSEL
PCI_LOCK #

I
I/O

Initialize the device selection


Locking

PCI_CLK_LAN

Network clock

TP_RX [2:0]

Accept data

TP_TX [2:0]

Transfer data

LAN_RSTSYNC

Lan Chip reset signal

EE_SHCLK

EEPROM clock

EE_DIN

EEPROM data input

EE_DOUT

EEPROM data output

EE_CS

Chip select signal

OC #

Overcurrent protection

USBP + (-)

I/O

USB signal

IDE_PDCS1 #

Device chip select

IDE_PDA [2:0]

Device address

IDE_PDD [15:0]

I/O

IDE_PDDREQ

Device requests

IDE_PDDACK #

Device DMA confirmation

IDE_PDIOR #

Disk I / O read

IDE_PDIOW #

Disk I / O write

IDE_PDIORDY

I / O channel ready

SATA0TXP (N)

Transmission of serial ATA0

SATA0RXP (N)

Serial ATA0 accept

SATARBIAS (#)

The Serial ATA resistance bias

OD

SATA to read and write instructions

SATALED #
SMB

Device data

Full System Management Bus

SMBDATA

I/O

Data lines

SMBCLK

I/O

Clock line

LAD [3:0]

I/O

Composite line of the address data

LFRAME #

I/O

LPC framework

LDRQ #

DMA request

ACZ_RST #

Reset signal

ACZ_SYNC

Sync signal

ACZ_SDATAOUT

Serial data output

ACZ_SDATAIN [1:0]

Serial data input

HP_JD_SENSE #

Within the external speaker switch

MIC_JD_SENSE #

Within external micphon switching

PWRBTN #

Power button signal

RSMRST #

Restore the normal reset signal

PWROK

Power good signal

PLTRST #

Total reset signal

SLP_S3 ( S4 , S5 ) #

Sleep control signal

LRST1 #

LPC reset signal

ROMRD #

The data has been ready.

ROMCS #

Chip select signal

EC_POWER_ON

Power on signal

BATT_TEMP

Battery Identification

ADAPTOR_I

Adapter current setting

BAT_V

Battery voltage identification

BAT_I

Charge / still charge

EC_BRGHT

Light and dark adjustment

CHG_I

Charging current setting

FAN_CTRL0

Fan Control

CHG_REF

Charging reference voltage

SB_RTCRST

RTC reset

PM_THROTTING #

Over-temperature alarm

CHG_G_LED

Charging instructions (Green)

PWR_LED

Power Indicator

RF_LED

Wireless LAN indicator

BTL_BEEP

Alarm tone control

BATOFF_I

Battery Close

LCD_SW [2:0]

LCD switch

ADAP_IN

Adapter access

CHG_ON

Charging open

LCDSW

LCD backlight switch

LID #

Sleep-pin switch

AUX_PWRGD

AUX voltage is normal

V_RPWRGD

CPU voltage is normal

AUX_OFF

AUX voltage shutdown signal

AUX_PWR_ON

AUX voltage is turned