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Профессиональный Документы
Культура Документы
Delft
University of
Technology
1.
SystemC-TLM
Transaction Level Modeling
SystemC-TLM
Topics
SystemC-TLM
Hardware Development
Early development
Improve schedule and
ensure sufficient coverage
Requires some accuracy
Software Development
Early development
Requires speed
Architectural Analysis
Do interconnections meet
needs?
Requires quick modeling and
1st order accuracy
SystemC-TLM
Fundamental Ideas
TLM 2.0 models Memory-Mapped Bus-Transport
Exchange information (payload)
between initiator and target
Initiator
Initiator
Initiator
Target
Target
Target
time
Information
Updated
SystemC-TLM
Initiator
Initiator
2. Generic payload
Command
Address
Data
Byte enables
Response status
Extensions
Target
Target
&
payload
reference
4. Base protocol
BEGIN_REQ
END_REQ
BEGIN_RESP
END_RESP
SystemC-TLM
6
CPU
CPU
I/O
I/O
Interconnect
Interconnect
Mem
Mem
CPU
CPU
Mem
Mem
Processor
Processor bus
bus
I/O
I/O
DMA
DMA
Peripheral
Peripheral bus
bus
Mem
Mem
Periph
Periph
SystemC-TLM
Arbiter
Arbiter
void
b_transport(TRANS& payload, sc_time& t);
2. void
void
nb_transport_fw(TRANS& payload,
PHASE& ph,
sc_time& t);
tlm::tlm_fw_transport_if<>
tlm::tlm_bw_transport_if<>
10
Target
Target
Target
Target
SystemC-TLM
11
Target_mdl
Target_mdl
init_process
init_skt->fw()
Foreward
methods
Backward
methods
init_skt->bw()
target_process
SystemC-TLM
12
};
13
};
14
~Top_mdl();
// Destructor
SystemC-TLM
15
Older terminology
Untimed(UT), Programmers View (PV),
Programmers View with Timing (PVT), Cycle Accurate
Too specific and often miss the point
SystemC-TLM
16
Characteristics
17
18
Initiator
tsim = 100ns
Call
b_transport(gp, 0ns)
tsim = 140ns
b_transport(gp, 0ns)
Call
Return
b_transport(gp, 0ns)
Initiator is blocked until return from b_transport
tsim = 180ns
wait(40ns)
b_transport(gp, 0ns)
wait(40ns)
Return
Not Optimal
SystemC-TLM
19
19
Initiator
tsim = 180ns
Call
tlo
tsim = 180ns
b_transport(gp, 0ns)
b_transport(gp, 40ns)
cal
Return
= 18
0+40
ns
Call
b_transport(gp, 40ns)
tlo
b_transport(gp, 80ns)
cal
= 18
0+80
ns
tlo
cal
= 26
0+0
ns
Return
wait(80ns)
tsim = 260ns
20
Characteristics
Sufficient for architectural and performance exploration
Processes run in lock-step with simulation time
Transactions have four timing points
21
Negotiation time
Command (read/write) execution time
Response time
Simulation time fidelity
Bus interactions
Techniques
Base Protocol with four timing points
Non-blocking calls (slight coding complexity)
Payload Event Queue to model transport delay
SystemC-TLM
22
Initiator
Initiator
Forward
path
Target
Target
Backward
path
SystemC-TLM
23
END_REQ
Target accepts request and completes the handshake
Bus freed to start additional requests
BEGIN_RESP
Target acquires bus to provide a response
Bus becomes busy
END_RESP
Initiator acknowledges response to complete it
Bus freed
Payload reference freed up
SystemC-TLM
24
TLM_UPDATED
Transaction, phase and timing arguments updated (used) on return
Target has advanced the protocol state machine to the next state
TLM_COMPLETED
Transaction, phase and timing arguments updated (used) on return
Target has advanced the protocol state machine straight to the final phase
enum tlm_sync_enum
{ TLM_ACCEPTED, TLM_UPDATED, TLM_COMPLETED };
SystemC-TLM
25
SystemC-TLM
26
= sc_time_stamp()
For temporal decoupling, local time is added to
simulation time (explained on slides)
+20ns
Call
-, BEGIN_REQ, 0ns
Return
27
Target
Initiator
Simulation time = 100ns
Call
BEGIN_REQ
Return
-, BEGIN_REQ, 0ns
TLM_ACCEPTED, -, -
Call
TLM_ACCEPTED, -, -
Return
-, BEGIN_RESP, 0ns
Call
TLM_ACCEPTED, -, -
Return
BEGIN_RESP
Simulation time = 130ns
Call
END_RESP
Return
-, END_RESP, 0ns
TLM_ACCEPTED, -, -
28
Target
Initiator
Simulation time = 100ns
Call
BEGIN_REQ
END_REQ
Return
-, BEGIN_REQ, 0ns
TLM_UPDATED, END_REQ, 10ns
Call
Return
29
Early Completion
Phase
Target
Initiator
END_RESP
-, BEGIN_REQ, 0ns
TLM_COMPLETED, -, 10ns
Return
30
Timing Annotation
Target
Initiator
Phase
-, BEGIN_REQ, 10ns
TLM_ACCEPTED, -, -
BEGIN_REQ
Return
Payload
Event
Queue
Payload
Event
Queue
END_REQ
Return
Call
TLM_ACCEPTED, -, -
SystemC-TLM
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32
MBLite Platform
Router.map
MBLite ISS
router
1i
2i
1tMemory
Ni
2tUart
1i
1tTerminal
Nt
Wishbone bus
1i
2i
1t
1t
Slave1
Slave2
SystemC-TLM
33