TND381 D

The TL431 in the Control of
Switching Power Supplies
Agenda
Feedback generalities
The TL431 in a compensator
Small-signal analysis of the return chain
A type 1 implementation with the TL431
Design examples
Conclusion
Agenda
Design examples
Conclusion
What is a Regulated Power Supply?

Vout is permanently compared to a reference voltage Vref.
The reference voltage Vref is precise and stable over temperature.
The error, = Vref Vout, is amplified and sent to the control input.
The power stage reacts to reduce as much as it can.
Power stage - H
Vout
Control
variable
Error amplifier - G
Rupper
Vin
Modulator - GPWM
Vp
Vref
Rlower
How is Regulation Performed?

Text books only describe op amps in compensators
Vout
Verr
The market reality is different: the TL431 rules!

Vout
Im the
law!
Verr
TL431
optocoupler
How do we Stabilize a Converter?

We need a high gain at dc for a low static error
We want a sufficiently high crossover frequency for response speed
Shape the compensator G(s) to build phase and gain margins!
T (s)
fc = 6.5 kHz
0 - 0 dB
T ( s )
GM = 67 dB
-88
m = 92
-180
10
T ( s ) = 67 dB
100
1k
10k
100k
1Meg
How Much Phase Margin to Chose?

a Q factor of 0.5 (critical response) implies a m of 76
a 45 m corresponds to a Q of 1.2: oscillatory response!
1.80
Q < 0.5 over damping

Q = 0.5 critical damping
Q > 0.5 under damping
Q=5
Q=1
1.40
10
7.5
Q = 0.707
Asymptotically stable
1.00
600m
Q = 0.5 Fast response

and no overshoot!
200m
2.5
15.0u
0
25.0u
35.0u
76
Q = 0.5
Q = 0.1
5.00u
45.0u
25
50
75
100
phase margin depends on the needed response: fast, no overshoot

good practice is to shoot for 60 and make sure m always > 45
Which Crossover Frequency to Select?

crossover frequency selection depends on several factors:
switching frequency: theoretical limit is Fsw 2
in practice, stay below 1/5 of Fsw for noise concerns
output ripple: if ripple pollutes feedback, tail chasing can occur.
crossover frequency rolloff is mandatory, e.g. in PFC circuits
presence of a Right-Half Plane Zero (RHPZ):
you cannot cross over beyond 30% of the lowest RHPZ position
output undershoot specification:
select crossover frequency based on undershoot specs
Vp
Vout(t)
I out
2 f c Cout
What Compensator Types do we Need?

There are basically 3 compensator types:
type 1, 1 pole at the origin, no phase boost
type 2, 1 pole at the origin, 1 zero, 1 pole. Phase boost up to 90
type 3, 1 pole at the origin, 1 zero pair, 1 pole pair. Boost up to 180
10
20
270
270
G ( s )
50
100 200
Type 1
500
1k
10
100
1k
Type 2
10k
100k 10
boost
boost
G ( s ) = 270
1
G (s)
G (s)
G (s)
G ( s )
100
1k
Type 3
10k
100k
Agenda
Design examples
Conclusion
The TL431 Programmable Zener

The TL431 is the most popular choice in nowadays designs
It associates an open-collector op amp and a reference voltage
The internal circuitry is self-supplied from the cathode current
When the R node exceeds 2.5 V, it sinks current from its cathode
K
R
K
R
TL431A
A
2.5V
R
A
K
The TL431 is a shunt regulator

The TL431 lends itself very well to optocoupler control
Vdd
Slow lane
Fast lane
Vout
Vout
R pullup
RLED
RLED
R1
I1
VFB
I bias =
I LED
Rbias
C2
Rbias
V f 1V
I1
C1
TL431
1V
Rbias
Rlower
Vmin = 2.5 V
dc representation
RLED must leave enough headroom over the TL431: upper limit!

This LED resistor is a design limiting factor in low output voltages:
RLED ,max
Vout V f VTL 431,min

Vdd VCE , sat + I bias CTR min R pullup
R pullup CTR min
When the capacitor C1 is a short-circuit, RLED fixes the fast lane gain
Vout ( s )
Vdd
RLED
R1
VFB ( s ) = CTR R pullup I1
I1
I1 =
R pullup
VFB ( s )
Ic
0V
in ac
Rlower
Vout ( s )
RLED
R pullup
VFB ( s )
= CTR
Vout ( s )
RLED
This resistor plays a role in dc too!
The TL431 the Static Gain Limit

Let us assume the following design:
Vout = 5 V
Vf = 1V
RLED ,max
5 1 2.5
20k 0.3
4.8 0.3 + 1m 0.3 20k
VTL 431,min = 2.5 V

Vdd = 4.8 V
RLED ,max 857
VCE , sat = 300 mV

I bias = 1 mA
CTR min = 0.3
R pullup = 20 k
G0 > CTR
R pullup
RLED
> 0.3
20
> 7 or 17 dB
0.857
In designs where RLED fixes the gain, G0 cannot be below 17 dB

You cannot amplify by less than 17 dB
The TL431 the Static Gain Limit

You must identify the areas where compensation is possible
dB
40.0
180
20.0
90.0
-17 dB
-20.0 -90.0
-40.0
Not ok
H (s)
f c > 500 Hz
Requires
less
than 17 dB
of gain
arg H ( s )
ok
-180
10
Requires
17 dB
or more
100
500
1k
10k
100k
TL431 Injecting Bias Current

A TL431 must be biased above 1 mA to guaranty its parameters
If not, its open-loop suffers a 10-dB difference can be observed!
> 10-dB difference
Ibias = 1.3 mA
Easy
solution
Ibias
Rbias
Ibias = 300 A
Rbias =
1
= 1 k
1m
Agenda
Design examples
Conclusion
TL431 Small-Signal Analysis

The TL431 is an open-collector op amp with a reference voltage
Neglecting the LED dynamic resistance, we have:
Vout ( s )
RLED
I1
R1
C1
I1 ( s ) =
Vout ( s ) Vop ( s )
1
sC1
1
= Vout ( s )
Vop ( s ) = Vout ( s )
Rupper
sRupper C1
1
1
I1 ( s ) = Vout ( s )
1 +
RLED sRupper C1
We know that:
Vop ( s )
RLED
Rlower
VFB ( s )
VFB ( s ) = CTR R pullup I1
R pullup CTR 1 + sRupper C1

=
Vout ( s )
RLED
sR
C
upper 1

In the previous equation we have:
9 a static gain G0 = CTR
R pullup
RLED
9 a 0-dB origin pole frequency po =

1
9 a zero z =
1
C1 Rupper
Rupper C1
We are missing a pole for the type 2!

Vdd
Type 2 transfer function
R pullup
VFB ( s )
C2
Add a cap. from

collector to ground
R pullup CTR
1 + sRupper C1
=
Vout ( s )
RLED
sRupper C1 (1 + sR pullup C2 )
VFB ( s )

The optocoupler also features a parasitic capacitor
it comes in parallel with C2 and must be accounted for
Vout(s)
Vdd
Rpullup
VFB(s)
FB
C2 = C || Copto
Copto
e
optocoupler

The optocoupler must be characterized to know where its pole is
Cdc
10uF
Ic
2
Rled
20k
5
O ( s )
Rpullup
20k
Rbias
VFB
Vdd
5
X1
SFH615A-4
Vbias
Vac
IF
O (s)
-3 dB
4k
Adjust Vbias to have VFB at 2-3 V to be in linear region, then ac sweep

The pole in this example is found at 4 kHz
Copto =
1
2 R pullup f pole
1
2 nF
6.28 20k 4k
Another design
constraint!
Agenda
Design examples
Conclusion
The TL431 in a Type 1 Compensator

To make a type 1 (origin pole only) neutralize the zero and the pole
R pullup CTR
1 + sRupper C1
=
Vout ( s )
RLED
sRupper C1 (1 + sR pullup C2 )
VFB ( s )
sRupper C1 = sR pullup C2
CTR
po =
C2 RLED
C1 =
R pullup
Rupper
substitute
C2
po =
1
Rupper RLED
R pullup CTR
CTR
C2 =
2 f po RLED
Once neutralized, you are left with an integrator

1
G (s) =
s
po
| G ( f c ) |=
f po
fc
f po = G fc f c
C2 =
CTR
2 G fc f c RLED
C1
TL431 Type 1 Design Example

We want a 5-dB gain at 5 kHz to stabilize the 5-V converter
Vout = 5 V
Vf = 1V
VTL 431,min = 2.5 V
Vdd = 4.8 V
VCE , sat = 300 mV
RLED ,max 857
Apply 15%
margin
RLED = 728
I bias = 1 mA
CTR min = 0.3
R pullup = 20 k
G fc = 10
5
20
= 1.77
f c = 10 kHz
C2 =
CTR
0.3
=
7.4 nF
2 G fc f c RLED 6.28 1.77 5k 728
Copto = 2 nF
C = 7.4n 2n = 5.4 nF
C1 =
R pullup
Rupper
C2 14.7 nF

SPICE can simulate the design automate elements calculations
parameters
Vout=5
Vf=1
Vref=2.5
VCEsat=300m
Vdd=4.8
Ibias=1m
A=Vout-Vf-Vref
B=Vdd-VCEsat+Ibias*CTR*Rpullup
Rmax=(A/B)*Rpullup*CTR
Vdd
{Vdd}
4.80V
6
Rpullup
{Rpullup}
Rupper=(Vout-2.5)/250u
fc=5k
Gfc=-5
VFB
RLED
{RLED}
3.97V
4
Rpullup=20k
Cpole
{Cpole}
RLED=Rmax*0.85
R2
{Rupper}
2
2.50V
R5
100m
10
C3
1k
R6
1k
C1
{C1}
2.96V
4.99V
err
4.99V
Fpo=G*fc
4.99V
7
2.50V
2.50V
G=10^(-Gfc/20)
pi=3.14159
L1
1k
4.99V
E1
-1k
0V
B1
Voltage
V(err)<0 ?
0 : V(err)
V2
2.5
V3
AC = 1
C1=Cpole1*Rpullup/Rupper
X2
Cpole1=CTR/(2*pi*Fpo*RLED)
Optocoupler
Cpole=Cpole1-Copto
Cpole = Copto
CTR = CTR
Fopto=4k
Copto=1/(2*pi*Fopto*Rpullup)
CTR = 0.3
X1
TL431_G
R3
10k
Automatic bias
point selection

Hu?
We have a type 1 but 1.3 dB of gain is missing?

dB
G (s)
20.0
10.0
3.7 dB
0
-10.0
-20.0
270
arg G ( s )
180
90.0
0
-90.0
100
200
500
1k
2k
5k
10k
20k
50k
100k

The 1-k resistor in parallel with the LED is an easy bias
However, as it appears in the loop, does it affect the gain?
Vout(s)
VFB = I c R pullup = I L R pullup CTR
ac representation
VFB(s)
I1
Ib
IL
Rd
Ic
Rpullup
Rbias
Vf
Rbias
Rbias + Rd
Vout
Rbias
IL =
RLED + Rbias || Rd Rbias + Rd
I L = I1
RLED
VFB
Vout
R pullup CTR
s =0
Rbias
=
RLED + Rbias || Rd Rbias + Rd
CTR
Both bias and dynamic resistances have a role in the gain expression

A low operating current increases the dynamic resistor
SFH615A-2 -FORWARD CHARACTERISTICS
Rpullup = 20 k, IF = 300 A (CTR = 0.3)

Rd = 158
0.002000
0.001800
IF Forward Current(A)
0.001600
Rpullup = 1 k, IF = 1 mA (CTR = 1)
Rd = 38
0.001400
0.001200
IF = 1 mA
0.001000
IF @ 110C
IF @ 70C
0.000800
IF @ 25C
0.000600
IF @ -20C
IF @ -40C
0.000400
IF = 300 A
0.000200
0.000000
0.2
0.4
0.6
0.8
1.2
1.4
1.6
VF Forward Voltage (Volts)
Make sure you have enough LED current to reduce its resistance

The pullup resistor is 1 k and the target now reaches 5 dB
dB
20.0
Yes!
G (s)
10.0
5 dB
0
-10.0
-20.0
270
180
arg G ( s )
90.0
0
-90.0
100
200
500
1k
2k
5k
10k
20k
50k
100k
Agenda
Design examples
Conclusion

Our first equation was already a type 2 definition, we are all set!
Vdd
Vout
R pullup
RLED
R1
VFB
G0 = CTR
z =
1
Rbias
C2
C1
p =
1
TL431
Rlower
R pullup
RLED
1
Rupper C1
1
R pullup C2
Just make sure the optocoupler contribution is involved

You need to provide a 15-dB gain at 5 kHz with a 50 boost
f p = tan ( boost ) + tan 2 ( boost ) + 1 f c = 2.74 5k = 13.7 kHz
f z = fc
f p = 25k 13.7k 1.8 kHz
G0 = CTR
R pullup
RLED
= 1015 20 = 5.62
With a 250-A bridge current, the divider resistor is made of:

Rlower = 2.5 250u = 10 k
R1 = (12 2.5 ) 250u = 38 k
The pole and zero respectively depend on Rpullup and R1:

C2 = 1 2 f p R pullup = 581 pF
C1 = 1 2 f z R1 = 2.3 nF
The LED resistor depends on the needed mid-band gain:

RLED =
R pullup CTR
G0
= 1.06 k
ok
RLED ,max 4.85 k

The optocoupler is still at a 4-kHz frequency:
C pole 2 nF
Already above!
Type 2 pole capacitor calculation requires a 581 pF cap.!

The bandwidth cannot be reached, reduce fc!
For noise purposes, we want a minimum of 100 pF for C
With a total capacitance of 2.1 nF, the highest pole can be:
f pole =
1
1
=
= 3.8 kHz
2 R pullup C 6.28 20k 2.1n
For a 50 phase boost and a 3.8-kHz pole, the crossover must be:
fc =
fp
tan ( boost ) + tan ( boost ) + 1
2
1.4 kHz

The zero is then simply obtained:
fc 2
fz =
= 516 Hz
fp
We can re-derive the component values and check they are ok

C2 = 1 2 f p R pullup = 2.1 nF
C1 = 1 2 f z R1 = 8.1 nF
Given the 2-nF optocoupler capacitor, we just add 100 pF

In this example, RLED,max is 4.85 k
G0 > CTR
R pullup
RLED
> 0.3
20
> 1.2 or 1.8 dB
4.85
You cannot use this type 2 if an attenuation is required at fc!

The 1-dB gain difference is linked to Rd and the bias current
dB
30.0
G (s)
20.0
10.0
0
14 dB @ 1.4 kHz
-10.0
140
arg G ( s )
130
120
50
110
100
10
100
1k
10k
100k
TL431 Suppressing the Fast Lane

The gain limit problem comes from the fast lane presence
Its connection to Vout creates a parallel input
The solution is to hook the LED resistor to a fixed bias
Vdd
R pullup
Vout
Vbias
RLED
R1
Comp. network
changes!
VFB
Vdd
R pullup
Rbias
C2
C1
TL431
Rz
RLED
VFB
Rbias
C2
Vout
Vz
Rlower
R2
C1
TL431
Rlower
R1

The equivalent schematic becomes an open-collector op amp
Vdd
R pullup
Vout
Vz
RLED
Vout ( s )
R1
G1 ( s )
VFB
C1
G (s)
R2
C2
Transmission
chain O(s)
Vref
Compensaton
chain G1(s)
Rlower
O (s)
VFB ( s )

The small-signal ac representation puts all sources to 0
Vout
O(s) =
R pullup
RLED
CTR
1
1+ sR pullup C pole
R1
G (s)
O (s)
C1
VFB
IC
C2
CTR
R pullup
R2
G1 ( s ) =
IL
RLED
Rlower
1+ R 2 C1
sR1C1

The op amp can now be wired in any configuration!
Just keep in mind the optocoupler transmission chain
O(s) =
R pullup
RLED
CTR
1
1+ sR pullup C pole
Wire the op amp in type 2A version (no high frequency pole)
G1 ( s ) =
1+ R 2 C1
sR1C1
When cascaded, you obtain a type 2 with an extra gain term
G(s) =
R pullup
RLED
G2
1+ R2C1
CTR
sR1C1 (1+ sR pullup C pole )
TL431 Type 2 Design Example No Fast Lane

We still have a constraint on RLED but only for dc bias purposes
RLED ,max
Vz V f VTL 431,min
R pullup CTR min
You need to attenuate by -10-dB at 1.4 kHz with a 50 boost

The poles and zero position are that of the previous design
Vz = 6.2 V
Vf = 1V
VTL 431,min = 2.5 V
Vdd = 4.8 V
VCE , sat = 300 mV
RLED ,max 1.5 k
Apply 15%
margin
RLED = 1.27 k
I bias = 1 mA
CTR min = 0.3
R pullup = 20 k
f z = 516 Hz f p = 3.8 kHz

We need to account for the extra gain term:
G2 =
R pullup
RLED
20k
CTR =
0.3 = 4.72
1.27k
The required total mid-band attenuation at 1.4 kHz is -10 dB
G fc = 1010 20 = 0.316
The mid-band gain from the type 2A is therefore:
G0 0.316
G1 =
=
= 0.067 or 23.5 dB
G2
4.72
Calculate R2 for this attenuation:
R2 = G1 R1
fc
+ 1
fp
2
fz
+1
fc
= 2.6 k

An automated simulation helps to test the calculation results
parameters
Vout=12
Rupper=(Vout-2.5)/250u
fc=1.4k
Gfc=10
Vf=1
Zener
Ibias=1m
Vref=2.5
value
VCEsat=300m
Vdd=5
Vz=6.2
Rpullup=20k
Fopto=4k
Copto=1/(2*pi*Rpullup*Fopto)
CTR=0.3
Vout
G1=Rpullup*CTR/RLED
G2=10^(-Gfc/20)
G=G2/G1
pi=3.14159
C2
fz=516
{C2}
fp=3.8k
C1=1/(2*pi*fz*R2)
Cpole2=1/(2*pi*fp*Rpullup)
C2=Cpole2-Copto
a=(fz^2+fc^2)*(fp^2+fc^2)
c=(fz^2+fc^2)
R2=(sqrt(a)/c)*G*fc*Rupper/fp
Rmax1=(Vz-Vf-Vref)
Rmax2=(Vdd-VCEsat+Ibias*(Rpullup*CTR))
RLED=(Rmax1/Rmax2)*Rpullup*CTR*0.85
D1
1N827A
C4
0.1u
Vdd
{Vdd}
5.00V
R5
1k
6.17V
6
12.0V
Err
R4
{Rpullup}
2.51V
E1
-1k
12
X2
Optocoupler
Cpole = Copto
CTR = CTR
11
2.50V
1
10
C1
{C1}
X1
TL431_G
LoL
1kH
R2
{R2}
Rlower
10k
2.50V
9
12.0V
13
2.50V
Rbias
1k
3.31V
0V
14
Rupper
{Rupper}
4.32V
4
CoL
1kF
12.0V
R1
{RLED}
Vac
B1
Voltage
V(err)
Vref
2.5

The simulation results confirm the calculations are ok
dB
10.0
G (s)
0
-10.0
-20.0
-10 dB @ 1.4 kHz
-30.0
150
arg G ( s )
130
50
110
90.0
70.0
10
100
1k
10k
100k
TL431
Agenda
Design examples
Conclusion

The type 3 with a TL431 is difficult to put in practice
Vdd
R pullup
Vout
RLED
R pz
R1
fz1 =
f p1 =
C pz
G=
Rbias
C2
C1
Rlower
1
2 R1C1
f z2 =
1
2 ( RLED + R pz ) C pz
1
2 R pz C pz
f p2 =
1
2 R pullup ( C2 || Copto )
R pullup
RLED
CTR
RLED fixes the gain and

a zero position
Suppress the fast lane for an easier implementation!
TL431

Once the fast lane is removed, you have a classical configuration
Vdd
R pullup
Vout
Vz
Rz
RLED
R1
C1
1
2 R2C1
f z2 =
1
2 R1C3
f p1 =
1
2 R3C3
f p2 =
1
2 R pullup ( C2 || Copto )
G=
R pullup
R3
C3
Rbias
C2
fz1 =
R2
Rlower
RLED
CTR
TL431

We want to provide a 10-dB attenuation at 1 kHz
The phase boost needs to be of 120
place the double pole at 3.7 kHz and the double zero at 268 Hz
Calculate the maximum LED resistor you can accept, apply margin
RLED ,max
Vz V f VTL 431,min
R pullup CTR min 1.5 k
X 0.85
1.3 k
We need to account for the extra gain term:
G2 =
R pullup
RLED
20k
CTR =
0.3 = 4.6
1.3k
The required total mid-band attenuation at 1 kHz is -10 dB
G fc = 1010 20 = 0.316
TL431

The mid-band gain from the type 3 is therefore:
G0 0.316
G1 =
=
= 0.068 or 23.3 dB
G2
4.6
Calculate R2 for this attenuation:
R2 =
G1 R1 f p1
f p1 f z1
fc
1+
f p
1
f z1
1+
fc
fc
1+
f p
2
fc
1+
f z
2
= 744
C1 = 800 nF C2 = 148 pF C3 = 14.5 nF Copto = 2 nF

The optocoupler pole limits the upper double pole position
The maximum boost therefore depends on the crossover frequency

The decoupling between Vout and Vbias affects the curves
dB
G (s)
10.0
-9.3 dB @ 1 kHz
0
-10.0
Isolated 12-V
dc source
-20.0
-10 dB @ 1 kHz
-30.0
arg G ( s )
240
200
160
135
120
80.0
1
10
100
1k
10k
100k
TL431
Agenda
Design examples
Conclusion
Design Example 1 a Single-Stage PFC

The single-stage PFC is often used in LED applications
It combines isolation, current-regulation and power factor correction
Here, a constant on-time BCM controller, the NCL30000, is used
141V
Ip
X2
XFMR
RATIO = -250m
Vout
Iout = 2.4 A
52.5V
-210V
8.74V
7
vc
154mV
X1
PWMBCMVM
L=L
GAIN
3.09V
V1
{Vrms*1.414}
PWM switch BCM
Fsw
Ip
68.4V
Dc
1 V = 1 s
19
Fsw (kHz) duty-cycle
598mV
R1
100m
0V
R2
50m
X5
K = Gpwm
GAIN
D4
1N965
52.5V
R7
65k
26.9V
9
4
11
50 V
2 A string
1.57V
22
L1
{L}
C5
0.1uF
C1
2.2mF
B1
Voltage
V(errac)-0.6
Rsense
1.24V
0.5
Vsense
23
parameters
Vdd
15.1V
{Vdd}
Vrms=100
L=400u
1.25 V
1.24V
ILED
14
R5
{RLED}
5.00V
R4
{Rupper}
18
Ct=1.5n
Icharge=270u
Gpwm=(Ct/Icharge)*1Meg
On-time
selection
VFB
errac
LoL
1k
2.17V
CoL
1k
20
AC = 1
V3
12.2V
17
16
X4
Optocoupler
Cpole = Copto
CTR = CTR
C2
{C2}
Ac out
R6
{Rpullup}
2.17V
29
0V
ac in
2.17V
10
11.1V
13
1.24V
15
X3
TLV431
R9
{R2}
C4
{C1}
28
1.24V
Average simulation

Once the converter elements are known, ac-sweep the circuit
Select a crossover low enough to reject the ripple, e.g. 20 Hz
dB
8.00
4.00
H (s)
-2.5 dB
20 Hz
0
-4.00
-8.00
80.0
40.0
arg H ( s )
-11
0
-40.0
-80.0
1
10
20
50
100
200
500
1k

Given the low phase lag, a type 1 can be chosen
Use the type 2 with fast lane removal where fp and fz are coincident
dB
20.0
2
1
10.0
fc = 19 Hz
13
0.5
15 V
-10.0
3
-20.0
5V
10
6.1 k
11
ton
generation
10 k
20 k
180
90.0
T (s)
m = 90
586 nF 13.6 k
395 nF
-90.0
12
G (s)
-180
1
argT ( s )
2
10
20
50 100 200
500 1k

A transient simulation helps to test the system stability
6.00
4.00
2.2 A
2.00
I LED ( t )
0
-2.00
VFB ( t )
5.00
4.60
4.20
3.80
3.40
4.00
2.00
0
I in ( t )
-2.00
-4.00
20.0m
60.0m
100m
140m
180m
Vin = 100 V rms
Design Example 2: a DCM Flyback Converter
We want to stabilize a 20 W DCM adapter

Vin = 85 to 265 V rms, Vout = 12 V/1.7 A
Fsw = 65 kHz, Rpullup = 20 k
Optocoupler is SFH-615A, pole is at 6 kHz
Cross over target is 1 kHz
Selected controller: NCP1216
1.
2.
3.
4.
5.
Obtain a power stage open-loop Bode plot, H(s)

Look for gain and phase values at cross over
Compensate gain and build phase at cross over, G(s)
Run a loop gain analysis to check for margins, T(s)
Test transient responses in various conditions

Capture a SPICE schematic with an averaged model
DC
vc
a
duty-cycle
389mV
90.0V
X2x
XFMR
RATIO = -166m
3
PWM switch CM
839mV
-76.1V
Vin
90
AC = 0
D1A
mbr20200ctp
12.0V
vout
12.6V
R10
20m
0V
X9
PWMCM
L = Lp
Fs = 65k
Ri = 0.7
Se = Se
vout
13
L1
{Lp}
8
V(errP)/3 > 1 ?
1 : V(errP)/3
12.0V
1
C5
3mF
B1
Voltage
Coming from FB
Look for the bias points values: Vout = 12 V, ok
Rload
7.2

Observe the open-loop Bode plot and select fc: 1 kHz
dB
40.0
180
20.0
90.0
H (s)
Phase at 1 kHz
-70
0
-20.0 -90.0
-40.0
-180
10
arg H ( s )
Magnitude at 1 kHz
-23 dB
100
1k
10k
100k

Apply k factor or other method, get fz and fp
fz = 3.5 kHz fp = 4.5 kHz
Vout(s)
Vdd
38 k
2 k
20 k
k factor
gave
C = 3.8 nF
FB
VFB(s)
10 nF
2.5 nF
install
C2 = 3.8n 1.3n 2.5 nF
10 k
Copto = 1.3 nF

Check loop gain and watch phase margin at fc
4
dB
180
80.0
90.0
40.0
T (s)
argT ( s )
m = 60
0
-90.0 -40.0
Crossover
1 kHz
-180 -80.0
10
100
1k
10k
100k

Sweep ESR values and check margins again
12.04
Vout(t)
Hi
line
12.00
Excellent!
11.96
11.92
100
mV
Low
line
11.88
200 mA to 2 A in 1 A/s
3.00m
9.00m
15.0m
21.0m
27.0m
Use an Automated Design Tool

To speed-up your design studies, use the right tool!
1.
Enter
calculated
values
3.
Compute
pole/zero
check open
loop gain
2.
Show power
stage gain
and phase
4.
See final
values on
TL431
www.onsemi.com
NCP1200, design tools
Conclusion
Classical loop control theory describes op amps in compensators
Engineers cannot apply their knowledge to the TL431
Examples show that the TL431 with an optocoupler have limits
Once these limits are understood, the TL431 is simple to use
All three compensator types have been covered
Design examples showed the power of averaged models
Use them to extensively reproduce parameter dispersions
Applying these recipes is key to design success!
Merci !
Thank you!
Xi-xie!
For More Information
View the extensive portfolio of power management products from ON

Semiconductor at www.onsemi.com
View reference designs, design notes, and other material supporting

the design of highly efficient power supplies at
www.onsemi.com/powersupplies

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The TL431 in the Control of

Switching Power Supplies

What is a Regulated Power Supply?

How is Regulation Performed?

The market reality is different: the TL431 rules!

How do we Stabilize a Converter?

How Much Phase Margin to Chose?

Q < 0.5 over damping

Q = 0.5 Fast response

phase margin depends on the needed response: fast, no overshoot

Which Crossover Frequency to Select?

What Compensator Types do we Need?

The TL431 Programmable Zener

The TL431 is a shunt regulator

The TL431 Programmable Zener

The TL431 Programmable Zener

Vout V f VTL 431,min

R pullup CTR min

VFB ( s ) = CTR R pullup I1

This resistor plays a role in dc too!

The TL431 the Static Gain Limit

VTL 431,min = 2.5 V

RLED ,max 857

VCE , sat = 300 mV

In designs where RLED fixes the gain, G0 cannot be below 17 dB

The TL431 the Static Gain Limit

TL431 Injecting Bias Current

TL431 Small-Signal Analysis

VFB ( s ) = CTR R pullup I1

R pullup CTR 1 + sRupper C1

TL431 Small-Signal Analysis

9 a 0-dB origin pole frequency po =

We are missing a pole for the type 2!

Add a cap. from

TL431 Small-Signal Analysis

TL431 Small-Signal Analysis

Adjust Vbias to have VFB at 2-3 V to be in linear region, then ac sweep

The TL431 in a Type 1 Compensator

Once neutralized, you are left with an integrator

TL431 Type 1 Design Example

RLED ,max 857

TL431 Type 1 Design Example

TL431 Type 1 Design Example

We have a type 1 but 1.3 dB of gain is missing?

TL431 Type 1 Design Example

VFB = I c R pullup = I L R pullup CTR

TL431 Type 1 Design Example

Rpullup = 20 k, IF = 300 A (CTR = 0.3)

VF Forward Voltage (Volts)

TL431 Type 1 Design Example

The TL431 in a Type 2 Compensator

Just make sure the optocoupler contribution is involved

TL431 Type 2 Design Example

f p = tan ( boost ) + tan 2 ( boost ) + 1 f c = 2.74 5k = 13.7 kHz

f p = 25k 13.7k 1.8 kHz

With a 250-A bridge current, the divider resistor is made of:

R1 = (12 2.5 ) 250u = 38 k

The pole and zero respectively depend on Rpullup and R1:

The LED resistor depends on the needed mid-band gain:

RLED ,max 4.85 k

TL431 Type 2 Design Example

Type 2 pole capacitor calculation requires a 581 pF cap.!

TL431 Type 2 Design Example