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Fall 2014
2013 Catalog Data:
CPEG 448 - Design and implementation of very large scale integrated circuits. CMOS and BiCMOS
technologies, basic topological structure of ICs. Clocking characteristics, resistance, capacitance and
power estimation, system level design and implementation issues. Custom layout and verification
using CAD tools. Synthesis of designs from VHDL descriptions. Term project will include the design
and testing of a custom integrated circuit.
3 lecture hours, 3 semester hours.
Prerequisites: CPEG 315 and EE 348
Textbook:
CMOS VLSI Design: A Circuits and Systems Perspective, by Neil H E Weste, David
Harris; Addison-Wesley, 4th Edition, 2010
(1 Week)
(1 Week)
(1 Week)
(1 Week)
(2 Weeks)
(3 Weeks)
Resistance estimation
MOS transistor capacitance and routing capacitance
Distributed RC effects, wire length design guide
Inductance calculations, delay estimation (rise and
Fall delays)
Gate delays and body effect minimization
CMOS buffer design to optimize delay
Power consumption estimation, sizing conductors
Charge sharing, scaling of MOS transistor dimensions
Complementary CMOS, PseudoNMOS, Clocked CMOS,
CVSL, BiCMOS and Dynamic CMOS
Layout of CMOS circuits using Mentor Graphics
(2 Weeks)
(2 Week)
(1 Week)
Class/Laboratory Schedule:
Lectures:
2 sessions per week with duration of 1hr 15min each
Lab Sessions: Laboratory work is an integral part of this course. Several laboratory assignments
emphasize the practical aspects of the course. Laboratory projects are implemented using
Mentor Graphics VLSI design software where students do the actual layout and
simulation of the digital VLSI designs. Written reports (using a word processor) are
required for all labs. There is a required final project where a complete design of
medium complexity digital VLSI circuit ranging from simulation to complete chip layout
is required.
Lab Schedule:
Week
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Topic
VHDL Part 1 and Assignment 1
VHDL Part 2 and Assignment 2
Assignment 3
Assignment 4
Verilog Part 1 and Assignment 5
Verilog Part 2 and Assignment 6
Mentor Graphics Part 1 and Assignment 7
Mentor Graphics Part 2 and Assignment 8
Assignment 9
Assignment 10
Project
Project
Project
Project
Project
Credit Hour: As a UB policy it is expected that each student that attends one hour of classroom
instruction will require a minimum of two hours of out of class student work each week for approximately
fifteen weeks for one semester.