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M145027 - M145028
REMOTE CONTROL ENCODER/DECODER CIRCUITS
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..
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M145026 ENCODER
M145027/M145028 DECODERS
MAY BE ADDRESSED IN EITHER BINARY OR
TRINARY
TRINARY ADDRESSING MAXIMIZES NUMBER OF CODES
INTERFACES WITH RF, ULTRASONIC, OR INFRARED TRANSMISSION MEDIAS
DOUBLE TRANSMISSIONS FOR ERROR
CHECKING
4.5V TO 18V OPERATION
ON-CHIP R/C OSCILLATOR, NO CRYSTAL
REQUIRED
HIGH EXTERNAL COMPONENT TOLERANCE, CAN USE 5% COMPONENTS
STANDARD CMOS B-SERIES INPUT AND
OUTPUT CHARACTERISTICS
APPLICATIONS INCLUDE GARAGE DOOR
OPENERS, REMOTE CONTROLLED TOYS,
SECURITY MONITORING, ANTITHEFT SYSTEMS, LOW END DATA TRANSMISSIONS
WIRE LESS TELEPHONES
DIP16 (0.25)
(Plastic package)
ORDER CODES :
M145026B1
M145027B1
M145028 B1
DESCRIPTION
The M145026 encodes nine bits of information and
serially transmits this information upon receipt of a
transmit enable, TE, (active low) signal. Nine inputs
may be encoded with trinary data (0,1, open) to allow 39 (19.683) different codes.
Two decoders are presently available. Both use the
same transmitter - the M145026. The decoders will
receive the 9-bit word and will interpret some of the
bits as address codes and some as data. The
M145027 interprets the first five transmitted bits as
address and the last four bits as data. The M145028
treats all nine bits as address. If no errors are received, the M145027outputsthe four databits when
the transmitter sends address codes that match that
of the receiver. A valid transmission output goes
high on both decoders when they recognize an address that matches that of the decoder. Other receivers can be producedwith different address/data
ratios.
All the devices are available in 16 lead plastic package. The M145026 is available in SO16 plastic
package (narrow) and the M145028 is available in
SO16 plastic package (large).
October 1993
1/13
Decoder
A1/D1
16
VDD
A1
16
V DD
A1
16
V DD
A2/D2
15
DATA OUT
A2
15
D6
A2
15
A6
A3/D3
14
TE
A3
14
D7
A3
14
A7
A4/D4
13
RTC
A4
13
D8
A4
13
A8
M145026
M145028
M145027
A5/D5
12
CTC
A5
12
D9
A5
12
A9
A6/D6
11
RS
R1
11
VT
R1
11
VT
A7/D7
10
A9/D9
C1
10
R2/C2
C1
10
R2/C2
VSS
A8/D8
VSS
VSS
DATA IN
DATA IN
14502-01.EPS
Encoder
BLOCK DIAGRAMS
Figure 1 : Encoder M145026
RTC
RS
CTC
TE
12
11
13
4
3-PIN OSCILLATOR
AND ENABLE
14
DATA SELECT
AND BUFFER
DIVIDER
15 DATA
OUT
9
A1/D1
A2/D2
1
16
VDD
A3/D3 3
V SS
A4/D4 4
A5/D5
TRINARY
DETECTOR
A6/D6 6
A8/D8
A9/D9 10
2/13
14502-02.EPS
A7/D7 7
VALID
TRANSMISSION
15 D6
CONTROL
LOGIC
14 D7
4-BIT
SHIFT
REGISTER
LATCH
13 D8
SEQUENCER CIRCUIT
5
12 D9
A1 1
A2 2
DATA EXTRACTOR
A3 3
A4 4
C1
16 V DD
C2
R1
A5 5
9 DATA IN
10
8 V SS
14502-03.EPS
R2
CONTROL
LOGIC
SEQUENCER CIRCUIT
9
9-BIT
SHIFT
REGISTER
1
2
3
4
DATA EXTRACTOR
C1
9 DATA IN
10
C2
R1
16 VDD
8 VSS
9
14502-04.EPS
R2
10
Symbol
VDD
VI
II
Tstg
Top
Parameter
DC Supply Voltage
Input Voltage, All Inputs
DC Current Drain Per Pin
Storage Temperature Range
Operating Temperature Range
Value
0.5 to + 18
0.5 to VDD + 0.5
10
65, + 150
40, + 85
Unit
V
V
mA
C
C
Stresses above those listed under Absolute Maximum Ratings may causes permanent damage to the device. This is a stress
rating only and functional operation of the device at thses or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
3/13
14502-01.TBL
Symbol
tTLH
tTHL
Parameter
Output Rise and Fall Time
tTLH
tTHL
fCL
tWL
VDD
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
TE Pulse Width
Min.
Typ.
100
50
40
0
0
0
Max.
200
100
80
15
15
15
2
5
5
240
410
450
Unit
ns
ns
ns
ms
ms
ms
MHz
MHz
MHz
kHz
kHz
kHz
ns
ns
ns
Clock
Cycles
25
25
%
%
65
30
20
182
14502-02.TBL
ELECTRICAL CHARACTERISTICS
Parameter
VOL
VOH
VIL
VIH
IOH
IOL
II
II
II
CI
4/13
Input Current
RS (M145026)
Data In (M145027 - M145028)
Input Current
A1/D1-A9/D9 (M145026)
A1-A5 (M145027)
A1-A9 (M145028)
Input Capacitance (VI = 0)
5
10
15
5
10
15
-40oC
Min. Max. Min.
0.05
0.05
0.05
4.95
4.95
9.95
9.95
14.95
14.95
25oC
Typ.
0
0
0
5
10
15
1.5
3
4
2.25
4.50
6.25
VDD
(V)
+85oC
Max. Min. Max.
0.05
0.05
0.05
0.05
0.05
0.05
4.95
9.95
14.95
1.5
3
4
1.5
3
4
Unit
V
V
V
V
V
V
V
V
V
5
10
15
3.5
7
11
3.5
7
11
2.75
5.50
8.25
3.5
7
11
V
V
V
5
5
10
15
-2.5
-0.52
-1.3
-3.6
-2.1
-0.44
-1.1
-3
-4.2
-0.88
-2.25
-8.8
-1.7
-0.36
-0.9
-2.4
mA
mA
mA
mA
5
10
15
5
10
15
15
0.52
1.3
3.6
0.44
1.1
3
3
16
35
0.88
2.25
8.8
4
20
45
0.00001
0.36
0.9
2.4
7
26
55
0.3
mA
mA
mA
A
A
A
A
55
300
650
5
80
340
725
7.5
5
10
15
0.3
1.0
A
A
A
pF
14502-03.TBL
Symbol
CI
IDD
IDD
Quiescent Current
(M145027 - M145028)
IT
IT
VDD
(V)
5
10
15
5
10
15
5
10
15
5
10
15
OPERATING CHARACTERISTICS
M145026
The encoder will serially transmit nine bits of trinary
data as defined by the state of the A1/D1-A9/D9 input pins. These pins can be in either of three states
(0,1, open) allowing 39 = 19683 possible codes.The
transmit sequence will be initiated by a low level of
the TE input pin. Each timethe TE input isforced low
the encoder will output two identical data words.
This redundant information is used by the receiver
to reduce errors. If the TE input is kept low, the encoder will continuously transmit the data words. The
transmitted words are self-completing (two words
will be transmitted for each TE pulse).
Each transmitted data bit is encoded into two data
pulses. A logic zero will beencodedas two consecutive short pulses, a logic one by two consecutive
long pulses, and an open as a long pulse followed
by a short pulse. The input state is determinedby using a weak output device to try to force each input
first low, then high. If only a high state results from
the two tests, the input is assumed to be hard wired
to VDD. If only a low state is obtained,the input is assumed to be hard wired to VSS. If both a high and a
low can be forced at an input, it is assumed to be
open and is encoded as such.
The transmit sequenceis enabled by a logic zero on
the TE input. This input has an internalpullup device
so that a simple switch may be used to force the input low. While TE is high the encoder is completely
disabled, the oscillator is inhibited and the current
drain is reduced to quiescent current. When TE is
brought low, the oscillator is started, and an internal
reset is generated to initialize the transmit sequence. Each input is then sequentially selected
and a determination is made as to input logic state.
This information is serially transmitted via the Data
Out output pin.
-40 C
Min. Max.
Min.
25 C
Typ.
5
0.0050
0.0100
0.0150
30
60
90
100
200
300
200
400
600
Max.
7.5
0.10
0.20
0.30
50
100
150
200
400
600
400
800
1200
+85 C
Min. Max.
Unit
pF
A
A
A
A
A
A
A
A
A
A
A
A
M145027
The decoder will receive the serial data from the encoder, checkit for errors and output data if valid. The
transmitted data consisting of two identical data
words is examined bit by bit as it is received. The first
five bits are assumed to be address bits and must
be encoded to match the address inputs at the receiver. If the address bits match, the next four (data)
bits are stored and compared to the last valid data
stored. if this data matches, the VT pin will go high
on the 2nd rising edge of the 9th bit of the first word.
Between the two data words no signal is sent for
three data bit times. As the second encoded word
is received, the address must again match, and if it
does, the data bits are checked against the previously stored data bits. If the two words of data (four
bits each) match, the datais transferredto the output
data latches and will remain until new data replaces
it. At the same time, the Valid Transmission output
pin is brought high and will remain high until an error
is received or until no input signal is received for four
data bit times.
Although the address information is encoded in trinary fashion, the data information must be either a
one or a zero. A trinary (open) will be decoded as a
logic one.
M145028
This receiver operates in the same manner as the
M145027exceptthat nine address bits are used and
no data output is available. The Valid Transmission
output is used to indicate thata valid signal has been
received.
Although address information normally is encoded
in trinary, the designer should be aware that, for the
M145028, the ninth address bit (A9) must be either
a one or a zero. This part, therefore, can accept only
8
2 x 3 = 13.122 different codes. A trinary (open) A9
will be interpreted as a logic 1. However if the trans5/13
14502-04.TBL
Symbol
6/13
clock periods (four data bit periods). This time constant is used to determine that the Data In input has
remained low for four databit times (end of transmission). A separate comparator looks at a voltage
equivalent two data bit times (0.4 R2C2) to detect
the dead time between transmitted words. R2C2 =
77 x RTC x CTC.
VALID TRANSMISSION, VT. This output will go
high when the following conditions are satisfied:
1. the transmitted address matches the receiver
address, and
2. the transmitted data matches the last valid data
received (M145028 only).
VT will remain high until either a mismatch is received, or no input signal is received for four data
data bit times.
VDD. The most positive supply.
VSS. The most negative supply (usually ground).
Figure 4 : Encoder Oscillator Information
RS
CTC
11
12
RTC
13
INTERNAL
ENABLE
This oscillator will operate at a frequency determined by the external RC network; i.e..
1
f
(Hz) for 1 kHz f 400 kHz
2.3 RTC CTC
where: CTC = CTC + C layout + 12 pF
RS 2 RTC
RS 20 k
RTC 10 k
400pF < CTC < F
The value for RS should be chosen to be about 2
times RTC. This range will ensure that current
through RS is insignificant compared to current
through RTC. The upper limit for RS must ensure
that RS x 5 pF (input capacitance)is small compared
to RTC x CTC.For frequencies outside the indicated
range, the formula will be less accurate. The actual
oscillation range of this circuit is from less than 1Hz
to over 1MHz.
14502-05.EPS
mitter sends a trinary (or logic 1) and the receiver address is a logic 1 (or trinary) respectively, the valid
transmission output will be shortened to the R1 x C1
time constant.
M145026 ENCODER
1st BI T
DATA OUT
(PIN 15)
ONE
1st BIT
9th BIT
TRINARY
180
181
182
183
184
185
178
179
113
114
115
116
117
118
119
120
121
122
86
87
88
89
90
80
81
82
83
84
85
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
ENCODER
OSCILLATOR
(PIN12)
1
2
3
4
5
6
TE
2 WORD
TRANSMISSION
CONTINUOUS
TRANSMISSION
9th BI T
ZERO
1st WORD
2nd WORD
14502-06.EPS
1.1 (R2/C2)
VALID
TRANSMISSI ON
(PIN 11)
DATA
OUTPUTS
ENCODER
ONE
DAT A
OUT
(PIN 15)
ENCODER
ZERO
ENCODER
OPEN
*
Data Pulse Period
14502-07.EPS
* 150ns Pulse appears at this point (this does not affect the transmitter/receiver operation).
7/13
NO
HAS
THE TRANSMISSION
BEGUN?
YES
DOES
THE 5-BIT
ADDRESS MATCH
THE ADDRESS
PINS?
NO
YES
DOES
THIS DATA
MATCH THE PREVIOUSLY
STORED
DATA?
NO
YES
LATCH DATA ONTO
OUTPUT PINS AND
ACTIVATE VT
HAVE
4-BIT TIMES
PASSED?
YES
DISABLE VT
NO
HAS
A NEW
TRANSMISSION
BEGUN?
YES
8/13
14502-08.EPS
NO
NO
HAS
THE TRANSMISSION
BEGUN?
YES
DOES
THIS 9-BIT
ADDRESS (1 T)
MATCH THE
ADDRESS
PINS?
NO
YES
DOES
THE MISMATCH
INVOLVE A0?
DOES
THIS SAME
ADDRESS (1 T) *
MATCH THE PREVIOUSLY
STORED
ADDRESS ?
NO
SHIFT IN
AN EXTRA 1
NO
YES
DISABLE VT
ACTIVATEVT
HAVE
4-BIT TIMES
PASSED?
YES
DISABLE VT
NO
HAS
A NEW
TRANSMISSION
BEGUN?
YES
14502-09.EPS
NO
9/13
M145026 Clock
500
400
VDD =
15V
300
V DD =
10V
VD
100
= 5V
5 10 15 20 25 30 35 40 45 50 55 60
Clayout (pF)
on pins 1-5 (M145027), pins 1-5 and 12-15 (M145028)
14502-10.EPS
200
VDD
VDD
TE
0.1F
0.1F
14
A1
A2
5 TRINARY
ADDRESSES
A3
A4
A5
D6
D7
4-BIT
BINARY
DATA
D8
D9
16
16
15
1
2
2
3
3
R1
4
5
M145026
7
RTC
M145027
A2
A3
5 TRINARY
ADDRESSES
A4
A5
C1
13
A1
15 D6
CTC
14 D7
12
RS
13 D8
11
12 D9
10
10
8
11 VT
C2
8
R2
14502-11.EPS
REPEAT OF
ABOVE
REPEAT OF
ABOVE
fOSC (kHz)
RTC
CTC
RS
R1
C1
R2
C2
362
181
88.7
42.6
21.5
8.53
1.71
10k
10k
10k
10k
10k
10k
50k
120pF
240pF
490pF
1020pF
2020pF
5100pF
5100pF
20k
20k
20k
20k
20k
20k
100k
10k
10k
10k
10k
10k
10k
50k
470pF
910pF
2000pF
3900pF
8200pF
0.02F
0.02F
100k
100k
100k
100k
100k
200k
200k
910pF
1800pF
3900pF
7500pF
0.015F
0.02F
0.1F
10/13
14502-05.TBL
Example R/C Values (all resistors and capacitors are 5 %) (CTC = CTC + 20pF)
b1
a1
Z
e3
a1
B
b
b1
D
E
e
e3
F
i
L
Z
Min.
0.51
0.77
Millimeters
Typ.
Max.
1.65
0.5
0.25
Min.
0.020
0.030
Inches
Typ.
Max.
0.065
0.020
0.010
20
8.5
2.54
17.78
0.787
0.335
0.100
0.700
7.1
5.1
3.3
0.280
0.201
DIP16.TBL
Dimensions
PM-DIP16.EPS
16
0.130
1.27
0.050
11/13
b1
a1
a2
e3
E
D
M
A
a1
a2
b
b1
C
c1
D
E
e
e3
F
G
L
M
S
12/13
Min.
Millimeters
Typ.
0.1
0.35
0.19
Max.
1.75
0.2
1.6
0.46
0.25
Min.
Inches
Typ.
0.004
0.014
0.007
0.5
Max.
0.069
0.008
0.063
0.018
0.010
0.020
45o (typ.)
9.8
5.8
10
6.2
0.386
0.228
1.27
8.89
3.8
4.6
0.5
0.394
0.244
0.050
0.350
4.0
5.3
1.27
0.62
0.150
0.181
0.020
8o (max.)
0.157
0.209
0.050
0.024
SO16.TBL
Dimensions
PM-SO16.EPS
16
e3
b1
a1
a2
D
M
Dimensions
Millimeters
Typ.
0.1
0.35
0.19
Max.
2.65
0.2
2.45
0.49
0.32
Min.
Inches
Typ.
0.004
0.014
0.009
0.5
Max.
0.104
0.008
0.096
0.019
0.012
0.020
45o (typ.)
10.1
10.0
10.5
10.65
0.397
0.393
1.27
8.89
7.4
8.8
0.5
0.413
0.419
0.050
0.350
7.6
9.15
1.27
0.75
0.291
0.346
0.020
0.300
0.360
0.050
0.029
SO16L.TBL
A
a1
a2
b
b1
C
c1
D
E
e
e3
F
G
L
M
S
Min.
PM-SO16L.EPS
16
8o (max.)
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which
may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON
Microelectronics. Specifications mentioned in this publication are subject to change without noti ce. This publ ication supersedes
and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical
componen ts in life support devices or systems without express written approval of SGS-THOMSON Microelectronics.
1994 SGS-THOMSON Microelectronics - All Rights Reserved
Purchase of I2C Compone nts of SGS-THOM SON Microelectronics, conveys a license und er the Philips
I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to
the I2C Standard Specifications as defined by Philips.
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13/13