Akai LCD TV Lct3201td - Service Masnual

SERVICE MANUAL
Model:
LCT3201TD
Safety Instructions.......................................................................1~2
Production specification...........................................................3~11
DVD Player's Spec. for LCD Comb..............................................12
LCD COMBO Connection............................................................13
Panel Inverter Power..............................................................14~29
Basic Operations & Circuit Description..................................... ..30
PCB Function........................................................................... .. 31
PCB Failure Analysis................................................................. 32
Basic Operation of LCD-TV...................................................33~34
IC Descriptions..................................................................... .35~45
LCD Panel specification........................................................ 46~101
Exploded View Diagram.............................................................. 102
Spare parts list.....................................................................103~104
V-Chip Password....................................................................... 105
Software Upgrade................................................................105~106
This manual is the latest at the time of printing, and does not
include the modification which may be made after the printing,
by the constant improvement of product.
I. Safety Instructions
The l ig h tn i ng fla sh w i th arro wh e ad symb ol ,
within an equilatera l triangle, is intended to alert
the user to the presence of uninsulated dangerous
voltage within the prod uct s enclosure that may
be of sufficie nt mag nitud e to consti tute a risk of
electric shock to persons.
CAUTION
RISK O F ELECT RIC SHO CK
DO NO T O PEN
The excla mati on po i nt wi thi n a n e q ui l ate ra l

tri a n gl e is i nte n de d to a le rt th e u se r to th e
presence of important operating and maintenance
(s e rv i ci n g ) i n str u ct i o n s i n th e l i te r a tu re
accompanying the appliance.
CAUTION: TO REDUCE THE RISK OF ELECTRIC

SHOCK, DO NOT REMOVE COVER (OR BACK). NO
USER-SERVICEABLE PARTSINSIDE. REFER
SERVICING TO QUALIFIED SERVICE PERSONNEL
ONLY.
PRECAUTIONS DURING SERVICING
WARNING:
1. In a ddition to safe ty, othe r parts and assemblies are

speci fied for conformance with such regulatio ns as
those applyi ng to sp urious radiation . These must
also be replace d only with specifie d replacements.
Exampl es: RF converters, tun er units, a ntenna
selection switches, RF cables, noise-blo cking
capacitors, noise-bl ocking filters, etc.
2. Use sp ecified inte rnal Wiring . Note especially:
1) Wires covered with PVC tubing
2) Do uble insulated w ires
3) Hig h voltage leads
3. Use specified i nsulating material s for haza rdous
live pa rts. Note espe cially:
1) In sulating Tape
2) PVC tubing
3) Spa cers (insu lating barriers)
4) Insula ting sheets for transistors
5) Plastic screws for fixing micro switches
4. When replacing AC primary side compo nents
(tran sformers, power cords, n oise blo cking
capacitors, e tc.), wra p ends o f wires securely about
the te rminals be fore solde ring.
Before servicing this TV receiver, read the X-RAY

RADIATION PRECAUTION, SAFETY INSTRUCTION
and PRODUCT SAFETY NOTICE.
X-RAY RADIATION PRECAUTION

1. Excessively high can prod uce potentially hazardous
X-RAY RADIATION. To avoid such hazards, the high
volta ge must no t exceed the speci fied limit. The
normal va lue of the high voltage of this TV receiver
is 2 7 KV at zero b ean current (mi nimum b rightne ss).
The high voltage must no t exceed 30 KV u nder any
circu mstances. Each time when a re ceiver req uires
servici ng, the high voltage sho uld be checked. The
readi ng of the high voltage is re commended to be
reco rded as a part o f the service record, It is
important to u se an accurate and reliable high
voltage meter.
2. The only source of X-RAY RADIATION in this TV
receiver is the picture tube. For con tinued X-RAY
RADIATION protectio n, the repla cement tube must be
exactly the sa me type as specified in th e parts list.
3. Some parts in this TV receiver have special safety
related characteristics fo r X-RADIATION protection.
For continued safety, the parts rep lacement should
be under taken only afte r referring the PRODUCT
SAFETY NOTICE.
5. Make sure that w ires do no t contact heat generating

parts (he at sin ks, oxide me tal fi lm resistors, fusi ble
resistors, etc.)
6. Check if replace d wires do not conta ct sharply edged
or po inted pa rts.
7. Make sure that foreign objects (screws, solder
drop lets, etc.) do not remain insi de the set.
SAFETY INSTRUCTION
The se rvice shoul d not be attempted by anyone
unfamiliar with the ne cessary i nstructio ns on th is TV
receiver. The fo llowing are the necessary instru ctions
to be ob served before se rvicing.
1. An isolation transformer shoul d be con nected i n the
power li ne between the receiver and the AC line
when a service is performed o n the primary of the
conve rter tra nsformer of the set.
2. Comply wi th all caution an d safety related provided
on th e back of the cabi net, inside the cabinet, o n the
chassis or p icture tube.
3. To avo id a shock hazard, alw ays discharge the
pictu re tube's anode to the chassis g round be fore
removi ng the anod e cap.
MAKE YOUR CONTRIBUTION TO PROTECT THE

ENVIRONMENT
Used batte ries wi th the ISO symbol
for recycling a s well as small
accumu lators (re chargeable batteries), mini-batteries
(cell s) and starter b atteries should not be thrown
into the garbage can.
Please leave the m at an ap propriate depot.
-2
PRODUCT SAFETY NOTICE
4. Completely discharge the high pote ntial voltage of the

picture tube before handli ng. The pi cture tube is a
vacuum and if bro ken, the gl ass will explode.
5. When rep lacing a MAIN PC B in the cabinet, always
be certai n that all protective are installed properly
such as co ntrol knobs, adjustment co vers o r shie lds,
barri ers, iso lation resistor networks etc.
6. When se rvicing is re quired, observe the origin al lead
dressing. Extra precau tion sho uld be gi ven to a ssure
correct lead dressing in the high voltage area.
7. Keep wires away from high voltage or high te mpera
ture compone nts.
8. Befo re returning the set to the customer, al ways
perform an AC leaka ge current check on the exposed
meta llic parts of th e cabine t, such as anten nas,
termin als, screw heads, meta l overlay, control shafts,
etc., to be sure the set i s safe to operate without
danger of electrica l shock. Plu g the AC lin e cord
directly to the AC outlet (do not use a line iso lation
transformer d uring th is check). Use an AC voltmeter
havin g 5K ohms volt sen sitivity or more i n the
following manner.
Conne ct a 1.5 K ohm 10 watt resistor pa ralleled by a
0.15F AC type capacito r, between a go od earth
ground (water pipe, conductor etc.,) and the exposed
metallic parts, one a t a ti me.
Measure the AC vol tage across the combination of
the 1 .5K ohm resistor and 0.15 uF capacitor. Re verse
the AC p lug at the AC o utlet and repea t the AC
volta ge measurements fo r each exposed metallic
part.
The me asured voltage must not exceed 0.3 V RMS.
This correspo nds to 0.5mA AC. Any val ue exceeding
this limit co nstitute s a poten tial sho ck hazard and
must be corrected immedia tely.
The resista nce me asureme nt shou ld be done
betwe en accessi ble exposed metal parts and power
cord plug prong s with th e power switch "ON". The
resi stance should be mo re tha n 6M o hms.
Many e lectrical an d mechanica l parts in this TV

receiver have special safety-related characteristics.
These characteri stics are offer passed unnoticed by
visual spection and the protecti on afforded by them
cannot necessari ly be obta ined by using replacement
compon ents rates for a hig her voltag e, wattage , etc.
The replacemen t parts w hich have these sp ecial
safety characteristics are identifie d by
marks on
the schematic diag ram and on the parts l ist.
Before replacin g any of these compo nents, rea d the
parts list in thi s manua l care fully. The use of
substitute re placemen t parts which do not have the
same safety chara cteristics as speci fied in the p arts
list may cre ate shock, fire, X-RAY RADIATION or
other h azards.
AC VOLTMETER
Goo d ea rth grou nd

su ch as th e wat er
p ip e , c o n du c t or ,
etc.
Pl ace this pro be

on eac h e x p os ed me t al li c
part
AC Leak age Curr ent Check
-3
KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

Reference No
: LCT3201TD
Product Specification
1.1 VIDEO SECTION
Display size
Display Resolution
Pixel Pitch
Peak Brightness
Contract Ratio
View Angle
Color Deeps
PC Resolution Supporting
HDTV Compatible
Progressive Scanning
Film Mode Pull Down
GAMMA Correction
Color Temperature Control
Comb Filter
Second De-interlace for Sub picture
Wide Mode
TV System
Dual Tuner System
AV Input Color System
PIP
1.2 AUDIO SECTION
Audio Output Power
Sound Effect
Tone Control
1.3 Input Terminals
CHIMEI V320B1-L01
MK8205
USA
32/16:9
1366 X 768
0.17025mm0.51075mm
550(nits)
1000:1, Typical (1/100 White Window, Dark Room)
Hor. And Vert. 170 degree
16.7M Color (R / G/ B each 256 Scales)
VGA, SVGA, XGA,WXGA
480p / 720p / 1080i
Yes
Yes
Yes
Yes
Yes
No
Normal, Full, Wide 1, Wide 2, Wide 3, 4:3, No scale and
Panoramic.
NTSC M
No
PAL /NTSC
Basic mode (video on graphic mode,resolution1024768)
1.4 Output Terminals
6W2 Max.(8 ohm)

Spatial Effect and Surround
Yes
D-Sub 15 Pin Type(Analog-RGB Input ) 1
D-Sub 9 Pin (RS-232)
RF (F-type Input) 1
Component Video-YPbPr 1 RCA Terminals
S-Video Input (Mini Din 4Pin) 1
Video Input RCA Terminals
Stereo Audio Input for YPbPr x 1
(3.5mm Phone Type) x 1
Audio Output (RCA ; L&R Type) 1
1.5 Others
Closed Caption / V-Chip
Teletext
OSD Language
Yes
No
English, Franais, Espaol


Reference No
MTS with SAP
Stereo Decode
Power Rating
Power Consumption
AC 100-240V, 50/60Hz
220W
1.6 Support the Signal Mode

This machine can support the different from VGA signal mode in 7 kinds
Horizontal
Frequency
(kHz)
Vertical
Frequency
(Hz)
31.50
60.00
37.86
72.81
35.16
56.25
37.90
60.32
46.90
75.00
48.08
72.19
48.40
60.00
Resolution
Horizontal
Frequency
(KHz)
Vertical
Frequency
(Hz)
480i
15.734
59.94
480p(720x480)
31.468
59.94
720p(1280x720)
45.00
60.00
1080i(1920x1080)
33.75
60.00
Resolution
640 x 480
800 x 600
1024 x 768
1.7 HDTV Mode (YPbPr)

: LCT3201TD
1.8 Remote Control

Power ( ): Press to turn on and off.
Mute (
): Press to mute the sound.
Press again or press , to restore
the sound.
CCD: Press to select the Closed
Caption mode.
V-CHIP: Press to select the child
protect mode.
MTS: Press repeatedly to cycle through
the Multi-channel TV sound (MTS)
options: Mono, Stereo and SAP
(Second Audio Program).
Favorite: Press repeatedly to cycle
through the favorite channel list.
PIP. Pos: Press to change the PIP
window position under PIP mode.
PIP. Size: Press to cycle through the
PIP size, such as Large, Medium,
Small.
Add/Erase: Press to add or delete
favorite channel.
PIP: Press to cycles through the
different POP or PIP modes, such as
Basic PIP, LR POP, and exit.
0~9 Number Buttons: In TV mode,
press 0~9 to select a channel; the
channel changes after 2 seconds.
In DVD mode, press 0~9 to input the
items.
Zoom: Press to zoom the image max
from 8 times to minimally 1/8 times.
Recall: Press to return to previous
channel.
P.Mode: Press repeatedly to cycle
through the picture mode: Hi-Bright, User, Dark, Normal and Vivid.
P.Size: Press repeatedly to cycle through the picture size that best corresponds your
viewing requirements: Normal, Full, Wide1, Wide2, Wide3, 4:3, No scale, Panoramic
and Normal.
When in POP mode, it can select picture size is: Full, 4:3 and Normal.
Vol / : Press to adjust the volume.
Ch / : Press to scan through channels. To scan quickly through channels, press
and hold down either channels.
Freeze: Press to freeze the picture, press again to restore the picture.
(Continued on next page)

Menu: Press to enter into the on-screen

setup menu, press again to exit.
S.Mode: Press repeatedly to cycle
through the sound mode: Normal,
News, Cinema, Flat and User.
, , , , Enter: Press , , ,
to move the on-screen cursor. To
select an item, press ENTER to
conrm. And it can also press or
to scan through channels, press
or to adjust the volume excepting
DVD mode.
System: Press repeatedly to cycle
through the system options: AUTO
and NTSC3.58.
(This button is inactive for TV, VGA,
COMPONENT input source.)
Source: Press to select the signal
source, such as TV, AV, S-Video,
Component, DVD or VGA.
Sleep: Press repeatedly until it
displays the time in minutes (5 Min,
10 Min, 15 Min, 30 Min, 60 Min, 90
Min, 120 Min and, OFF) that you
want the TV to remain on before
shutting off. To cancel sleep time,
press Sleep button repeatedly
until sleep OFF appears.
Display: Press to display the channel
information and it disappear after 3
seconds.
Play/Pause: Press to play or pause
the DVD disc.
Stop: Press to stop playing the disc.
Angle: Press to select desired viewing
angle of the Video (disc feature).
Open/Close: Press to open or close
the disc tray.
Skip+/-: Press to skip the forward or backward.
Search+/- : Press to search the forward or backward.
DVD Menu: Press to return DVD disc menu.
(Continued on next page)

DVD Info: Press to display DVD

information.
Setup: Press to display a menu.
Press it again to exit menu.
Repeat: Press repeatedly to cycle
through the options: CHAPTER,
TITLE, ALL and nothing.
Audio: Press to select desired audio
track.
Prog: Press to display the program
menu. Press it again to exit.
Sub. title: Press to select desired
DVD subtitle.
Title: Press to display to DVD disc
title.
Note: Press Ch / on the remote
control can turn on TV set from
last preview mode.
l
.


Reference No
: LCT32ADTD
Technical Data
CATV
AC 100-240, 50/ 60Hz

Battery 3V (UM-3/R6P/AA2)
NTSC M
PAL/NTSC 3.58
VHF-L : 2~6CH
VHF-H : 7~13CH
UHF
: 14~69CH
1~125CH
Picture
45.75MHz
Horizontal (Hz)
Vertical (Hz)
15625/15750
50/60
UL Plug
V320B1-L01
8 ohm 10W (max) 2
1. Power supply
TV
Remote control
2. TV system
RF input
Video input
3. Receiving channels TV
4. Intermediate
frequencies
5 . Scanning
6 . AC plug
7. Panel
8. Speaker
9. Operating
temperature
Internal
Fulfill all specifications
Accept picture/sound
reproduction
10. Operating relative Fulfill all specifications
humidity
Accept picture/sound
reproduction
11. Electrical &
optical
specification
12. Circuit diagram
drawing No.
13. Cabinet
14. Cabinet color
15. Packing
16. Container stuffing
method
17. Dimension (mm)
(No packing)
18. Net weight
19. Cell Defect
15C ~ 30C
5C ~ 33C
45% ~ 75%
20% ~ 80%
See the attachment 1.
LCT32HAB
1 set per
RD/05/P/LC26HAB/CSI/02 REV: 01
LCD-TV
Remote control unit
LCD-TV
Remote control
799(W) 569.7(H) 107(D)mm (w/o Stand)

799(W) 635.8(H) 267.5(D)mm (with Stand)
183(L) 53(W) 28(T)mm
18.8Kg (with Stand) approx.
70g (approx.)
Subject to Panel supplier specification


Reference No
: LCT3201TD
Attachment 1Electrical & Optical Specification

No.
Items
Instruction
Typical
Limit
Unit
Video sensitivity
For 30dB S/N
44
51
dBuV
FM sound sensitivity
For 30dB S/N
21
35
dBuV
Color sensitivity
For RF transmission
37
40
dBuV
CCD sensitivity
TV screen refreshes 40 times

number of mistakes8
43
50
dBuV
Minimum NICAM threshold
Without crackline noise
N/A
N/A
dBuV
Stereo Channel Separation
BTSC.
18
15
dB
AGC static characteristic
Accept. Picture/Sound repr.
90
90
dBuV
Selectivity
Adjacent sound carrier
30
28
Below adjacent sound carrier
30
30
Adjacent picture carrier
45
40
Up adjacent picture carrier
40
30
55
45
dB
VHF
57
45
dB
UHF
55
40
IF rejection
10
Image rejection
dB
11
AFT pull-in range
1.0
1.0
MHz
12
Chroma sync pull-in range
500
200
Hz
13
Color killer function
-11
-10
dB
14
Resolution
PAL
300
300
Lines
NTSC
260
240
Lines
PAL
410
400
Lines
NTSC
320
300
Lines
Horizontal
450
450
Lines
Vertical
400
400
Lines
RF
Horizontal
Vertical
Video
15
16
Color
Coordination
View
Angle(Lo/3)
White
XW
Full Pattern
YW
Horizontal
0.295
0.2950.02
0.300
170
0.3000.02
170
Degree
Vertical
17
Overscan
Cross hatch signal
96
94~98
18
Picture position
In all direction
mm
19
H sync pull-in range
400
200
Hz
20
V sync pull-in range
Hz
21
Audio frequency response
0.15~12
0.2~12
KHz
3dB ref. to 1KHz


Reference No
: LCT3201TD
72
5.02
1KHz 10% THD
62
4.02
THD
Po=0.5W
0.5
25
Signal to buzz ratio
coeighting
50
30
dB
26
Minimum volume hum
coeighting
10
mVrms
27
Maximum woofer output power
N/A
N/A
28
Woofer audio frequency

response
3dB ref. to 15Hz AV

mode
N/A
N/A
Hz
29
Tone low frequency
100Hz ref. to 1KHz

AV mode
dB
30
Tone high frequency
10KHz ref. to 1KHz

AV mode
dB
31
Balance
Center
Max.
>2
Min.
-35
-30
22
Max Audio Output Power
23
Audio output power

10% THD
24
dB
32
Video input level
1.0
10.3
Vpp
33
Audio input level*1
1.0 *
0.50.3
Vrms
34
Video output level
N/A
N/A
Vrms
35
Audio output level*2
0.3 *
0.50.3
Vrms
36
AV Audio input max. level
Vrms
37
AV Audio output L/R

Separation
35
30
dB
38
Power consumpution
Operating
200
200
Stand by
0 Degree
5m
60
45
Degree
20
15
Degree
10
mArms
39
IR receiving distance
40
IR receiving
angle
left/right
Up/down
41
Dielectric strength
DC 3KV
1min.
42
The vibration noise from

The distance between
electromagnetic devices in LCD- the tester and the
TV set
LCD-TV set is four
times as many as the
screen height

No obvious vibration noise can be

heard

Reference No
: LCT3201TD
Test Condition
All tests shall be performed under the following conditions unless otherwise specified
1
Picture Modulation
87.5%
Sound Modulation
27KHz Dev. For DK/I/BG

15KHz Dev. For M/N
Picture to Sound Ratio
10dB
8 ohm
Sound Artificial Load

Resistor
Video signal
Audio signal
1KHz sine wave 0.5Vrms
Other conditions:
A. Switch LCD-TV on and let it warm up for more than 30 minutes.
Viewing distance: 3H (H: Panel High) in front of LCD, about 2M.
Ambient light: 0.1 cd/ m2
B. Brightness, Contrast, Saturation, Tint, sharpness set at normal.
C. Connect RMS volt meter to speaker terminals and adjust the LCD volume to get 500mW RMS
power at each terminals.
D. With image sticking protection of LCD module. The luminance will descend by time on a same
still screen and rapidly go down in 5 minutes, when measuring the color tracking and luminance
of a same still screen, be sure to accomplish the measurement in one minute to ensure its
accuracy.
E. Due to the structure of LCD module. The extra-high-bright same screen should not hold over 5
minutes for fear of branding on the panel.
F. RF test point: Video output.
Note:
*(1) Now this project cannot fit the limited spec. the typical audio input level is 1.0 Vrms,
*(2) The audio out level is controlled by the volume level, the range is from 0 to 0.5Vrms.
Stair and Special

DVD player's spec. For LCD-TV Combo

Division
Section
name
Marketing Area( setup default language)
General
Power supply
Power Consumption
Manufactruer of Loader mechanism
Opitical Pick UP
DVD Module
Chipset used
Playback
Playable Media Type
Disc Type
Playable Disc Type
Disc Size
Regional code
NTSC/ PAL Disc playback
Video
Video output signal
Video DAC
Audio
Audio DAC
Dynamic range
Dolby digital decoder
DTS decoder
SRS + TruSurround for 2 channel
3D Virtual surround for 2 channel
Playback
Fast forward/backward
Features
Slow motion forward
Slow motion backward
Still picture
Frame by frame forward/reverse
Skip forward/reverse
Repeat function
DVD closed caption
Transition Effect for picture CD
Rotation of picture for picture CDs
Last Memory
Display
Graphical user interface
user
OSD Language
operation
Subtitle
Screen saver
Resume play
Program function
PBC ON/OFF
Parental lock
Picture mode selector
Intro scan
Digest in VCD
Time search
Multi angle
Selectable audio language streams
kalaoke function
Front Panel
VFD/ LED
No. of keys
Rear Panel
Composite Video output
Component Video output
Progressive scan output (480P)
2 channel audio output
Coaxial audio output

Remarks
AKAI
USA
+5v,+3.3v
15W
Foryou DL06-LS
Sanyo HD-62/65
MTK 1389FE
Playable Disc Type: DVD, CD,
DVD(Single/ Dual layer, Double sided), CD
8cm/12cm
Regional 1
O/O
NTSC
27MHz/ 10bit
48Khz/ 96KHz/24-bit:selectable
Present
Present
optional
Not present
Not present
x2,x4,x8,x16,x32
x1/2,x1/4,x1/8,x1/16
optional
Present
Forward only (Step function)
Present
Present
Present
Not present
Present
Present
Not present
3 (ENG is base ,SPA and French)
Present
Present
Present
Present
Default on PCB
Passward : 0000
16:9, 4:3 LB, 4:3 PS(4:3 PS as default)
Not present
Present, only for PIC CD
Present
Present
Present
x
x
3(Open/Close, Play, Stop)
x
x
Present
Present
Present
LCD COMBO Connection

L
Key Board
R
PWM
On/Off
Turner+Amp
LVDS1
Main board
Panel
PWM
Backlight
+24V
+24V
IR1
+5V
+5V IR2
Key Board
DVD
+5V STB
Power board
+12V
Y/Pb/Pr (480p)
L/R

Dimming
BL_ON/OFF
Dimming
BL_ON/OFF
PANEL INVERTER POWER
Inverter_PWR
HOLE/GND
H1
9
8
7
6
2
3
4
5
CE1
470uF/50v
CE2
470uF/50v
C1
0.1uF
Inverter_PWR
C2
0.1uF
2
3
4
5
PWR_GND
9
8
7
6
2
3
4
5
2
3
4
5
Dimming
BL_ON/OFF
FB6
120R
9
8
7
6
2
3
4
5
1
2
3
4
5
6
7
8
9
10
C3
0.1uF
2
3
4
5
9
8
7
6
2
3
4
5
8x1 W/HOUSING
SIP6\2.54
HOLE/GND
H5
9
8
7
6
10x1 W/HOUSING R.A.

SIP10\2
FB2
120R
9
8
7
6
2
3
4
5
2
3
4
5
FB1
120R
1206
PWR_GND
1206
FB9
120R
2
3
4
5
9
8
7
6
1
9
8
7
6
PWR_GND
INVERTER_PWR
1
2
3
4
5
6
FB7
120R
HOLE/GND
H4
J2
12x1 W/HOUSING R.A

SIP12\2
J3
HOLE/GND
H3
B
1
2
3
4
5
6
7
8
9
10
11
12
R. ANGLE
9
8
7
6
1
9
8
7
6
Inverter_PWR
HOLE/GND
H2
C
J1
R. ANGLE
FB5
120R
FB8
120R
Title
Size
A

5
Date:
<Title>
Document Number
<Doc>
Wednesday, August 24, 2005
2
Rev
<RevCode>
Sheet
of
J5
J4
VGA AUDIO
PHONEJACK/DIP
VGA_R
Dimming
VGA_L
RSTXD
VGA_R
K1
K2
K3
K4
K5
1
2
3
4
G
11
VGA_SDA
12
HS YNC#
13
VSYNC#
14
VGA_SCL
15
DSUB15/DIP/F
DB15
1
6
2
7
3
8
4
9
5
10
BL_ON/OFF
1
3
5
7
9
11
13
15
17
19
21
23
25
27
VGA_L
SC_IN
2
SC_GND1 1
3
4
GREEN
GRN_GND
VGA_PWR
AV1_IN
SC_IN
SC_GND1
SY _IN
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
J8
CB1_INB
CB1_GNDB
AUIO IN/OUT GND
Y1_INB
Y1_GNDB
3
4
CB1_INB
CB1_GNDB
5
6
CR1_INB
CR1_GNDB
J10
AV_L
AV_R
SY_GND1
1
2
YPBPR1/L
3
4
YPBPR1/R
RCA1X2
RCA2/4P/DIP
J11
FB4
120R
ANALOG INPUT GND
1
2
RCA1X3
RCA3/6P/DIP
YPBPR1/L
YPBPR1/R
VIDEO CONNECTOR
DIP10X2/P2.54/R2
FB3
120R
SY _IN
SY_GND1
HS YNC#
VGA_SCL
J9
Y1_INB
Y1_GNDB
CR1_INB
CR1_GNDB
J6
CON\SVHS
RSRXD
PC CONNECTOR
DIP14X2/P2.54/R2
RED
RED_GND
GREEN
GRN_GND
BLUE
BLU_GND
RSTXD
VGA_PWR
17
RSRXD
VGA_SDA
VSYNC#
16
J7
RED
RED_GND
BLUE
BLU_GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
Dimming
BL_ON/OFF
Dimming
BL_ON/OFF
1
2
AV1_IN
3
4
AV_L
5
6
AV_R
RCA1X3
RCA3/6P/DIP
DIGITAL GND
Title
Size
A

5
Date:
<Title>
Document Number
<Doc>
Wednesday, August 24, 2005
2
Rev
<RevCode>
Sheet
of
J1
VSYNC
HSYNC
R
G
B
CLK1+
CLK1CLK2+
CLK2ORO1
VSYNC
HSYNC
R
G
B
3
3
3
3
3
CLK1+
CLK1CLK2+
CLK2-
3
3
3
3
ORO1
AN0
AP0
AN1
AP1
AN2
AP2
+12V
AP[0..7]
AN[0..7]
+12V
+12V
VCC
AN5
AP5
Optinal for 12V pannel.Added by bin_wang 16/7/05

FB1
75R
0805
AP[0..7]
AN[0..7]
CLK1CLK1+
AN3
AP3
AN4
AP4
AN6
AP6
CLK2CLK2+
AN7
AP7
FB2
75R/NC
0805
3
3
Add LVDS VCC control by Zheng_guo 15/9/05.
Q9
F1
4A/32v
1206
CE1
330uF/25v
C330UF25V/D8H14
1
2
3
4
S1
G1
S2
G2
LVDSVDD
8
7
6
5
D1
D1
D2
D2
IR7314
SOP8
+12V
CE2
220uF/16v
+ CE3
220uF/16v
C1
0.1uF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
C2
0.1uF
CRT OUT
R
R1
75 1%
75 1%
HSYNC
FI-SE30P-HF
LVDS/30P/P1.25/S
VSYNC
GND
VS
R3
HS
GND
RGB OUTPUT FOR DEBUGGING
R211
R2
R209 R210
22k
22k
ORO1 High :LVDSVDD POWER OFF

ORO1 LOW :LVDSVDD POWER ON
GND
75 1%
ORO1
Q10
2N3904
1
2
2k
ORO3
PWM0
Dimming
BL_ON/OFF
ORO3
PWM0
Dimming
BL_ON/OFF
3
3
6
6
ORO3 High :PANEL BACKLIGHT POWER OFF

ORO3 LOW :PANEL BACKLIGHT POWER ON
FOR CHI-MEI INVERTER

CONNECTOR
VCC
R4
0
R5
10k
PWM0
R6
R7
Q1
2N3904
SOT23
C3
0.1uF
VCC
4.7k
Dimming
100k
R8
10k
Back Light circuit

ORO3
BL_ON/OFF
R9
Q2
2N3904
SOT23
1
2
4.7k
1
MiCO Confidential
Title

Size
C
Date:
A

MiCO LCD TV - MediaTek MT8203 Solution

Doc Number
LVDS/CRT/BACKLIGHT CONTROL
Wednesday, September 28, 2005

E
Sheet
of
Rev
V0.1
10
VGASOG
RED+
REDGREEN+
GREENBLUE+
4
VGASOG
RED+
RED-
GREEN+
GREEN-
3
3
BLUE-
CB+
CBCR+
CRY+
Y-
R13
R12
CVBS0
C5
18
22
BLUE+
BLUE-
CB+
CB-
CR+
CR-
Y+
Y-
SY+
SY-
R11
CVBS0+
C9
C4
100
R16
Y_GND
CVBS0-
C8
100
R21
22
R19
CB
C11
CVBS1+
R24
CB_GND
C15
CVBS1_GND
C14
100
CVBS1-
CB+
47nF
C12
15pF
47nF
C10
100
C13
330pF
Y-
47nF
47nF
CVBS1
Y+
47nF
C6
15pF
C7
330pF
R17
CVBS0_GND
47nF
R15
56
CB-
47nF
Change.
SY+
SY-
47nF
R27
CR
C16
100
SC+
SCCVBS0+
CVBS0CVBS1+
CVBS1-
SC+
SC-
CVBS0+
CVBS0-
CVBS1+
CVBS1-
C17
15pF
R29
CR_GND
C18
100
Change.
R31
C19
SY
MPX1
MPX2
MPX1
MPX2
+
C23
15pF/NC
OUTPUT
C22
8.2K
C24
15pF/NC
C21
SY_GND
R37
47nF
C25
SC
22
CB
CB_GND
CR
CR_GND
SOY
SY
SY_GND
2
SC
SC_GND
Y_GND
CB
CB_GND
CR
CR_GND
SOY
3,7
SY
SY_GND
SC
SC_GND
AF Path
AF1_OUT
SC+
47nF
C27
330pF
C28
SC_GND
47nF/NC
SC-
CE5
R40
39k
R41
C29
15pF
39k
Y_GND
SY-
47nF
MPX1
C26
Y
C20
330pF
47uF/16v /NC
R35
SIF1_OUT
SY+
47nF
CE4
FROM Tuner
CR-
47nF
22
3
CR+
47nF
C30
15pF
47nF
MPX2
47uF/16v
ATTENTION:WHEN PCB LAYOUT,MUST NEAR VGA INPUT PORT! BIN_WANG. 16/7/05

RED
R42
C31
68
RED+
47nF
C32
5pF
R44
RED_GND
C33
100
RED-
47nF
FB4
70R
C34
VGASOG
4.7nF
CVBS0
CVBS0_GND
CVBS1
CVBS1_GND
SIF1_OUT
AF1_OUT
RED
GREEN
BLUE
RED_GND
GRN_GND
BLU_GND
CVBS0
CVBS0_GND
CVBS1
CVBS1_GND
SIF1_OUT
AF1_OUT
RED
GREEN
BLUE
RED_GND
GRN_GND
BLU_GND
GREEN
R46
C35
68
GREEN+
47nF
C36
5pF
R48
GRN_GND
100
C37
FB6
GREEN-
47nF
70R
R49
BLUE
68
C38
BLUE+
47nF
C39
5pF
BLU_GND
R51
100
C40
BLUE-
47nF
FB8
70R
INPUT
MODIFIED BY BIN_WANG 16/7/05.
MiCO Confidential
Title

Size
C
Date:
A


Doc Number
Rev
V0.1
AV IN
Thursday, September 15, 2005

E
Sheet
of
10
TXD
RXD
Dimming
BL_ON/OFF
TXD
RXD
3
3
Dimming
BL_ON/OFF
9
9
VGA_IN_L
VGA_IN_R
VGASDA
VGASCL
HSYNC_VGA
VGA_PLUGPWR
RSRXD
RSTXD
C41 0.1uF
+5V
C42
0.1uF
C44
0.1uF
C46
0.1uF
U1
13
8
11
10
R1IN
R2IN
T1IN
T2IN
1
3
4
5
2
6
C+
C1C2+
C2V+
V-
R1OUT
R2OUT
T1OUT
T2OUT
VCC
GND
VGAVSYNC#
RED_GND
VGA_PLUGPWR
12
9
14
7
RED
TXD
C43
RXD
16
C45
0.1uF
0.1uF
MAX232A
R52
4.7k
U2
1
2
3
4
NC
NC
NC
GND
VCC
WP
SCL
SDA
8
7
6
5
Modified by MICO.
Dimming
RSTXD
VGA_R
RED
RED_GND
BLUE
BLU_GND
VGA_SDA
VSYNC#
28
26
24
22
20
18
16
14
12
10
8
6
4
2J2
27
25
23
21
19
17
15
13
11
9
7
5
3
1
VGA_R
BL_ON/OFF
RSRXD
VGA_L
R53
4.7k
GREEN
BLUE
10
10
3
3
3
VGAVSYNC#
RED_GND
GRN_GND
BLU_GND
RED
GREEN
BLUE
VGASCL
VGASDA
EEPROM 24C02
GRN_GND
BLU_GND
+5V
15
VGA_PLUGPWR
VGA_IN_L
VGA_IN_R
VGASDA
VGASCL
HSYNC_VGA
GND
R54
15K
R55
15K
VGA_L
VGA_IN_L
R56
75K
GREEN
GRN_GND
VGA_IN_R
R57
75K
VGA_PWR
HSYNC#
VGA_SCL
PC CONNECTOR
DIP14X2/P2.54/R1
VCC
FB9
VSYNC#
70R
0603
VGASDA
R59
33
VGAVSYNC#
R58
2.2k
D1
VGA_PWR
R60
33
VGA_SCL
VGA_PLUGPWR
DIODE SMD
1N4148/SMD
VGA_SDA
FB10
VGASCL
DIODE SMD
1N4148/SMD
D2
C47
100pF
HSYNC#
HSYNC_VGA
70R
0603
R61
2.2k
C48
5pF
MiCO Confidential
Title
Size
B
Date:
A


Doc Number
Rev
V0.1
VGA IN & PC AUDIO IN
Sheet
E
of
10
F_D[0..7]
F_A[0..21]
F_D[0..7]
F_A[0..21]
3
3
A_DQS[0..3]
A_RA[0..11]
A_BA[0..1]
A_DQM[0..1]
A_DQ[0..31]
A_DQS[0..3]
A_RA[0..11]
A_BA[0..1]
A_DQM[0..1]
A_DQ[0..31]
3
3
3
3
3
A_CLK
A_CLK#
A_CKE
A_CS#
A_RAS#
A_CAS#
A_WE#
A_CLK
A_CLK#
A_CKE
A_CS#
A_RAS#
A_CAS#
A_WE#
3
3
3
3
3
3
3
SDV25
VREF
IOWR#
IOCE#
F_OE#
SDV25
VREF
IOWR#
IOCE#
F_OE#
3
3
3
3
3
F_D[0..7]
F_D[0..7]
F_OE#
F_OE#
F_A[0..21]
F_A[0..21]
RN4
7
5
3
1
A_RA4
A_RA5
A_RA6
A_RA7
RN5
7
5
3
1
22x4
A_RA8
A_RA9
A_RA11
A_RA10
RN7
7
5
3
1
22x4
8
6
4
2
D_RA3
D_RA2
D_RA1
D_RA0
8
6
4
2
D_RA4
D_RA5
D_RA6
D_RA7
8
6
4
2
D_RA8
D_RA9
D_RA11
D_RA10
SDV25
SDV25
U4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
D_DQ0
D_DQ1
D_DQ2
D_DQ3
D_DQ4
D_DQ5
D_DQ6
D_DQ7
22x4
D_DQS0
RN9
7
5
3
1
8
6
4
2
D_DQ0
D_DQ1
D_DQ2
D_DQ3
A_DQ4
A_DQ5
A_DQ6
A_DQ7
RN11 47x4
7
5
3
1
8
6
4
2
D_DQ4
D_DQ5
D_DQ6
D_DQ7
A_DQ8
A_DQ9
A_DQ10
A_DQ11
RN13 47x4
7
5
3
1
8
6
4
2
D_DQ8
D_DQ9
D_DQ10
D_DQ11
A_DQ12
A_DQ13
A_DQ14
A_DQ15
RN14 47x4
7
5
3
1
A_DQ16
A_DQ17
A_DQ18
A_DQ19
RN24
7
5
3
1
A_DQ20
A_DQ21
A_DQ22
A_DQ23
RN26
7
5
3
1
A_DQ24
A_DQ25
A_DQ26
A_DQ27
A_DQ28
A_DQ29
A_DQ30
A_DQ31
D_DQM0
D_WE#
D_CAS#
D_RAS#
D_CS#
D_BA0
D_BA1
D_RA10
D_RA0
D_RA1
D_RA2
D_RA3
VSS
VDD
DQ15
DQ0
VSSQ
VDDQ
DQ14
DQ1
DQ13
DQ2
VDDQ
VSSQ
DQ12
DQ3
DQ11
DQ4
VSSQ
VDDQ
DQ10
DQ5
DQ9
DQ6
VDDQ
VSSQ
DQ8
DQ7
NC
NC
VSSQ
VDDQ
UDQS
LDQS
NC
NC
VREF
VDD
VSS
DNU
UDM
LDM
CK
WE
CAS
CK
CKE
RAS
NC
CS
A12
NC
A11
BA0
A9
BA1
A8
A10/AP
A7
A0
A6
A1
A5
A2 8M x 16
DDR
A4
A3
VSS
VDD
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
D_DQ15
D_DQ14
D_DQ13
D_DQ12
D_DQ11
D_DQ10
D_DQ9
D_DQ8
D_DQS1
D_DQ17
D_DQ18
47x4
RN27 47x4
7
5
3
1
8
6
4
2
D_DQ24
D_DQ25
D_DQ26
D_DQ27
RN29 47x4
7
5
3
1
8
6
4
2
D_DQ28
D_DQ29
D_DQ30
D_DQ31
A_DQS0
R65
47
D_DQS0
A_DQS1
R66
47
D_DQS1
A_DQS2
R201
47
D_DQS2
A_DQS3
R202
47
D_DQS3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
D_DQ16
D_DQ19
D_DQ20
D_DQ21
D_DQ22
D_DQ23
D_DQS2
D_DQM1
D_WE#
D_CAS#
D_RAS#
D_CS#
D_BA0
D_BA1
D_RA10
D_RA0
D_RA1
D_RA2
D_RA3
VSS
VDD
DQ15
DQ0
VSSQ
VDDQ
DQ14
DQ1
DQ13
DQ2
VDDQ
VSSQ
DQ12
DQ3
DQ11
DQ4
VSSQ
VDDQ
DQ10
DQ5
DQ9
DQ6
VDDQ
VSSQ
DQ8
DQ7
NC
NC
VSSQ
VDDQ
UDQS
LDQS
NC
NC
VREF
VDD
VSS
DNU
UDM
LDM
CK
WE
CAS
CK
CKE
RAS
NC
CS
A12
NC
A11
BA0
A9
BA1
A8
A10/AP
A7
A0
A6
A1
A5
A2 8M x 16
DDR
A4
A3
VSS
VDD
0.1uF
D_RA11
D_RA9
D_RA8
D_RA7
D_RA6
D_RA5
D_RA4
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
7
5
3
1
A_BA1
R67
A_BA0
R68
8
6
4
2
22x4
D_DQ31
D_DQ30
D_DQ29
D_BA1
22
D_BA0
A_DQM0
R71
22
D_DQM0
A_DQM1
R206
22
D_DQM1
A_CKE
R73
22
D_CKE
A_CLK
R75
22
D_CLK
A_CLK#
R77
22
D_DQ4
D_DQ5
D_DQ6
D_DQ7
RN8
7
5
3
1
RN25
D_DQ16 2
D_DQ17 4
D_DQ18 6
D_DQ19 8
D_DQ28
D_DQ27
D_DQ26
D_DQ25
D_DQ24
RN28
D_DQ20 2
D_DQ21 4
D_DQ22 6
D_DQ23 8
D_DQS3
VREF
D_DQM1
D_CLK#
D_CLK
D_CKE
RN30
D_DQ27 1
D_DQ26 3
D_DQ25 5
D_DQ24 7
C208
0.1uF
D_RA11
D_RA9
D_RA8
D_RA7
D_RA6
D_RA5
D_RA4
RN31
D_DQ31 1
D_DQ30 3
D_DQ29 5
D_DQ28 7
7
5
3
1
75x4
DV33A
1
3
5
7
R63
75
10k
D_RAS#
D_CS#
D_BA0
D_BA1
1
2
3
4
D1V25
VREF
VREF
4.7k
U5
D1V25
SDV25
GND
VTT
SD
PVIN
VSENSE AVIN
VREF
VDDQ
8
7
6
5
IC LP2996 DDR Termination SOP8
D_CLK#
C83
C84
0.1uF
0.1uF
IOWR#
DV33A
8
6
4
2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
RY/BY
A19
A20
CE
OE
WE
12
RESET
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A18
NC
WP/ACC
BYTE
29
31
33
35
38
40
42
44
30
32
34
36
39
41
43
45
16
13
14
47
VCC
37
GND1
GND2
27
46
F_D0
F_D1
F_D2
F_D3
F_D4
F_D5
F_D6
F_D7
DV33A
4
R62
F_A0
F_A19
10k
DV33A
FLASHVCC
C49
0.1uF
MX29LV800BT
TSOP 48 pin
D1V25
75x4
D1V25
8
6
4
2
C50
0.1uF
C51
0.1uF
C52
0.1uF
C53
0.1uF
C54
0.1uF
C55
0.1uF
C56
0.1uF
C57
0.1uF
C192
0.1uF
C193
0.1uF
C194
0.1uF
C195
0.1uF
C196
0.1uF
C197
0.1uF
C198
0.1uF
C199
0.1uF
C58
3300pF
C59
3300pF
C60
3300pF
C61
3300pF
C62
3300pF
C63
3300pF
C64
3300pF
C65
3300pF
C200
3300pF
C201
3300pF
C202
3300pF
C203
3300pF
C204
3300pF
C205
3300pF
C206
3300pF
C207
3300pF
75x4
8
6
4
2
75x4
8
6
4
2
75x4
1
3
5
7
75x4
1
3
5
7
D1V25
75x4
2
4
6
8
CE7
+ CE6
220uF/16v
C270UF16V/D10H12
75x4
2
4
6
8
RN15
7
5
3
1
8
6
4
2
SDV25
75x4
R69
F_A20
F_A21
IOCE#
F_OE#
25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
15
9
10
26
28
11
75x4
M13S128168 8Mx16-6
D_CS#
D_RAS#
D_CAS#
D_WE#
22
D_DQ0
D_DQ1
D_DQ2
D_DQ3
RN6
7
5
3
1
RN12
D_DQ12 7
D_DQ13 5
D_DQ14 3
D_DQ15 1
RN16
A_CS#
A_RAS#
A_CAS#
A_WE#
U3
F_A1
F_A2
F_A3
F_A4
F_A5
F_A6
F_A7
F_A8
F_A9
F_A10
F_A11
F_A12
F_A13
F_A14
F_A15
F_A16
F_A17
F_A18
75x4
D_RA10 R64
C66
D_DQM0
D_CLK#
D_CLK
D_CKE
SDV25
D_DQ16
D_DQ17
D_DQ18
D_DQ19
D_DQ20
D_DQ21
D_DQ22
D_DQ23
RN2
8
6
4
2
RN10
D_DQ8
7
D_DQ9
5
D_DQ10 3
D_DQ11 1
47x4
8
6
4
2
75x4
U16
8
6
4
2
D_RA4
D_RA5
D_RA6
D_RA7
VREF
SDV25
8
6
4
2
RN1
7
5
3
1
RN3
2
D_RA11
4
D_RA9
6
D_RA8
8
D_DQ12
D_DQ13
D_DQ14
D_DQ15
8
6
4
2
D_RA0
D_RA1
D_RA2
D_RA3
M13S128168 8Mx16-6
47x4
D1V25
A_RA3
A_RA2
A_RA1
A_RA0
A_DQ0
A_DQ1
A_DQ2
A_DQ3
CE8
47uF/16v
CE9
220uF/16v
D_DQS2
R203
75
D_DQS3
R204
75
D_CAS#
R70
75
D_WE#
R72
75
D_DQM1
R205
75
D_DQS1
R74
75
D_DQS0
R76
75
D_DQM0
R78
75
SDV25
SDV25
C67
0.1uF
C68
0.1uF
C75
0.1uF
C69
0.1uF
C76
0.1uF
C70
0.1uF
C77
0.1uF
C71
0.1uF
C78
0.1uF
C72
0.1uF
C79
0.1uF
C74
0.1uF
C73
0.1uF
C80
0.1uF
C81
0.1uF
C82
0.1uF
SDV25
C85
3300pF
C86
3300pF
C87
3300pF
C88
3300pF
C89
3300pF
C90
3300pF
C91
3300pF
C92
3300pF
SDV25
SDV25
Modified by BIN_WANG.
VREF
C93
C94
C95
C96
C97
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
VCC
C209
0.1uF
VREF
U6
3
VREF DECOUPLING
IN
VREF
ADJ/GND
VREF
1
C99
C100
C217
C218
0.1uF
3300pF
3300pF
0.1uF
0.1uF
SOT223
+ CE12
C211
0.1uF
C212
0.1uF
C213
0.1uF
C216
0.1uF
1
220uF/16v
+ CE10
220uF/16v
220uF/16v
MiCO Confidential
Title
Size
C
Date:
C215
0.1uF
SDV25
2
4

A
C214
0.1uF
SDV25
OUT
OUT
+ CE11
C98
C210
0.1uF
CM1117-2.5V


Doc Number
Rev
V0.1
DDR MEMORY & FLASH

E
Sheet
of
10
MT8203 ANALOG&DIGITAL DECOUPLING

DACVREF
DACFS
ADCPLLVDD1
ADCPLLVDD
APLLVDD
ANALOGVDD
VPLLVDD
LVDDA
ADCVDD
DACVDD
AVCM
VOCM
VICM
VREFP4
VREFN4
ADCVDD0
PWM2VREF
AUXTOP
AUXBOTTOM
REXTA
APLL_CAP
XTALI
XTALO
ADCVDD4
ADDED
DACVREF
DACFS
ADCPLLVDD1
ADCPLLVDD
APLLVDD
3
3
3
3
ANALOGVDD
VPLLVDD
3
3
LVDDA
ADCVDD
DACVDD
AVCM
VOCM
VICM
VREFP4
VREFN4
ADCVDD0
PWM2VREF
AUXTOP
AUXBOTTOM
REXTA
APLL_CAP
3
3
3
3
3
3
3
3
3
3
3
3
3
XTALI
XTALO
3
3
ADCVDD4
DACVREF
R79
DV18A
100k
DACFS
C103
0.1uF/NC
C0603
FB11
DV18A
Y1
R80
560
XTALI
70R
C101
4.7uF
C0603
27MHz
GND
GND
ADCPLLVDD1
0603
XTALO
C104
33pF
C102
0.1uF
C0603
GND
C105
33pF
AV33
FB12
CE13
0603
C109
70R
0.1uF
C107
0.1uF
C0603
GND
10uF/50v
ANALOGVDD
0603
C110
0.1uF
AVCM
BASE ON P1V5 COMMON BOARD BY BIN_WANG 16/7/05.
C111
4.7uF
C0603
C112
0.1uF
C0603
GND
C116
4.7uF
C0603
C117
0.1uF
C0603
GND
CE19
100uF/16v
C126
0.1uF
ADJ/GND
OUT
OUT
2
4
CE18
+
10uF/25v
0805
75R
Vout
+
CE20
220uF/16v
SOT223
CE21
10uF/50v
C125
GND
VOCM
GND
R82
VICM
C124
0.1uF
C0603
0.1uF
AV33
Adj regulator
Rup
1.25x(1+Rdown/Rup)
180 1%
110 1%
1.25x(1+180/110)=3.3V
C130
0.1uF
C0603
CE22
47uF/16v
C132
0.1uF
C0603
C136
0.1uF
C0603
DV33A
GND
GND
AV33
FB16
VPLLVDD
AV33
0603
C135
0.1uF
70R
C133
4.7uF
C0603
C134
0.1uF
C0603
CE23
47uF/16v
0805
C139
0.1uF
C0603
GND
C137
4.7uF
C0603
GND
C138
0.1uF
C0603
ADCVDD0
C145
0.1uF
C0603
GND
C141
0.1uF
C148
0.1uF
C0603
C149
0.01uF
C0603
VREFN4
C150
3300pF
C0603
70R
P1-V5
C156
4.7uF
C0603
70R
C153
0.1uF
ADCVDD4
DV18A
0603 PUT ON NEARLY BGA
C154
4.7uF
C0603
3.3k
C155
0.1uF
C0603
70R
C158
0.1uF
C0603
C159
0.1uF
C0603
C160
0.1uF
C0603
C161
0.1uF
C0603
R84
AUXTOP
TP2
50
R85
C162
0.1uF
C0603
GND
FB19
PWM2VREF
GND
VFEVDD1
TP1
LVDDA
GND
GND
DV18A
ADCVDD4
C157
0.1uF
C0603
CE24
47uF/16v
AUXBOTTOM
50
GND
ADCVDD0
C163
0.1uF
C0603
GND
GND
ADCVDD
ADCVDD0
C152
0.1uF
C0603
GND
ADCVDD4
0603
GND
FB18
ADCVDD0
FB20
C143
0.1uF
C0603
R83
REXTA
C147
4.7uF
C0603
ADCVDD0
C151
0.1uF
C0603
GND
C142
4.7uF
C0603
C144
4.7uF
C0603
GND
C146
4.7uF
C0603
GND
VPLLVDD
VREFP4
C140
0.1uF
GND
VPLLVDD
ADCVDD0
75R
C129
0.1uF
C0603
GND
LVDDA
ADC_VDD
ADC_VDD
C128
4.7uF
C0603
LVDDA
70R
LVDDA
FB17
C123
0.1uF
C0603
ANALOGVDD
OFF
C122
4.7uF
C0603
GND
FB15
C131
0.1uF
0 ohm
CE17
22uF/25v
GND
0603
Fix regulator
APLLVDD
AV33
Rdown
C119
0.1uF
C0603
GND
GND
GND
AZ1117
C118
4.7uF
C0603
CE16
47uF/16v
+
C120
1500pF
C0603
C127
0.1uF
C115
0.1uF
C0603
ANALOGVDD
IN
C114
4.7uF
C0603
APLL_CAP
ADC_VDD
FB14
CE15
22uF/25v
GND
C121
0.1uF
C0603
CM1117-3.3V
GND
ADCPLLVDD
C113
4.7uF
C0603
Note for Fix or Adj Regulator

3
C108
4.7uF
C0603
R81
FOR ADCVDD
U7
70R
DACVDD
DACVDD
VCC
FB13
GND
DACVDD
C106
4.7uF
C0603
CE14
+
10uF/50v
DV33A
FOR DACVDD
AV33
C164
3300pF
C0603
C165
3300pF
C0603
C166
3300pF
C0603
C167
3300pF
C0603
MiCO Confidential
Title

Size
C
Date:
A


Doc Number
MT8203 ANALOG&DIGIT DECOUPLE

E
Sheet
of
Rev
V0.1
10
ADCPLLVDD1
ADCPLLVDD
AUXTOP
AUXBOTTOM
REXTA
APLL_CAP
PWM2VREF
ADCVDD0
AVCM
VOCM
VICM
VREFP4
VREFN4
DACFS
DACVREF
DACVDD
LVDDA
IR
ADCVDD4
4
4
4
4
4
4
ADCPLLVDD1
ADCPLLVDD
AUXTOP
AUXBOTTOM
4
4
4
4
REXTA
APLL_CAP
PWM2VREF
4
4
4
ADCVDD0
AVCM
VOCM
VICM
4
4
VREFP4
VREFN4
4
4
DACFS
DACVREF
DACVDD
LVDDA
4
4
4
4
IR
7,10
ADCVDD4
ADCVDD4
ADCVDD4
MPX1
MPX2
GND
VREFP4
VREFN4
GND
ADIN4
ADIN3
ADIN2
ADIN1
ADIN0
ADCVDD
PWM2VREF
AUXTOP
AUXBOTTOM
GND
VPLLVDD
VPLLVDD
GND
GND
REXTA
VPLLVDD
LVDDA
AP7
AN7
CLK2+
CLK2GND
AP6
AN6
AP5
AN5
LVDDA
AP4
AN4
AP3
AN3
GND
CLK1+
CLK1AP2
AN2
LVDDA
AP1
AN1
AP0
AN0
GND
DACVDD
DACVREF
DACFS
GND
DACVDD
GND
DACVDD
G
GND
B
R
VSYNC
HSYNC
DV33A
2
GND
DV18A
GND
ANALOGVDD
XTALO
XTALI
GND
APLL_CAP
GND
APLLVDD
ANALOGVDD
GND
VI0
VI1
VI2
VI3
VI4
VI5
VI6
DV18A
VI7
VI8
VI9
VI10
VI11
GND
VI12
VI13
VI14
VI15
GND
VI16
VI17
VI18
VI19
VI20
VI21
VI22
VI23
DVIODCK
VGAVSYNC#
HSYNC_VGA
GND
DV18A
GND
ADCPLLVDD1
ADCPLLVDD
GND
GND
ANALOGVDD
ADCVDD0
REDRED+
GREENGREEN+
VGASOG
BLUEBLUE+
GND
ADCVDD0
VOCM
GND
VICM
ADCVDD0
CRCR+
CBCB+
YY+
SOY
GND
VFEVDD1
ADCVDD4
SIF
AF
ADCVSS4
REFP4
REFN4
ADCVSS
ADIN4
ADIN3
ADIN2
ADIN1
ADIN0
ADCVDD
PWM2VREF
AUXVTOP
AUXVBOTTOM
VPLLVSS
VPLLVDD
DLLVDD
DLLVSS
BGVSS
REXTA
BGVDD
LVDDA
A7P
A7N
CLK2P
CLK2N
LVSSA
A6P
A6N
A5P
A5N
LVDDB
A4P
A4N
A3P
A3N
LVSSB
CLK1P
CLK1N
A2P
A2N
LVDDC
A1P
A1N
A0P
A0N
LVSSC
DACVDDC
VREF
FS
DACVSSC
SVM
DACVDDB
DACVSSB
DACVDDA
G
DACVSSA
B
R
DE
VSYNCO
HSYNCO
VCLK
EBO7
EBO6
EBO5
EBO4
DVDD3I
EBO3
EBO2
EBO1
EBO0
EGO7
DVSS18
EGO6
EGO5
EGO4
EGO3
EGO2
EGO1
EGO0
ERO7
ERO6
ERO5
DVDD18
ERO4
ERO3
ERO2
DVSS3
ERO1
ERO0
OBO7
OBO6
OBO5
2
1
DE_DVI
VSYNC_DVI
HSYNC_DVI
DVDD18
AOSDATA0
AOSDATA1
AOSDATA2
DVDD3I
AOSDATA3
LIN
AOBCK
AOLRCK
AOMCLK
DVSS3
DQ24
DQ25
DQ26
DVDD2
DQ27
DQ28
DVSS2
DQ29
DVDD2
DQ30
DQ31
DQS3
DQM1
DVSS18
DQS2
DQ23
DQ22
DVSS2
DQ21
DQ20
DVDD18
DQ19
DVDD2
DQ18
DQ17
DQ16
RA4
DVSS2
RA5
RA6
RA7
RA8
DVSS18
RA9
RA11
CKE
DVDD2
RCLK
RCLKB
DVSS2
RA3
RA2
RA1
RA0
RA10
BA1
DVDD2I
DVDD18
BA0
RCS#
RAS#
DVSS2
CAS#
RWE#
DQ8
DQ9
DQ10
DVDD2
DQ11
DVSS18
DQ12
DQ13
DVSS2
DQ14
DQ15
DQS1
AVSS18
AVDD18
RVREF
DVSS18
DQM0
DQS0
DQ7
DVDD2
DQ6
DQ5
DVSS2
DQ4
DQ3
DVDD2
DQ2
DQ1
DQ0
MT8205
4
3
CE25
10uF/50v
SW4P/DIP/FLAT
DE_DVI
VSYNC_DVI
HSYNC_DVI
DV18A
C24
D24
A24
Y24
A25
A26
B26
F23
B25
B24
C26
C25
E24
N15
G26
G25
F26
F24
F25
E26
N16
E25
G24
D26
D25
H25
H26
P14
J25
J26
K25
P16
K26
L25
AA24
L26
H24
M25
M26
N25
J23
R16
J24
K23
K24
L23
R14
L24
M23
N26
H23
P26
P25
P15
M24
N23
N24
R26
P24
P23
U23
AA23
R24
R23
T24
R15
T23
U24
W26
V25
V26
V23
U25
T13
U26
T25
T15
T26
R25
W25
W23
Y23
G23
T16
Y26
Y25
AA26
V24
AA25
AB26
T14
AB25
AC26
W24
AC25
AD26
AD25
AOSDATA1
GND
DV33A
R87
47k
DACBCLK
10Kx4
8
6
4
2
VI0
VI2
VI5
VI6
RN18
7
5
3
1
10Kx4
8
6
4
2
VI9
VI10
VI13
VI14
RN19
7
5
3
1
10Kx4
8
6
4
2
VI17
VI18
VI21
VI22
RN20
7
5
3
1
10Kx4
8
6
4
2
VI7
VI4
VI3
VI1
RN21
7
5
3
1
10Kx4
8
6
4
2
VI15
VI12
VI11
VI8
RN22
7
5
3
1
10Kx4
8
6
4
2
VI23
VI20
VI19
VI16
RN23
7
5
3
1
10Kx4
8
6
4
2
5
5
F_OE#
R92
10k
TP3
TP4

DV33A
DV18A
DV33A
VSYNC
HSYNC
VSYNC
HSYNC
9
9
VGASDA
VGASCL
VGASDA
VGASCL
6
6
RED+
REDGREEN+
GREENBLUE+
BLUE-
RED+
REDGREEN+
GREENBLUE+
BLUE-
8
8
8
8
8
8
VGASOG
VGAVSYNC#

8
6
VGAVSYNC#
CVBS0+
CVBS0SY+
SYSC+
SCY+
YCB+
CBCR+
CR-
8
8
8
8
8
8
8
8
8
8
8
8
AP[0..7]
AN[0..7]
AP[0..7]
AN[0..7]
9
9
CLK1+
CLK1CLK2+
CLK2-
CLK1+
CLK1CLK2+
CLK2-
9
9
9
9
SCL
SDA
SCL
SDA
10
10
DACBCLK
DACMCLK
DACLRC
10
10
10
DOUT
DOUT
10
SOY
SOY
CVBS1+
CVBS1-
CVBS1+
CVBS1-
TXD
RXD
MUTE
R94
R95
R/NC
R/NC
R
G
B
PWM0
PWM1
8
8
9
9
9
9
10
AOSDATA1
TXD
RXD
MUTE
SDA
SCL
10
6
6
10
MiCO Confidential
DV18A
VGASOG
HSYNC_VGA
CVBS0+
CVBS0SY+
SYSC+
SCY+
YCB+
CBCR+
CR-
R
G
B
PWM0
PWM1
R96
R97
0
0
Size
C
Date:
9
10
8
8
UP3_5 FOR S/W SDA

HWSDA
HWSCL
UP3_5
UP3_4
A
ORO1
ORO0
MPX1
MPX2
7
10
DACBCLK
DACMCLK
DACLRC
Title
C169
0.1uF
7
1
7
7
9
7
UP3_4 FOR S/W SCL
R93
1k
TP5
C168
0.1uF
HWSCL
HWSDA
VGASCL
VGASDA
PWM0
PWM1
IR
RxD
TxD
GND
GND
URST#
UP3_4
UP3_5
DV18A
DV33A
F_OE#
IOWR#
IOCE#
OGO1
DV33A
OGO0
ORO7
ORO6
ORO5
ORO4
DV18A
ORO3
ORO2
ORO1
ORO0
F_A15
GND
F_A14
F_A13
F_A12
F_A11
F_A10
F_A9
F_A8
F_D0
F_D1
DV18A
F_D2
F_D3
F_D4
GND
F_D5
F_D6
F_D7
F_A0
F_A1
F_A2
F_A3
F_A4
F_A5
F_A6
F_A7
F_A16
DV33A
F_A17
F_A18
F_A19
F_A20
GND
F_A21
GND
OBO4
OBO3
OBO2
OBO1
OBO0
MUTE
ADIN4
R91
10k
CVBS2+
R90
10k
CVBS2-
R89
10k
ADIN3
ADIN2
ADIN0
ADIN1
R88
10k
ORO6
ORO7
ORO5
ORO4
ORO3
ORO2
OGO[0..1]
OBO[0..7]
HSYNC_VGA
5
5
F_A[0..21]
F_D[0..7]
AOSDATA1
IOWR#
IOCE#
5
5
5
5
5
5
5
5
5
5
5
5
5
5
F_OE#
ORO6
ORO7
ORO5
ORO4
ORO3
ORO2
OGO[0..1]
OBO[0..7]
BGA388/
MT8203
URST#
A_DQS[0..3]
A_RA[0..11]
A_BA[0..1]
A_DQM[0..1]
A_DQ[0..31]
A_CLK
A_CLK#
A_CKE
A_CS#
A_RAS#
A_CAS#
A_WE#
SDV25
VREF
F_A[0..21]
F_D[0..7]
ORO1
ORO0
MPX1
MPX2
RN17
7
5
3
1
DVIODCK
HSYNC_DVI
DE_DVI
VSYNC_DVI
URST#
A_DQS[0..3]
A_RA[0..11]
A_BA[0..1]
A_DQM[0..1]
A_DQ[0..31]
A_CLK
A_CLK#
A_CKE
A_CS#
A_RAS#
A_CAS#
A_WE#
SDV25
VREF
IOWR#
IOCE#
DV33A
DOUT
DACBCLK
DACLRC
DACMCLK
GND
A_DQ24
A_DQ25
A_DQ26
SDV25
A_DQ27
A_DQ28
GND
A_DQ29
SDV25
A_DQ30
A_DQ31
A_DQS3
A_DQM1
GND
A_DQS2
A_DQ23
A_DQ22
GND
A_DQ21
A_DQ20
DV18A
A_DQ19
SDV25
A_DQ18
A_DQ17
A_DQ16
A_RA4
GND
A_RA5
A_RA6
A_RA7
A_RA8
GND
A_RA9
A_RA11
A_CKE
SDV25
A_CLK
A_CLK#
GND
A_RA3
A_RA2
A_RA1
A_RA0
A_RA10
A_BA1
SDV25
DV18A
A_BA0
A_CS#
A_RAS#
GND
A_CAS#
A_WE#
A_DQ8
A_DQ9
A_DQ10
SDV25
A_DQ11
GND
A_DQ12
A_DQ13
GND
A_DQ14
A_DQ15
A_DQS1
GND
DV18A
VREF
GND
A_DQM0
A_DQS0
A_DQ7
SDV25
A_DQ6
A_DQ5
GND
A_DQ4
A_DQ3
SDV25
A_DQ2
A_DQ1
A_DQ0
AE2 OBO4
AF1 OBO3
AF2 OBO2
AE3 OBO1
AF3 OBO0
AE4 OGO7
AF4 OGO6
AC5 OGO5
T11 DVSS18
AD5 OGO4
AE5 OGO3
AF5 OGO2
AC6 OGO1
AD9 DVDD3
AD6 OGO0
AE6 ORO7
AF6 ORO6
AC7 ORO5
AD7 ORO4
AD18DVDD18
AE7 ORO3
AF7 ORO2
AC8 ORO1
AD8 ORO0
AF8 HIGHA7
P12 DVSS18
AE9 HIGHA6
AF9 HIGHA5
AE10 HIGHA4
AF10 HIGHA3
AC11HIGHA2
AD11HIGHA1
AF12 HIGHA0
AE15 AD0
AD15AD1
AC19DVDD18
AC15AD2
AF16 AD3
AE16 AD4
R12 DVSS3
AD16AD5
AC16AD6
AF17 AD7
AD17IOA0
AD14IOA1
AE14 IOA2
AF14 IOA3
AF13 IOA4
AE13 IOA5
AD13IOA6
AC13IOA7
AE8 A16
AC10DVDD3I
AC17A17
AE12 IOA18
AD12IOA19
AE11 IOA20
T12 DVSS18
AF11 IOA21
AE17 IOALE
AF15 IOOE#
AC12IOWR#
AC14IOCS#
AF18 WR#
AE18 RD#
AD10DVDD3
AF19 INT0#
AE19 UP12
AF20 UP13
AE20 UP14
AD19DVDD18
AD20UP15
AC20UP16
AF21 UP17
AE21 UP30
AD21UP31
P13 DVSS18
AC21PRST#
AD22UP34
AC22UP35
AF22 FCICLK
AE22 FCICMD
AF23 FCIDAT
AE23 GPIO0
AD23PWM0
AC23PWM1
AF24 IR
AE24 RXD
AD24TXD
R13 DVSS3
AC24ICE
AF25 SCL
AE25 SDA
AF26 SCL0
AE26 SDA0
AB23 SCL1
AB24 SDA1
OBO7
OBO6
OBO5
C3
D3
C1
C2
L11
D1
D2
F2
D4
E1
E2
E3
E4
F1
F4
F3
G3
J3
G4
H3
K3
K4
J4
H4
L3
G2
G1
H2
H1
M12
J2
J1
K2
K1
L4
L2
L1
M2
M1
M11
N2
N1
P2
P1
M3
R2
R1
T2
T1
N12
N3
M4
N4
N11
T4
P3
R3
P4
U4
R4
U3
V4
T3
U1
U2
V1
V2
V3
W1
W2
AC9
W3
W4
Y1
Y2
Y3
P11
Y4
AA1
AA2
AA3
AA4
AB1
AB2
AB3
AB4
AC1
AC18
AC2
AC3
AC4
R11
AD1
AD2
AD3
AD4
AE1
2=4
XTALI
XTALO
ANALOGVDD
ADCVDD
APLLVDD
VPLLVDD
SW1
1=3
XTALI
XTALO
ANALOGVDD
ADCVDD
APLLVDD
VPLLVDD
R86
10k
URST#
VFEVSS1
AVCM
ADCVDD0
CVBS2N
CVBS2P
CVBS1N
CVBS1P
CVBS0N
CVBS0P
ADCVSS0
REFP0
REFN0
ADCVDD1
SCN
SCP
SYN
SYP
ADCVSS1
REFP1
REFN1
VFEVDD0
VOCM
VFEVSS0
VICM
ADCVDD2
CRN
CRP
CBN
CBP
YN
YP
SOY
ADCVSS2
REFP2
REFN2
MON0
MON1
ADCVDD3
RN
RP
GN
GP
SOG
BN
BP
ADCVSS3
REFP3
REFN3
VSYNC
HSYNC
DVSS
DVDD
ADCPLLVSS1
ADCPLLVDD1
ADCPLLVDD
ADCPLLVSS
SYSPLLVSS
SYSPLLVDD
TESTP
TESTN
XTALVDD
XTALO
XTALI
XTALVSS
APLL_CAP
APLLVSS
APLLVDD
DMPLLVDD
DMPLLVSS
VI0
VI1
VI2
VI3
VI4
VI5
VI6
DVDD18
VI7
VI8
VI9
VI10
VI11
DVSS3
VI12
VI13
VI14
VI15
DVSS18
VI16
VI17
VI18
VI19
VI20
VI21
VI22
VI23
VCLK_DVI
D3
1N4148/SMD
L12
D5
C4
B1
A1
B2
A2
B3
A3
L13
B4
A4
C5
B5
A5
B6
A6
M13
D6
C6
D7
B7
N13
A7
C7
B8
A8
B9
A9
B10
A10
C8
D10
D9
C9
D11
C11
D8
B11
A11
B12
A12
D13
B13
A13
C10
D12
C12
C13
C14
N14
D14
L14
D15
C15
M14
L15
D16
B14
A14
C16
B15
A15
M15
A16
D18
D17
C17
C18
B16
A17
B17
A18
B18
C19
D19
E23
A19
B19
C20
D20
A20
L16
B20
C21
D21
A21
M16
B21
C22
D22
A22
B22
C23
D23
A23
B23
U8
ADCVDD0
SCSC+
SYSY+
GND
GND
AVCM
ADCVDD0
CVBS2CVBS2+
CVBS1CVBS1+
CVBS0CVBS0+
GND
DV33A

Doc Number
Rev
V0.1
MT8205 PBGA 388

E
Sheet
of
10
Power ON alive source
CE27
220uF/16v
FB21
OUT
OUT
2
4
0805
U10 M1117-3.3V
FB22
DV33
75R
+
C171
0.1uF
+5V
DV33
Vout
CE28
220uF/16v
SOT223
0805
75R
ADJ/GND
CM1117-3.3V
IN
ADJ/GND
U9
3
IN
CE26
+
C172
0.1uF
C170
0.1uF
220uF/16v
OUT
OUT
2
4
+
VCC
CE29
220uF/16v
SOT223
C173
0.1uF
DV33A
DV33A
IN
OUT
OUT
AV33
2
4
0805
75R
+
75R
CE32
220uF/16v
C176
10uF/10v
CE30
100uF/16v
C177
0.1uF
IN
OUT
OUT
+
C174
0.1uF
DV18A
Vout
2
4
3
0805
ADJ/GND
FB24
FB23
AV33
ADJ/GND
U11 CM1117-1.8V
U12 CM1117-3.3V
SOT223
CE31
220uF/16v
C175
0.1uF
SOT223
1.25x(1+300/680)=1.8V
1.25x(1+180/110)=3.3V
MiCO Confidential
Title

Size
C
Date:
A


Doc Number
Rev
V0.1
LDO

E
Sheet
of
10
MT8203E (PBGA388) LCDTV BOARD 4 LAYERS

TXD
RXD
01.INDEX & POWER CONNECTOR

02. LDO
03.MT8203 PBGA 388
04.MT8203 ANALOG&DIGIT DECOUPLE
05.DDR MEMORY & FLASH
06.VGA IN & PC AUDIO IN
07.VIDEO IN & TUNER IO
08. AV IN
09.LVDS/CRT/BACK LIGHT CONTROL
10.AUDIO WM8776/ KEYPAD
+12V
TUNER_12V
ORO7
VCC
+12V
R98
10k
J4
5
4
3
2
1
DIP8/P2.0
SYS_PWR
+5V
7,10
7,10
+12V
TUNER_12V
ORO7
9
7
3
ORO7 High :POWER OFF

ORO7 LOW :POWER ON
Q3
R99
1
2
3
4
5
6
7
8
3,6
3,6
SCL_5V
SDA_5V
+5V
J3
ORO7
5x1 W/HOUSING
SIP5\2
TXD
RXD
SCL_5V
SDA_5V
SOT23
2N3904
4.7k
TO Power BD
+5V
CE33
220uF/16v
C220UF16V/D6H11
HOLE/GND
H1
9
8
7
6
2
3
4
5
2
3
4
5
FB25
120R
FB26
TUNER_12V
+
HOLE/GND
H2
9
8
7
6
2
3
4
5
CE34
220uF/16v
C220UF16V/D6H11
75R
0805
CE35
47uF/16v
FOR Tuner
C178
0.1uF
2
3
4
5
9
8
7
6
For Tuner
+12V
9
8
7
6
FB27
120R
+5V
+5V
SYSTEM EEPROM
HOLE/GND
H3
9
8
7
6
2
3
4
5
2
3
4
5
0.1uF
FB30
120R
R100
4.7k
U13
C179
9
8
7
6
1
2
3
4
NC
NC
NC
GND
VCC
WP
SCL
SDA
8
7
6
5
R101
4.7k
AUIO IN/OUT GND
DIGITAL GND
ANALOG INPUT GND
SCL_5V
SDA_5V
EEPROM 24C16
SOP8
HOLE/GND
H4
9
8
7
6
2
3
4
5
2
3
4
5
9
8
7
6
FB31
120R
MiCO Confidential
Title

Size
C
Date:
A


Doc Number
Rev
V0.1
INDEX & POWER CONNECTOR

E
Sheet
of
10
Modify I2C by Zheng.Guo. 16/8

DV33A
QF1
2N7002
MODIFIED FROM 10K-->100K BY BIN_WANG .16/7/05.AVOID AUDIO BOMB

VCC
Del Parts
YPBPR2_R
CE36
YPBPR2_L
CE37
10uF/25v
R102
100k
10uF/25v
R104
100k
SCL_5V
WHEN OPEN THE POWER
FB32
R190
4.7k
SCL
DV33A
HPVDD
VGA_IN_R
CE39
VGA_IN_L
CE40
0603 120R
CE38
10uF/25v
R106
100k
10uF/25v
R107
100k
R192
4.7k
C180
0.1uF
3
3
1,7
1,7
PWM1
MUTE
SCL_5V
SDA_5V
7
7
6
6
7
7
7
7
3
3
3
3
3
3
3
S1_AV1_L
S1_AV1_R
VGA_IN_L
VGA_IN_R
YPBPR1_L
YPBPR1_R
YPBPR2_L
YPBPR2_R
SCL
SDA
DACBCLK
DACMCLK
DACLRC
DOUT
AOSDATA1
S1_AV1_L
S1_AV1_R
VGA_IN_L
VGA_IN_R
YPBPR1_L
YPBPR1_R
YPBPR2_L
YPBPR2_R
SCL
SDA
DACBCLK
DACMCLK
DACLRC
DOUT
AOSDATA1
PWM1
MUTE
SCL_5V
SDA_5V
QF2
2N7002
10uF/25v
SDA_5V
CE43
100k
10uF/25v
R111
100k
10uF/25v
R112
100k
R113
100k
SDA
DV33A
C182
10pF
R108
WHEN OPEN THE POWER
50k
CE42
10uF/25v
S1_AV1_L
CE41
50k
MODIFIED FROM 10K-->100K BY BIN_WANG .16/7/05.AVOID AUDIO BOMB

S1_AV1_R
C181
10pF
R110
48
47
46
45
44
43
42
41
40
39
38
37
+
HPVDD
AIN2R
AIN3L
AIN3R
AIN4L
AIN4R
AIN5L
AIN5R
AINOPL
AINVGL
AINOPR
AINVGR
AGND
U14
DACBCLK
DACMCLK
AOSDATA1
DACLRC
36
35
34
33
32
31
30
29
28
27
26
25
0603 120R
+
CE53
47uF/16v
VMIDADC
AUXL
AUXR
HPVDD_A
TP6
10uF/25v
TP7
CE49
10uF/25v
VMIDDAC
+
AUSPR
AUSPL
VMIDADC
10uF/25v
CE48
CE50
10uF/25v
CE47
10uF/25v
1
2
3
4
MUTE
C184
0.1uF
C185
0.1uF
4x1 W/HOUSING
SIP4\2
MUST USE SHIELD CABLE
C186
0.1uF
WM8776
CE51
CODHPOUTR
CODHPOUTR
R115
10uF/25V
220uF/16v
10k
HPOUTR
R116
47k
CE54
CODHPOUTL
FB28
TP9
CE55
AUSPL
COD_VOUTL
TP8
CE52
AUSPR
COD_VOUTR
CODHPOUTL
C187
0.1uF
SDA14
ADCREFP
CE46
COD_VOUTR
COD_VOUTL
HPVDD
SDA14
SCL14
DVDD
DVDD
DVDD
DACLRC
FB33
DV33
R114
1k
SCL14
R208
33
R/SMD/0603
TO AUDIO BD
13
14
15
16
17
18
19
20
21
22
23
24
DACLRC
DV33
R207
33
R/SMD/0603
SDA
J5
ADCREFP
ADCLRC
DGND
DVDD
MODE
CE
DI
CL
HPOUTL
HPGND
HPVDD
HPOUTR
NC
GND
SCL
33R
DACBCLK
DACMCLK
DOUT
R193
AVDD
ADCREFP
ADCREFGND
VMIDADC
AUXL
AUXR
DACREFP
DACREFN
VMIDDAC
VOUTR
VOUTL
NC
AIN2L
AIN1R
AIN1L
DACBCLK
DACMCLK
DIN
DACLRC
ZFLAGR
ZFLAGL
ADCBCLK
ADCMCLK
DOUT
C183
0.1uF
1
2
3
4
5
6
7
8
9
10
11
12
CE45
10uF/25v
10uF/25v
HPOUTL
CE44
YPBPR1_L
R109
YPBPR1_R
HPVDD
0603 120R
TWO WIRE SERIAL CONTROL DEVICE ADDRESS 0x34h

R117
10uF/25v
TP10
220uF/16v
10k
R118
47k
PWM1
ORO0
URST#
IR
OBO[0..7]
ORO0
URST#
IR
OBO[0..7]
3
3
3,7
R119
R122
R121
10K
R0603
R124
4.7K
OBO7
Q4
2N3906
4.7K
R200
R199
R198
POWER ON/OFF
R123
NC/0
TV/AV
MENU
VOLVOL+
CHCH+
IR
1
2
3
4
5
6
7
8
9
10
11
12
13
13x1 W/HOUSING
SIP13\2
Q5
2N3906
FB
FB
FB
FB
FB
FB
+5V
R126
R125
510 LED_RED
510 LED_GRN
ORO0
OBO6
10k 10k 10k 10k 10k 10k 10k

FB34
FB35
FB36
FB37
FB38
FB39
DV33A
R120
10K
R197
J6
OBO0
OBO1
OBO2
OBO3
OBO4
OBO5
DV33A
R0603
R196
R194
ORO0 High :SYSTEM POWER OFF

ORO0 LOW :SYSTEM POWER ON
R195
+5V
KEYPAD - MAX 8-KEYS
IR & POWER ON LED
DV33A
MiCO Confidential
Title

Size
C
Date:
A


Doc Number
Rev
V0.1
AUDIO WM8776/ KEYPAD
Wednesday, September 28, 2005

E
Sheet
of
10
CVBS0---TUNER1
CVBS1---FRONT BD AV_IN
TU_VCC
AV , TUNER I/O
J7
TU_12V
1
2
3
4
5
6
7
8
9
10
11
12
SDA_5V
SCL_5V
SIF1_OUT
AF1_OUT
TV_GND
CVBS0
4
OGO[0..1]
S1_AV1_R
+12V
10
YPBPR1_L
YPBPR1_R
YPBPR2_L
YPBPR2_R
10
10
10
10
+12V
IR
IR
Y2_INDVD
R158
VCC
Y2B
Y2_GNDB
DVD Connector
VCC
8/18 modify by steven R146
10k
R149
10k
1,9
ORO4
3,10
ORO5
3
1
SOT23
2N3904
Q8
S1
G1
S2
G2
D1
D1
D2
D2
VDVD
8
7
6
5
IR7314
SOP8
CE63
470uF/16v
C470UF16V/D8H14
4.7k
1
2
3
4
1
2
3
4
5
R141
CB
CB1SWB
VCC
0/NC
3
R144
10K
10K
CE60
CR1_INB
R167
75
R140
10K
R143
R147
CR1SWB
22uF/10V
CR
R148
CR1_GNDB
CB2_GNDB
10K
0/NC
VCC
R151
10K
R168
CR2_GNDB
J10
0/NC
22uF/10V
CB2B
CR2B
D9
BAV99
Q7
CE59
CB1_INB
VCC
CR2_INDVD
VCC
Y2B
CE61
R153
Y
Y2SWB
22uF/10V
R154
Y2_GNDB
R170
75
VCC
0/NC
R155
10K
10K
CR2_GNDB
CB2B
CE62
R159
22uF/10V
CB
CB2SWB
R162
CB2_GNDB
Y1_GNDB
CB1_GNDB
D8
BAV99
VCC
10k
R156
R157
4.7k
SOT23
2N3904
Q6
1
2
3
4
5
6
7
8
9
10
CON10
VCC
Y2_GNDB
R165
J9
R139
VCC
IR_DVD
CB2_GNDB
CB2_INDVD
Y2_GNDB
Y2_INDVD
CR2_GNDB
CR2_INDVD
IR_DVD
IR
CB2_INDVD
YPBPR2/R
YPBPR2/L
R138
Y1SWB
22uF/10V
10K
VCC
VCC
CE58
R160
75
D7
BAV99
2
S1_AV1_R
Y1_INB
C189
0.1uF
YPBPR1_L
YPBPR1_R
YPBPR2_L
YPBPR2_R
TU_12V
+ CE57
1000uF/16v
70R
Optional for one component.Added by Bin_wang 14/7/05

R137
10K
TUNER_12V
10
VCC
FB43
Added by Zheng_guo 21/7/05

TUNER_12V
1,10
S1_AV1_L
C188
0.1uF
1000uF/16v
1,10
3
3
3
3
CE56
+
S1_AV1_L
70R
SDA_5V
ORO6
ORO4
ORO5
ORO2
FB41
TU_VCC
SCL_5V
OGO[0..1]
ORO6
ORO4
ORO5
ORO2
J9
VCC
AV_L
AV_R
SY_GND
AF1_OUT
YPBPR1/L
YPBPR1/R
SDA_5V
TUNER_12V
SIF1_OUT
CB1_INB
CB1_GNDB
SCL_5V
8
8
8
8
8
8
21
19
17
15
13
11
9
7
5
3
1
AF1_OUT
SC
SC_GND
CVBS0
CVBS0_GND
CVBS1
CVBS1_GND
22
20
18
16
14
12
10
8
6
4
2
SIF1_OUT
8
8
8
8
8
8
3
8
8
CVBS1
CVBS1_GND
SC
SC_GND
SY
DIP11X2/P2.54/R2
VIDEO CONNECTOR
SC
SC_GND
CVBS0
TV_GND
CVBS1
CVBS1_GND
Y
Y_GND
CB
CB_GND
CR
CR_GND
SOY
SY
SY_GND
Y1_INB
Y1_GNDB
CR1_INB
CR1_GNDB
CON12
SIP12\2
Y
Y_GND
CB
CB_GND
CR
CR_GND
SOY
SY
SY_GND
VCC
VCC
R161
CB2_GNDB
VCC
0/NC
R163
10K
10K
CON5
R164
+
CR2B
CE64
CR2SWB
22uF/10V
CR
C190
0.1uF
CR2_GNDB
0/NC
R166
10K
OGO0
COMPONENTS SWITCH.
OGO1
NEARLY YPBPR1-CON.
OGO0
ORO6
HP_SENSE
R169
0
OGO1
ORO6
DV33
Y1_GNDB
DV33
CB1_GNDB
FB46
70R
CR1_GNDB
R171
10K
NEARLY YPBPR2-CON.
TP11
ORO2
CB1SWB
CB2SWB
CB
Y1SWB
Y2SWB
Y
GNDS
Y2_GNDB
CB2_GNDB
CR2_GNDB
AV_L R176
AV_R
YPBPR1/L
15K
15K
YPBPR1_L
YPBPR2/R
15K
15K S1_AV1_R
YPBPR2_R
YPBPR2_L
S1_AV1_R
S1_AV1_L
YPBPR1_R
YPBPR1_L
R180
R188
R178
YPBPR2_L
VCC
E#
I0D
I1D
YD
I0C
I1C
YC
16
15
14
13
12
11
10
9
GNDS
CR1SWB
CR2SWB
CR
C191
SOY
0
MODIFIED BY BIN_WANG.16/7/05
YPBPR1_R
15K
R177
S
I0A
I1A
YA
I0B
I1B
YB
GND
IDTQS3VH257
TSSOP16/SMD
S1_AV1_L
R179
YPBPR1/R
YPBPR2/L
15K
U15
1
2
3
4
5
6
7
8
4.7nF
CR_GND
CB_GND
R187
YPBPR2_R
R181 R182 R183 R184

75K
75K
75K
75K
Y_GND
R185 R186
75K
75K
MiCO Confidential
MODIFIED FROM 15k-->0 BY BIN_WANG 16/7/05.

Title
Size
C
Date:
A


Doc Number
Rev
V0.1
VIDEO IN & TUNER IO

E
Sheet
10
of
10
C1
1
22pF
NPO
5%
R1
5%
10K
NIN
10K 5%
EN
1
2
X5R
R8
MBRS130LTR
470NF
D2
C17
6.2V
390PF
C16
C
100NF
1
C11
21
10
D1
5%
C15
2.2UF
47K
10K
5%
10K
R15
R9
10
22pF
R6
1UF
C24
BS
5%
2
1000UF/25V
5%
MUTEC
C9
ATA-120
VPP
R7
AGND
100K
C38
10uH
SW
AGND
C55
1n
5%
L5
X5R
FILM
X7R
PGND
22
1
RC4558
PIN
C54
1n
R4
1UF
22
R3
C4
X7R
R12
11
4K7
5%
2
R67
21
4K7
5%
U1
1
C3
100NF
C8
100UF/25V
1UF
R66
21
1K8
5%
C6
X5R
R47
+
C7
4.7uF
NPO
+
OUT
C20 2
C5
100K
4.7nF
10UF
5%
R5
U2A
AUSPL
1
C10
100UF/25V
100NF
22UF/16V
2
100K
5%
+
C12
10K
10K
5%
5%
1
2
R11
R10
C14
+24V
R2
+24V
82K
X7R
NPO
5%
C21
1
22pF
NPO
5%
R14
82K
+24V
R16
+24V
R39
26
22
1UF
RC4558
C52
1n
1
2
3
4
R19
100K
C53
1n
AGND
EN
1
1
SW
VPP
BS
R21
AGND
5%
2
2
R23
D3
470NF
10
10K
MBRS130LTR
FILM
21
5%
NS
R20
C33
R22
5%
10K
22pF
2
1000UF/25V
X5R
1
C34
47K
C32
C41
D4
C36
6.2V
390PF
R38
5%
10
5%
1UF
ATA-120
MUTEC
5%
NIN
1
10K
X5R
10K 5%
C39
10uH
22
4K7
5%
L6
C35
100NF
R46
21
4K7
5%
PGND
R45
21
1K8
5%
PIN
R33
X7R
OUT
C40
10UF
R18
100UF/25V
X7R
C31
U3
C25
1UF
100NF
C30
5%
C28
X5R
4.7nF
U2B
AUSPR
+
C29
4.7uF
NPO
5%
C27
100K
5%
5%
22UF/16V
100K
R17
10K
10K
R36
R37
C19
1
5%
X7R
NPO
A
A
Title
Size
Number
Revision

Date:
File:
4
2-Sep-2005
Sheet of
D:\\LCD TV\LCD TV.DdbDrawn By:
6
R24
3K
MUTEC
5%
R25
5%
C37
10K
2
Q1
2N3906
D
D6
R40
10K
X5R
Q3
Q2
2N3904
D
R29
MUTE
1UF
+24V
1K
1N4148
5%
+
R41
2N3904
10K
5%
5%
C42
100UF/25V
R42
AGND
1k
AGND
AGND
D10
NC
D8
LOUT
D7
1N4148
4.7V
AGND
R34
1K
Q5
2N3904
1
5%
R43
0R
Q4
2N3906
NC
AGND
D5
MUTEB
+
C18
ROUT
NC
R28
1k
AGND
R35
1K
2
5%
R30
Q6
2N3904
22k
D9
+
C51
AGND
220UF/25V
1N4148
5%
C22
10K
+24V
5%
C2
22U/16V
5%
5%
10UF
X5R
4K7
R51
5%
R53
2
1 C26
OUT
10K
R13
1K
5%
C45
5%
1
5%
R65
10U/16V
5%
1n
C49
1
R52
R27
NC
47K
RC4558
C46
1n
100K
MUTE
22K
22P
2 AGND
R50
4K7
R49
AUSPL
C60
1k8
100N
B
R48
AGND
Q7
NC
C13
100U/35V
U5A
R55
10K
R54
AGND
5%
R62
J10
LOUT
AGND
ROUT
10K
R63
5%
10K
rca2
+24V
5%
C44
U5B
5%
5%
10UF
X5R
R58

C43
+
OUT
10K
R26
1K
5%
C47
5%
1
5%
10U/16V
R61
47K
RC4558
5%
C48
1n
1n
1
R64
R59
5%
R60
100K
4K7
Title
4K7
R57
C59
AUSPR
1k8
R56
22U/16V
22K
C50
2 AGND
22P
AGND
Size
Number
Revision
5%

Date:
File:
4
2-Sep-2005
Sheet of
D:\\LCD TV\LCD TV.DdbDrawn By:
6
+400V
R76
CA10
RA1
T3
EC5
T3C
C1
EC13
R53
R54
D4A
EC5A
R57
Z2A
R61
RK11
RK13
RK14
EC11
RS4
R77
R85
R88
PH4
D4
R69
C84
RK19
R92
Q13
Z3
R86
PH3
Q12
RF31
D9
R78
R68
J13
R91
GND
EC6
Q11
J12
CF7
UA3
R70
R67
ON/OFF
R89
R82
RK17
RK18
RA
C22
ZA1
C83
R66
CF5
RF9
GND
Q15
C18
R64
RK16
RF8
R90
R62
R63
5V
RF7
DF1
EC14
EC12
RF6
CF3
Q10
C17
RK15
RF5
RF4
R96
R97
QA3
GND
EC13
R61
U3
6
T3D
CF4
CA9
DA9
R58
QA5
L9
DA8
C15
R101
EC9
R114
R55
12V
L4
CA8
R113
Z2
DA10
R52
D3A
CF12
PQ2625B
T3A
R59
5VSB
EC19
VIN
1
VOUT
2
GND
3
VDIS
4
+18V
Q8
C15A
RK12
U5
DA7
VCC
CS2
D3
R72
J14
R87
D6
J15
R112
PH2
C19
R73
+18V
R79
Q14
J16
R99
CF6
J18
GND
A
Title
Size
Number
Revision
B
Date:
File:
1

20-Sep-2005
D:\CCC\MLT186A-CCC\MLT186.DDB
Sheet of
Drawn By:
6
H1
CX1
L1A
VIN
CY1
L1
CA6
VB
GND
F2
V-
F1
CX2
N
QA1
CK1
CA1A
CA1
VS
380V
Q2
CK2
U4
R40
R49
C35
GND
Q1
104 50V
R23
R35
R51
R9
VCC
R32
VR
R33
C3
R42
R51A
VR
U1
DT
C4
VS
R29
R34
RK3
C5A
C9A
RK4
VR
RK5
VR
RK6
J4
RK7
J5
RK8
J6
RK9
J7
RK10
J9
RK20
J10
RK21
J11
RK22
IEAO
IAC
IS
15
VR
14
VRMS
VCC
13
SS
PFCOUT
12
VDC
PWOUT
11
GND
10
LIMIT
R31
7
8
C9
C6
16
VFB
R30
C7
VEAO
RAMP1
RAMP2
R12
VR
R51B
EC4
PH1
UA1
DS2
C2
D1A
C8
CA4
QA2
R39
R233 R234 R235 R236

RF2
Q4
R17
C14
C11
RF1
CF2
QF2
R16
R43
QF1
C10
DA3
RS3
R44
CF1
+24V
L6
R134
C33
L3A
RT2
+24V/1A
T3
R130
RK23
RF3
R21
R41
DA15
R138
A2
7
R36
R135
C5
Q7
R18
C1
R11
LT1
R22
Z1
DS1
J2
R37
J3
C12
R27
LT2
VB
A1
8
7
QA2A
R20
U2
CK3
J1
D2
R6
R50
R8
ZA2
220/35
CF10
EC11A
R136
R137
RK25
CK19
GND
DA14
RK24
Title
GND
GND
Size
Number
Revision
B
Date:
File:
1
D7
D1
CA2
UA2
R5
DA4
VCC
R129
C36
R123
R10
GND
R122
RK1
DA5
R124
R119
C34
RK31
VIN
R7
DA6
R4
R126
R24
VS
VIN
R125
+24V
R120
R121
+2.5V
RS6
RS1
RS2
CON1
CA7
GND
EC2
EC1
RS5
R117
GND
380V
DA11
R118
RT1
V+
AC
R3
EC15
CF9
A2
CY4
DA1
DA2
T1
24V/5A
L3
R116
DA12
A2
2
R2
DB1
AC
L2
L6
T3
A1
A1
VB
14D681
R1
R115
CY5
CY3
CY2
R230
+12VA
H2
+12VA
RF20
EC7
EC8

20-Sep-2005
D:\CCC\MLT186A-CCC\MLT186.DDB
Sheet of
Drawn By:
6
Basic Operations & Circuit Description

Main Electric Components
(1). MODULE:
There are 1 pc. panel and 2 pcs. PCB including 1 pc. INVERTER
board(L), 1 pc. T-CONTROL board,
(2).SIGNAL PROCESS
There are 5 pcs. PCBs including

1 pc. Audio&Tuner board,
1 pc. Main digital board,
1 pc. Keypad board,
1 pc. Remote Control Receiver board,
1 pc. DVD decoder board
(3).POWER
There are 1 pc. PCB for power.

PCB function
1. Power:
(1). Input voltage: AC 100V~240V, 47Hz~63Hz.

Input range: AC 90V(Min)~264V(Max) auto regulation.
(2). To provide power for PCBs.
a). +24V for Inverter.
b). +5Vsb for standby,
c). +5V for signal power,
d). +24V for Audio Amp power and converter to
e). +12V for Tuner power.
2. Main (Video InterFace) board:
(1).Decoder the video signal (TV,CVBS,S-VIDEO) from analog to digital

signal.
(2).Converter the Video signals( TV,CVBS,S-VIDEO ) and graphics signal
(VGA,YPbPr) from interface to progressive,
(3). Converter the Digital to fit the panel display mode and output the LVDS
signal to Panel.
3. Tuner & Audio Board:

(1)Convert TV RF signal to video and audio signal to Main board.
(2 ). Decoder the TV SIF signal to audio signal,

(3 ). Converter the audio to audio Amplifier and output to the speaker.
4. KEYBOARD
To get the main button control on LCD_TV as SOURCE,MENU,

CHANEL +,CHANEL -, VOL +,VOL-, STANDBY functions.
5. Remote control board
Receive the remote signal and active for the control.
6. T-CONTROL board
Converter the LVDS signal to the digital signal for fitting the PANEL.
7. INVERTER board
Converter the low DC voltage +24V to high AC voltage to drive the backlight.

PCB failure analysis

1. CONTROL:
a. Abnormal noise on screen.

b. No picture.
2. MAIN (VIDEO):
a. Lacking color, Bad color scale.

b. No voice.
c. No picture but with signals output, OSD and back light.
d. Abnormal noise on screen.
3. POWER:
No picture, no power output.
Basic operation of LCD-TV
1. After turning on power switch, power board sends 5Vst-by Volt to Micro
Processor IC waiting for ON signals from Key Switch or Remote Receiver.
2. When the ON signal from Key Switch or Remote Receiver is detected, Micro
Processor will send ON Control signals to Power. Then Power sends (5Vsc,
12Vsc, 24V and RLY ON, Vs ON) to PCBs working. This time VIF will send
signals to display back light, OSD on the panel and start to search available
signal sources. If the audio signals input, them will be amplified by Audio AMP
and transmitted to Speakers.
3. If some abnormal signals are detected (for example: over volts, over current,
over temperature and under volts), the system will be shut down by Power off.

LCD basic display theory.

When an electrical field is applied to the LC planes, the LC molecules re-align
themselves so that they are parallel to the electrical field. This electrical process
is known as twisted nematic field effect or TNFE. In this alignment, polarized
light is not twisted as it passes through the LC material (see Diagram 3A and
3B). If the front polarizer is oriented perpendicular to the rear polarizer, light will
pass through the energized display but will be blocked by the rear polarizer. An
LCD in this form is acting as a light shutter.
Displays with variable characters are created by selectively etching away the
conductive surface that was originally deposited on the glass. Etched areas
become the displays background; unetched areas become the displays
characters.
Diagram 3A. The off state of a TN LCD-the LC molecules form a twist and therefore
cause polarized light to twist as it passes through.
Diagram 3B. The on state-the electrical field re-aligns the LC molecules so they do
not twist the polarized light.

Inverter
T-COHE
TFT LCD
Power
DVD
Loader
Key
Board
Speaker
Terminal
Connect Board
Remote Receiver

Main Board
Tuner Board
IC DESCRIPTION
-MT8205G
-AT24C02
-MX29LV160BBTC
-LP2996
-AZ1117/H
-WM8776
-MX232A
-ISAV330

OBO4
OBO3
OBO2
OBO1
OBO0
OGO7
OGO6
OGO5
DVSS18
OGO4
OGO3
OGO2
OGO1
DVDD3
OGO0
ORO7
ORO6
ORO5
ORO4
DVDD18
ORO3
ORO2
ORO1
ORO0
HIGHA7
DVSS18
HIGHA6
HIGHA5
HIGHA4
HIGHA3
HIGHA2
HIGHA1
HIGHA0
AD0
AD1
DVDD18
AD2
AD3
AD4
DVSS3
AD5
AD6
AD7
IOA0
IOA1
IOA2
IOA3
IOA4
IOA5
IOA6
IOA7
A16
DVDD3I
A17
IOA18
IOA19
IOA20
DVSS18
IOA21
IOALE
IOOE#
IOWR#
IOCS#
WR#
RD#
DVDD3
INT0#
UP12
UP13
UP14
DVDD18
UP15
UP16
UP17
UP30
UP31
DVSS18
PRST#
UP34
UP35
FCICLK
FCICMD
FCIDAT
GPIO0
PWM0
PWM1
IR
RXD
TXD
DVSS3
ICE
SCL
SDA
SCL0
SDA0
SCL1
SDA1
C3
D3
C1
C2
L11
D1
D2
F2
D4
E1
E2
E3
E4
F1
F4
F3
G3
J3
G4
H3
K3
K4
J4
H4
L3
G2
G1
H2
H1
M12
J2
J1
K2
K1
L4
L2
L1
M2
M1
M11
N2
N1
P2
P1
M3
R2
R1
T2
T1
N12
N3
M4
N4
N11
T4
P3
R3
P4
U4
R4
U3
V4
T3
U1
U2
V1
V2
V3
W1
W2
AC9
W3
W4
Y1
Y2
Y3
P11
Y4
AA1
AA2
AA3
AA4
AB1
AB2
AB3
AB4
AC1
AC18
AC2
AC3
AC4
R11
AD1
AD2
AD3
AD4
AE1
AE2
AF1
AF2
AE3
AF3
AE4
AF4
AC5
T11
AD5
AE5
AF5
AC6
AD9
AD6
AE6
AF6
AC7
AD7
AD18
AE7
AF7
AC8
AD8
AF8
P12
AE9
AF9
AE10
AF10
AC11
AD11
AF12
AE15
AD15
AC19
AC15
AF16
AE16
R12
AD16
AC16
AF17
AD17
AD14
AE14
AF14
AF13
AE13
AD13
AC13
AE8
AC10
AC17
AE12
AD12
AE11
T12
AF11
AE17
AF15
AC12
AC14
AF18
AE18
AD10
AF19
AE19
AF20
AE20
AD19
AD20
AC20
AF21
AE21
AD21
P13
AC21
AD22
AC22
AF22
AE22
AF23
AE23
AD23
AC23
AF24
AE24
AD24
R13
AC24
AF25
AE25
AF26
AE26
AB23
AB24
VFEVDD1
ADCVDD4
SIF
AF
ADCVSS4
REFP4
REFN4
ADCVSS
ADIN4
ADIN3
ADIN2
ADIN1
ADIN0
ADCVDD
PWM2VREF
AUXVTOP
AUXVBOTTOM
VPLLVSS
VPLLVDD
DLLVDD
DLLVSS
BGVSS
REXTA
BGVDD
LVDDA
A7P
A7N
CLK2P
U?
CLK2N
LVSSA
A6P
A6N
A5P
A5N
LVDDB
A4P
A4N
A3P
A3N
LVSSB
CLK1P
CLK1N
A2P
A2N
LVDDC
A1P
A1N
A0P
A0N
LVSSC
DACVDDC
VREF
FS
DACVSSC
SVM
DACVDDB
DACVSSB
DACVDDA
G
DACVSSA
B
R
DE
VSY NCO
HSYNCO
VCLK
EBO7
EBO6
EBO5
EBO4
DVDD3I
EBO3
EBO2
EBO1
EBO0
EGO7
DVSS18
EGO6
EGO5
EGO4
EGO3
EGO2
EGO1
EGO0
ERO7
ERO6
ERO5
DVDD18
ERO4
ERO3
ERO2
DVSS3
ERO1
ERO0
OBO7
OBO6
OBO5
VFEVSS1
AVCM
ADCVDD0
CVBS2N
CVBS2P
CVBS1N
CVBS1P
CVBS0N
CVBS0P
ADCVSS0
REFP0
REFN0
ADCVDD1
SCN
SCP
SYN
SYP
ADCVSS1
REFP1
REFN1
VFEVDD0
VOCM
VFEVSS0
VICM
ADCVDD2
CRN
CRP
CBN
CBP
YN
YP
SOY
ADCVSS2
REFP2
REFN2
MON0
MON1
ADCVDD3
RN
RP
GN
GP
SOG
BN
BP
ADCVSS3
REFP3
REFN3
VSYNC
HSYNC
DVSS
DVDD
ADCPLLVSS1
ADCPLLVDD1
ADCPLLVDD
ADCPLLVSS
SYSPLLVSS
SYSPLLVDD
TESTP
TESTN
XTALVDD
XTALO
XTALI
XTALVSS
APLL_CAP
APLLVSS
APLLVDD
DMPLLVDD
DMPLLVSS
VI0
VI1
VI2
VI3
VI4
VI5
VI6
DVDD18
VI7
VI8
VI9
VI10
VI11
DVSS3
VI12
VI13
VI14
VI15
DVSS18
VI16
VI17
VI18
VI19
VI20
VI21
VI22
VI23
VCLK_DVI
L12
D5
C4
B1
A1
B2
A2
B3
A3
L13
B4
A4
C5
B5
A5
B6
A6
M13
D6
C6
D7
B7
N13
A7
C7
B8
A8
B9
A9
B10
A10
C8
D10
D9
C9
D11
C11
D8
B11
A11
B12
A12
D13
B13
A13
C10
D12
C12
C13
C14
N14
D14
L14
D15
C15
M14
L15
D16
B14
A14
C16
B15
A15
M15
A16
D18
D17
C17
C18
B16
A17
B17
A18
B18
C19
D19
E23
A19
B19
C20
D20
A20
L16
B20
C21
D21
A21
M16
B21
C22
D22
A22
B22
C23
D23
A23
B23
Pinout information
MT8205

DE_DVI
VSYNC_DVI
HSYNC_DVI
DVDD18
AOSDATA0
AOSDATA1
AOSDATA2
DVDD3I
AOSDATA3
LIN
AOBCK
AOLRCK
AOMCLK
DVSS3
DQ24
DQ25
DQ26
DVDD2
DQ27
DQ28
DVSS2
DQ29
DVDD2
DQ30
DQ31
DQS3
DQM1
DVSS18
DQS2
DQ23
DQ22
DVSS2
DQ21
DQ20
DVDD18
DQ19
DVDD2
DQ18
DQ17
DQ16
RA4
DVSS2
RA5
RA6
RA7
RA8
DVSS18
RA9
RA11
CKE
DVDD2
RCLK
RCLKB
DVSS2
RA3
RA2
RA1
RA0
RA10
BA1
DVDD2I
DVDD18
BA0
RCS#
RAS#
DVSS2
CAS#
RWE#
DQ8
DQ9
DQ10
DVDD2
DQ11
DVSS18
DQ12
DQ13
DVSS2
DQ14
DQ15
DQS1
AVSS18
AVDD18
RVREF
DVSS18
DQM0
DQS0
DQ7
DVDD2
DQ6
DQ5
DVSS2
DQ4
DQ3
DVDD2
DQ2
DQ1
DQ0
C24
D24
A24
Y24
A25
A26
B26
F23
B25
B24
C26
C25
E24
N15
G26
G25
F26
F24
F25
E26
N16
E25
G24
D26
D25
H25
H26
P14
J25
J26
K25
P16
K26
L25
AA24
L26
H24
M25
M26
N25
J23
R16
J24
K23
K24
L23
R14
L24
M23
N26
H23
P26
P25
P15
M24
N23
N24
R26
P24
P23
U23
AA23
R24
R23
T24
R15
T23
U24
W26
V25
V26
V23
U25
T13
U26
T25
T15
T26
R25
W25
W23
Y23
G23
T16
Y26
Y25
AA26
V24
AA25
AB26
T14
AB25
AC26
W24
AC25
AD26
AD25
BGA388/SOCKET
MT8205
Pin Descriptions
2.3 Pin Descriptions
Table 2-1 provides detail video/audio port pin descriptions.
Table 2-1 video/audio port pin descriptions.
Pin
E24
C25
C26
A25
A26
B26
B25
B24
A3
A2
A1
C1
C2
Symbol
AOMCLK
AOLRCK
AOBCK
AOSDATA0
AOSDATA1
AOSDATA2
AOSDATA3
LIN
CVBS0P
CVBS1P
CVBS2P
SIF
AF
Type
Description
Audio out master clock
Audio out left-right clock
Audio out bit clock
Audio out data line 0
Audio line in
Composite Video input 0
Tuner Sound
SIF
Tuner Sound
AF

AT24C01A/02/04/08/16
Features
Low Voltage and Standard Voltage Operation

5.0 (VCC = 4.5V to 5.5V)
2.7 (VCC = 2.7V to 5.5V)
2.5 (VCC = 2.5V to 5.5V)
1.8 (VCC = 1.8V to 5.5V)
Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),
1024 x 8 (8K) or 2048 x 8 (16K)
2-Wire Serial Interface
Bidirectional Data Transfer Protocol
100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
Write Protect Pin for Hardware Data Protection
8-Byte Page (1K, 2K), 16-Byte Page (4K, 8K, 16K) Write Modes
Partial Page Writes Are Allowed
Self-Timed Write Cycle (10 ms max)
High Reliability
Endurance: 1 Million Cycles
Data Retention: 100 Years
Automotive Grade and Extended Temperature Devices Available
8-Pin and 14-Pin JEDEC SOIC and 8-Pin PDIP Packages
2-Wire
Serial CMOS
E2PROM
1K (128 x 8)
2K (256 x 8)
4K (512 x 8)
Description
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as
128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low power and low voltage operation are
essential. The AT24C01A/02/04/08/16 is available in space saving 8-pin PDIP, 8-pin
and 14-pin SOIC packages and is accessed via a 2-wire serial interface. In addition,
the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to
5.5V) and 1.8V (1.8V to 5.5V) versions.
8K (1024 x 8)
16K (2048 x 8)
AT24C01A/2/4/8/16
Pin Configurations
Pin Name
Function
A0 to A2
Address Inputs
SDA
Serial Data
SCL
Serial Clock Input
WP
Write Protect
NC
No Connect
8-Pin PDIP
14-Pin SOIC
8-Pin SOIC
0180C
38/106
3275
Absolute Maximum Ratings*

Operating Temperature................... -55C to +125C
Storage Temperature...................... -65C to +150C
Voltage on Any Pin
with Respect to Ground ..................... -0.1V to +7.0V
*NOTICE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Maximum Operating Voltage ........................... 6.25V

DC Output Current ......................................... 5.0 mA
Block Diagram
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive
edge clock data into each E2PROM device and negative
edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open
collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1
and A0 pins are device address inputs that are hard wired
for the AT24C01A and the AT24C02. As many as eight
1K/2K devices may be addressed on a single bus system
(device addressing is discussed in detail under the Device
Addressing section).
The AT24C04 uses the A2 and A1 inputs for hard wire

addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect.
The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devices may be addressed
on a single bus system. The A0 and A1 pins are no connects.
The AT24C16 does not use the device address pins which
limits the number of devices on a single bus to one. The
A0, A1 and A2 pins are no connects.
(continued)
AT24C01A/02/04/08/16
39/106
3375
MX29LV160BT/BB
16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE

3V ONLY FLASH MEMORY
FEATURES
Extended single - supply voltage range 2.7V to 3.6V
2,097,152 x 8/1,048,576 x 16 switchable
Single power supply operation
- 3.0V only operation for read, erase and program
operation
Fully compatible with MX29LV160A device
Fast access time: 70/90ns
Low power consumption
- 30mA maximum active current
- 0.2uA typical standby current
Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x31)
Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
Erase Suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase.
Status Reply
- Data polling & Toggle bit for detection of program and
erase operation completion.

Ready/Busy pin (RY/BY)
- Provides a hardware method of detecting program or
erase operation completion.
Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotect allows code changes in
previously locked sectors.
CFI (Common Flash Interface) compliant
- Flash device parameters stored on the device and
provide the host system to access
100,000 minimum erase/program cycles
Latch-up protected to 100mA from -1V to VCC+1V
Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
Low VCC write inhibit is equal to or less than 1.4V
Package type:
- 44-pin SOP
- 48-pin TSOP
- 48-ball CSP
Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
10 years data retention
GENERAL DESCRIPTION
The MX29LV160BT/BB is a 16-mega bit Flash memory
organized as 2M bytes of 8 bits or 1M words of 16 bits.
MXIC's Flash memories offer the most cost-effective
and reliable read/write non-volatile random access
memory. The MX29LV160BT/BB is packaged in 44-pin
SOP, 48-pin TSOP and 48-ball CSP. It is designed to be
reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29LV160BT/BB offers access time as
fast as 70ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29LV160BT/BB has separate chip enable
(CE) and output enable (OE) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29LV160BT/BB uses a command register to manage this functionality. The command register allows for
100% TTL level control inputs and fixed power supply

levels during erase and programming, while maintaining
maximum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cycling. The MX29LV160BT/BB uses a 2.7V~3.6V VCC
supply to perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
LP2996
DDR Termination Regulator
General Description
Features
The LP2996 linear regulator is designed to meet the JEDEC

SSTL-2 specifications for termination of DDR-SDRAM. The
device contains a high-speed operational amplifier to provide
excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current
and transient peaks up to 3A in the application as required
for DDR-SDRAM termination. The LP2996 also incorporates
a VSENSE pin to provide superior load regulation and a VREF
output as a reference for the chipset and DIMMs.
n
n
n
n
n
n
n
n
An additional feature found on the LP2996 is an active low

shutdown (SD) pin that provides Suspend To RAM (STR)
functionality. When SD is pulled low the VTT output will
tri-state providing a high impedance output, but, VREF will
remain active. A power savings advantage can be obtained
in this mode through lower quiescent current.
Source and sink current

Low output voltage offset
No external resistors required
Linear topology
Suspend to Ram (STR) functionality
Low external component count
Thermal Shutdown
Available in SO-8, PSOP-8 or LLP-16 packages
Applications
n DDR-I and DDR-II Termination Voltage
n SSTL-2 and SSTL-3 Termination
n HSTL Termination
Typical Application Circuit
20057518
LP2996 DDR Termination Regulator
November 2003

SCDS164A MAY 2004 REVISED MAY 2004
D Low Differential Gain and Phase
D
D
D
15
14
13
12
11
10
VCC
EN
S1D
S2D
DD
S1C
S2C
DC
RGY PACKAGE
(TOP VIEW)
S1A
S2A
DA
S1B
S2B
DB
VCC
16
16
15 EN
14 S2D
2
3
13 S2D
12 DD
4
5
6
7
8
11 S1C
10 S2C
DC
D
D
D
IN
IN
S1A
S2A
DA
S1B
S2B
DB
GND
GND
D
D
D
D, DBQ, OR PW PACKAGE
(TOP VIEW)
(DG = 0.64%, DP = 0.1 Degrees Typ)

Wide Bandwidth (BW = 300 MHz Min)
Low Crosstalk (XTALK = 63 dB Typ)
Low Power Consumption
(ICC = 3 A Max)
Bidirectional Data Flow, With Near-Zero
Propagation Delay
Low ON-State Resistance (ron = 3 Typ)
VCC Operating Range From 4.5 V to 5.5 V
Ioff Supports Partial-Power-Down Mode
Operation
Data and Control Inputs Provide
Undershoot Clamp Diode
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
2000-V Human-Body Model
(A114-B, Class II)
1000-V Charged-Device Model (C101)
Suitable for Both RGB and
Composite-Video Switching
description/ordering information
The TI TS5V330 video switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (EN) input.
When EN is low, the switch is enabled and the D port is connected to the S port. When EN is high, the switch
is disabled and the high-impedance state exists between the D and S ports. The select (IN) input controls the
data path of the multiplexer/demultiplexer.
ORDERING INFORMATION
QFN RGY
SOIC D
40C to 85C
ORDERABLE
PART NUMBER
PACKAGE
TA
SSOP (QSOP) DBQ

TSSOP PW
Tape and reel
TS5V330RGYR
Tube
TS5V330D
Tape and reel
TS5V330DR
Tape and reel
TS5V330DBQR
Tube
TS5V330PW
Tape and reel
TS5V330PWR
TOP-SIDE
MARKING
TE330
TS5V330
TE330
TE330
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated

!"# $"%&! '#(
'"! ! $#!! $# )# # #* "#
'' +,( '"! $!#- '# #!#&, !&"'#
#- && $##(
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
42/106
3675
19-0175; Rev 3; 5/96
15kV ESD-Protected, +5V RS-232 Transceivers

____________________________Features
ESD Protection for RS-232 I/O Pins:
15kVHuman Body Model
8kVIEC1000-4-2, Contact Discharge
15kVIEC1000-4-2, Air-Gap Discharge
Latchup Free (unlike bipolar equivalents)
Guaranteed 120kbps Data RateLapLink
Compatible
Guaranteed 3V/s Min Slew Rate
Operate from a Single +5V Power Supply
_________________Pin Configurations
TOP VIEW
C1+ 1
16 VCC
V+ 2
15 GND
C1- 3
C2+ 4
C2- 5
________________________Applications
14 T1OUT
MAX202E
MAX232E
12 R1OUT
V- 6
11 T1IN
T2OUT 7
10 T2IN
9
R2IN 8
Notebook, Subnotebook, and Palmtop Computers

Battery-Powered Equipment
Hand-Held Equipment
13 R1IN
R2OUT
DIP/SO
Pin Configurations and Typical Operating Circuits continued at
end of data sheet.
Ordering Information appears at end of data sheet.
_____________________________________________________________Selection Guide
PART
No. of RS-232
DRIVERS
No. of RS-232
RECEIVERS
RECEIVERS
ACTIVE IN
SHUTDOWN
No. of
EXTERNAL
CAPACITORS
LOW-POWER
SHUTDOWN
TTL THREESTATE
MAX202E
4 (0.1F)
No
No
MAX203E
None
No
No
MAX205E
None
Yes
Yes
MAX206E
4 (0.1F)
Yes
Yes
MAX207E
4 (0.1F)
No
No
MAX208E
4 (0.1F)
No
No
MAX211E
4 (0.1F)
Yes
Yes
MAX213E
4 (0.1F)
Yes
Yes
MAX232E
4 (1F)
No
No
MAX241E
4 (1F)
Yes
Yes
LapLink is a registered trademark of Traveling Software, Inc.

________________________________________________________________ Maxim Integrated Products
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
MAX202EMAX213E, MAX232E/MAX241E
_______________General Description
The MAX202EMAX213E, MAX232E/MAX241E line
drivers/receivers are designed for RS-232 and V.28
communications in harsh environments. Each
transmitter output and receiver input is protected
against 15kV electrostatic discharge (ESD) shocks,
without latchup. The various combinations of features
are outlined in the Selection Guide. The drivers and
receivers for all ten devices meet all EIA/TIA-232E and
CCITT V.28 specifications at data rates up to 120kbps,
when loaded in accordance with the EIA/TIA-232E
specification.
The MAX211E/MAX213E/MAX241E are available in 28pin SO packages, as well as a 28-pin SSOP that uses
60% less board space. The MAX202E/MAX232E come
in 16-pin narrow SO, wide SO, and DIP packages. The
MAX203E comes in a 20-pin DIP/SO package, and
needs no external charge-pump capacitors. The
MAX205E comes in a 24-pin wide DIP package, and
also eliminates external charge-pump capacitors. The
MAX206E/MAX207E/MAX208E come in 24-pin SO,
SSOP, and narrow DIP packages. The MAX232E/
MAX241E operate with four 1F capacitors, while the
MAX202E/MAX206E/MAX207E/MAX208E/MAX211E/
MAX213E operate with four 0.1F capacitors, further
reducing cost and board space.
MAX202EMAX213E, MAX232E/MAX241E
15kV ESD-Protected, +5V RS-232 Transceivers

Table 3. DB9 Cable Connections
Commonly Used for EIA/TIAE-232E and
V.24 Asynchronous Interfaces
PIN
CONNECTION
Received Line Signal

Detector (sometimes
called Carrier Detect,
DCD)
Handshake from DCE
Receive Data (RD)
Data from DCE
Transmit Data (TD)
Data from DTE
Data Terminal Ready
Handshake from DTE
Signal Ground
Reference point for

signals
Data Set Ready (DSR)
Handshake from DCE
Request to Send (RTS)
Handshake from DTE
Clear to Send (CTS)
Handshake from DCE
Ring Indicator
Handshake from DCE
____________Pin Configurations and Typical Operating Circuits (continued)

+5V INPUT
TOP VIEW
0.1F*
6.3V
0.1F
16
1
0.1F*
6.3V
3
4
C1+ 1
16 VCC
V+ 2
15 GND
C1- 3
C2+ 4
C2- 5
0.1F*
16V
C1+
VCC
V+
+5V TO +10V
C1- VOLTAGE DOUBLER
C2+
+10V TO -10V
C2- VOLTAGE INVERTER
V-
+10V
-10V
0.1F*
16V
14 T1OUT
MAX202E
MAX232E
V- 6
11 T1IN
10 T2IN
9
T1IN
T1OUT 14
T1
TTL/CMOS
INPUTS
12 R1OUT
T2OUT 7
R2IN 8
11
13 R1IN
R2OUT
RS-232
OUTPUTS
10
T2IN
12
R1OUT
T2OUT
T2
DIP/SO
R1IN 13
R1
TTL/CMOS
OUTPUTS
5k
9
R2OUT
R2IN
R2
5k
PIN NUMBERS ON TYPICAL OPERATING CIRCUIT REFER TO DIP/SO PACKAGE, NOT LCC.
* 1.0F CAPACITORS, MAX232E ONLY.
GND
15
______________________________________________________________________________________
RS-232
INPUTS
Meet with mega satisfaction
SPECIFICATION FOR APPROVAL
Part No.
MLT186A
Description: LCD Power Supply Specification
Revision:
1.0
Customer.
SANSUI ELECTRIC
Customer Approval No. :
Please return to us one original of SPECIFICATION FOR APPROVAL with your approved signatures.
APPROVED SIGNATURES
APPROVED BY
DATE
CHOP & SIGNATURES:
SHENZHEN MEGMEET ELECTRICAL TECHNOLOGY CO.,LTD

Add: 6F Tower 2, Zhongjian Industrial Building
18 Yanshan Road , Shekou, Shenzhen, P.R.China
ZIP CODE:518067
TEL: (0755)26693042 26693442
FAX: (0755)26693047
E-mail: YDP@megmeet.com
DESCRIPTION:
MEGMEET
SPECIFICATION
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.

THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
46/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
Spec.
Rev.
Sample
Rev.
1.0
1.0
Date
Description
2005.
09.12
Safety
by
Zhangzhi
Qiu
Electrical
by
Tony Yang
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
Mechanical
by
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
47/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
Section
1. Power supply overview
1.1 Input Electrical Characteristics Overview
1.2 Output Electrical Characteristics Overview
1.2.1 Output Voltage ,Current & Regulation.
1.2.2 DC Output Ripple & Noise.
1.2.3 Output Transient Response.
1.2.4 DC Output Hold-Up Time.
1.2.4 DC Output Overshoot At Turn On & Turn Off.
1.2.6 DC output voltage rise time
1.3 Remote On/Off Control
1.4 Protection:
1.4.1 DC output Over Voltage Protection.
1.4.2 DC Output Over current Protection.
1.4.3 DC Output Short Circuit Protection.
1.4.4 Over Temperature Protection.
1.4.5 Reset After Shutdown.
2. Isolation
3. Safety
4. EMC
4.1
4.2
EMI
EMS
5. Environmental Requirement
5.1
5.2
5.3
5.4
5.5
5.6
Temperature
Humidity
Altitude
Cooling Method
Vibration
Impact
6. Dimension
7. Weight
8. Pin Connection
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
48/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
Spec.
Rev.
Sample
Rev.
1.0
1.0
Date
Description
2005.
09.12
Safety
by
Zhangzhi
Qiu
Electrical
by
Tony Yang
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
Mechanical
by
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
49/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
2) Outputs shall be bypassed at the connector with a 0.1uF ceramic capacitor and a
10uF electrolytic capacitor to simulate system loading.
1.2.3 Output Transient Response.

Table 4. Test condition.
Voltage Tolerance Limit
Slew Rate
Load Change
V1/V35%
0.2A/uS
Min. to 50% load and 50% to Max load
+V2 10%
+5V5%
+5.1VSB5%
all outputs 10%
0.2A/uS
Min. load to Max load
Note: Transient response measurements shall be made with a load changing repetition
rate of 50Hz to 10kHz.
1.2.4
Table 5
DC Output Hold-Up Time.
Output Voltage
120Vac input
220Vac input
+V1/+V2(+24V)
+V3(+12V)
10 mS
10 mS
10 mS
10 mS
+5V/+5.1VSB
10 mS
10 mS
Note: All of dc output at full load.
1.2.5
Table 6
DC Output Overshoot At Turn On & Turn Off.
Output Channel
Output(V)
Over shoot voltage(V)
Turn on
+V1
+24V
2%
+24V
+V2
5%
+ 12V
+V3
2%
+5V
+5V
5%
+5.1VSB
+5.1V
5%
Note: All of dc output current from Min. to Max.
1.2.6
Table 7
DC output voltage rise time
Output Voltage
+V1/+V2(+24V)
120Vac input &Full Load
220Vac input &Full Load
100 mS
100 mS
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
Turn off
2%
5%
2%
5%
5%
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
50/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
+V3(+12V)
100 mS
100 mS
+5V
100 mS
100 mS
+5.1VSB
100 mS
100 mS
Note: The output voltages shall rise from10% to 90% of their output voltage.
1.3 Remote On/Off Control

The power supply DC outputs (without +5.1Vsb) shall be enable with an active-high
TTL(2.0V/2.0mA)-compatible signal(Ps-on). The +5.1Vsb is on whenever the AC
power is present.
*
When Ps-on is pulled to TTL high, the DC outputs are to be enabled.
When Ps-on is pulled to TTL low or open circuit, the DC outputs are to be disabled.
Table 8.
Ps-on Signal
2.5V&2.0mA ( source)
1.5 V
--
Ps-on- high
Ps-on- low
Ps-on-open
1.4
Outputs
Comments
Enable
X
X
Protection:
1.4.1 Table 9
DC output Over Voltage Protection.
Output Voltage
Max. Over Voltage
Comments
+V1(+24V)
28V
Power supply latch into shutdown state
+5.0V
7Vtyp
Hiccup
Note: The power supply shall be test at max AC voltage (270Vac) and min load or no load.
1.4.2 Table 10
DC Output Over current Protection.
Output Voltage
Over Current
Comments
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
51/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
+V1(+24V)
+V2(+24V)
7Atyp
2Atyp
Shutdown
Shutdown
+V3(+12V)
3A
Shutdown
9A type
Hiccup
+5V/+5.1VSB
1.4.3 Table 11
DC Output Short Circuit Protection.
Output Voltage
Comments
+V1(+24V)
+V2(+24V)
Shutdown
Shutdown
+V3(+12V)
Shutdown
+5V/5.1VSB
Hiccup
1.4.4 Reset After Shutdown.

Recycle the ps-on signal, the power supply will restart after the fault removed.
2. Isolation
2.1
Table 12
2.2
Input To Output
Input To FG
DC500V 50Mmin (at room temperature)

DC500V 50Mmin (at room temperature)
Output To FG
Non Isolated
Table 13
Note:
Input To Output
Input To FG
3000Vac 50Hz 1minute 10mA

1500Vac 50Hz 1minute 10mA
Output To FG
Non Isolated
Open FG and Output return.
3. Safety
The power supply shall compliance with the following Criterion:
1) UL60950
2) EN60950
3) GB4943-1995/GB8898-2001
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
52/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
EMC
4.
4.1
EMI
The power supply shall

1) Conduction Emission
*EN55013, CLASS B
*GB13837-2003, CLASS
*CISPR13:2001
2) Radiated Emission :
*EN55013, CLASS B
*GB13837-2003, CLASS
*CISPR13:2001
4.2
compliance with the following Criterion:

:
B
EMS
The power supply shall compliance with the following Criterion:

1) ESD
*GB17626.2-1998/IEC61000-4-2
Lever 3
2) EFT
*GB17626.4-1998/IEC61000-4-4
Lever 3
3) SURGE
*GB17626.5-1998/IEC61000-4-5
Lever 3
4 DIP
Class B/C
*GB17626.11-1998/IEC61000-4-11
5.
Environmental Requirement
5.1 Temperature
* Operating:
-10 to +50.
* Store:
-20 to +80.
5.2 Humidity
* Operating: From 10%to90% relative humidity (non-condensing).
* Store: From 5 to 95% relative humidity (non-condensing).
5.3 Altitude
* Operating: to10,000 ft.
* Store:
to 20,000ft.
5.4 Cooling Method
* Ventilation cooling .
5.5 Vibration
* 10-55Hz, 49.0m/s(5G), 3minutes period, 20minutes each along X, Y and Z axis.
5.6 Impact
* 196.1m/s(20G),11ms, once each X, Y and Z axis.
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
53/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
6. Dimension
* 200mm X 130mm X 25mm (L *W * H ).
7. Weight
* 680g
8. Pin Connection
Table 15
NO.
CN3
VENTER:
Pin Connection
Function
+24VAUDIO
+24VDC OUTPUT
+24VAUDIO
+24VDC OUTPUT
GND
+24VDC RETURN
GND
+24VDC RETURN
Note: CN3 -- JST VA CONNEETION, TYPE : pitch:2.0mm

Table 16 CN2
VENTER:
NO.
Pin Connection
Function
1
+24V
+24VDC OUTPUT
+24V
+24VDC OUTPUT
+24V
+24VDC OUTPUT
+24V
+24VDC OUTPUT
GND
+24VDC RETURN
GND
+24VDC RETURN
GND
+24VDC RETURN
GND
+24VDC RETURN
Note:
CN2 -- JST VA CONNEETION, TYPE : pitch:2.54mm
Table 17
NO.
CN1
VENTER:
Pin Connection
Function
+12V
+12DC OUTPUT
+12V
+12DC OUTPUT
+12V
+12DC OUTPUT
GND
+12V/+5VDC RETURN
GND
+12V/+5VDC RETURN
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
54/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
GND
+12V/+5VDC RETURN
+5V
+5DC OUTPUT
+5V
+5DC OUTPUT
+5V
+5DC OUTPUT
10
+5V
+5DC OUTPUT
11
+5V
+5DC OUTPUT

Table 15
NO.
CN4
VENTER:
Pin Connection
Function
+5VSB
+5VSB OUTPUT
+5VSB
+5VSB OUTPUT
GND
+5VSB RETURN
GND
+5VSB RETURN
PS-ON
PS-ON
Note:
CN3 -- JST VA CONNEETION, TYPE : pitch:2.0mm
Table 18
NO.
CON1
Pin Connection
VENTER:
Function
AC-L
AC INPUT LINE
NC
NC
AC-N
AC INPUT NUTURE

Fig.8.1 Pin Connection (Top View)
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
55/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
56/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
57/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
9. Power Supply Mounting
DESCRIPTION:
MEGMEET
SPECIFICATION

DATE
09-12-2005
PREPARED
QIU
CHECKED
ZHANGZHI
APPROVED
TONY YANG
58/106
Model No.:
MLT186
Document No.:
MLT186-1.0
REV:
1.0
P r o d u c t S p e c i f i c a t i o n Ver05
SPECIFICATION
CUSTOMER
DESCRIPTION
MODEL
Slot-in DVD LOADER
DL-06 series(DL-06**)
2005.11.02
ISSUE DATE
CUSTOMER
Approved
Checked by
Sales Dept.
APPROVED
Checked by
Technical Dept.
59/106
Prepared
DL-06
Ver05
1.
1.1
DL-06
Scope
This specification applies to Slot-in DVD mechanism for DVD player (thereafter called DVD
mechanism ). Foryou model : DL-06**.
1.2
Any query over the specification shall be expressed by R&D dept. of

Electronics Co.,Ltd.
Foryou Multimedia
1.3
For improving performance purpose, this specification is subject to change according to

pre-agreement established between us.
1.4
Hardware and software or manufacturing process may subject to change for improvements
within the rang of the specifications.
2.
Dimension of
2.1
See attachment for details of dimension of shell and installation.
3.
General specification
3.1
Mechanism
3.1.1
Disc loading:
3.1.2
Disc ejecting: Motorized ejection.
3.1.3
Play:
3.1.4
Skew adjusting: adjust two points on the base of spindle motor.
3.1.5
Pick-up feed mode: gear and rack drive.
3.1.6
Range of pick-up movement: 22.5mm ~ 59mm, from the center of
shell and
installation
Motorized loading.
Loading auto play
60/106
spindle motor.
DL-06
3.1.7
Anti vibration: two steps of dampers to reduce the vibration.
3.2
3.3
Power supply
DC12 1V600 mA&
DC50.2V (660 mA) .
Pick-up
3.3.1 PVR-520TPVR-502WMITSUMIHOP-1200SWHITACHI
OPU-3153SANKYOSF-HD62SANYOSF-HD65SANYOtwo laser diode and
single object lens pickup.
3.4
Motor
3.4.1
Spindle motor: DC brush motor: CCM03-030R1-26O ( (Moretech).
3.4.2
Sled motor WRF-300CA-09600.
3.4.3
Loading motor WFF-050SB-10200.
3.5
Detect switch
3.5.1
Pick-up inner position detecting SW: WI-A278DS3-A-0001
3.5.2
Disc chucking detecting SW: ESE22 (Type B)1pcs
3.5.3
Disc detecting SW: ESE22
3.6
Weight: approximate
4.
General performance
4.1
Disc specification
Diameter of disc1200.3800.3
Thickness of Disc1.2(+0.3,-0.1)
Type of disc
(Type B)2pcs (Panasonic).
476 g.
61/106
Ver05
DL-06
DVD Video;
CD-DA;
Video CD;
CD-R, CD-RW;
4.2
Prevention from the 2nd disc insertion: the second disc cant be loaded when there is a disc in
mechanism.
4.3
Noise Spec.
65 dBA
Noise level tests shall be carried out in an anechoic room with background noise 20 dBA or
less.Noise shall be measured at a position 10cm from the front of the mechanical section.
5.
Conditions of operation and storage
5.1
Operation temperature range: 0 ~ +45.
5.2
Range of storage: -20 ~ +60
5.3
Operation moisture range:
5.4
Storage moisture range:
5.5
Atmospheric pressure:
6.
6.1
0% ~ 90% RH.
860mBar ~ 1060 mBar.
Condition of performance evaluation

Installation: see attachment. Tightened on work table;
forth and
6.2
10% ~ 80% RH.
back: 10 ,
left and right:
Installation angle:
10 .
Environment of evaluation
Temperature 252
Humidity
605RH
62/106
DL-06
Temperature
+15
~ +30
Humidity
45% ~ 75%RH
Noise: in an anechoic room with background noise 20dB (A) or less.

6.3
Test circuit and equipment
6.3.1
Refer FORYOUs standard circuit and equivalent.
7.
Reliability test
7.1
Environment test
Item
Specification
7.1.1
Test of high temperature
storage
After 24hours kept at +60, and then 16 hours at room temperature,

the mechanism shall be able to load/eject and playback within this
process.(Test disc:TCD-792 and TDV-520A)
7.1.2
Test of low temperature
storage
After 24hours kept at -20, and then 16 hours at room temperature,

7.1.3
and high moisture storage
After 48hours kept at +40, 90%RH, and then 16 hours at room

temperature, the mechanism shall be able to load/eject and
playback within this process.(Test disc:TCD-792 and TDV-520A)
63/106
DL-06
7.1.4
High and low temperature
cycling test
Applied -20(1H)60(1H)(temperature slope 80/H)

5cycles,then place at normal temperature for 16 hours, the mechanism
shall be able to load/eject and playback within this process.(Test
disc:TCD-792 and TDV-520A)
7.1.5
operation
DVD mechanism shall be kept in 45 for 4 hours, and then operate,

7.1.6
Test of low temperature
operation
7.2
DVD mechanism shall be kept in 0 for 4 hours, and then operate,

Life test
Item
Specification
Continue playback ability
When a mechanism is executed for continuous playing at room

temperature for 1,000H, the mechanism shall be able to playback
standard disc TDV-520A and TCD-792.
7.2.1
7.2.2
Feed motion
After conduct 200,000 times of pick-up feeding motion at room
temperature, mechanism shall be able to playback standard disc
TDV-520A and TCD-792. (One cycle: inner outer inner).
7.2.3
Loading and ejection
At normal room temperature, after 10,000 times of disc loading and
ejection circulation, mechanism shall be able to playback standard disc
TDV-520A and TCD-792. (One cycle :Disc in playback disc out)
7.3
Drop and impact
test:
Item
Specification
64/106
DL-06
7.3.1
Shock test
(1 time ,6ms), 70G crash impact on each of 6 sides of mechanism. Mechanism

shall be able to playback standard disc TDV-520A and TCD-792.
7.3.2
Drop
test
After one time of drop test with surface, edge and corner (packing with 10sets
per carton), the mechanism shall be able to playback standard disc
TDV-520A and TCD-792.
Drop with surface: drop height 600mm, Drop sequence: bottom, front, left,
back, right. Each surface drop one time.
Drop with corner: drop height 450mm, Drop one of corners of carton bottom
one time.
Drop with edge: drop height 450mm, Each edge of drop corner (three edges)
drop one time.
7.4
Durability test of vibration

Item
Specification
7.4.1
Durability test
of vibration
Acceleration 2.5G, Frequency 10~50Hz, sweep time 5minutes, test time is

20minutes with each of 3 directions. After that test, mechanism shall be able
to playback standard disc TDV-520A and TCD-792.
7.5
The test environment is the same as item 6.2 except for special note.
8.
Ref appearance drawing
9.
Caution:
9.1
It is not allowed to disassembly and re-tune the mechanism without special training
because the mechanism is assembled and tuned using special method.
9.2
Storage: avoid storing the mechanism in high temperature, heavy wet and dusty place.
65/106
DL-06
9.3
Handling: avoid extra force to the mechanism when handling.
9.4
Static-proof action should be taken when touch the mechanism since LD and OEIC can
be easily damaged by static.
9.5
Hand touch pickup is forbidden.
9.6
Must avoid laser beam shooting at eyes directly since the laser beam can hurt eyes.
10.
Attachment
10.1
Model Description in detail
10.2
Appearance drawing of
DL-06
10.3
Mechanism schematic diagram of
DL-06set in PCB of customer
10.4
customer Servo PCB of
DL-06
10.5
Package specification of DL-06
10.6
Guide of Mechanism installation and cantions on assembly
10.7
installation screw
66/106
DL-06
10.1
Series
No.
1
Model
No.
DL-06L
Pick-Up
SPINDLE MOTOR
Loading motor
Sled motor
PVR-520T
(MITSUMI)
CCM03-030R1-26
O (Moretech)
WFF-050SB-102
00
WRF-300CA-09
600
DL-06LH
HOP-1200
(HITACHI)
Same as above
DL-06H
HOP-1200
(HITACHI)
Same as above
DL-06LS
SF-HD62(65)
(SANYO)
Same as above
DL-06LSM
SF-HD62 (65)
(SANYO)
DL-06LW
PVR-502W
(MITSUMI)
Same as above
67/106
Chunghwa Picture Tubes, Ltd.

Technical Specification
To : Normal for SECC
Date : 2004.11.15
CPT TFT-LCD
CLAA320WA01
ACCEPTED BY
TENTATIVE
APPROVED BY
CHECKED BY
PREPARED BY
Product Planning management General Division
CHUNGHWA PICTURE TUBES, LTD.

1127 Hopin Rd., Padeh, Taoyuan, Taiwan 334, R.O.C.
TEL: +886-3-3675151 FAX: +886-3-377-3054
Doc.No:
CLAA320WA01-Ver1.2-041115
T- 3650002- 000- A NEW
68/106
Issue Date:
2004/11/15
CPT
CHUNGHWA PICTURES TUBES, LTD.,
RECORD OF REVISIONS
Revision No.
Date
Page
Ver1.0
2004/10/18
all
Preliminary specification was first issued .
Ver1.1
2004/10/25
--
Update
Ver1.2
2004/11/15
--
Update
CPT Confidential
Description
69/106
CLAA320WA01-TENTATIVE-ver1.1
CPT
CONTENTS
No
Item
Page
OVERVIEW
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
INTERFACE PIN CONNECTION
10
INTERFACE TIMING
13
BLOCK DIAGRAM
18
MECHANICAL SPECIFICATION
19
OPTICAL CHARACTERISTICS
21
RELIABILITY TEST CONDITIONS
26
10
PACKAGING
27
11
DEFINITION OF LABELS
29
12
HANDLING PRECAUTIONS FOR TFT-LCD MODULE
31
CPT Confidential
70/106
CPT
1. OVERVIEW
CLAA320WA01 is 32 color (80.04cm) TFT-LCD (Thin Film Transistor Liquid Crystal Display)
module composed of LCD panel, LVDS driver ICs, control circuit and backlight. By applying 8 bit
digital data, 1366*768, 16.7 million-color images are displayed on the 32 diagonal screen. Interface of
data and control signals is Typ. Inverter for backlight is included in this module. General specification
are summarized in the following table:
1.1GENERAL INFORMATION
Items
Specifications
Unit
Display Area
697.68(H) 392.25(V) (31.51 inch diagonal)
mm
Number of Pixels
1366(H) 768(V)
16:9
Pixel Pitch
0.51075(H) 0.51075(V)
mm
Color Pixel Arrangement
RGB Vertical Strip
Display Mode
Normally Black
Number of Colors
16.7M (8bits)
Surface Treatment
Hard coating : 3H ,
Anti-reflective coating <less than 2% reflection.
Total Module Power
115
color
1.2 MECHANICAL INFORMATION

Items
Module
outline
Min
Typ.
Max.
Unit
Horizontal(H)
742.0
743.0
744.0
mm
Vertical(V)
446.0
447.0
448.0
mm
without inverter
41.0
42.0
43.0
mm
with inverter
43.0
44.0
45.0
mm
7900
8100
8300
dimension Depth(D)
Module Weight
CPT Confidential
71/106
CPT
2. ABSOLUTE MAXIMUM RATINGS

The following are maximun values which, if exceeded, may cause faulty operation or damage to the
Unit
ITEM
SYMBOL
MIN.
MAX.
UNIT
Remark
Power Supply Voltage For LCD
VCC
-0.3
16.0
V
Input voltage of inverter
VBL
21.6
26.4
V
Input current of inverter
IIN
-9
A
Inverter dimming
VDIM
0
5
Vdc
Inverter frequency
FL
43
53
kHz
Backlight striking time
Ts
1
Sec.
ON
2.4
5
Vdc
Backlight on/off
VBLON
control voltage
0
1
Vdc
OFF
VESDt
-100
100
V
ESD
VESDc
-8000
8000
V
ICC Rush Current
IRUSH
-12
A
0
50
*1) *2) *3) *4)

Top
Operation Ambient Temperature
Tstg
-20
60
*1) *2) *3) *4)

Storage Temperature
[Note]
*1) The relative temperature and humidity range are as below sketch, 90%RHMax. (Ta40)
Humidity85%RH without condensation.
Relative Humidity 90% (Ta 40) , Wet Bulb Temperature 39(Ta40)
*2) The maximum wet bulb temperature 39(Ta40) and without dewing.
*3) If you use the product in a environment which over the definition of temperature and humidity
too long ,this will effect the result of visual inspecfion.
*4) If you operate the product in normal temperature range, the center surface of panel should be
under 60.
90%
60%%
Wet Bulb
Temperature [C]
Storage
40
40%
30
20
10
Operation
10%
-20
Humidity [(%)RH]
50
10
20
30
40
50
60
70
80
Dry Bulb Temperature [C]
CPT Confidential
72/106
CPT
3. ELECTRICAL CHARACTERISTICS
(a). TFT-LCD
Ta=25
ITEM
SYMBOL
MIN
TYP
MAX
UNIT
REMARK
LCD Power Supply Voltage
VCC
11.4
12.0
12.6
[Note 1]
Ripple Voltage
Vrpd
--
--
100
mVp-p
VIN=+12.0V
Rush current
Irush
--
--
[Note 2]
--
400
--
--
350
--
mA
[Note 3]
--
390
--
White
LCD Power
Supply Current
ICC
Black
RGB stripe
LCD power consumption
Pc
--
6.48
9.7
High input voltage of LVDS
VIN+
--
--
100
mV
Low input voltage of LVDS
VIN-
100
--
--
mV
Input common voltage of LVDS
VCM
--
1.25
Input terminal resist of LVDS
RT
--
100
--
ohm
[Note 4]
[Note 5]
[Note 1] The module should be always operated within above ranges.

[Note 2] Measure conditions
VCC
Q1
2SK1475
DC
+5V
FUSE
C3
1uF
LCD Module
Input
R1
47k
Q2
2SK1470
SW
(High to low)
(control signal)
R2
1k
VR1
47k
C2
0.01uF
+12V
DC
+15V
0.9Vcc
C1
1uF
0.1Vcc
1ms
GND
Vcc rising time is 1 ms
CPT Confidential
73/106
CPT
[Note 3] The specified power supply current is under condition at Vcc=12V, Ta=25+/-2, fv=60Hz
whereas a power dissipation check pattern below is displayed.
a. White pattern
b. Black pattern
c. RGB Stripe pattern
[Note 4] Power and signal sequence

t1 30ms
0 t2 50ms
0 t3 50ms
300ms t4
500ms t5
100ms t6
300 t7 500ms
300 t8 500ms
VCC
0.9 VCC
0.9 VCC
LCD Power Supply
data
Logic Signal
0.1 VCC
0.1 VCC
t1
t2
t3
0.1 VCC
t4
VBL
Backlight Power Supply
BLON
Backlight On/Off
t7
t5
t6
t8
Data: RGB DATA, DCLK, DENA
CPT Confidential
74/106
CPT

VCC-dip state
1) When 9VVCC11.4 Vtd10 ms.
2) VCC 11.4VVCC-dip condition should also follow the VCC-turn-off condition.
9V
11.4
[Note 5] LVDS signal definition
RT
VID = VIN+ VIN-

VCM = VCM+VCM-
VID = VID+VID-
VID+ = VIH+VIH-
VID- = VIL+VIL-
VCM = ( VIN++VIN- ) / 2
VCM+ = ( VIH++VIH- ) / 2,
VCM- =( VIL++VIL- ) / 2
VIN+: Positive differential DATA CLK input
VIN-: Negative differential DATA CLK input
CPT Confidential
75/106
CPT
(b). Backlight
ITEM
SYMBOL
MIN
TYP
MAX
UNIT
Ta=25
REMARK
Lamp Voltage
VL
--
1150
--
Vrms
IL=5.0mA
Lamp Current
IL
4.7
5.0
5.3
mArms
[Note 1]
Lamp life time
LT
50,000
60,000
--
hr
[Note 2]
Input voltage of inverter
VBL
21.6
24
26.4
Input current of inverter
IIN
4.3
Input frequency of inverter
FL
43
48
53
KHz
[Note 4]
Inverter dimming
VDIM
--
Vdc
[Note 5]
Inverter duty ratio
--
30
--
100
VDIM=5V(MAX.)
Inverter opening voltage
Vopen
2300
--
2700
Vrms
2.4
--
--
BLW
--
105
Vs
2300
1960
ON
Backlight on /of
control voltage
OFF
Power consumption
(Panel+ Backlight )
Start up
Voltage
Ta=0
Ta=25
VBLON
[Note 3]
[Note 6]
115
After starting 30 mins
--
3000
Vrms
--
3000
[Note]
*1) Lamp Current measurement method (The current meter is connected to low voltage end)
Take the average of 16 CCFLs lamp current as VDIM = 5V .
CPT Confidential
76/106
CPT

*2) Definition of the lamp life time
When lamp luminance redue to 50% or lower than its initial value.
*3) Ripple voltage that occars at the instant of power-on cant exceed 30V.
*4) Electrical and optical characterisitics color chromaticity is not included can maintain in a range
+/- 10% when the inverter operates within this frequency range.
*5) Brightness is the darkest when VDIM = 0V ; Brightness is the darkest when VDIM = 5V .
*6) Backlight turns off when VBLON = 0V ; turns on when VBLON = 5V(24V must be input in advance)
CPT Confidential
77/106
CPT
4. INTERFACE PIN CONNECTION

(a).Connector Part No.FI-X30SSL-HF(JAE) or compatible
SYMBOL
PIN NO
DESCRIPTION
1
VCC
Power supply: +12V
2
VCC
Power supply: +12V
3
GND
Ground
4
GND
Ground
5
RxIN0Data6
RxIN0+
Data+
7
GND
Ground
8
RxIN1Data9
RxIN1+
Data+
10
GND
Ground
11
RxIN2Data12
RxIN2+
Data+
13
GND
Ground
14
RxCLKINClock15
RxCLKIN+
Clock+
16
GND
Ground
17
RxIN3Data18
RxIN3+
Data+
19
GND
Ground
20
NC
Reserved
21
NC
Reserved
22
NC
Reserved
23
ColorMD1
Color Option (1)
24
ColorMD2
Color Option (2)
25
NC
Reserved
26
NC
Reserved
27
DMS
LVDS Option
28
GND
Ground
29
GND
Ground
30
GND
Ground
NOTE
[Note 1]
[Note 3]
[Note 2]
[Note 1] NC for internal use. Let it open.

[Note 2] High (3.3V) JEIDA LVDS formatLow (GND) None-JEIDA
LVDS format,It should be input High or Low logic levelit cant be NC(Open).
[Note 3] Color matrix selection. It should be input High or Low logic level it cant be
NC(Open).
ColorMD2
ColorMD1
Mode
L
L
Color 1(Native color)
L
H
Color 2
H
L
Color 3
H
H
Color 4
CPT Confidential
78/106
CPT

(b) LVDS InterfaceLVDS ReceiverTcon (LVDS Rx embeded)
TxOUT/RxIN0
TxOUT/RxIN1
TxOUT/RxIN2
TxOUT/RxIN3
CPT Confidential
LVDS PIN
JEIDA-DATA
Normal DATA
TxIN/RxOUT0
R2
R0
TxIN/RxOUT1
R3
R1
TxIN/RxOUT2
R4
R2
TxIN/RxOUT3
R5
R3
TxIN/RxOUT4
R6
R4
TxIN/RxOUT6
R7
R5
TxIN/RxOUT7
G2
G0
TxIN/RxOUT8
G3
G1
TxIN/RxOUT9
G4
G2
TxIN/RxOUT12
G5
G3
TxIN/RxOUT13
G6
G4
TxIN/RxOUT14
G7
G5
TxIN/RxOUT15
B2
B0
TxIN/RxOUT18
B3
B1
TxIN/RxOUT19
B4
B2
TxIN/RxOUT20
B5
B3
TxIN/RxOUT21
B6
B4
TxIN/RxOUT22
B7
B5
TxIN/RxOUT24
HSYNC
HSYNC
TxIN/RxOUT25
VSYNC
VSYNC
TxIN/RxOUT26
DENA
DENA
TxIN/RxOUT27
R0
R6
TxIN/RxOUT5
R1
R7
TxIN/RxOUT10
G0
G6
TxIN/RxOUT11
G1
G7
TxIN/RxOUT16
B0
B6
TxIN/RxOUT17
B1
B7
TxIN/RxOUT23
RESERVED
RESERVED
79/106
CPT

(c) Inverter side connectorPHR-14(JST)
PIN NO
SYMBOL
DESCRIPTION
NOTE
VBL
Supply Voltage 24V
VBL
Supply Voltage 24V
VBL
Supply Voltage 24V
VBL
Supply Voltage 24V
VBL
Supply Voltage 24V
GND
Ground
GND
Ground
GND
Ground
GND
Ground
10
GND
Ground
11
NC
NC(Test pin or else)
12
BLON
ON/OFF Control
[Note 1]
13
VDIM
0V~5V
[Note 2]
14
GND
GND
[Note 1] ON=5V , OFF=0VWhen this PIN is disconnecting with powerthe Inverter is in

OFF status.
[Note 2] Max Brightness =5VMin Brightness =0VWhen this PIN is disconnecting with
powerthe output status of Inverter is the same as VDIM0V.
CPT Confidential
80/106
CPT
5. INTERFACE TIMING(DE only mode)

(1) Timing Specification
ITEM
DCLK
Horizontal
LCD
Timing
DENA
Vertical
SYMBOL
MIN.
TYP.
MAX.
UNIT
Freq.
fCLK
68
80
84
MHz
Cycle
tCLK
14.7
12.5
11.9
ns
Line Rate
fH
43.17
48.54
53.33
kHz
Horizontal
total time
tH
1575
1648
1936
tCLK
Horiaontal
effective time
tHA
---
1366
---
tCLK
Horizontal
blank time
tHB
209
282
570
tCLK
Frame Rate
Fr
54.65
60
67.51
Hz
Vertical
total time
tV
790
810
888
tH
Vertical
effective time
tVA
768
768
768
tH
Vertical
blank time
tVB
22
42
120
tH
[Note]
1).The best result of over-driving is in frame rate =60Hz.
2).This module is operated in DE only mode. Hsync and Vsync input signals should be set to low
logic level. Otherwise, this module would be operated abnormally.
3).DE (DATA ENABLE) is usually in positive.
CPT Confidential
81/106
CPT
(2) Timing Chart

a. Horizontal Timing
DCLK
First Data
DATA
(R,G,B)
Invalid Data
1365
1366
Invalid Data
Last Data
t HFP
t HBP
t HA
DENA
t H=1/f
b. Vertical Timing Chart
HD
Invalid Data
LINE DATA
t VFP
tVBP
767
768
Invalid Data
tVA
DENA
tV=1/f V
CPT Confidential
82/106
CPT
(3) LVDS DATA MAPPING

a.None-JEIDA normal Specification
1CLK
RXCLK
R1
R0
G0
R5
R4
R3
R2
RXIN1
G2
G1
B1
B0
G5
G4
G3
G2
G1
RXIN2
B3
B2
DENA
VD
HD
B5
B4
B3
B2
RXIN3
R7
R6
Preserve
B7
B6
G7
G6
R7
R6
PREVIOUS
R1
R0
RXIN0
DATA for current CLK cycle
NEXT
b.JEIDA Specification
1CLK
RXCLK
RXIN0
R3
R2
G2
R7
R6
R5
R4
R3
R2
RXIN1
G4
G3
B3
B2
G7
G6
G5
G4
G3
RXIN2
B5
B4
DENA
VD
HD
B7
B6
B5
B4
RXIN3
R1
R0
Preserve
B1
B0
G1
G0
R1
R0
PREVIOUS
DATA for current CLK cycle
NEXT
8bit LSB:R0,G0,B0
Parallel TTL Data Inputs Mapped to LVDS outputs
CPT Confidential
83/106
CPT
(4) LVDS INTERFACE

8bit LSBR0,G0,B0
Parallel TTL Data Inputs Mapped to LVDS outputs
TRANSMITTER(THC63LVD823) INTERFACE CONNECTOR
INPUT DATA
51
TA0
R2
52
TA1
R3
54
TA2
R4
55
TA3
56
TA4
TA5
R7 (MSB)
TA6
G2
TB0
G3
TB1
G4
11
TB2
G5
12
TB3
14
TB4
15
TB5
B2
19
TB6
B3
20
TC0
B4
22
TC1
B5
23
TC2
B6
24
TC3
27
TC4
28
TC5
Reserved
30
TC6
DENA
50
TD0
R0 (LSB)
TD1
R1
TD2
G0 (LSB)
10
TD3
16
TD4
18
TD5
B1
25
TD6
Reserved
CPT Confidential
HOST
TxOUT0+
TxOUT0-
TxOUT1+
TxOUT1-
TxOUT2+
TxOUT2-
TxOUT3+
TxOUT3-
84/106
TFT_LCD
TIMING CONTROLLER INPUT
PIN NO
TA+
TA-
TB+
TB-
TC+
TC-
TD+
TD-
R5
R6
G6
G7 (MSB)
B7 (MSB)
Reserved
G1
B0 (LSB)
CPT
(5) Color data assignment
[Note]
(1) Definition of gray scale
Color (n)n indicates gray scale levelhigher n means brighter level.
(2)Data1-High0-Low
CPT Confidential
85/106
CPT
6. BLOCK DIAGRAM
TFT-LCD Module
Timing
Controller
Source Driver
TC +/TD +/TCLK +/-
Vin=12V
Voltage Supply
for Gray Levels
GND
Gate Driver
TB +/-
INPUT CONNECTOR
TA +/-
DC/DC
LCD Panel
1366 X 3 X 768
CN2
Backlight +
Inverter
Converter
CN3
BACKLIGHT UNIT
Lamp connector
HV(CN2) BHR-02(8.0)VS-1(JST)*8 Mating connectorSM02(8.0)B-BHS-1-TA(JST)
LV1(CN3)DF13-8P-1.25H(HRS)*2
LV2DF13-8S-1.25H(HRS)*2
LV3DF13-8S-1.25H(HRS)*2 Mating connectorDF13-8P-1.25H(HRS)

LV2 LV1
LV3
HV
LV
HV
LV
LV3
CPT Confidential
LV2 LV1
86/106
CPT
7. MECHANICAL SPECIFICATION
(1) Front side ( include Inverter, if the dimension did not to eerance, please refer to the table. )
[Unit: mm]
CPT Confidential
87/106
CPT
(2) Rear side ( include Inverter, if the dimension did not to eerance ,please refer to the table. )
[Unit: mm]
CPT Confidential
88/106
CPT
8.OPTICAL CHARACTERISTICS
ITEM
SYMBOL
Contrast (CEN)
CR
= 0
Point-5
600
800
--
--
Lwc
= 0
500
550
--
cd/m2
Lw9
= 0
--
500
--
cd/m2
*2)*3)
Lw
= 0
--
--
75
*2)*3)
Contrast Uniformity
CR
= 0
--
--
75
*1)*2)*3)
Response Time
( White Black )
tr
= 0
--
15
ms
*3)*4)
tf
= 0
15
ms
*3)*4)
trg, tfg
--
10
TBD
ms
*5)
2h
--
--
sec
*6)
24 h
--
--
< 16
sec
*6)
-80~80
-85~85
--
*2)*3)
-80~80
-85~85
--
*2)*3)
--
--
*3)*7)
--
*2)*3)
Central
luminance
Luminance 9P Luminance
(AVG)
Uniformity
Response Time
(Gray to gray average)
Image sticking
View angle
tis
Horizontal
Vertical
CR 10
Point-5
CMR
= 0
Crosstalk Ratio
MIN.
TYP.
Ta = 25C, VCC=5V
MAX. UNIT REMARKS
CONDITION
*1)*2)*3)
Red
Rx
Ry
0.610
0.295
0.640
0.325
0.670
0.355
Green
Gx
Gy
0.235
0.596
0.265
0.626
0.295
0.656
Blue
Bx
By
0.115
0.031
0.145
0.061
0.175
0.091
White
Wx
Wy
0.253
0.267
0.283
0.297
0.313
0.327
Color Temperature
Tc
--
9300
--
*3)
Color Gamut
CG
--
72
--
*8)
Color
Chromaticity
= 0
Point-5
[Note]
These items are measured usingBM-5A (TOPCON) [ under the dark room condition (no ambient
light). ]
Measurement Condition
After lighting on the panel 30 mins, you can proceed the Measurement testing.
The definiton of Typ ualue is under status of lamp current = 5 mArms.(AVG)
CPT Confidential
89/106
CPT
Definition of these measurement items is as follows

*1) Definition of Contrast Ratio These items are measured using BM-5A (TOPCON) under the
dark room condition (no ambient light).
CR=ON (White) Luminance/OFF (Black) Luminance
*2) Definition of Luminance and Luminance uniformity and Contrast and Contrast Uniformity and the
Deviation of Color Coordinate
Luminance and ContrastTo measure at the center position 5 on the screen (NO.5)see
Fig.8-1 below.
Luminance uniformityLw (MAX) and Lw(MIN) are the maximum and minimum luminance
value measure at the position 1~5 on the screen (NO.1~5)see Fig.81 and below show equation
Lw[ (Lw(MIN)) / Lw(MAX) ] 100%
Contrast UniformityCR(MAX) and CR(MIN) are the maximum and minimum contrast value
measure at the position 1~5 on the screen (NO.1~5)see Fig.8-1 and
below show equation.
CR[ CR(MIN)] / CR(MAX) ] 100%
The Deviation of Color CoordinateTo measure at the position 1~9 on the screen (NO.1~9)
see Fig.8-1 below.
(1, 1)
128
384
640
1138
683
228
1
4
(1366, 768)
Figure 8-1. Measurement positions
CPT Confidential
90/106
CPT
*3) Definition of Viewing Angle ( )
Figure 8-2. Definition of Viewing Angle
*4) Definition of Response Time ( White Black )

W h i t e (2 5 5 t h )
90%
90%
L u m i n a n ce
10%
10%
tr
B l a c k (0 )
tf
Figure 8-3. Definition of Response Time ( White Black )

*5) Definition of Response Time ( Gray to Gray ,9 9 levels )
(0~255 th )
90%
90%
Lum inance
(G ray S cale Level)
trg
10%
10%
(0~255 th )
tfg
Figure 8-4. Definition of Response Time (Gray to Gray )
CPT Confidential
91/106
CPT

The driving signal time means the signal of gray level 0316395127159191223
255.
Gray to gray average means the average switching time of gray level 0316395127
159191223255 to each other.
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminancethe measurement should be
executed
after lighting Backlight for 1 hour in a windless room.
*6) Image sticking test method:
Continuously display the test pattern shown in the figure below for specified time. To change the
module frame to gray pattern ( gray 127 pattern ) , and its displaying grade still under
specfication.
W h it e B lock
(2 5 6 G L )
3 0 3 0 -P ix e l
B la ck B a ck g r o u n d
(0 G L )
3 0 -P ix e l
3 0 -P ix e l
Figure 8-4. the pattern of Image sticking test
CPT Confidential
92/106
CPT
*7) Definition of Cross talk Ratio

CMR = MAX ( ( | ( LB1-LA ) / LC | ) 100 ( | (LB2 LA ) / LC | ) 100 )
LA Pattern A(Half-Tone pattern) Measure point Luminance
LB1LB2 Pattern B1Pattern B2 Measure point Luminance
LC Pattern C(white pattern) Measure point Luminance
(341,192)
PatternB1
Gray127
(683,96)
(1195,384)
Black
(1024,576)
PatternA
PatternC
(683,672)
Gray127
white
(0,0) PatternB2
Gray127
measurement point
white
(1366,768)
Figure 8-4. Cross talk
*8) Definition of Color Gamut:

To measure RGB three sub-pixels color gamut coordinate at CIE coordinate chart from the center
of module , to form a triangle area = ARGB.
RGB three sub-pixels of NTSC at CIE coordinate chart to form a triangle area = NRGB.
CG =
CPT Confidential
93/106
ARGB
N RGB
100
CLAA320WA01-TENT
CPT
9.RELIABILITY TEST CONDITIONS

(1) Temperature and Humidity
TEST ITEMS
CONDITIONS
High Temperature Operation
50240hrs
High Temperature Storage
60240hrs
High Temperature
High Humidity Operation
Low Temperature Operation
5090% RH240 hrs

(No condensation)
0240 hrs
Low Temperature Storage
-20240 hrs
Thermal Shock
Between -20(1hr) and 60(1hr)

100 Cycles
(2) Shock & Vibration

ITEMS
CONDITIONS
Shock level980m/s2(100G)
Shock
(Non-Operation)
Waveformhalf sinusoidal wave, 2ms

Number of shocks one shock input in each direction of three
mutually perpendicular axes for a total of six shock inputs.
Vibration level9.8m/s2(1.5G) zero to peak
Waveformsinusoidal
Vibration
(Non-Operation)
Frequency range10 to 300 Hz

Frequency sweep rate0.5 octave/min
Durationone sweep from 10 to 300Hz in each of three mutually
perpendicular axis(each xyz axis10 mintotal 30 mins)
(3) Judgment standard

The judgment of the above test should be made as follow:
Pass: Normal display image with no obvious non-uniformity and no line defect.
Partial transformation of the module parts shall be ignored.
Fail: No display , obvious non-uniformity, or line defects.
CPT Confidential
94/106
CPT
10.PACKAGING
10.1 PACKING SPECIFICATIONS
(1) 3 LCD TV modules/1 Box
(2) Box dimensions975(L) x 375(W) x 562(H)
(3) Weightapproximately 31.6kg (3 modules per box)
10.2 PACKING METHOD
Fiqurs 1 and 2 are the packing method
EPE PAD BOTTOM
32MODULE
(3PCS)
EPE FOAM
CARTON
LABEL
CARTON
Fiqure 1 packing method
CPT Confidential
95/106
CPT
(1) Corner protector L1125 x 50mm x 50mm

(2) PalletL1000 x W1150 x H130mm
(3) Bottom Cap1000 x W1150 x H130mm
(4) Pallet Stack1000 xW1150 x H1250mm
(5) Gross201kg
Carton label
Fiqure2 packing method
:6
pallet:10kg
Fiqure2 packing method
CPT Confidential
96/106
CPT
11. DEFINITION OF LABELS

11.1 CPT Module Label
The barcode nameplate is pasted on each module as illustration, and its definitions are as
following explanation.
(a) LABEL
CHUNGHWA
CLAA320WA01
Panel ID:xxxxxxxx xxx
Product date:xxxxxxxxx xxx
Model Name Barecode

- Model NameCLAA320WA01
- Panel IDXXXXXXXX XXX
CPT Internal Use.
- Product dateX XX XXXX X XXX
Customer NO.
Product Line.
Serial NO.
Week.
Year.
(b) MODULE LABEL :
(c) B/L MAKER LABEL :
CPT Confidential
97/106
CPT
(d) Disposal label
11.2. Handling precaution

(1) Dont disassemble and reassemble the module by self.
(2) Acid, alkali, alcohol or touched directly by hand will damage the display.
(3) Static electricity will damage the module. Please configure grounding device.
(4) The strong vibration, shock, twist or bend will cause material damage, even module broken.
(5) It is easy to cause image sticking while displaying the same pattern for very long time.
(6) The response time, brightness and performance will vary from different temperature.
(7) The inverter will cause high temperature and high voltage, be careful please.
CPT Confidential
98/106
CPT
12. HANDLING PRECAUTIONS FOR TFT-LCD MODULE

Please pay attention to the followings in handling- TFT-LCD products
12.1 ASSEMBLY PRECAUTION
(1) Please use the mounting hole on the module side in installing and do not beading or wrenching
LCD in assembling. And please do not drop, bend or twist LCD module in handling.
(2) Please design display housing in accordance with the following guidelines.
Housing case must be destined carefully so as not to put stresses on LCD all sides and not to
wrench module. The stresses may cause non-uniformity even if there is no non-uniformity
statically.
Keep sufficient clearance between LCD module back surface and housing when the LCD
module is mounted. Approximately 1.0 mm of the clearance in the design is recommended
taking into account the tolerance of LCD module thickness and mounting structure height
on the housing.
When some parts, such as, FPC cable and ferrite plate, are installed underneath the LCD
module, still sufficient clearance is required, such as 0.5mm. This clearance is, especially, to
be reconsidered when the additional parts are implemented for EMI countermeasure.
Design the inverter location and connector position carefully so as not to give stress to lamp
cable, or not to interface the LCD module by the lamp cable.
Keep sufficient clearance between LCD module and the others parts, such as inverter and
speaker so as not to interface the LCD module. Approximately 1.0mm of the clearance in
the design is recommended.
(3) Please do not push or scratch LCD panel surface with any-thing hard. And do not soil LCD
panel surface by touching with bare hands. (Polarizer film, surface of LCD panel is easy to be
flawed.)
(4) Please do not press any parts on the rear side such as source TCP, gate TCP, control circuit
board and FPCs during handling LCD module. If pressing rear part is unavoidable, handle
the LCD module with care not to damage them.
(5) Please wipe out LCD panel surface with absorbent cotton or soft clothe in case of it being soiled.
(6) Please wipe out drops of adhesives like saliva and water on LCD panel surface immediately.
They might damage to cause panel surface variation and color change.
(7) Please do not take a LCD module to pieces and reconstruct it. Resolving and reconstructing
modules may cause them not to work well.
(8) Please do not touch metal frames with bare hands and soiled gloves. A color change of the metal
CPT Confidential
99/106
CLAA320WA01-TENTATIVE-v
CPT

frames can happen during a long preservation of soiled LCD modules.
(9) Please pay attention to handling lead wire of backlight so that it is not tugged in connecting with
inverter.
12.2 OPERATING PRECAUTIONS

(1) Please be sure to turn off the power supply before connecting and disconnecting signal input
cable.
(2) Please do not change variable resistance settings in LCD module. They are adjusted to the most
suitable value. If they are changed, it might happen LCD does not satisfy the characteristics
specification.
(3) Please consider that LCD backlight takes longer time to become stable of radiation characteristics
in low temperature than in room temperature.
(4) A condensation might happen on the surface and inside of LCD module in case of sudden change
of ambient temperature.
(5) Please pay attention to displaying the same pattern for very long time. Image might stick on LCD.
If then, time going on can make LCD work well.
(6) Please obey the same caution descriptions as ones that need to pay attention to ordinary electronic
parts.
12.3 PRECAUTIONS WITH ELECTROSTATICS

(1) This LCD module use CMOS-IC on circuit board and TFT-LCD panel, and so it is easy to be
affected by electrostatics. Please be careful with electrostatics by the way of your body
connecting to the ground and so on.
(2) Please remove protection film very slowly on the surface of LCD module to prevent from
electrostatics occurrence.
12.4 STORAGE PRECAUTIONS

(1) When you store LCDs for a long time, it is recommended to keep the temperature between 0
~40 without the exposure of sunlight and to keep the humidity less than 90%RH.
(2) Please do not leave the LCDs in the environment of high humidity and high temperature such as
60 90%RH.
CPT Confidential
100/106
CPT
(3) Please do not leave the LCDs in the environment of low temperature; below -20.
12.5 SAFETY PRECAUTIONS

(1) When you waste LCDs, it is recommended to crush damaged or unnecessary LCDs into pieces
and wash them off with solvents such as acetone and ethanol, which should later be burned.
(2) If any liquid leaks out of a damaged-glass cell and comes in contact with the hands, wash off
throughly with soap and water.
12.6 OTHERS
(1) A strong incident light into LCD panel might cause display characteristics' changing inferior
because of polarizer film, color filter, and other materials becoming inferior. Please do not
expose LCD module direct sunlight Land strong UV rays.
(2) Please pay attention to a panel side of LCD module not to contact with other materials in
preserving it alone.
(3) For the packaging box, please pay attention to the followings:
Packaging box and inner case for LCD are designed to protect the LCDs from the damage or
scratching during transportation. Please do not open except picking LCDs up from the box.
Please do not pile them up more than 3 boxes. (They are not designed so.) And please do not
turn over.
Please handle packaging box with care not to give them sudden shock and vibrations. And
also please do not throw them up.
Packing box and inner case for LCDs are made of cardboard. So please pay attention not to
get them wet. (Such like keeping them in high humidity or wet place can occur getting them
wet.)
CPT Confidential
101/106
Spare Part List for LCT3201TD

Item
Part Number
Part Description
Usage /
unit
1
Unit
piece
E6203-32TD01
DISPLAY LCD 32"
771EL32AD02-01
MAIN PCBA
set
E7802-005006-1
DVD BOARD
piece
771-L27AD02-01
TERMINAL PCBA
set
E7802-005008
POWER PCBA
set
771-L27AD01-01
KEY PCB ASSY
set
771-L32AD01-03
KEY PCB ASSY MICO DVD
set
771-L32AD01-01
REMOTE RECEIVE PCBA
set
771LL27AD02-01
TUNER & AUDIO PCBA
set
10
E4101-027001
POWER SWITCH
piece
11
E4801-124001
SPEAKER
piece
12
E4802-014001
TWEETER
piece
13
E3219-002003
POWER SOCKET
piece
14
E3471-000048
KEY WIRE FOR DVD
piece
15
E3471-000045
WIRE WS SHIELD WIRE FOR 32LCD TV+COMBO

DVD SILGNAL WIRE-6
piece
16
E3421-925032
WIRE ASSY PH2.0-4Y/4Y
L=450MM AMP24V
piece
17
E3461-064022
WIRE WF FLAT WIRE P2.0 9P/11P FOR 32LCD

TV+COMBO DVD POWER WIRE
piece
18
E3461-064019
TV+COMBO FOR DVD POWER WIRE
piece
19
E3421-925038
WIRE ASSY TJC3-2Y L=850MM SPK-L
piece
20
E3421-925053
WIRE ASSY FOR TV&DVD AUDIO L/R/MUTE
piece
21
E3421-925054
WIRE ASSY FOR TV&DVD TUNER
piece
22
E3471-000044
WIRE FOR COMBO MICO KEY 13P/8P+5P
piece
23
E3421-925061
POWER SOCKET CABLE
piece
24
E3461-064018
WIRE WF FLAF WIRE FOR 32LCD TV+COMBO

DVD STANDBY POWER WIRE
piece
25
E3461-064021
WIRE FOR COMBO DVD BOARD +SV POWER
piece
26
E3461-064028
WIRE INVERTER 14P/2.0+8P/2.5+12P/2.0 La=780

L6=640 CPT
piece
27
E3421-924009
WIRE ASSY 2P L120
piece
28
E3471-002002
WIRE WS SHIELD WIRE FOR 32LCD

TV+COMBO DVD SIGNAL WIRE
piece
29
E3471-001002
WIRE WS SHIELD P1.0 0P L=220 FOR CPT
piece
30
E3421-229007
WIRE 3P
piece
31
E3404-157001
AC CORD
Piece
32
200-L32AD02-STD01
AV
CABINET FRONT SIL/BLK
Piece
33
370-42D101-01
RUBBER FOOT
piece
34
E7301-011002
BATTERY AA
Piece
103/106
Spare Part List for LCT3201TD

Item
Part Number
Part Description
Usage /
unit
1
Unit
piece
35
790-R00105-01
REMOTE CONTROL
36
202-L32AD01-01AV
CABINET BACK BLACK
piece
37
236-L32AD01-01RV
DVD COVER
piece
38
258-L32AD01-01RV
DVD KEY PANEL GREY
piece
39
231-L32AB21-01RV
BASE COVER SILVER
set
40
277-L32AD11-03S
FUNCTION KEY
piece
41
481-L32AB04-01S
SHIELD BOX (VSC)
piece
42
481-L32AD01-01S
SHIELD BOX FOR POWER
piece
43
483-L32AB12-01S
SHIELD COVER (VSC)
piece
44
436-L32AB04-01S
TERMINAL SHEET
piece
45
481-L32AD03-01S
SHIELD BOX DVD FOR AUO
piece
46
429-L32AD01-01S
POWER JACK BRACKET
piece
47
263-R00101-01L
REMOTE LENS
piece
48
269-42SD01-01L
REMOTE RECEIVE LENS
piece
49
277-L32AD02-01S
DVD FUNCTION KEY
piece
50
206-L32AD01-01RV
SPEAKER CABINET BACK GREY
piece
51
510-L32AD01-MTU02
K
GIFT BOX AKAI
piece
52
300-L32AD04-02C
POLFOAM TOP
piece
53
300-L32AD05-02C
POLFOAM BOTTOM
piece
54
310-111404-07V
POLYBAG
11"X14"X0.04
piece
55
310-041204-01V
POLYBAG
4"X12"X0.04
piece
56
310-423850-07V
BAG LAMIFILM 42"X38"X0.5MM
piece
57
580-L32ADHS-TU02L
INSTRUCTION MANUAL
piece
58
388-42D103-01H
CAUTION LABLE
piece
59
388-42SB04-01H
POWER PLATE
piece
60
387-L32AD01-MTU02
H
MODEL PLATE
piece
61
384-L32AD01-MTU01
H
SHEET FOR TERMINAL
piece
62
590-L32AD01-01
WARRANTY CARD
piece
63
593-L32AD01-02
INSERTION CARD
piece
64
579-L32AD02-01
UPC LABEL OF G/B
piece
65
568-P46T02-02
WARNING LABEL
piece
66
579-L32AD04-01
LASER WARNING LABEL
piece
67
579-42D103-02
ON/OFF LB ENG
piece
68
579-42D102-09
SERIAL NO/BAR CODE LABEL
piece
69
579-L32AD03-02
CLASS I LASER PRODUCT LOGO
piece
70
579-42D105-01
PROTECTIVE EARTH LABE
piece
GREY
104/106
If you forget your V-Chip Password

- Omnipotence V-Chip Password: 8205.
- Press MENU button.
- Press LEFT RIGHT buttons to highlight "MISC" Menu.
- Press Up, Down buttons to highlight "Parentald".
- Press ENTER button to pop up "Input your Password Please".
- Use the Number buttons (0~9) to enter an omnipotence Password.
- Press ENTER button to confirm and your can select "CHANGE PASSWORD".
- Suggest: Change to your familiar Password again.
Software upgrade
- Connect the RS-232C input jack to an external control device (such as a computer) and software upgrade.
Type of connector; D-Sub 9-pin male

No.
1
2
3
4
5
6
7
8
9
Pin name
No connection
RXD (Receive data)
TXD (Transmit data)
DTR (DTE side ready)
GND
DSR (DCE side ready)
RTS (Ready to send)
CTS (Clear to send)
No Connection
9
6
RS-232C configurations
3-wire configuration
(Not standard)
7-wire configuration
(Standard RS-232C cable)
RXD
TXD
GND
DTR
DSR
RTS
CTS
PC
PDP
2
3
5
4
6
7
8
2
3
5
6
4
8
7
D-Sub 9
D-Sub 9
TXD
RXD
GND
DSR
DTR
CTS
RTS
RXD
TXD
GND
DTR
DSR
RTS
CTS
105/106
7475
PC
PDP
2
3
5
4
6
7
8
2
3
5
4
6
7
8
D-Sub 9
D-Sub 9
TXD
RXD
GND
DTR
DSR
RTS
CTS
Software upgrade Process

- Power Switch OFF.
- Connect the serial port of the control device to the RS-232 jack on the LCD-TV back panel.
RS-232C connection cables are not supplied with the LCD-TV.
- Power Switch ON. The power indicator on the front of the panel should now display red, means
that the LCD-TV is in standby mode.
- Copy the software (MTKTOOL) to the computer.
- Open the software (MTKTOOL.EXE)
- Select MTK 8205 and Point "browse" on the interface of the MTKTOOL.exe.
- Select the file which will be update.
- Point "update" on the interface of the MTKTOOL.exe.
- Waiting for the upgrader programing, when it is finished, the bar will display 100%.
- After the upgrader is finished, shut down the power switch, take out the RS-232C connection
after the power indicator is extinguished.
Note: After upgrading, the first time of power on will be some long.

Akai LCD TV Lct3201td - Service Masnual

Загружено:

Сведения о документе

Оригинальное название

Авторское право

Доступные форматы

Поделиться этим документом

Поделиться или встроить документ

Параметры публикации

Этот документ был вам полезен?

Это неприемлемый материал?

Авторское право:

Доступные форматы

Akai LCD TV Lct3201td - Service Masnual

Загружено:

Авторское право:

Доступные форматы

SERVICE MANUAL

The excla mati on po i nt wi thi n a n e q ui l ate ra l

CAUTION: TO REDUCE THE RISK OF ELECTRIC

PRECAUTIONS DURING SERVICING

1. In a ddition to safe ty, othe r parts and assemblies are

Before servicing this TV receiver, read the X-RAY

X-RAY RADIATION PRECAUTION

5. Make sure that w ires do no t contact heat generating

MAKE YOUR CONTRIBUTION TO PROTECT THE

PRODUCT SAFETY NOTICE

4. Completely discharge the high pote ntial voltage of the

Many e lectrical an d mechanica l parts in this TV

Goo d ea rth grou nd

Pl ace this pro be

AC Leak age Curr ent Check

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

1.4 Output Terminals

6W2 Max.(8 ohm)

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

MTS with SAP

1.6 Support the Signal Mode

1.7 HDTV Mode (YPbPr)

1.8 Remote Control

Menu: Press to enter into the on-screen

(Continued on next page)

DVD Info: Press to display DVD

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

AC 100-240, 50/ 60Hz

799(W) 569.7(H) 107(D)mm (w/o Stand)

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

Attachment 1Electrical & Optical Specification

For 30dB S/N

For 30dB S/N

TV screen refreshes 40 times

Minimum NICAM threshold

Without crackline noise

Stereo Channel Separation

AGC static characteristic

Accept. Picture/Sound repr.

Adjacent sound carrier

Below adjacent sound carrier

Adjacent picture carrier

Up adjacent picture carrier

AFT pull-in range

Chroma sync pull-in range

Color killer function

Cross hatch signal

H sync pull-in range

V sync pull-in range

Audio frequency response

3dB ref. to 1KHz

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

1KHz 10% THD

Signal to buzz ratio

Minimum volume hum

Maximum woofer output power

Woofer audio frequency

3dB ref. to 15Hz AV

Tone low frequency

100Hz ref. to 1KHz

Tone high frequency

10KHz ref. to 1KHz

Max Audio Output Power