ACPL-790B, ACPL-790A, ACPL-7900

Precision Isolation Amplifiers

Data Sheet

Description

Features

The ACPL-790B/790A/7900 isolation amplifiers were designed

for current and voltage sensing in electronic power converters
in applications including motor drives and renewable energy
systems. In a typical motor drive implementation, current flows
through an external resistor and the resulting analog voltage
drop is sensed by the isolation amplifier. A differential output
voltage that is proportional to the current is created on the
other side of the optical isolation barrier.

For general applications, the ACPL-790A (1% gain tolerance)

and the ACPL-7900 (3% gain tolerance) are recommended.
For high precision applications, the ACPL-790B (0.5% gain
tolerance) can be used. The product operates from a single 5 V
supply and provides excellent linearity and dynamic
performance of 62 dB SNR. With 200 kHz bandwidth, 1.6 s fast
response time, the product captures transients in short circuit
and overload conditions. The high common-mode transient
immunity (15 kV/s) of the ACPL-790B/790A/7900 provides the
precision and stability needed to accurately monitor motor
current in high noise motor control environments, providing
for smoother control (less torque ripple) in various types of
motor control applications.

Combined with superior optical coupling technology, the

ACPL-790B/790A/7900 implements sigma-delta (-)
analog-to-digital converter, chopper stabilized amplifiers, and
a fully differential circuit topology to provide unequaled
isolation-mode noise rejection, low offset, high gain accuracy
and stability. This performance is delivered in a compact,
auto-insertable DIP-8 package that meets worldwide
regulatory safety standards.
CAUTION

0.5% High Gain Accuracy (ACPL-790B)

-50 ppm/C Low Gain Drift
0.4 mV Input Offset Voltage
0.05% Excellent Linearity
62 dB SNR
200 kHz Wide Bandwidth
3 V to 5.5 V Wide Supply Range for Output Side
-40 C to +105 C Operating Temperature Range
Advanced Sigma-Delta (-) A/D Converter Technology
Fully Differential Isolation Amplifier
15 kV/s Common-Mode Transient Immunity
Compact, Auto-Insertable DIP-8 Package
Safety and Regulatory Approvals:
IEC/EN/DIN EN 60747-5-5: 891 Vpeak working
insulation voltage
UL 1577: 5000 Vrms/1 min double protection rating
CSA: Component Acceptance Notice #5

Applications

It is advised that normal static precautions be

taken in handling and assembly of this
component to prevent damage and/or
degradation which may be induced by ESD.

Avago Technologies
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Current/Voltage Sensing in AC and Servo Motor Drives

Solar Inverters, Wind Turbine Inverters
Industrial Process Control
Data Acquisition Systems
Switching Power Supply Signal Isolation
General Purpose Analog Signal Isolation
Traditional Current Transducer Replacements

ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Functional Diagram

Functional Diagram
VDD1 1

IDD1

IDD2
8 VDD2

VIN+ 2

7 VOUT+

VIN- 3

6 VOUT-

GND1 4

NOTE

5 GND2

SHIELD

A 0.1 F bypass capacitor must be connected between pins 1 and 4 and between pins 5 and 8.

Pin Description
Table 1 Pin Description
Pin No.

Symbol

Description

VDD1

Supply voltage for input side (4.5 V to 5.5 V), relative to GND1

VIN+

Positive input ( 200 mV recommended)

VIN

Negative input (normally connected to GND1)

GND1

Input side ground

GND2

Output side ground

VOUT

Negative output

VOUT+

Positive output

VDD2

Supply voltage for output side (3 V to 5.5 V), relative to GND2

Ordering Information
ACPL-790B/790A/7900 is UL recognized with 5000 Vrms/1 minute rating per UL 1577.
Table 2 Ordering Information
Part Number
ACPL-790B
ACPL-790A
ACPL-7900

Option (RoHS
Compliant)
-000E
-300E
-500E

Surface
Mount

Package
300 mil
DIP-8

Gull Wing

IEC/EN/DIN EN
60747-5-5

Tape & Reel

Quantity

50 per tube

50 per tube

1000 per reel

To order, choose a part number from the part number column and combine with the desired option from the option column to
form an order entry.
Example:
ACPL-790B-500E to order product of Gull Wing Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN 60747-5-5
Safety Approval and RoHS compliance.
Optional data sheets are available. Contact your Avago sales representative or authorized distributor for information.

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ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Package Outline Drawings

Package Outline Drawings

Figure 1 8-Pin IP Package
9.80 0.25
(0.386 0.010)

7.62 0.25
(0.300 0.010)

Device Part Number

8

Avago
Lead Free

Pin 1 Dot

3.56 0.13
(0.140 0.005)

A NNNN Z
YYWW
EEE P

Date Code
1.19 (0.047) MAX.

6.35 0.25
(0.250 0.010)

Test Rating Code

UL Logo

Special Program
Code

Lot ID
1.78 (0.070) MAX.

5 TYP.

+ 0.076
0.254 - 0.051
+ 0.003)
(0.010 - 0.002)

4.70 (0.185) MAX.

0.51 (0.020) MIN.

2.92 (0.115) MIN.

1.080 0.320
(0.043 0.013)

NOTE

0.65 (0.025) MAX.

2.54 0.25
(0.100 0.010)

DIMENSIONS IN MILLIMETERS AND (INCHES).

OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.

Initial or continued variation in the color of the white mold compound is normal and does not affect device
performance or reliability.

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ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Recommended Pb-Free IR Profile

Figure 2 Gull Wing Surface Mount Option 300

LAND PATTERN RECOMMENDATION
1.016 (0.040)
9.80 0.25
(0.386 0.010)
8

10.9 (0.430)
6.350 0.25
(0.025 0.010)

1.27 (0.050)
1.780
(0.070)
MAX.

1.19
(0.047)
MAX.

9.65 0.25
(0.380 0.010)
7.62 0.25
(0.300 0.010)
0.20 (0.008)
0.33 (0.013)

3.56 0.13
(0.140 0.005)
1.080 0.320
(0.043 0.013)

2.54
(0.100)
BSC

2.0 (0.080)

0.635 0.25
(0.025 0.010)
0.635 0.130
(0.025 0.005)

12 NOM.

Dimensions in millimeters (inches).

NOTE

Floating lead protrusion is 0.5 mm (20 mils) max.

Tolerances (unless otherwise specified):

xx.xx = 0.01

Lead coplanarity

xx.xxx = 0.005

Maximum: 0.102 (0.004)

Recommended Pb-Free IR Profile

Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used.

Regulatory Information
The ACPL-790B/790A/7900 is approved by the following organizations:

IEC/EN/DIN EN 60747-5-5
Approved with Maximum Working Insulation Voltage, VIORM = 891 Vpeak.

UL
Approval under UL 1577, component recognition program up to VISO = 5000 Vrms/1 min. File E55361.

CSA
Approval under CSA Component Acceptance Notice #5, File CA 88324.

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ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Insulation and Safety Related Specifications

Insulation and Safety Related Specifications

Table 3 Insulation and Safety Related Specifications
Parameter

Symbol

Minimum External Air Gap (External

Clearance)

Value

Units

Conditions

L(101)

7.4

mm

Measured from input terminals to output terminals, shortest

distance through air

Minimum External Tracking (External L(102)

Creepage)

8.0

mm

Measured from input terminals to output terminals, shortest

distance path along body

Minimum Internal Plastic Gap

(Internal Clearance)

0.5

mm

Through insulation distance, conductor to conductor, usually

the direct distance between the photoemitter and
photodetector inside the optocoupler cavity

>175

DIN IEC 112/VDE 0303 Part 1

Tracking Resistance (Comparative

Tracking Index)

CTI

Isolation Group

IIIa

Material Group (DIN VDE 0110, 1/89, Table 1)

IEC/EN/DIN EN 60747-5-5 Insulation Characteristics

Insulation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits
within the application.
Table 4 IEC/EN/DIN EN 60747-5-5 Insulation Characteristics
Description

Symbol

Value

Installation classification per DIN VDE 0110/1.89, Table 1

for rated mains voltage. 150 Vrms
for rated mains voltage. 300 Vrms
for rated mains voltage. 450 V rms
for rated mains voltage. 600 Vrms
for rated mains voltage . 1000 Vrms

I-IV
I-IV
I-III
I-III
I-II

Climatic Classification

55/105/21

Pollution Degree (DIN VDE 0110/1.89)

Units

Maximum Working Insulation Voltage

VIORM

891

Vpeak

Input to Output Test Voltage, Method b

VIORM 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial Discharge < 5 pC

VPR

1671

Vpeak

Input to Output Test Voltage, Method a

VIORM 1.6 = VPR, Type and Sample Test, tm = 10 sec, Partial Discharge < 5 pC

VPR

1426

Vpeak

Highest Allowable Overvoltage (Transient Overvoltage, tini = 60 sec)

VIOTM

8000

Vpeak

Safety-limiting values (Maximum values allowed in the event of a failure)

Case Temperature
Input Currenta
Output Powera

TS
IS,INPUT
PS,OUTPUT

175
400
600

C
mA
mW

Insulation Resistance at TS, VIO = 500 V

RS

109

a.

Safety-limiting parameters are dependent on ambient temperature. The Input Current, IS,INPUT, derates linearly above 25 C free-air temperature at a rate of
2.67 mA/C; the Output Power, PS,OUTPUT, derates linearly above 25 C free-air temperature at a rate of 4 mW/C.

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ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Absolute Maximum Rating

Absolute Maximum Rating

Table 5 Absolute Maximum Rating
Parameter

Symbol

Min.

Max.

Units

Storage Temperature

TS

-55

+125

Ambient Operating Temperature

TA

-40

+105

Supply Voltages

VDD1, VDD2

-0.5

6.0

Steady-State Input Voltagea, b

VIN+, VIN

-2

VDD1 + 0.5

Two-Second Transient Input Voltagec

VIN+, VIN

-6

VDD1 + 0.5

Output Voltages

VOUT+, VOUT

-0.5

VDD2 + 0.5

Lead Solder Temperature

260 C for 10 sec., 1.6 mm below seating plane

a.

DC voltage of up to -2 V on the inputs does not cause latch-up or damage to the device; tested at typical operating conditions.

b.

Absolute maximum DC current on the inputs = 100 mA, no latch-up or device damage occurs.

c.

Transient voltage of 2 seconds up to -6 V on the inputs does not cause latch-up or damage to the device; tested at typical operating conditions.

Recommended Operating Conditions

Table 6 Recommended Operating Conditions
Parameter

Symbol

Min.

Max.

Units

Ambient Operating Temperature

TA

-40

+105

VDD1 Supply Voltage

VDD1

4.5

5.5

VDD2 Supply Voltage

VDD2

5.5

Input Voltage Rangea

VIN+, VIN

-200

+200

mV

a.

200 mV is the nominal input range. Full scale input range (FSR) is 300 mV. Functional input range is 2 V.

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ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Electrical Specifications

Electrical Specifications
Unless otherwise noted, TA = -40 C to +105 C, VDD1 = 4.5 V to 5.5 V, VDD2 = 3 V to 5.5 V, VIN+ = -200 mV to +200 mV, and VIN- = 0 V
(single-ended connection).
Table 7 Electrical Specifications
Parameter

Symbol

Typ.a

Min.

Max.

Unit

Test Conditions

Figure

DC CHARACTERISTICS
0.4

mV

TA = 25 C

3, 4

-0.8

V/C

TA = -40 C to +105 C;
absolute value

8.16

8.2

8.24

V/V

TA = 25 C

6, 7

G1

8.12

8.2

8.28

V/V

TA = 25 C

6, 7

G3

7.95

8.2

8.44

V/V

TA = 25 C

6, 7

V/V/C

TA = -40 C to +105 C

VIN+ = -200 mV to +200 mV, 9, 10

TA = 25 C

%/C

TA = -40 C to +105 C

VIN+ = -100 mV to +100 mV, 9, 10, 11

TA = 25 C

300

mV

VIN = VIN+ VIN-

12

-0.1

VIN+ = 0, VIN- = 0 V

13

14

Input Offset Voltage

VOS

Magnitude of Input Offset

Change vs. Temperature

|dVOS/dTA|

Gain (ACPL-790B, 0.5%) b

G0

Gain (ACPL-790A, 1%)b

Gain (ACPL-7900, 3%)b

-1

Magnitude of Gain Change dG/dTA

vs. Temperaturec

-0.00041

Nonlinearity over 200 mV NL200

Input Voltageb

0.05

Magnitude of NL200
Change vs. Temperature

dNL200/dTA

0.13

0.0003
0.013

Nonlinearity over 100 mV NL100

Input Voltageb

0.06

11

INPUTS AND OUTPUTS

Full-Scale Differential
Voltage Input Ranged

FSR

Input Bias Currente

IIN+

Magnitude of IIN+ Change

vs. Temperature

dIIN+/dTA

-0.05

nA/C

Equivalent Input
Impedance

RIN

27

VIN+ or VIN-, single-ended

Output Common-Mode
Voltagef

VOCM

1.23

VOUT+ or VOUT-

Output Voltage Ranged

OVR

0 to 2.5

VOUT+ or VOUT-

Output Short-Circuit
Current

|IOSC|

11

mA

VOUT+ or VOUT-, shorted to

GND2 or VDD2

Output Resistance

ROUT

21

VOUT+ or VOUT-

Input DC Common-Mode
Rejection Ratiob

CMRRIN

76

dB

Signal-to-Noise Ratiog

SNR

62

dB

VIN+ = 300 mVpp

10 kHz sine wave

15, 16

Signal-to-(Noise +
Distortion) Ratioh

SNDR

59

dB

VIN+ = 300 mVpp

10 kHz sine wave

15, 16

Small-Signal Bandwidth
(-3 dB)

f-3 dB

200

kHz

-1

12

AC CHARACTERISTICS

140

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ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Package Characteristics

Table 7 Electrical Specifications (Continued)

Parameter

Symbol

Typ.a

Min.

Max.

Unit

Test Conditions

Figure

Input to Output Propagation Delay

10%-=10%

tPD10

1.6

2.3

200 mV/s step input

19

50%-50%

tPD50

2.6

200 mV/s step input

19

90%-90%

tPD90

2.6

3.3

200 mV/s step input

19

Output Rise/Fall Time

(10%-90%)

tR/F

1.7

Step input

19

Common Mode Transient

Immunityb

CMTI

15

kV/s

VCM = 1 kV, TA = 25 C

Power Supply Rejection i

PSR

-78

dB

1 Vpp 1 kHz sine wave

ripple on VDD1, differential
output

IDD1

11

18.5

mA

VIN+ = 400 mV;

20

12

mA

5 V supply

20

6.8

11

mA

3.3 V supply

20

10

POWER SUPPLIES
Input Side Supply Currentj

Output Side Supply Current IDD2

a.

All Typical values are under Typical Operating Conditions at TA = 25 C, VDD1 = 5 V, VDD2 = 3.3 V.

b.

See Definitions section.

c.

Gain temperature drift can be normalized and expressed as Temperature Coefficient of Gain (TCG) of -50 ppm/C.

d.

When FSR is exceeded, outputs saturate.

e.

Because of the switched-capacitor nature of the input sigma-delta converter, time-averaged values are shown.

f.

Under Typical Operating Conditions, part-to-part variation 0.04 V.

g.

Under Typical Operating Conditions, part-to-part variation 1 dB.

h.

Under Typical Operating Conditions, part-to-part variation 1 dB.

i.

Ripple voltage applied to VDD1 with a 0.1 F bypass capacitor connected; differential amplitude of the ripple outputs measured. See Definitions section.

j.

The input supply current decreases as the differential input voltage (VIN+ . VIN-) decreases.

Package Characteristics
Table 8 Package Characteristics
Parameter

Symbol

Input-Output Momentary Withstand VISO

Voltagea, b

Min.

Typ.

Max.

5000

Unit

Test Condition

Vrms

RH < 50%, t = 1 min., TA = 25 C

Resistance (Input-Output)c

RI-O

>1012

VI-O = 500 VDC

Capacitance (Input-Output) c

CI-O

0.5

pF

f = 1 MHz

a.

In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 6000 Vrms for 1 second (leakage detection current limit,
II-O 5 A). This test is performed before the 100% production test for partial discharge (method b) shown in IEC/EN/DIN EN 60747-5-5 Insulation Characteristic
Table.

b.

The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating.
For the continuous voltage rating, refer to the IEC/EN/DIN EN 60747-5-5 insulation characteristics table and your equipment level safety specification.

c.

This is a two-terminal measurement: pins 14 are shorted together and pins 58 are shorted together.

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ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Typical Performance Plots

Typical Performance Plots

Unless otherwise noted, TA = 25 C, VDD1 = 5 V, VDD2 = 3.3 V.
Figure 4 Input Offset vs. Supply VDD2

Figure 3 Input Offset vs. Supply VDD1

0.4

0.4

0.3

0.3
VDD2 =3.3V
VDD2 =5.0V

0.1
0
-0.1

0
-0.1
-0.2

-0.3

-0.3
-0.4
4.75

5
5.25
VDD1 - SUPPLY VOLTAGE - V

5.5

Figure 5 Input Offset vs. Temperature

3.5

4
4.5
VDD1 - SUPPLY VOLTAGE - V

5.5

Figure 6 Gain vs. Supply VDD1

0.7

8.24

0.6

8.23

0.5

8.22
GAIN - V/V

OFFSET - mV

0.1

-0.2

-0.4
4.5

0.4
0.3
0.2

8.21
VDD2 =3.3V

8.2
8.19

VDD2 =5.0V

8.18

0.1

8.17

0
-40

-20

20
40
60
TA - TEMPERATURE - C

80

100

8.16
4.5

120

Figure 7 Gain vs. Supply VDD2

8.24

8.24

8.23

8.23

8.22

8.22

8.21

8.21

8.2

VDD1 =5V

8.19

8.18

8.18

8.17

8.17

8.16
3.5

5
5.25
VDD2 - SUPPLY VOLTAGE - V

5.5

8.2

8.19

4.75

Figure 8 Gain vs. Temperature

GAIN - V/V

GAIN - V/V

VDD1 =5V

0.2
OFFSET - mV

OFFSET - mV

0.2

4
4.5
VDD2 - SUPPLY VOLTAGE - V

5.5

8.16
-40

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-20

20
40
60
TA - TEMPERATURE - C

80

100

120

ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Typical Performance Plots

Figure 9 Nonlinearity vs. Supply VDD1

Figure 10 Nonlinearity vs. Supply VDD2

0.06

0.06
NL200 , VDD2 =3.3V
0.05
NL200 , VDD2 =5V

NL - NONLINEARITY - %

NL - NONLINEARITY - %

0.05
0.04
0.03
0.02
NL100 , VDD2=3.3V
0.01

0.04
0.03
0.02
0.01
NL100

NL100 , VDD2 =5V

0

0
4.5

4.75

5
5.25
VDD1 - SUPPLY VOLTAGE - V

5.5

0.14

3.0

0.12

2.5

0.10
0.08

NL200

0.06
0.04
0.02
0.00
-40

3.5

4
4.5
VDD2 - SUPPLY VOLTAGE - V

5.5

Figure 12 Output Voltage vs. Input Voltage

VOUT - OUTPUT VOLTAGE - V

NL - LINEARITY - %

Figure 11 Nonlinearity vs. Temperature

VOUT

2.0

VOUT+

1.5
1.0
0.5
0.0

-20

20
40
60
TA - TEMPERATURE - C

80

NL100
100 120

Figure 13 Input Current vs. Input Voltage

-0.5
-0.4

-0.3

-0.2

-0.1
0
0.1
0.2
VIN+ - INPUT VOLTAGE - V

0.3

0.4

Figure 14 Input Impedance vs. Temperature

20

29
VIN+= 0 to 300mV
RIN - INPUT IMPEDANCE - kohm

15
IIN+ - INPUT CURRENT - PA

VDD1= 5V

NL200

10
5
0
-5
-10

28

27

26

-15
-20
-0.6

25
-0.4

-0.2
0.0
0.2
VIN+ - INPUT VOLTAGE - V

0.4

0.6

-40

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-20

20
40
60
TA - TEMPERATURE - C

80

100

120

ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Typical Performance Plots

Figure 15 SNR, SNDR vs. Temperature

Figure 16 SNR, SNDR vs. Input Voltage

66

66
64
62

62

60

SNR, SNDR - dB

SNR, SNDR - dB

64

SNR
SNDR

58
56
54

-40

-20

20
40
60
TA - TEMPERATURE - C

80

100

50
100

120

5
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
100

300

Figure 18 Phase Frequency Response

1,000

10,000
100,000
FREQUENCY - Hz

1,000,000

Figure 19 Propagation Delay, Output Rise/Fall Time vs.

Temperature

180
150
120
90
60
30
0
-30
-60
-90
-120
-150
-180
100

1,000

10,000
FREQUENCY - Hz

100,000

1,000,000

Figure 20 Supply Current vs. Input Voltage

12
11

tPD90

IDD - SUPPLY CURRENT - mA

3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
-40

150
200
250
VIN+ - INPUT VOLTAGE - m Vpp

PHASE - DEGREES

NORMALIZED GAIN - dB

56

52

V IN+ = 300mVpp 10kHz sine wave

Figure 17 Gain Frequency Response

PROPAGATION DELAY - Ps

SNDR

58

54

52
50

SNR

60

tPD50
tR/F
tPD10

20
40
60
TA - TEMPERATURE - C

80

100

9
8
IDD2(VDD2 = 5V)

IDD2(VDD2 = 3.3V)

6
5

tPD10, tPD50, tPD90: 200 mV/Ps step input; tR/F: step input
-20

IDD1(VDD1 = 5V)

10

120

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-0.4

-0.3

-0.2

-0.1
0
0.1
0.2
VIN+ - INPUT VOLTAGE - V

0.3

0.4

ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Definitions

Definitions

ACPL-790B/790A/7900 will continue to function if more than

10 kV/s common mode slopes are applied, as long as the
breakdown voltage limitations are observed.

Gain
Gain is defined as the slope of the best-fit line of differential
output voltage (VOUT+ VOUT) vs. differential input voltage
(VIN+ VIN) over the nominal input range, with offset error
adjusted out.

Power Supply Rejection, PSR

PSR is the ratio of differential amplitude of the ripple outputs
over power supply ripple voltage, referred to the input,
expressed in dB.

Nonlinearity

Application Information

Nonlinearity is defined as half of the peak-to-peak output

deviation from the best-fit gain line, expressed as a percentage
of the full-scale differential output voltage.

Application Circuit

Input DC Common Mode Rejection Ratio, CMRRIN

The typical application circuit is shown in Figure 21. A floating

power supply (which in many applications could be the same
supply that is used to drive the high-side power transistor) is
regulated to 5 V using a simple three-terminal voltage
regulator (U1). The voltage from the current sensing resistor, or
shunt (RSENSE), is applied to the input of the
ACPL-790B/790A/7900 through an RC anti-aliasing filter (R5
and C3). And finally, the differential output of the isolation
amplifier is converted to a groundreferenced single-ended
output voltage with a simple differential amplifier circuit (U3
and associated components). Although the application circuit
is relatively simple, a few recommendations should be followed
to ensure optimal performance.

CMRRIN is defined as the ratio of the differential signal gain

(signal applied differentially between pins VOUT+ and VOUT) to
the input side common-mode gain (input pins tied together
and the signal applied to both inputs with respect to pin
GND1), expressed in dB.
Common Mode Transient Immunity, CMTI, also known as
Common Mode Rejection
CMTI is tested by applying an exponentially rising/falling
voltage step on pin 4 (GND1) with respect to pin 5 (GND2). The
rise time of the test waveform is set to approximately 50 ns. The
amplitude of the step is adjusted until the differential output
(VOUT+ VOUT) exhibits more than a 200 mV deviation from
the average output voltage for more than 1 s. The
Figure 21 Typical Application Circuit for Motor Phase Current Setting

POSITIVE
FLOATING
SUPPLY

C5
68 pF

HV+
GATE DRIVE
CIRCUIT

R3

***

10.0 K
U1
78L05
IN OUT
C1
0.1
PF

R5
10

MOTOR
***

VDD2 (+5 V)

+15 V

VDD1
C2
0.1
PF

R1

2.00 K
R2

C3
47 nF 3

C4
0.1 PF

U2

2.00 K
+
RSENSE

4
GND1
***

5
ACPL-790B/
ACPL-790A/
ACPL-7900

C6
68 pF
GND2

HV-

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C8
0.1 PF

GND2

U3
+ TL032A
C7
R4
0.1 PF
10.0 K
-15 V
GND2
GND2

VOUT

ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Application Information

Power Supplies and Bypassing

Figure 22 Example Printed Circuit Board Layout

As mentioned above, an inexpensive 78L05 three-terminal

regulator can be used to reduce the gate-drive power supply
voltage to 5 V. To help attenuate high frequency power supply
noise or ripple, a resistor or inductor can be used in series with
the input of the regulator to form a low-pass filter with the
regulators input bypass capacitor.
The power supply for the isolation amplifier is most often
obtained from the same supply used to power the power
transistor gate drive circuit. If a dedicated supply is required, in
many cases it is possible to add an additional winding on an
existing transformer. Otherwise, some sort of simple isolated
supply can be used, such as a line powered transformer or a
high-frequency DC-DC converter.
As shown in Figure 21, 0.1 F bypass capacitors (C2, C4) should
be located as close as possible to the pins of the isolation
amplifier. The bypass capacitors are required because of the
high-speed digital nature of the signals inside the isolation
amplifier. A 47 nF bypass capacitor (C3) is also recommended at
the input pins due to the switched-capacitor nature of the
input circuit. The input bypass capacitor also forms part of the
anti-aliasing filter, which is recommended to prevent
high-frequency noise from aliasing down to lower frequencies
and interfering with the input signal. The input filter also
performs an important reliability function it reduces transient
spikes from ESD events flowing through the current sensing
resistor.

PC Board Layout
The design of the printed circuit board (PCB) should follow
good layout practices, such as keeping bypass capacitors close
to the supply pins, keeping output signals away from input
signals, the use of ground and power planes, etc. In addition,
the layout of the PCB can also affect the isolation transient
immunity (CMTI) of the ACPL-790B/790A/7900, due primarily
to stray capacitive coupling between the input and the output
circuits. To obtain optimal CMTI performance, the layout of the
PC board should minimize any stray coupling by maintaining
the maximum possible distance between the input and output
sides of the circuit and ensuring that any ground or power
plane on the PC board does not pass directly below or extend
much wider than the body of the ACPL-790B/790A/7900.
Figure 22 shows an example PCB layout.

TO GND1 TO VDD1

TO VDD2 TO GND2
C4

C2
U2
TO RSENSE+
R5

VOUT+
VOUT

C3

TO RSENSE
Note: Drawing not to scale

ACPL-790B/790A/7900

Shunt Resistor Selection

The current sensing resistor should have low resistance (to
minimize power dissipation), low inductance (to minimize di/dt
induced voltage spikes which could adversely affect
operation), and reasonable tolerance (to maintain overall
circuit accuracy). Choosing a particular value for the resistor is
usually a compromise between minimizing power dissipation
and maximizing accuracy. Smaller sense resistance decreases
power dissipation, while larger sense resistance can improve
circuit accuracy by utilizing the full input range of the
ACPL-790B/790A/7900.
The first step in selecting a sense resistor is determining how
much current the resistor will be sensing. The graph in
Figure 23 shows the RMS current in each phase of a
three-phase induction motor as a function of average motor
output power (in horsepower, hp) and motor drive supply
voltage. The maximum value of the sense resistor is
determined by the current being measured and the maximum
recommended input voltage of the isolation amplifier. The
maximum sense resistance can be calculated by taking the
maximum recommended input voltage and dividing by the
peak current that the sense resistor should see during normal
operation. For example, if a motor will have a maximum RMS
current of 10 A and can experience up to 50% overloads during
normal operation, then the peak current is 21.1 A (= 10 1.414
1.5). Assuming a maximum input voltage of 200 mV, the
maximum value of sense resistance in this case would be about
10 m.
The maximum average power dissipation in the sense resistor
can also be easily calculated by multiplying the sense
resistance times the square of the maximum RMS current,
which is about 1 W in the previous example. If the power
dissipation in the sense resistor is too high, the resistance can
be decreased below the maximum value to decrease power
dissipation. The minimum value of the sense resistor is limited
by precision and accuracy requirements of the design. As the
resistance value is reduced, the output voltage across the
resistor is also reduced, which means that the offset and noise,
which are fixed, become a larger percentage of the signal
amplitude. The selected value of the sense resistor will fall

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ACPL-790B, ACPL-790A, ACPL-7900

Data Sheet

Application Information

somewhere between the minimum and maximum values,

depending on the particular requirements of a specific design.
Figure 23 Motor Output Horsepower vs. Motor Phase Current and
Supply Voltage

MOTOR OUTPUT POWER - HORSEPOWER

40
440 V
380 V
220 V
120 V

35
30
25
20
15
10
5
0
0

20
10
25
15
MOTOR PHASE CURRENT - A (rms)

30

35

When sensing currents large enough to cause significant

heating of the sense resistor, the temperature coefficient
(tempco) of the resistor can introduce nonlinearity due to the
signal dependent temperature rise of the resistor. The effect
increases as the resistor-to-ambient thermal resistance
increases. This effect can be minimized by reducing the
thermal resistance of the current sensing resistor or by using a
resistor with a lower tempco. Lowering the thermal resistance
can be accomplished by repositioning the current sensing
resistor on the PC board, by using larger PC board traces to
carry away more heat, or by using a heat sink.
For a two-terminal current sensing resistor, as the value of
resistance decreases, the resistance of the leads become a
significant percentage of the total resistance. This has two
primary effects on resistor accuracy. First, the effective
resistance of the sense resistor can become dependent on
factors such as how long the leads are, how they are bent, how
far they are inserted into the board, and how far solder wicks
up the leads during assembly (these issues will be discussed in
more detail shortly). Second, the leads are typically made from
a material, such as copper, which has a much higher tempco
than the material from which the resistive element itself is
made, resulting in a higher tempco overall.
Both of these effects are eliminated when a four-terminal
current sensing resistor is used. A four-terminal resistor has two
additional terminals that are Kelvin connected directly across
the resistive element itself; these two terminals are used to
monitor the voltage across the resistive element while the
other two terminals are used to carry the load current. Because
of the Kelvin connection, any voltage drops across the leads
carrying the load current should have no impact on the
measured voltage.

When laying out a PC board for the current sensing resistors, a

couple of points should be kept in mind. The Kelvin
connections to the resistor should be brought together under
the body of the resistor and then run very close to each other
to the input of the ACPL-790B/790A/7900; this minimizes the
loop area of the connection and reduces the possibility of stray
magnetic fields from interfering with the measured signal. If
the sense resistor is not located on the same PC board as the
isolation amplifier circuit, a tightly twisted pair of wires can
accomplish the same thing.
Also, multiple layers of the PC board can be used to increase
current carrying capacity. Numerous plated through vias
should surround each non-Kelvin terminal of the sense resistor
to help distribute the current between the layers of the PC
board. The PC board should use 2 or 4 oz. copper for the layers,
resulting in a current carrying capacity in excess of 20 A.
Making the current carrying traces on the PC board fairly large
can also improve the sense resistors power dissipation
capability by acting as a heat sink. Liberal use of vias where the
load current enters and exits the PC board is also
recommended.

Shunt Resistor Connections

The typical method for connecting the ACPL-790-B/790A/7900
to the current sensing resistor is shown in Figure 21. VIN+ (pin 2)
is connected to the positive terminal of the sense resistor, while
VIN (pin 3) is shorted to GND1 (pin 4), with the power-supply
return path functioning as the sense line to the negative
terminal of the current sense resistor. This allows a single pair
of wires or PC board traces to connect the isolation amplifier
circuit to the sense resistor. By referencing the input circuit to
the negative side of the sense resistor, any load current
induced noise transients on the resistor are seen as a
common-mode signal and will not interfere with the
current-sense signal. This is important because the large load
currents flowing through the motor drive, along with the
parasitic inductances inherent in the wiring of the circuit, can
generate both noise spikes and offsets that are relatively large
compared to the small voltages that are being measured across
the current sensing resistor.
If the same power supply is used both for the gate drive circuit
and for the current sensing circuit, it is very important that the
connection from GND1 of the ACPL-790B/790A/7900 to the
sense resistor be the only return path for supply current to the
gate drive power supply in order to eliminate potential ground
loop problems. The only direct connection between the
ACPL-790-B/790A/7900 circuit and the gate drive circuit should
bethe positive power supply line.

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Differential Input Connection

The differential analog inputs of the ACPL-790B/790A/7900 are
implemented with a fully-differential, switched-capacitor
circuit. In the typical application circuit (Figure 21), the isolation
amplifier is connected in a single-ended input mode. Given the
fully differential input structure, a differential input connection
method (balanced input mode as shown in Figure 24) is
recommended to achieve better performance. The input
currents created by the switching actions on both of the pins
are balanced on the filter resistors and cancelled out each
other. Any noise induced on one pin will be coupled to the
other pin by the capacitor C and creates only common mode
noise which is rejected by the device. Typical value for Ra and
Rb is 10 and 22 nF for C.
Figure 24 Simplified Differential Input Connection Diagram

5V
VDD1

Ra

VIN+

+Input
Rb

Input

ACPL-790B/
ACPL-790A/
ACPL-7900

VIN
GND1

Output Side

In addition, the op-amp should also have enough bandwidth

and slew rate so that it does not adversely affect the response
speed of the overall circuit. The postamplifier circuit includes a
pair of capacitors (C5 and C6) that form a single-pole low-pass
filter; these capacitors allow the bandwidth of the post-amp to
be adjusted independently of the gain and are useful for
reducing the output noise from the isolation amplifier.
The gain-setting resistors in the post-amp should have a
tolerance of 1% or better to ensure adequate CMRR and
adequate gain tolerance for the overall circuit. Resistor
networks can be used that have much better ratio tolerances
than can be achieved using discrete resistors. A resistor
network also reduces the total number of components for the
circuit as well as the required board space.

Voltage Sensing
The ACPL-790B/790A/7900 can also be used to isolate signals
with amplitudes larger than its recommended input range with
the use of a resistive voltage divider at its input. The only
restrictions are that the impedance of the divider be relatively
small (less than 1 k so that the input resistance (22 k and
input bias current (0.1 A) do not affect the accuracy of the
measurement. An input bypass capacitor is still required,
although the 10 series damping resistor is not (the resistance
of the voltage divider provides the same function). The
low-pass filter formed by the divider resistance and the input
bypass capacitor may limit the achievable bandwidth.

The op-amp used in the external post-amplifier circuit should

be of sufficiently high precision so that it does not contribute a
significant amount of offset or offset drift relative to the
contribution from the isolation amplifier. Generally, op-amps
with bipolar input stages exhibit better offset performance
than op-amps with JFET or MOSFET input stages.

For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago Technologies and the A logo are trademarks of Avago Technologies in the United
States and other countries. All other brand and product names may be trademarks of their
respective companies.
Data subject to change. Copyright 20102016 Avago Technologies. All Rights Reserved.
pub-005417 January 14, 2016