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SDP-S User Guide

UG-291

One Technology Way P.O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com

SDP-S Controller Board


FEATURES

how to set up the SDP-S board and begin USB communications


to the PC.

USB-to-serial engine
Peripherals exposed
SPI
TWI/I2C
GPIO
USB 2.0 PC connectivity
PC software stack and base firmware provided

GENERAL DESCRIPTION

This user guide provides instructions for installing the SDP-S


hardware (EVAL-SDP-CS1Z board) and software onto a
computer. The necessary installation files are provided with the
evaluation daughter board package. The Getting Started section
provides software and hardware installation procedures, PC
system requirements, and basic board information. The Evaluation
Board Hardware section provides information on the EVALSDP-CS1Z components. The EVAL-SDP-CS1Z schematics are
provided in the Evaluation Board Schematics section.
For more information about the SDP-S board, go to
www.analog.com/sdp.

09916-001

This user guide describes the EVAL-SDP-CS1Z system


demonstration platform-serial (SDP-S) controller board from
Analog Devices, Inc. The SDP-S controller board is part of the
Analog Devices system demonstration platform (SDP). The
SDP consists of a series of controller boards, interposer boards,
and daughter boards. SDP controller boards provide a means
of communicating with the system under evaluation from the
PC. Interposer boards route signals between two connectors.
Daughter boards are a collection of product evaluation boards
and Circuits from the Lab reference circuit boards. The SDP-S
is used as part of the evaluation system for many Analog Devices
components and reference circuits. The primary audience for
this user guide is the system engineer who seeks to understand

The SDP-S board is designed to be used in conjunction with


various Analog Devices component evaluation boards and
Circuits from the Lab reference circuits as part of a customer
evaluation environment. The SDP-S provides USB connectivity
through a USB 2.0 high speed connection to the computer,
allowing users to evaluate components on this platform from a
PC application. The SDP-S is based on a USB-to-serial engine,
which has SPI, I2C, and GPIO lines available, with a 120-pin
small footprint connector.

Figure 1. Picture of EVAL-SDP-CS1Z

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT


WARNING AND LEGAL TERMS AND CONDITIONS.

Rev. A | Page 1 of 16

UG-291

SDP-S User Guide

TABLE OF CONTENTS
Features .............................................................................................. 1

USB Installation .............................................................................4

General Description ......................................................................... 1

Powering Up/Powering Down the SDP-S ..................................4

Revision History ............................................................................... 2

Evaluation Board Hardware .............................................................5

Product Overview............................................................................. 3

LEDs ................................................................................................5

Package Contents .......................................................................... 3

Connector Details .........................................................................5

Technical or Customer Support.................................................. 3

Power............................................................................................ 10

Analog Devices Web Site ............................................................. 3

Daughter Board Design Guidelines ......................................... 10

Getting Started .................................................................................. 4

Mechanical Specifications ......................................................... 11

PC Configuration ......................................................................... 4

Evaluation Board Schematics........................................................ 13

REVISION HISTORY
8/11Rev. 0 to Rev. A
Removed SDRAM Memory from Features Section ..................... 1
Removed SDRAM Memory from Product Overview Section ... 3
7/11Revision 0: Initial Version

Rev. A | Page 2 of 16

SDP-S User Guide

UG-291

PRODUCT OVERVIEW
The SDP-S board includes the following:

ANALOG DEVICES WEB SITE

The Analog Devices website, www.analog.com, provides


information about a broad range of productsanalog
integrated circuits, amplifiers, converters, and digital signal
processors.

USB-to-serial engine
1 120-pin small footprint connector
Hirose FX8-120P-SV1(91), 120-pin header
Peripherals exposed
SPI
TWI/I2C
GPIO

Also, note that MyAnalog.com is a free feature of the Analog


Devices website that allows customization of a web page to
display only the latest information about products of interest
to you. You can choose to receive weekly email notifications
containing updates to the web pages that meet your interests,
including documentation errata against all documents.
MyAnalog.com provides access to books, application notes,
data sheets, code examples, and more.

PACKAGE CONTENTS
The EVAL-SDP-CS1Z board package contains the following:

EVAL-SDP-CS1Z board
1 m USB Standard-A-to Mini-B-cable

Contact the vendor where the SDP-S board was purchased, or


contact Analog Devices if anything is missing.

Visit MyAnalog.com to sign up. If you are a registered user,


simply log on. Your user name is your email address.

TECHNICAL OR CUSTOMER SUPPORT


Analog Devices customer support can be reached in the
following ways:

Visit the SDP homepage at www.analog.com/sdp


Email processor questions to psa.support@analog.com
Visit the Analog Devices Wiki page at
www.wiki.analog.com/sdp
Visit the EngineerZone for community technical support at
ez.analog.com.
Phone questions to 1-800-ANALOGD
Contact your Analog Devices local sales office or
authorized distributor.
Send questions by mail to
Analog Devices, Inc.
Three Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA

Rev. A | Page 3 of 16

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SDP-S User Guide

GETTING STARTED
This section provides specific information to assist with using
the SDP-S board as part of the users evaluation system.
The following topics are covered:

PC configuration
USB installation
Powering up/powering down the SDP-S

PC CONFIGURATION
For correct operation of the SDP board, the users computer
must have the following minimum configuration:

Windows XP Service Pack 2 or Windows Vista


USB 2.0 port

When removing the SDP-S board from the package, handle the
board carefully to avoid the discharge of static electricity, which
can damage some components.

USB INSTALLATION
Perform the following tasks to safely install the SDP-S board
onto the computer. There are two stages in the software
application installation procedure. The first stage installs the
application software. The second stage installs the .NET
Framework 3.5 and the necessary drivers.
1.

2.

Run the application installation file provided. The first


stage installs the application GUI and the necessary
support files onto the computer.
Immediately following the application installation, the
.NET Framework 3.5 and the driver package for the SDP
board are installed. If the .NET Framework 3.5 is already
preinstalled on the computer, this stage is skipped and
Step 2 consists of a driver package installation only.

Connecting the SDP-S Board to the PC

Before using the SDP-S board, verify the driver software has
installed properly.
Open the Windows Device Manager and verify the SDP-S
board appears under ADI Development Tools, as shown in
Figure 2.

Figure 2. Device Manager

POWERING UP/POWERING DOWN THE SDP-S


The following sections describe how to safely power up and
power down the SDP-S.

Powering Up the SDP-S Board


1.

Attach the SDP-S board to a USB 2.0 port on the computer via
the Standard-A-to-Mini-B cable provided.

Verifying Driver Installation

09916-002

Installing the Software

2.
3.

Connect the SDP-S board to the daughter evaluation board


through the 120-pin mating connector.
Power up the daughter board.
Connect the USB port on the computer to the SDP-S board.

Powering Down the SDP-S Board


1.
2.
3.

Rev. A | Page 4 of 16

Disconnect the USB port on the computer from the


SDP-S board.
Power down the daughter evaluation board.
Disconnect the SDP-S board from the daughter
evaluation board.

SDP-S User Guide

UG-291

EVALUATION BOARD HARDWARE


LED1

This section describes the hardware design of the EVAL-SDPCS1Z board.

The orange LED is an LED used as a diagnostic tool for


evaluation application developers.

The following topics are covered:

LEDsThis section describes the SDP-S on-board LEDs.


Connector detailsThis section details the pin
assignments on the 120-pin connector.
PowerThis section lists power requirements of the SDP-S
and identifies connector power inputs and output pins.
Daughter board design guidelinesThis section provides
guidelines on how to design daughter boards for use with
the SDP-S.
Mechanical specificationsThis section provides
dimensional information.

CONNECTOR DETAILS
The SDP-S board contains one Hirose FX8-120P-SV1(91),
120-pin header connector. Through this connector, the
peripheral communication interfaces of the USB-to-serial
engine are exposed. The exposed peripherals are

SPI
I2C/TWI
GPIO

LEDS

Also included on the connector specification are input and output power pins, ground pins, and pins reserved for future use.

There are two LEDs located on the SDP-S board (see Figure 3).

Connector Pin Assignments

Power LED (PWR)

Table 1 lists the connector pins and identifies the functionality


assigned to each connector pin on the SDP-S board.

The green power LED indicates that the SDP-S board is


powered. This is not an indication of USB connectivity between
the SDP-S and the PC.
J2

LED1

The pinout of this connector is consistent with other connectors


across the SDP family.

PWR

09916-003

SDPS
Rev 1.0

Figure 3. SDP-S Board LEDs

Rev. A | Page 5 of 16

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SDP-S User Guide

Table 1. 120-Pin Connector Pin Assignments


Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

Pin Name
NC
NC
GND
GND
USB_VBUS
GND
DNU
DNU
DNU
DNU
GND
DNU
DNU
DNU
DNU
DNU
GND
DNU
DNU
DNU
DNU
DNU
GND
DNU
DNU
DNU
DNU
GND
DNU
DNU
DNU
DNU
DNU
DNU
SPI_HOLD
GND
SPI_SEL_B
SPI_SEL_C
NC
GND
DNU
DNU
GPIO0
GPIO2
GPIO4
GND
GPIO6
DNU
DNU
NC
NC
GND

Description
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Connect to the ground plane of the daughter board.
Connected directly to the USB 5 V supply.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Detects the ready state of the daughter board for SPI transfer.
Connect to the ground plane of the daughter board.
SPI Chip Select B. Use this to control a second device on the SPI bus.
SPI Chip Select C. Use this to control a third device on the SPI bus.
No connect. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
General-purpose input/output.
General-purpose input/output.
General-purpose input/output.
Connect to the ground plane of the daughter board.
General-purpose input/output.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Rev. A | Page 6 of 16

SDP-S User Guide


Pin No.
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105

Pin Name
NC
NC
NC
EEPROM_A0
RESET_OUT
GND
DNU
RESET_IN
DNU
DNU
GND
NC
NC
NC
NC
NC
GND
NC
NC
DNU
DNU
GPIO7
GND
GPIO5
GPIO3
GPIO1
SCL_0
SDA_0
GND
SPI_CLK
SPI_MISO
SPI_MOSI
SPI_SEL_A
GND
DNU
DNU
DNU
DNU
DNU
DNU
GND
DNU
DNU
DNU
DNU
GND
DNU
DNU
DNU
DNU
DNU
GND
DNU

UG-291
Description
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
EEPROM A0. Connect to the A0 address line of the EEPROM.
Active low pin for resetting the daughter board. Driven by SDP-S.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Active low pin to reset EVAL-SDP-CS1Z board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
General-purpose input/output.
Connect to the ground plane of the daughter board.
General-purpose input/output.
General-purpose input/output.
General-purpose input/output.
I2C Clock 0. The daughter board EEPROM must be connected to this bus.
I2C Data 0. The daughter board EEPROM must be connected to this bus.
Connect to the ground plane of the daughter board.
SPI clock.
SPI master in, slave out data.
SPI master out, slave in data.
SPI Chip Select A.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Rev. A | Page 7 of 16

UG-291
Pin No.
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120

SDP-S User Guide


Pin Name
DNU
DNU
DNU
GND
DNU
DNU
DNU
DNU
DNU
GND
VIO (+3.3V)
GND
GND
NC
NC

Description
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Do not use. Leave this pin unconnected. Do not ground.
Connect to the ground plane of the daughter board.
3.3 V output. 20 mA maximum current available to power the I/O voltage on the daughter board.
Connect to the ground plane of the daughter board.
Connect to the ground plane of the daughter board.
No connect. Leave this pin unconnected. Do not ground.
No connect. Leave this pin unconnected. Do not ground.

Rev. A | Page 8 of 16

SDP-S User Guide

UG-291

60

RESET_IN

DNU

61

59

DNU

DNU

62

58

GND

GND

63

57

RESET_OUT

NC

64

56

EEPROM_A0

NC

65

55

NC

NC

66

54

NC

NC

67

53

NC

NC

68

52

GND

GND

69

51

NC

NC

70

50

NC

NC

71

49

DNU

DNU

72

48

DNU

DNU

73

47

GPIO6

GPIO7

74

46

GND

GND

75

45

GPIO4

GPIO5

76

44

GPIO2

GPIO3

77

43

GPIO0

GPIO1

78

42

DNU

SCL_0

79

41

DNU

SDA_0

80

40

GND

GND

81

39

NC

SPI_CLK

82

38

SPI_SEL_C

SPI_MISO

83

37

SPI_SEL_B

SPI_MOSI

84

36

GND

SPI_SEL_A

85

35

SPI_HOLD

GND

86

34

DNU

DNU

87

33

DNU

DNU

88

32

DNU

DNU

89

31

DNU

DNU

90

30

DNU

DNU

91

29

DNU

DNU

92

28

GND

GND

93

27

DNU

DNU

94

26

DNU

DNU

95

25

DNU

DNU

96

24

DNU

DNU

97

23

GND

GND

98

22

DNU

DNU

99

21

DNU

DNU

100

20

DNU

DNU

101

19

DNU

DNU

102

18

DNU

DNU

103

17

GND

GND

104

16

DNU

DNU

105

15

DNU

DNU

106

14

DNU

DNU

107

13

DNU

DNU

108

12

DNU

GND

109

11

GND

DNU

110

10

DNU

DNU

111

DNU

DNU

112

DNU

DNU

113

DNU

DNU

114

GND

GND

115

USB_VBUS

VIO (+3.3V)

116

GND

GND

117

GND

GND

118

NC

NC

119

NC

NC

120

SDP-S
CONNECTOR

GENERAL
INPUT/OUTPUT

I 2C

SPI

NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. DNU = DO NOT USE. DO NOT CONNECT TO THIS PIN.

Figure 4. 120-Pin Connector Outline


Rev. A | Page 9 of 16

09916-004

Each interface provided by the SDP-S is available on unique pins of the SDP-S 120-pin connector. The connector pin numbering scheme
is outlined in Figure 4.

UG-291

SDP-S User Guide


Connector Location

POWER
The SDP-S board is powered by the USB connector. It does not
require power to be supplied by the daughter board. The SDP-S
board provides 3.3 V at 20 mA on Pin 116 (VIO_3.3) to connected
daughter boards as the VIO voltage for the daughterboard.
Pin 5 (USB_VBUS) is connected to the 5 V line of the USB
connector, providing 5 V 10% as an output of the SDP board.

DAUGHTER BOARD DESIGN GUIDELINES


The daughter board design guidelines specify the layout,
connector positioning, keep out areas, and dimensions of
potential daughter boards. This guidance is to ensure that a
daughter board can connect to any controller board from
the SDP family. Following these guidelines ensures that the
connector on the SDP-S or any other controller board in the
SDP family can have any one of the available daughter boards
physically attached.

The daughter board connector and securing screw holes are


located in the top left hand corner. This arrangement for a
daughter board is shown in Figure 5.
If a daughter board exceeds these dimensions, it may not be
possible to connect it to the other controller or interposer
boards in the SDP family. Every effort was made to extend the
5.9 mm dimension as large as possible to allow space for vias
between the connector and the edge of the board. These are
absolute maximum dimensions and must not be exceeded.
The full specification drawing for the connector location on the
daughter board is shown in Figure 6.
The mating daughter board 120-pin connector is the Hirose
FX8-120S-SV(21), 120-pin receptacle, FEC 132-4660, Digi-Key
H1219-ND. Consult the connector data sheet for full details on
the connector. Note that Pin 1 to Pin 60 are placed on the left
side of the connector and Pin 61 to Pin 120 are placed on the
right side of the connector.

5.9mm

3.3mm

SDP-S

5.9mm

09916-005

DAUGHTER BOARD

Figure 5. Maximum Board Dimensions for Connector Placement

Rev. A | Page 10 of 16

SDP-S User Guide

UG-291
1.75mm
5.90mm
NO RIGHT-ANGLED CONNECTORS ALLOWED ALONG THIS EDGE
ORIGIN (0,0)

3.30mm

x = 5.9mm, y = 3.3mm

5.15mm
60

61

D3.10mm

x = 5.95mm, y = 28.55mm (CENTER OF CONNECTOR)

50.50mm

120

EVAL-xxxxx-DB
Rev. D
x = 5.95mm, y = 53.8mm

PLACEMENT KEEPOUT FOR COMPONENTS


OVER 3mm IN HEIGHT
(EXTENDS DOWN ENTIRE HEIGHT OF LEFT HAND SIDE OF PCB)
12.65mm

09916-006

D3.10mm

Figure 6. Connector Placement on Compatible Daughter Boards

Keep Out Area


To allow the greatest flexibility for future controller boards, a
keep out area is established for components higher that 3 mm.
The keep out area is 12.65 mm wide and extends down the
entire left side of the daughter board.

Restriction on Right Angle Connectors


Due to the layout of other boards in the SDP family, and their
daughter boards, right angle connectors are not allowed on the
top and left edges of the daughter boards and (if required)
should be placed on the right or bottom edges. A right angle

connector describes any connector that requires the connection


to protrude over the edge of the board (for example, right angle
SMB or screw terminal).

MECHANICAL SPECIFICATIONS
The mechanical specifications of the SDP-S board are 2.36 inch
0.87 inch (60 mm 22 mm). The tallest component on the
top is approximately 0.17 inch (4.3 mm), and the tallest components on the bottoms are the 120-pin connectors at approximately
0.152 inch (3.86 mm). Refer to Figure 7.

Rev. A | Page 11 of 16

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SDP-S User Guide


0.87
22.0 mm

USB
LED

CON A

LED

2.36
60.0mm

STATUS

POWER

RESET
BUTTON

RESET
BUTTON
USB
0.17 / 4.3mm
CON A

0.152 / 3.86mm

CON A

09916-007

0.238 / 6.05mm

Figure 7. SDP-S Board Mechanical Specifications

Rev. A | Page 12 of 16

SDP-S User Guide

UG-291

EVALUATION BOARD SCHEMATICS


This section provides the schematic drawings for the EVAL-SDP-CB1Z board, which include

SDP-SUSB-to-serial engine, USB, interface (see Figure 8)


SDP-SConnector (see Figure 9)

Rev. A | Page 13 of 16

Figure 8. SDP-SUSB-to-Serial Engine, USB, Interface

C8
10F

VBUS

C16
100nF

MR

C21
100nF

R16
0

GND

IO

D+

S1

GND

EN

D2

C13
100nF

NC

C17
100nF

+3V3

C4
10F

6
VCC

+3V3

U2
DO

2
VSS

C15
100nF

L2

L3

C5
10F

C9
100nF

VUSB

R4

C10
100nF

C6
10F

+3V3

C11
100nF

VPLL

C1
27pF

C22
100nF

C19
100nF

2200

R1
10k

+3V3

RESET_OUT

C23
100nF

VCORE

C7
10F

C18
100nF

93AA56BT-I/OT

3
5 DI
4 CS
CLK

LK9

C14
100nF

R3
10k

+3V3

R2
10k

+3V3

GND
1
ADM6384YKS29D1Z

U4
ADP121
1
5
IN
OUT

U3

D1

RESET

4
VCC

+3V3

+3V3

MR

C20
100nF

USB-MINI-B-UX60SC-MB-5S8

7 SHLD2

6 SHLD1

VBUS

J2

C3 10nF

L1
600 ohms @ 100MHz

R9

Power

R10
680

+3V3

C2
27pF

Y1
12MHz

12k 1%

C12
100nF

VREGOUT

VREGIN

RESET

REF

GREEN

LED3

13

TEST

OSCO

OSCI

63
62 EECS
61 EECLK
EEDATA

14

7
8 DM
DP

49

50

VUSB

VPLL
VCORE

FT2232HQ

U1

12
VCORE 37
VCORE 64
VCORE

+3V3

BCBUS0
BCBUS1
BCBUS2
BCBUS3
BCBUS4
BCBUS5
BCBUS6
BCBUS7

BDBUS0
BDBUS1
BDBUS2
BDBUS3
BDBUS4
BDBUS5
BDBUS6
BDBUS7

ACBUS0
ACBUS1
ACBUS2
ACBUS3
ACBUS4
ACBUS5
ACBUS6
ACBUS7

ADBUS0
ADBUS1
ADBUS2
ADBUS3
ADBUS4
ADBUS5
ADBUS6
ADBUS7

48
52
53
54
55
57
58
59

U10-A

SLEEP

DNP
R27
DNP

RESET_OUT

U9

100

R13

C31
100nF

+3V3

SN74LVC1G86DBV

R22
100k

+3V3

NC7WZ07P6X

U10-B

+3V3

C30
100nF

SPI.SCLK.PULL.LOW.EN 1
6
SDA_1
SCL_1
TMR_A
NC7WZ07P6X
TMR_B
TMR_D LK10

SPI.MOSI
SPI.MISO
SPI.CS.A
SPI.CS.B
SPI.HOLD
SPI.CS.C
SPI.SCLK.INV.EN

GPIO[0:7]

38
39
40
41
43
44
45
46

PWR_EN

R6
2200

+3V3

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7

R5
2200

+3V3

26
27
28
29
30
32
33
34

16
17
18
19
21
22
23
24

60
PWREN 36
SUSPEND

+3V3

20
31
42
56
VCCIO
VCCIO
VCCIO
VCCIO

GND
GND
GND
GND
GND
GND
GND
GND

VCORE

4
VPHY 9
VPLL
AGND

10

Rev. A | Page 14 of 16
1
5
11
15
25
35
47
51

VBUS

LED1

Status

YELLOW

SPI.SCLK

R11
680

I2C.SDA

I2C.SCL

UG-291
SDP-S User Guide
09916-008

SDP-S User Guide

UG-291
J1-1

VIN

J1-2
VBUS
J1-56

TWI_A0
1

R24
100k

PWR_EN

C28
100nF

MR

J1-60

RESET_IN

RESET_OUT

J1-57

RESET_OUT

SLEEP

J1-64

SLEEP

J1-65

WAKE

J1-61

BMODE1_A

U7
ADP121
OUT

IN

NC

EN

SPI.HOLD

SPORT_RSCLK
SPORT_RFS

J1-91

SPORT_DR0

J1-31

SPORT_DR1

J1-30

SPORT1_TDV

J1-29

SPORT0_TDV

J1-87

SPORT_TSCLK

J1-89

SPORT_TFS

J1-88

SPORT_DT0

J1-32

SPORT_DT1

J1-35

SPORT_INT

VIO

C29
100nF

GND

0
MIC2025-1YMM
7

IN

OUT
U8

J1-90

J1-116

LK1

VBUS
J1-92

PWR_EN

OUT

EN
GND FLG
3

C26
100nF

J1-5

USB_VBUS

6
2

C27
100nF

J1-3
J1-4
J1-59

UART_RX

J1-62

UART_TX

J1-6
J1-11
J1-17
J1-23

SPI.CS.A

J1-85

SPI_SEL_A

SPI.CS.B

J1-37

SPI.CS.C

GPIO[0:7]

J1-28
GPIO0

J1-43

GPIO_0

SPI_SEL_B

GPIO1

J1-78

GPIO_1

J1-38

SPI_SEL_C

GPIO2

J1-44

GPIO_2

J1-39

SPI_SEL1/SPI_SS

GPIO3

J1-77

GPIO_3

SPI.MOSI

J1-84

SPI_MOSI

GPIO4

J1-45

GPIO_4

SPI.MISO

J1-83

SPI_MISO

GPIO5

J1-76

GPIO_5

SPI.SCLK

J1-82

SPI_CLK

GPIO6

J1-47

GPIO_6

J1-33

SPI0_D2

GPIO7

J1-74

GPIO_7

J1-34

SPI0_D3

J1-36
J1-40
J1-46
J1-52
J1-58
J1-63
J1-69
J1-75
J1-81
J1-86

J1-80

SDA_0

I2C.SCL

J1-79

SCL_0

SDA_1

J1-41

SDA_1

SCL_1

J1-42

SCL_1

J1-93
TMR_A

J1-48

TMR_A

TMR_B

J1-73

TMR_B

J1-49

TMR_C

J1-72

TMR_D

TMR_D

J1-98
J1-104
J1-109
J1-115
J1-117
J1-118

Figure 9. SDP-SConnector

Rev. A | Page 15 of 16

09916-009

I2C.SDA

UG-291

SDP-S User Guide

NOTES

I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).

ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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UG09916-0-8/11(A)

Rev. A | Page 16 of 16

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