Академический Документы
Профессиональный Документы
Культура Документы
MC33204, NCV33202,
NCV33204
Low Voltage, RailtoRail
Operational Amplifiers
http://onsemi.com
PDIP8
P, VP SUFFIX
CASE 626
8
1
8
1
8
1
SOIC8
D, VD SUFFIX
CASE 751
Micro8
DM SUFFIX
CASE 846A
PDIP14
P, VP SUFFIX
CASE 646
14
1
14
SOIC14
D, VD SUFFIX
CASE 751A
1
14
1
TSSOP14
DTB SUFFIX
CASE 948G
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
MC33204
All Case Styles
Output 1 1
NC
VCC
Inputs 1
Inputs
3
Output
VEE 4
NC
12
11
10
Output 1 1
2
Inputs 1
3
VEE 4
9
8
Output 2 7
MC33202
All Case Styles
13
VCC 4
Inputs 2
(Top View)
14 Output 4
Inputs 4
VEE
Inputs 3
Output 3
(Top View)
VCC
Output 2
6
2
Inputs 2
5
(Top View)
VCC
VCC
VEE
VCC
Vin
Vout
VCC
Vin+
VEE
http://onsemi.com
2
Symbol
Value
Unit
VS
+13
VIDR
Note 1
VCM
VCC + 0.5 V to
VEE 0.5 V
ts
Note 3
sec
TJ
+150
Storage Temperature
Tstg
65 to +150
PD
Note 3
mW
VCC = 2.0 V
VCC = 3.3 V
VCC = 5.0 V
8.0
10
12
8.0
10
12
6.0
8.0
10
1.9
0.10
3.15
0.15
4.85
0.15
1.125
1.125
1.125
Unit
mV
Vmin
Vmax
mA
Specifications at VCC = 3.3 V are guaranteed by the 2.0 V and 5.0 V tests. VEE = GND.
DC ELECTRICAL CHARACTERISTICS (VCC = + 5.0 V, VEE = Ground, TA = 25C, unless otherwise noted.)
Characteristic
Figure
Symbol
VIO
5, 6
Min
Typ
Max
6.0
9.0
13
8.0
11
14
14
10
13
17
2.0
2.0
80
100
200
250
500
5.0
10
50
100
200
VEE
VCC
mV
VIO/T
V/C
IIB
nA
IIO
VICR
Unit
nA
1. The differential input voltage of each amplifier is limited by two internal parallel backtoback diodes. For additional differential input voltage
range, use current limiting resistors in series with the input pins.
2. The input common mode voltage range is limited by internal diodes connected from the inputs to both supply rails. Therefore, the voltage
on either input must not exceed either supply rail by more than 500 mV.
3. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. (See Figure 2)
4. NCV33202 and NCV33204 are qualified for automotive use.
http://onsemi.com
3
Figure
Symbol
Min
Typ
Max
AVOL
50
25
300
250
VOH
VOL
VOH
VOL
4.85
4.75
4.95
0.05
4.85
0.15
0.15
0.25
60
90
500
25
50
80
0.9
0.9
1.125
1.125
Unit
kV/V
8, 9, 10
11
CMR
12
PSRR
13, 14
ISC
15
ID
dB
V/V
mA
mA
AC ELECTRICAL CHARACTERISTICS (VCC = + 5.0 V, VEE = Ground, TA = 25C, unless otherwise noted.)
Characteristic
Slew Rate
(VS = 2.5 V, VO = 2.0 V to + 2.0 V, RL = 2.0 k, AV = +1.0)
Figure
Symbol
16, 26
SR
Min
Typ
Max
0.5
1.0
Unit
V/s
17
GBW
2.2
MHz
20, 21, 22
AM
12
dB
20, 21, 22
M
65
Deg
CS
90
dB
BWP
28
kHz
0.002
0.008
100
Rin
200
k
Cin
8.0
pF
25
20
0.8
0.2
23
24
THD
ZO
25
25
http://onsemi.com
4
en
in
nV/
Hz
pA/
Hz
2500
40
PERCENTAGE OF AMPLIFIERS (%)
1500
SO14 Pkg
1000
SOIC8
Pkg
500
0
55 40 25
0
25
50
85
TA, AMBIENT TEMPERATURE (C)
30
25
20
15
10
5.0
0
10 8.0 6.0 4.0 2.0
0
2.0 4.0 6.0
VIO, INPUT OFFSET VOLTAGE (mV)
125
30
160
120
20
10
0
50 40 30 20
10
10
20
30
40
VCC = +5.0 V
VEE = Gnd
VCM = 0 V to 0.5 V
80
VCM > 1.0 V
40
0
55 40 25
50
100
50
0
50
100
VCC = 12 V
VEE = Gnd
TA = 25C
200
0
2.0
4.0
6.0
8.0
10
VCM, INPUT COMMON MODE VOLTAGE (V)
25
70
85
125
150
150
10
200
360 amplifiers tested from
3 (MC33204) wafer lots
VCC = +5.0 V
VEE = Gnd
TA = 25C
DIP Package
40
250
8.0
50
35
300
260
220
180
140
VCC = +5.0 V
VEE = Gnd
RL = 600
VO = 0.5 V to 4.5 V
100
55 40 25
12
0
25
70
85
TA, AMBIENT TEMPERATURE (C)
105
http://onsemi.com
5
125
10
8.0
6.0
4.0
2.0
0
1.0
VCC
12
2.0
3.0
4.0
5.0
VCC,VEE SUPPLY VOLTAGE (V)
6.0
TA = 55C
TA = 125C
VCC 0.4 V
TA = 55C
6.0
VCC = +6.0 V
VEE = 6.0 V
RL = 600
AV = +1.0
TA = 25C
5.0
60
40
VCC = +6.0 V
VEE = 6.0 V
TA = 55 to +125C
20
0
10
PSR+
80
60
PSR
40
VCC = +6.0 V
VEE = 6.0 V
TA = 55 to +125C
0
1.0 k
10 k
f, FREQUENCY (Hz)
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
1.0 M
100
100
VEE
20
15
80
1.0 M
120
10
10
IL, LOAD CURRENT (mA)
100
20
VEE + 0.2 V
9.0
10 k
100 k
f, FREQUENCY (Hz)
TA = 25C
TA = 125C
0
12
0
1.0 k
VEE + 0.4 V
VCC = +5.0 V
VEE = 5.0 V
3.0
VCC 0.2 V
TA = 25C
100 k
1.0 M
100
Source
80
60
Sink
40
VCC = +6.0 V
VEE = 6.0 V
TA = 25C
20
0
1.0
2.0
3.0
4.0
5.0
http://onsemi.com
6
6.0
150
125
VCC = +5.0 V
VEE = Gnd
100
Source
75
Sink
50
25
0
55 40 25
0
25
70 85
TA, AMBIENT TEMPERATURE (C)
105
125
2.0
1.6
TA = 125C
1.2
TA = 25C
0.8
TA = 55C
0.4
0
0
1.0
+Slew Rate
1.0
Slew Rate
0.5
25
70
85
105
0
55 40 25
25
70
85
105
40
VS = 6.0 V
TA = 25C
RL = 600
80
30
120
1A
2A
10
1.0
50
30
10 k
2.0
70
10
VCC = +2.5 V
VEE = 2.5 V
f = 100 kHz
3.0
125
2B
1A Phase, CL = 0 pF
1B Gain, CL = 0 pF
2A Phase, CL = 300 pF
2B Gain, CL = 300 pF
100 k
1B
1.0 M
160
200
4.0
VCC = +2.5 V
VEE = 2.5 V
VO = 2.0 V
0
55 40 25
6.0
2.0
1.5
2.0
3.0
4.0
5.0
VCC, VEE, SUPPLY VOLTAGE (V)
70
30
1A
10
10
1A Phase, VS = 6.0 V
1B Gain, VS = 6.0 V
2A Phase, VS = 1.0 V
2B Gain, VS = 1.0 V
f, FREQUENCY (Hz)
100 k
1B
120
200
1.0 M
http://onsemi.com
160
2B
f, FREQUENCY (Hz)
80
2A
30
10 k
240
10 M
40
CL = 0 pF
TA = 25C
RL = 600
50
125
240
10 M
50
50
30
VCC = +6.0 V
VEE = 6.0 V
RL = 600
CL = 100 pF
40
30
20
20
10
10
Gain Margin
0
55 40 25
25
70
85
105
60
60
VCC = +6.0 V
VEE = 6.0 V
TA = 25C
45
30
30
15
0
0
125
10
100
16
60
Gain Margin
12
10
40
8.0
30
6.0
20
4.0
10
2.0
0
10
14
10
1.0
0
1.0 k
100
AV = 10
60
VCC = +6.0 V
VEE = 6.0 V
VO = 8.0 Vpp
TA = 25C
30
1.0 k
10 k
f, FREQUENCY (Hz)
VCC = +5.0 V
TA = 25C
VO = 2.0 Vpp
VEE = 5.0 V
RL = 600
AV = 100
AV = 10
0.01
0.001
10
90
AV = 1000
0.1
AV = 100
120
0
100
AV = 1.0
100
1.0 k
10 k
100 k
50
0
100 k
150
CS, CHANNEL SEPARATION (dB)
Phase Margin
10 k
70
1.0 k
VCC = +6.0 V
VEE = 6.0 V
RL = 600
AV = 100
TA = 25C
15
Gain Margin
80
45
50
5.0
VCC = +6.0 V
VEE = 6.0 V
TA = 25C
40
30
3.0
Noise Voltage
20
Noise Current
0
10
100
1.0 k
10 k
f, FREQUENCY (Hz)
http://onsemi.com
8
2.0
1.0
10
f, FREQUENCY (Hz)
4.0
0
100 k
40
60
A , GAIN MARGIN (dB)
M
60
75
Phase Margin
Phase Margin
70
70
VCC = +6.0 V
VEE = 6.0 V
RL = 600
CL = 100 pF
TA = 25C
VCC = +6.0 V
VEE = 6.0 V
RL = 600
CL = 100 pF
TA = 25C
General Information
VCC = +6.0 V
VEE = 6.0 V
RL = 600
CL = 100 pF
AV = 1.0
TA = 25C
between the board and the package. With the correct pad
geometry, the packages will selfalign when subjected to a
solder reflow process.
http://onsemi.com
9
Dual
Operating
Temperature Range
Package
Shipping
TA= 40 to +105C
SOIC8
98 Units / Rail
MC33201DR2
SOIC8
MC33201P
PDIP8
50 Units / Rail
Device
MC33201D
MC33201VD
TA = 55 to 125C
SOIC8
98 Units / Rail
MC33202D
TA= 40 to +105C
SOIC8
98 Units / Rail
MC33202DG
SOIC8
(PbFree)
MC33202DR2
SOIC8
SOIC8
(PbFree)
MC33202DR2G
Dual
MC33202DMR2
TA= 40 to +105C
Micro8
PDIP8
50 Units / Rail
SOIC8
98 Units / Rail
MC33202VDR2
SOIC8
NCV33202VDR2*
SOIC8
MC33202VP
PDIP8
50 Units / Rail
SO14
55 Units / Rail
MC33204DR2
SO14
MC33204DTB
TSSOP14
96 Units / Rail
MC33204DTBR2
TSSOP14
PDIP14
25 Units / Rail
SO14
55 Units / Rail
MC33204VDR2
SO14
NCV33204DR2*
SO14
TSSOP14
PDIP14
25 Units / Rail
MC33202P
MC33202VD
Quad
MC33204D
TA = 55 to 125C
TA= 40 to +105C
MC33204P
MC33204VD
TA = 55 to 125C
NCV33204DTBR2*
MC33204VP
http://onsemi.com
10
8
3320x
ALYW
8
320xV
ALYW
MC3320xP
AWL
YYWW
14
3202
AYW
1
MC33204VP
AWLYYWW
http://onsemi.com
11
MC33
204
ALYW
1
x
= 1 or 2
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
MC33204D
AWLYWW
TSSOP14
DTB SUFFIX
CASE 948G
14
14
14
SO14
D SUFFIX
CASE 751A
14
PDIP14
VP SUFFIX
CASE 646
MC33204P
AWLYYWW
1
8
MC33202VP
AWL
YYWW
PDIP14
P SUFFIX
CASE 646
14
Micro8
DM SUFFIX
CASE 846A
SO14
VD SUFFIX
CASE 751A
MC33204VD
AWLYWW
PDIP8
VP SUFFIX
CASE 626
PDIP8
P SUFFIX
CASE 626
SOIC8
VD SUFFIX
CASE 751
SOIC8
D SUFFIX
CASE 751
MC33
204V
ALYW
1
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
B
1
F
A
NOTE 2
C
J
T
N
SEATING
PLANE
D
H
G
0.13 (0.005)
T A
http://onsemi.com
12
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
10
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
10
0.030
0.040
X
A
8
B
1
0.25 (0.010)
Y
G
C
X 45
SEATING
PLANE
0.10 (0.004)
H
D
0.25 (0.010)
Z Y
DIM
A
B
C
D
G
H
J
K
M
N
S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm
inches
SOIC8
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
13
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
Micro8
DM SUFFIX
CASE 846A02
ISSUE F
PIN 1 ID
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. 846A01 OBSOLETE, NEW STANDARD 846A02.
G
D 8 PL
0.08 (0.003)
T B
DIM
A
B
C
D
G
H
J
K
L
SEATING
T PLANE
0.038 (0.0015)
STYLE 1:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
SOURCE
SOURCE
SOURCE
GATE
DRAIN
DRAIN
DRAIN
DRAIN
STYLE 2:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
STYLE 3:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
SOURCE 1
GATE 1
SOURCE 2
GATE 2
DRAIN 2
DRAIN 2
DRAIN 1
DRAIN 1
NSOURCE
NGATE
PSOURCE
PGATE
PDRAIN
PDRAIN
NDRAIN
NDRAIN
SOLDERING FOOTPRINT*
8X
1.04
0.041
0.38
0.015
3.20
0.126
6X
8X
4.24
0.167
0.65
0.0256
5.28
0.208
SCALE 8:1
mm
inches
Micro8
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
14
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
1.10
0.25
0.40
0.65 BSC
0.05
0.15
0.13
0.23
4.75
5.05
0.40
0.70
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.043
0.010
0.016
0.026 BSC
0.002
0.006
0.005
0.009
0.187
0.199
0.016
0.028
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
A
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
T
SEATING
PLANE
K
H
D 14 PL
0.13 (0.005)
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.290
0.310
10
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
18.80
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.37
7.87
10
0.38
1.01
SOIC14
D, VD SUFFIX
CASE 751A03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
A
14
B
1
P 7 PL
0.25 (0.010)
R X 45
T
SEATING
PLANE
0.25 (0.010)
T B
D 14 PL
http://onsemi.com
15
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0
7
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337
0.344
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0
7
0.228
0.244
0.010
0.019
14X K REF
0.10 (0.004)
0.15 (0.006) T U
T U
N
2X
14
L/2
0.25 (0.010)
M
B
U
L
PIN 1
IDENT.
F
7
0.15 (0.006) T U
DETAIL E
K
A
V
K1
J J1
SECTION NN
W
C
0.10 (0.004)
T SEATING
PLANE
DETAIL E
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.50
0.60
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0
8
INCHES
MIN
MAX
0.193
0.200
0.169
0.177
0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.020
0.024
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0
8
http://onsemi.com
16
MC33201/D