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DATA SHEET
TZA1038HW
High speed advanced analog DVD
signal processor and laser supply
Product specification
2003 Sep 03
Philips Semiconductors
Product specification
7.4
FEATURES
GENERAL DESCRIPTION
ORDERING INFORMATION
7.4.1
7.4.2
7.5
7.5.1
7.5.2
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.4.1
7.2.4.2
7.2.4.3
RF data processing
Servo signal processing
Servo signal path set-up
Focus servo
Radial servo
Differential phase detection
Drop-out concealment
Push-pull and three-beam push-pull
Enhanced push-pull (dynamic offset
compensation for beam landing)
Offset compensation
Automatic dual laser supply
Power-on reset and general power on
Compatibility with TZA1033HL/V1
Software compatibility
Hardware compatibility
Interface to the system controller
Control registers
Register 0: power control
Register 1: servo and RF modes
Register 2: focus offset DAC
Register 3: RF path gain
Register 4: RF left and right, or sum offset
compensation
Register 5: RF sum offset compensation
Register 6: servo gain and dynamic radial
offset compensation factor
Register 7: servo path gain and bandwidth and
RF path bandwidth and pre-emphasis
Register 8: RF channel selection
Register 11: radial servo offset cancellation
Register 12: central servo offset cancellation
inputs A and B
Register 13: central servo offset cancellation
inputs C and D
Register 14: RF filter settings
Register 15: DPD filter settings
7.2.4.4
7.2.5
7.2.6
7.2.7
7.2.7.1
7.2.7.2
7.2.8
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
7.3.8
7.3.9
7.3.10
7.3.11
7.3.12
7.3.13
7.3.14
2003 Sep 03
7.5.5.3
7.5.5.4
LIMITING VALUES
THERMAL CHARACTERISTICS
10
CHARACTERISTICS
11
APPLICATION INFORMATION
11.1
11.1.1
11.1.2
11.2
11.3
11.4
11.4.1
11.4.2
11.4.3
11.4.4
Signal relationships
Data path
Servo path
Programming examples
Energy saving
Initial DC and gain setting strategy
Electrical offset from pick-up
Gain setting servo
DC level in RF path
Gain setting RF path
12
PACKAGE OUTLINE
13
SOLDERING
13.1
7.5.3
7.5.4
7.5.5
7.5.5.1
7.5.5.2
13.2
13.3
13.4
13.5
TZA1038HW
14
15
DEFINITIONS
16
DISCLAIMERS
Philips Semiconductors
Product specification
FEATURES
GENERAL DESCRIPTION
2003 Sep 03
TZA1038HW
Philips Semiconductors
Product specification
TZA1038HW
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TZA1038HW
HTQFP48
DESCRIPTION
VERSION
SOT545-2
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
ambient temperature
40
+85
VDDA1, VDDA2,
VDDA3, VDDA4
4.5
5.0
5.5
VDDD3
2.7
3.3
5.5
VDDD5
4.5
5.0
5.5
IDD
supply current
Tamb
Supplies
VI(logic)
98
120
mA
STANDBY mode
mA
note 1
2.7
3.3
5.5
60
75
100
kHz
12
3 dB bandwidth of
LF path
IO(LF)
output current
VO(FTC)(p-p)
BFTC
FTC bandwidth
VI(FTCREF)
12
2.0
FTCHBW = 0
600
kHz
FTCHBW = 1; note 2
1200
kHz
1.25
2.75
RF channels
49
dB
RFSUM channels
RF data processing
ARF
programmable gain
6
+31
dB
BRF(3dB)
3 dB bandwidth of RFP
and RFN signal path
RFEQEN = 0;
RFNFEN = 0
200
300
MHz
f0(RF)
BWRF = 0
12.0
14.5
MHz
BWRF = 127
100
145
182
MHz
td(RF)
0.5
ns
Zi
input impedance of
pins A to D
100
2003 Sep 03
Philips Semiconductors
Product specification
PARAMETER
CONDITIONS
TZA1038HW
MIN.
TYP.
MAX.
UNIT
input voltage on
at the appropriate signal
pins A to D for full-scale at path gain setting
output
RF signal path
600
mV
LF signal path
700
mV
Vi(SUM)(dif)
GRFSUM = 6 dB
1800
mV
VI(DC)
1.3
VDDA 1.0
Vo(RF)(dif)(p-p)
1.4
VO(RF)(DC)
DC output voltage on
pins RFP and RFN
0.35
VDDA 1.9
Vi(RFREF)(CM)
0.8
1.2
2.1
Io(laser)(max)
120
mA
Vi(mon)
VDDA4 0.155
VDDA4 0.190
0.155
0.185
Laser supply
Notes
1. Input logic voltage level follows the supply voltage applied at pin VDDD3.
2. High FTC bandwidth is achieved when IS1 and IS2 > 1.5 A.
2003 Sep 03
Philips Semiconductors
Product specification
TZA1038HW
BLOCK DIAGRAM
VDDA1
VDDA2
VDDA3
VDDA4
RFREF
VDDD3
VDDD5
43
37
32
38
15
23
RFSUMP
RFSUMN
1
RF DATA PROCESSING
MULTIPLEXER
A to D
OPUREF
5
39
VARIABLE
GAIN STAGES
40
RFP
RFN
TZA1038HW
36
A
B
C
D
E
F
OPUREF
FTCREF
VDDL
REXT
CDMI
CDLO
DVDMI
DVDLO
34
3-BEAM
TRACKING
10
OA
35
4
33
OB
OC
OD
11
30
SELECT; SWAP
DPD
29
4
S1
12
PUSH-PULL
OFFSET
COMPENSATION
S2
28
25
FTC
S1
S2
OCENTRAL
FTC
27
47
20
VOLTAGE AND
CURRENT
REFERENCES
44
21
DUAL
LASER
SUPPLY
FTC
COMPARATOR
46
22
COP
COM
COO
LASER 1
45
SERIAL
INTERFACE
7
LASER 2
48
14
26
42
41
31
19
16
17
TM
TDO
18
MCE466
VSSA1
VSSA2
VSSA3
VSSA4
VSSD
SIDA
2003 Sep 03
SICL
SILD
Philips Semiconductors
Product specification
TZA1038HW
PINNING
SYMBOL
PIN
DESCRIPTION
RFSUMP
RFSUMN
input E
input F
VDDA1
VSSA1
analog ground 1
DVDMI
input A
input B
10
input C
11
input D
OPUREF
12
n.c.
13
not connected
TM
14
VDDD3
15
digital supply voltage (serial interface 3 V I/O pads and FTC comparator)
SIDA
16
SICL
17
SILD
18
VSSD
19
digital ground
COP
20
COM
21
COO
22
VDDD5
23
n.c.
24
not connected
FTC
25
TDO
26
FTCREF
27
OCENTRAL
28
S2
29
S1
30
VSSA4
31
analog ground 4
VDDA4
32
OD
33
OC
34
OB
35
OA
36
VDDA3
37
RFREF
38
RFP
39
positive RF output
RFN
40
negative RF output
2003 Sep 03
Philips Semiconductors
Product specification
PIN
TZA1038HW
DESCRIPTION
45
CD laser output
CDMI
46
VDDL
47
DVDLO
48
42 VSSA2
37 VDDA3
CDLO
38 RFREF
39 RFP
44
40 RFN
REXT
41 VSSA3
43 VDDA2
analog ground 2
43
44 REXT
42
VDDA2
45 CDLO
VSSA2
46 CDMI
analog ground 3
47 VDDL
41
48 DVDLO
VSSA3
36 OA
RFSUMN 2
35 OB
E 3
34 OC
F 4
33 OD
RFSUMP
32 VDDA4
VDDA1 5
VSSA1 6
31 VSSA4
TZA1038HW
2003 Sep 03
n.c. 24
COO 22
VDDD5 23
25 FTC
COP 20
OPUREF 12
COM 21
26 TDO
VSSD 19
27 FTCREF
D 11
SILD 18
C 10
SICL 17
28 OCENTRAL
SIDA 16
B 9
TM 14
29 S2
VDDD3 15
30 S1
A 8
n.c. 13
DVDMI 7
MCE467
Philips Semiconductors
Product specification
FUNCTIONAL DESCRIPTION
RF data processing
Two separate DACs are available for cases where the left
and right side DC conditions can be different.
2003 Sep 03
TZA1038HW
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RFOFFSS
12
OPUREF
SW-A
8
G1
39
G3
NOISE
FILTER
EQUALIZER
DPD-A
40
RFP
RFN
RF
outputs
RFOFFSL
SW-B
10
TZA1038HW
G1
DPD-B
RF
inputs
SW-C
10
G1
G2
DPD
DPD-A
DPD-C
RFOFFSR
Philips Semiconductors
38
RFSUM
2003 Sep 03
RFSUMP
RFSUMN
RFREF
30
DPD-D
FILTER
DOC
DPD-C
29
S1
S2
servo
radial
outputs
DPD-B
SW-D
11
G1
DPD-D
Product specification
TZA1038HW
MCE468
Philips Semiconductors
Product specification
TZA1038HW
handbook, halfpage
7.2.1
tangential direction
right
B C
MGW554
Data = A + B + C + D
Push-pull = A D
Focus = C B
DPD2 = phase (A, D)
DPD4 not applicable
7.2.2
handbook, halfpage
FOCUS SERVO
left
tangential direction
7.2.3
D
MGW553
Data = A + B + C + D
Push-pull = (A + B) (C + D)
Focus = (A + C) (B + D)
DPD2 = phase (A + B, C + D)
DPD4 = phase (A,D) + phase (C,B)
The polarity of the radial loop can be reversed via the serial
control bus (RAD_pol).
2003 Sep 03
RADIAL SERVO
right
11
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FTC
/I
14k
COFFSA
B
/I
10
/I
RF
inputs
12
11
/I
14k
/I
/I
S1
S2
CA
14k
36
GLFC
OA
30k
14k
35
GLFC
OB
servo
focus
outputs
15k
34
GLFC
ROFFSE
F
29
GLFR
30k
COFFSD
3
30
servo
radial
outputs
COFFSC
D
MUX
SWAP
GLFR
FTCREF
30k
COFFSB
C
27
MUX
26k
Philips Semiconductors
25
2003 Sep 03
FTC
DPD
OC
15k
33
GLFC
OD
ROFFSF
VLFOFFS
TZA1038HW
FOFFS
OCENTRAL
28
LFOFFS
Product specification
MCE469
OCENTRAL
TZA1038HW
OPUREF
12
Philips Semiconductors
Product specification
7.2.4.3
7.2.4.4
Drop-out concealment
Offset compensation
7.2.4.2
Input signals for DPD are taken from input pins A to D after
the first gain stage G1 (see Fig.3). Pre-emphasis is applied
by means of a programmable lead/lag filter. Additionally, a
programmable low-pass filter is available to improve the
signal quality under noisy signal conditions at lower
speeds. For further signal improvements the DPD pulse
stretcher can be programmed to higher values at lower
speeds.
7.2.4.1
TZA1038HW
13
Philips Semiconductors
Product specification
7.2.7
7.2.7.1
Software compatibility
7.2.7.2
Hardware compatibility
2003 Sep 03
7.2.6
TZA1038HW
14
Philips Semiconductors
Product specification
TZA1038HW
SICL
SIDA
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 A0 A1 A2 A3
D0 D1 D2 D3 D4
A1 A2 A3
t load(H)
SILD
MGW496
7.3
Control registers
The TZA1038HW is controlled by serial registers. To keep programming fast and efficient, the control bits are sent in
16-bit words. Four bits of the word are used for the address and for each address there are 12 data bits.
Table 1
SYMBOL
PARAMETER
VALUES
REGISTER
BITS
Data path
G1 (A1)
11 and 10
G2 (A2)
9 and 8
G3 (A3)
0 to 13 dB in steps of 0.8 dB (1 to 4)
7 to 4
GRFSUM
(ARFSUM)
7 to 5
BWRF
bandwidth limitation in
RF path
14
6 to 0
2003 Sep 03
15
Philips Semiconductors
Product specification
PARAMETER
DC offset compensation in left
RF input path
TZA1038HW
VALUES
RFSUM = 0; full range depends on
G1 setting:
REGISTER
BITS
11 to 6
5 to 0
4 or 5
5 to 0
11
11 and 10
DC offset compensation in
right RF input path
RFOFFSS
DC offset compensation in
RFSUM path
SERVOOS = 0:
VLFOFFS = 0, 5, 10 or 15 mV
RLFR
15 k fixed
RLFPP
30 k fixed
ROFFSE
SERVOOS = 0: VROFFSE = 0 to 20 mV
11
7 to 4
11
3 to 0
LFOFFS
SERVOOS = 1:
VLFOFFS = 0, 15, 30 or 45 mV
SERVOOS = 1: VROFFSE = 0 to 60 mV
ROFFSF
3 to 0
I(FS)(DPD),
I(FS)(DPD)(DOC)
IREFRAD(CM)
3.5 A fixed
fstart_DPD
fstart_DPD = 1, 5 or 10 MHz
(TZA1033HL/V1 compatible)
1 and 0
15
5 to 3
2003 Sep 03
SERVOOS = 0: VROFFSF = 0 to 20 mV
SERVOOS = 1: VROFFSF = 0 to 60 mV
16
Philips Semiconductors
Product specification
PARAMETER
TZA1038HW
VALUES
REGISTER
BITS
11 to 8
GLFR (ALFR)
RFTC
RLFC
14 k fixed
COFFSA
SERVOOS = 0: 0 to 20 mV
12
7 to 4
COFFSB
SERVOOS = 0: 0 to 20 mV
12
3 to 0
COFFSC
SERVOOS = 0: 0 to 20 mV
13
7 to 4
SERVOOS = 0: 0 to 20 mV
13
3 to 0
GLFC (ALFC)
15 to +9 dB in steps of 3 dB
(0.18 to 2.8)
7 to 4
= 0 to 3132
4 to 0
FOFFSEN
10
COFFSD
7.3.1
SERVOOS = 1: 0 to 60 mV
SERVOOS = 1: 0 to 60 mV
SERVOOS = 1: 0 to 60 mV
SERVOOS = 1: 0 to 60 mV
Table 2
Register address 0H
BIT
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
BIT
SYMBOL
GRF
SUM2
GRF
SUM1
GRF
SUM0
DVD_ MILVL
CD_MILVL
DVD_ LDON
CD_LDON
PWRON
Table 3
BIT
SYMBOL
FUNCTION
15 to 12
AD[3:0]
0000 = address 0H
11 to 8
not used
7 to 5
GRFSUM[2:0]
DVD_MILVL
2003 Sep 03
Philips Semiconductors
Product specification
TZA1038HW
SYMBOL
FUNCTION
CD_MILVL
DVD_LDON
CD_LDON
PWRON
7.3.2
Table 4
Register address 1H
BIT
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
DPD_DCC
RAD_pol
BIT
DOCEN
Focus_
mode
RT_mode2
RT_mode1
RT_mode0
RFSUM
SYMBOL
Table 5
BIT
15 to 12
11
SYMBOL
FUNCTION
AD[3:0]
0001 = address 1H
DPD_DCC
not used
RAD_pol
not used
DOCEN
Focus_mode
3 to 1
RT_mode[2:0]
10 and 9
8
7 and 6
RFSUM
2003 Sep 03
18
Philips Semiconductors
Product specification
TZA1038HW
Table 6
Register address 2H
BIT
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
K2_Mode
FOFFSEN
BIT
SYMBOL
Table 7
BIT
SYMBOL
15 to 12
11
FUNCTION
AD[3:0]
0010 = address 2H
K2_Mode
FOFFSEN
9 to 5
[4:0]
4 to 0
not used
10
7.3.4
Table 8
Register address 3H
BIT
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
G11
G10
G21
G20
BIT
SYMBOL
G33
G32
G31
G30
Table 9
BIT
15 to 12
SYMBOL
AD[3:0]
11 and 10 G1[1:0]
FUNCTION
0011 = address 3H
First RF amplifier stage gain.
00 = 0 dB
01 = 6 dB
10 = 12 dB
11 = not used
9 and 8
G2[1:0]
7 to 4
G3[3:0]
3 to 0
not used
2003 Sep 03
19
Philips Semiconductors
Product specification
TZA1038HW
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
RFOFFSL5
RFOFFSL4
RFOFFSL3
RFOFFSL2
BIT
RFOFFSR5/
RFOFFSS5
RFOFFSR4/
RFOFFSS4
RFOFFSR3/
RFOFFSS3
RFOFFSR2/
RFOFFSS2
RFOFFSR1/
RFOFFSS1
RFOFFSR0/
RFOFFSS0
SYMBOL
RFOFFSL1 RFOFFSL0
SYMBOL
FUNCTION
15 to 12
AD[3:0]
0100 = address 4H
11 to 6
RFOFFSL[5:0]
5 to 0
RFOFFSR[5:0]
7.3.6
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
BIT
SYMBOL
RFOFFSS5
RFOFFSS4
RFOFFSS3
RFOFFSS2
RFOFFSS1
RFOFFSS0
SYMBOL
FUNCTION
15 to 12
AD[3:0]
0101 = address 5H
11 to 6
not used
5 to 0
RFOFFSS[5:0]
2003 Sep 03
20
Philips Semiconductors
Product specification
TZA1038HW
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
GLFR3
GLFR2
GLFR1
GLFR0
BIT
SYMBOL
GLFC3
GLFC2
GLFC1
GLFC0
SYMBOL
FUNCTION
15 to 12
AD[3:0]
0110 = address 6H
11 to 8
GLFR[3:0]
7 to 4
GLFC[3:0]
3 to 0
[3:0]
7.3.8
REGISTER 7: SERVO PATH GAIN AND BANDWIDTH AND RF PATH BANDWIDTH AND PRE-EMPHASIS
Definitions in register 7 are intended mainly for software compatibility with the TZA1033HL/V1. New features that require
more bit-space to program are moved to registers 14 and 15. Only DPD stretch remains programmed in register 7. Some
parameters are slightly modified.
Table 16 Register address 7H
BIT
15
14
13
12
11
10
AD3
AD2
AD1
AD0
DPDLPF1
DPDLPF0
DPD_
stretch2
DPD_
stretch1
BIT
SYMBOL
DPD_
stretch0
EQRF2
EQRF1
EQRF0
fstart_DPD1
fstart_DPD0
SYMBOL
DPD_
DVDALAS_
testmode
mode
SYMBOL
K2_Mode = 0
15 to 12
AD[3:0]
11 and 10 DPDLPF[1:0]
0111 = address 7H
0111 = address 7H
not applicable
2003 Sep 03
K2_Mode = 1
21
Philips Semiconductors
Product specification
TZA1038HW
FUNCTION
BIT
SYMBOL
K2_Mode = 0
9 to 7
DPD_stretch [2:0]
K2_Mode = 1
000 = 1.9 ns
000 = 30 ns
001 = 15 ns
010 = 7.5 ns
010 = 7.5 ns
011 = 15 ns
011 = 3.8 ns
100 = 30 ns
100 = 1.9 ns
101 = 1.2 ns
DPD_ testmode
DVDALAS_ mode
not applicable
EQRF[2:0]
not applicable
fstart_DPD[1:0]
not applicable
4 to 2
1 and 0
00 = 1 MHz
01 = 5 MHz
10 = 10 MHz
11 = not used
7.3.9
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
BIT
SW-Cmute
SW-Cinv
SW-Bmute
SW-Binv
SW-Amute
SW-Ainv
SYMBOL
FUNCTION
15 to 12
AD[3:0]
11 to 8
not used
SW-Dmute
SW-Dinv
SW-Cmute
SW-Cinv
SW-Bmute
2003 Sep 03
22
Philips Semiconductors
Product specification
TZA1038HW
SYMBOL
FUNCTION
SW-Binv
SW-Amute
SW-Ainv
7.3.10
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
LFOFFS1
LFOFFS0
SERVOOS
FTCHBW
BIT
SYMBOL
ROFFSE3
ROFFSE2
ROFFSE1
ROFFSE0
ROFFSF3
ROFFSF2
ROFFSF1
ROFFSF0
SYMBOL
15 to 12
AD[3:0]
FUNCTION
1011 = address BH
11 and 10 LFOFFS[1:0]
DC offset compensation for LF path (VLFOFFS). Common for all servo inputs:
SERVOOS = 0
SERVOOS = 1
00 = 0 mV
00 = 0 mV
01 = 5 mV
01 = 15 mV
10 = 10 mV
10 = 30 mV
11 = 15 mV
11 = 45 mV
SERVOOS
Servo offset scale (DACs ROFFSx, COFFSx and LFOFFS). 0 = normal range;
1 = triple range.
FTCHBW
7 to 4
ROFFSE[3:0]
3 to 0
ROFFSF[3:0]
7.3.11
15
14
13
12
D11
D10
D9
D8
SYMBOL
AD3
AD2
AD1
AD0
TSTDPDRF
TSTSRV2
TSTSRV1
TSTSRV0
BIT
D7
D6
D5
D4
D3
D2
D1
D0
SYMBOL
COFFSA3
COFFSA2
COFFSA1
COFFSA0
COFFSB3
COFFSB2
COFFSB1
COFFSB0
2003 Sep 03
23
Philips Semiconductors
Product specification
TZA1038HW
SYMBOL
15 to 12
FUNCTION
AD[3:0]
1100 = address CH
11
TSTDPDRF
DPD RF test bit. With this bit the DPD filter performance is checked. 0 = normal
operation; 1 = RF signal filtered by the DPD block is connected to the RF output.
10 to 8
TSTSRV[2:0]
7 to 4
COFFSA[3:0]
3 to 0
COFFSB[3:0]
7.3.12
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
RFonly
BIT
SYMBOL
COFFSC3
COFFSC2
COFFSC1
COFFSC0
COFFSC3
COFFSC2
COFFSC1
COFFSC0
SYMBOL
FUNCTION
15 to 12
AD[3:0]
1101 = address DH
11
RFonly
10 to 8
not used
7 to 4
COFFSC[3:0]
3 to 0
COFFSD[3:0]
2003 Sep 03
24
Philips Semiconductors
Product specification
TZA1038HW
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
RFNFEN
RFEQEN
BIT
SYMBOL
RFKEQ
BWRF6
BWRF5
BWRF4
BWRF3
BWRF2
BWRF1
BWRF0
SYMBOL
15 to 12
FUNCTION
AD[3:0]
1110 = address EH
11 and 10
not used
RFNFEN
RFEQEN
RFKEQ
BWRF[6:0]
Bandwidth limitation in RF path. 000 0000 to 111 1111: f0(RF) = 12 to 145 MHz.
6 to 0
7.3.14
15
14
13
12
11
10
SYMBOL
AD3
AD2
AD1
AD0
BIT
SYMBOL
DPD_LL2
DPD_LL1
DPD_LL0
DPD_LPF2
DPD_LPF1
DPD_LPF0
2003 Sep 03
25
Philips Semiconductors
Product specification
TZA1038HW
SYMBOL
FUNCTION
15 to 12
AD[3:0]
1111 = address FH
11 to 6
not used
5 to 3
DPD_LL[2:0]
2 to 0
DPD_LPF[2:0]
7.4
7.5
Signal descriptions
7.5.1
STANDBY MODE
7.4.2
Thus:
RF ONLY MODE
RFdif =
2003 Sep 03
A+B+C+D
A3 A2 A1 ----------------------------------- OPUREF RF OFFS
26
Philips Semiconductors
Product specification
1
1
H n ( s ) = -------------------------------------------- ---------------------2
s
s
s
1 + --------------2- + ------------ 1 + -----------
0RF
0RF
0RF
The first gain stage also carries the signals for DPD
tracking. Therefore this stage will also be active when
RFSUM input and DPD is selected. The DC offset
cancellation is also active in this situation but left and right
channels are controlled from a single DAC. Also in this
situation, the A to D and RFSUM inputs are used
simultaneously.
7.5.4
FOCUS SIGNALS
TZA1038HW
+ FOFFS
1
OB = ------------- ALFC (B OPUREF + LFOFFS COFFSB)
R LFC
+ (1 ) FOFFS
1
OC = ------------- ALFC (C OPUREF + LFOFFS COFFSC)
R LFC
(DVDRFP DVDRFN) =
ARFSUM [RFSUMP RFSUMN RFOFFSS]
+ FOFFS
1
OD = ------------- ALFC (D OPUREF + LFOFFS COFFSD)
R LFC
Thus:
+ (1 ) FOFFS
7.5.3
HF FILTERING
7.5.5
7.5.5.1
s
1 + k --------------2 0RF
1
H e ( s ) = ------------------------------------------------------ ------------------------------2
s
s
s
-----------1 + ---------------2- + ------------ 1 +
0RF
0RF
0RF
This represents a third-order equi-ripple phase filter with a
good delay response. The boost factor k is programmable
via the serial bus control bit RFKEQ. The corner
frequency 0RF = 2f0RF is programmable via control
parameter bit BWRF. The equalizer is switched on with
control bit RFEQEN.
t
------ is the time difference between the two input signals,
TP
2003 Sep 03
RADIAL SIGNALS
27
Philips Semiconductors
Product specification
TZA1038HW
The DPD detection can not work properly when the input
signal becomes very small. The output of the DPD may
then show a significant offset. The DOC may not conceal
this offset completely because:
t
t
DPDmode = DPD2: ------ (A,D) or DPD2: ------ (A + C, B + D)
TP
TP
t
t
DPDmode = DPD4: 0.5[ ------ (A,D) + ------ (C,B)]
TP
TP
7.5.5.3
t
Range of ------ is from 0.5 to + 0.5.
TP
t
------ > 0 if A,C phase leads with respect to D,B phase.
TP
7.5.5.2
7.5.5.4
t
S1DPD = C I(FS)(DPD)(DOC) ------ + 0.25 CA.
TP
t
S2DPD = C I(FS)(DPD)(DOC) ------ + 0.25 CA.
TP
Where:
I(FS)(DPD)(DOC) is the full scale range
2003 Sep 03
Enhanced push-pull
28
Philips Semiconductors
Product specification
TZA1038HW
or:
A OPUREF + LF OFFS C OFFSA
S1 PP = A LFR -----------------------------------------------------------------------------------------
R LFPP
The signals from the B and C channels can be switched off, depending on the photodiode configuration
(bit RT_mode[2:0]).
2003 Sep 03
29
Philips Semiconductors
Product specification
TZA1038HW
8 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOLS
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDD
supply voltage
5.5
Tamb
ambient temperature
40
+85
Vesd
electrostatic discharge
voltage
2000
200
Note
1. ESD behaviour is tested in accordance with JEDEC II standard:
HBM is equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor.
MM is equivalent to discharging a 200 pF capacitor through a 0.75 H series inductor.
9
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
VALUE
UNIT
27
K/W
in free air
10 CHARACTERISTICS
VDDA = 5 V; VDDD3 = 3.3 V; VDDD5 = 5 V; VRFREF = 1.2 V; Tamb = 25 C; RF inputs A to D are referred to pin OPUREF;
f0(RF) = 50 MHz; Rext = 12.1 k (pin REXT); RF output max. load on pins RFP and RFN is ZO(max): 5 pF parallel with
10 k to VSS; unless otherwise specified.
SYMBOL
Tamb
PARAMETER
CONDITIONS
MIN.
ambient
temperature
TYP.
MAX.
UNIT
40
+85
4.5
5.0
5.5
Supplies
VDDA1, VDDA2, analog supply
VDDA3, VDDA4 voltage
VDDD3
3 V digital supply
voltage
2.7
3.3
5.5
VDDD5
5 V digital supply
voltage
4.5
5.0
5.5
VI(logic)
logic input
compatibility
2.7
3.3
5.5
VPOR
Power-on reset
voltage
3.3
3.5
3.7
IDD
supply current
98
120
mA
STANDBY mode
mA
2003 Sep 03
note 1
30
Philips Semiconductors
Product specification
PARAMETER
CONDITIONS
TZA1038HW
MIN.
TYP.
MAX.
UNIT
0.5VDDA
VDDA 2
G1 = 0 dB
600
mV
G1 = 6 dB
300
mV
G1 = 12 dB
150
mV
1.8
0.5VDDA
VDDA 1.4
Vi(OPUREF)
input voltage on
pin OPUREF
note 2
Vi(RF)(FS)
input voltage on
pins A to D for
full-scale at output
referred to VOPUREF
VI(DC)
DC component of
input voltage
VRFOFFSL,
VRFOFFSR
DC offset
compensation
voltage
G1 = 0 dB
350
450
550
mV
G1 = 6 dB
175
225
275
mV
G1 = 12 dB
90
120
160
mV
DC offset
compensation
voltage resolution
G1 = 0 dB
7.1
mV
G1 = 6 dB
3.6
mV
G1 = 12 dB
1.9
mV
VRFOFFSL,
VRFOFFSR
II(bias)
Zi
input impedance of
pins A to D
100
ARF(min)
minimum gain
G1 = 0 dB, G2 = 6 dB,
G3 = 0 dB; note 3
dB
ARF(max)
maximum gain
G1 = 12 dB,
G2 = 24 dB,
G3 = 13 dB; note 3
48
49
52
dB
TCgain
gain temperature
coefficient
0.025
dB/C
G1
first RF amplifier
stage gain step size
dB
G2
second RF amplifier
stage gain step size
dB
DC input voltage
1.3
VDDA 1.0
VI(SUM)(dif)
differential input
voltage
GRFSUM = 6 dB
1800
mV
GRFSUM = 0 dB
1400
mV
GRFSUM = 6 dB
700
mV
GRFSUM = 12 dB
350
mV
GRFSUM = 18 dB
175
mV
II(bias)
ZI
input impedance
2003 Sep 03
note 4
31
50
600
Philips Semiconductors
Product specification
VRFOFFSS
PARAMETER
DC offset
compensation
voltage
DC offset
compensation
voltage resolution
CONDITIONS
TZA1038HW
MIN.
TYP.
MAX.
UNIT
GRFSUM = 6 dB
1700
mV
GRFSUM = 0 dB
850
mV
GRFSUM = 6 dB
425
mV
GRFSUM = 12 dB
210
mV
GRFSUM = 18 dB
105
mV
GRFSUM = 6 dB
27
mV
GRFSUM = 0 dB
13.5
mV
GRFSUM = 6 dB
6.7
mV
GRFSUM = 12 dB
3.4
mV
GRFSUM = 18 dB
1.7
mV
dB
ARFSUM(min)
minimum gain
notes 3 and 5
notes 3 and 5
ARFSUM(max)
maximum gain
29
31
33
dB
TCgain
gain temperature
coefficient
0.02
dB/C
GRFSUM
RFSUM amplifier
stage gain step size
7.5
dB
A = 12 + 24 + 6 dB;
RFEQEN = 0
mV
A = 12 + 6 + 6 dB;
RFEQEN = 0
mV
A = 12 + 6 + 6 dB;
RFEQEN = 1;
RFKEQ = 0
mV
A = 12 + 6 + 6 dB;
RFEQEN = 1;
RFKEQ = 1
11
mV
12
mV
60
mV
100
mV
differential
RF output noise
voltage (RMS
value)
diode input:
BWRF = 127;
f = 0 to 500 MHz;
RFNFEN = 1; note 6
SUM input:
BWRF = 127;
f = 0 to 500 MHz;
RFNFEN = 1; note 6
A = 12 + 6 + 6 dB;
RFEQEN = 0
VOO(ref)
2003 Sep 03
DC output offset
VI(RF) = 0 V;
voltage with respect DVDOFFS = 0; note 7
to VRFREF
VRFREF = 1.2 V
32
Philips Semiconductors
Product specification
PARAMETER
CONDITIONS
TZA1038HW
MIN.
TYP.
MAX.
UNIT
Vo(dif)(p-p)
differential output
voltage on
pins RFP and RFN
(peak-to-peak
value)
1.4
VO(RF)(DC)
DC output voltage
on pins RFP and
RFN
0.35
VDDA 1.9
Vi(RFREF)(CM)
input reference
voltage for common
mode output on
pin RFREF
0.8
1.2
2.1
Ro
output impedance
on pins RFP and
RFN
100
G3
third RF amplifier
note 8
stage gain step size
0.85
1.3
dB
||h1| |he||
1.5
dB
||h1| |hn||
noise filter
amplitude error
flatness between
f0 and 100 kHz
1.5
dB
BRF(3dB)
3 dB bandwidth of
RFP and RFN
signal path
RFEQEN = 0;
RFNFEN = 0
200
300
MHz
f0(RF)
BWRF = 0
12.0
14.5
MHz
BWRF = 127
100
145
182
MHz
f0(RF)
BWRF = 1; note 9
0.73
1.06
1.32
MHz
td(RF)
flatness delay in
RF data path
equalizer off;
f = 0 to 150 MHz
0.1
ns
equalizer on;
f = 0 to 100 MHz;
BWRF = 127
0.5
ns
BWRF = 0
3.5
ns
BWRF = 127
0.6
ns
s
tst(G3)
amplifier G3 gain
note 10
change settling time
0.5
1.125
1.25
1.375
1.18
1.31
1.44
2003 Sep 03
33
Philips Semiconductors
Product specification
PARAMETER
CONDITIONS
TZA1038HW
MIN.
TYP.
MAX.
UNIT
3.2
4.0
4.8
RFKEQ = 1
4.8
6.0
7.2
700
mV
500
mv
0.2
VDD 2.5
SERVOOS = 0
15
mV
SERVOOS = 1
45
mV
4.25
5.75
mV
LF servo path
VI(LF)
VO(LF)
servo output
voltage
VLFOFFS(CM)
common mode
offset
compensation
voltage
VLFOFFS
DC offset voltage
resolution
SERVOOS = 0
SERVOOS = 1
13
15
17
mV
VROFFS,
VCOFFS
offset voltage
compensation
SERVOOS = 0
20
mV
SERVOOS = 1
60
mV
VROFFS,
VCOFFS
DC offset voltage
resolution
SERVOOS = 0
1.0
1.3
1.6
mV
SERVOOS = 1
3.0
4.8
mV
VI(FTCREF)
1.25
2.75
VO(FTC)(p-p)
2.0
IO(LF)
output current
12
12
IFOFFS
310
390
480
nA
IFOFFS
compensation
current resolution
12
nA
I(FS)(DPD)
DOCEN = 0
17
20
23
DOCEN = 1
4.5
6.6
f = 3 MHz;
Vi = 100 mV (p-p)
Ith(DOC)
DOCEN threshold
current
SUM value
2.5
3.5
IREFRAD(CM)
common mode DC
current in DPD
mode
DOCEN = 0
3.5
2003 Sep 03
34
Philips Semiconductors
Product specification
PARAMETER
CONDITIONS
TZA1038HW
MIN.
TYP.
MAX.
UNIT
RLFC
LF path input
transresistance
GLFC = 0 dB
10.5
14
16.5
RLFR
CD satellite path
input
transresistance
GLFR = 0 dB; = 1
11
15
18
RLFPP
DVD push-pull
transresistance
GLFR = 0 dB; = 1
23
30
36
RFTC
note 11
510
650
800
GLFC
15.5
+8.5
dB
GLFC
gain resolution
dB
GLFR
15.5
+8.5
dB
GLFR
gain resolution
dB
BLF(3dB)
3 dB bandwidth of
LF path
60
75
100
kHz
BFTC
FTC bandwidth
FTCHBW = 0
600
kHz
FTCHBW = 1; note 12
1200
kHz
LRM
=1
+7
CPM
channel pair
matching
+2
%FS
+7
%FS
dynamic radial
offset
compensation
factor
0.6
1.35
dynamic radial
offset
compensation
factor resolution
0.05
0.145
0.155
0.17
0.175
0.185
0.2
VO(laser)
VDDL 0.5
Vprot
3.6
3.8
4.0
2003 Sep 03
35
Philips Semiconductors
Product specification
PARAMETER
CONDITIONS
TZA1038HW
MIN.
TYP.
MAX.
UNIT
Vprot
200
mV
II(mon)
200
nA
Io(laser)(max)
maximum current
output to laser
120
mA
ton(laser)
ms
FTC comparator
VI(CM)
common mode
input voltage
2.5
VOL
LOW-level output
voltage
0.5
VOH
HIGH-level output
voltage
VDDD3 0.5
VDDD3
VIO
10
mV
ILI
input leakage
current
100
nA
AV
voltage gain
200
V/mV
tr, tf
CL = 15 pF
250
ns
tres
response time
200
ns
HIGH-level input
voltage
0.7VDDD3
VIL
LOW-level input
voltage
0.3VDDD3
IIH
HIGH-level input
current on pin TM
input incorporates
internal pull-down
resistor
100
II
input current
100
nA
tsu(strt)
ns
tsu(D)
ns
th(D)
20
ns
tclk(H)
10
ns
tclk(L)
10
ns
Tclk
clock period
30
ns
tsu(load)
30
ns
tload(H)
10
ns
Notes
1. Level follows the applied supply voltage at pin VDDD3.
2003 Sep 03
36
Philips Semiconductors
Product specification
TZA1038HW
2. This range for the servo path is designed to be larger than for the data path so that the servo path can handle
out-of-focus situations.
( G1 + G2 + G3 )
----------------------------------------20
3. A = 10
( Gsum + G3 )
----------------------------------20
[dB] or A = 10
4. Input impedance depends on gain setting. Highest gain has lowest input impedance.
5. The gain of the RF sum channel, when programmed to 6 dB, will be increased when the supply voltage is below
4.8 V and at an ambient temperature of 40 C.
6. Noise figures depend on gain and filter settings, examples given here.
V RFP + V RFN
7. VOO(ref) = --------------------------------- V RFREF
2
8. Integral range for G3 from minimum to maximum gain is 13 dB (typical).
9. At the transition BWRF = 63 to 64 the f may be between 0.2 and +1.7 MHz
10. Faster for small steps.
11. Overall gain from input to output is determined by RFTC/RLFR or RFTC/RLFPP, depending on radial tracking mode,
three-beam push-pull (CD) or DVD push-pull. Gain FTC scales with GFRR. When DPD tracking is selected the FTC
gain is fixed.
12. High FTC bandwidth is achieved when IS1 and IS2 > 1.5 A.
13. Channel pair matching is defined in % of full scale (FS) output at half of the full scale level.
SICL
t clk(L)
t clk(H)
t su(strt)
t h(D)
T clk
t su(D)
SIDA
D0
A3
SILD
t su(load)
MGW495
2003 Sep 03
37
Philips Semiconductors
Product specification
TZA1038HW
11 APPLICATION INFORMATION
11.1.2
11.1
Signal relationships
V Ix A LFC
I Ox = -------------------------14 k
DATA PATH
If bit RFSUM = 0
V I(F) A LFR
I S2 = ----------------------------- (in CD three-beam push-pull mode)
15 k
or:
If bit RFSUM = 1
Where:
Where:
A1, A2, A3 and ARFSUM are programmed gain values
2003 Sep 03
SERVO PATH
38
Philips Semiconductors
Product specification
TZA1038HW
Programming examples
DVD; LOW
GAIN
DVD; HIGH
GAIN(1)
CD; HIGH
GAIN(1)
MODE SETTINGS
005
045
043
01D
01D
007
800
800
800
set K2 mode
800
800
800
820
410
410
000
000
000
338
778
778
200
200
000
000
000
000
000
000
000
not used
10
000
000
000
not used
11
000
000
000
12
000
000
000
13
000
000
000
14
335
335
335
15
022
022
000
Note
1. Use RFSUM input.
2003 Sep 03
39
Philips Semiconductors
Product specification
Energy saving
11.4.2
11.4.3
DC LEVEL IN RF PATH
Once the gains in the servo path have been set, the
average DC level at the inputs can be calculated from the
value of the servo output signals:
I Ox 14 k
V I = -----------------------------------------------------------------------A LFC ( V LFOFFS + V COFFSx )
11.4.4
TZA1038HW
40
Philips Semiconductors
Product specification
TZA1038HW
12 PACKAGE OUTLINE
HTQFP48: plastic thermal enhanced thin quad flat package; 48 leads;
body 7 x 7 x 1 mm; exposed die pad
SOT545-2
c
y
Dh
36
25
37
A
24
ZE
e
E HE
Eh
(A 3)
A A2 A1
w M
bp
Lp
L
pin 1 index
13
48
detail X
1
12
ZD
w M
bp
v M A
e
D
HD
v M B
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT max.
mm
1.2
A1
A2
A3
bp
D(1)
Dh
E(1)
Eh
HD
HE
Lp
0.15
0.05
1.05
0.95
0.25
0.27
0.17
0.20
0.09
7.1
6.9
4.6
4.4
7.1
6.9
4.6
4.4
0.5
9.1
8.9
9.1
8.9
0.75
0.45
0.2
0.08
0.08
ZD(1) ZE(1)
0.89
0.61
7
0
0.89
0.61
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
ISSUE DATE
99-08-04
03-04-07
SOT545-2
2003 Sep 03
EUROPEAN
PROJECTION
41
Philips Semiconductors
Product specification
13 SOLDERING
13.1
TZA1038HW
Reflow soldering
13.4
Wave soldering
2003 Sep 03
Manual soldering
42
Philips Semiconductors
Product specification
TZA1038HW
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA
not suitable
suitable(4)
not
suitable
REFLOW(2)
suitable
suitable
suitable
not
recommended(5)(6)
suitable
not
recommended(7)
suitable
PMFP(8)
not suitable
not suitable
Notes
1. For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods.
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
8. Hot bar or manual soldering is suitable for PMFP packages.
2003 Sep 03
43
Philips Semiconductors
Product specification
TZA1038HW
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
Development
DEFINITION
Objective data
II
III
Product data
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Production
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
15 DEFINITIONS
16 DISCLAIMERS
2003 Sep 03
44
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
753503/01/pp45
Sep 03