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S681S684
Viktor A. Vikulov
Radiophysics Department, Kiev Shevchenko University, 64 Volodimirskaya, 01033 Kiev, Ukraine
A new model is proposed for obtaining the density of interface traps (Dit ) located at the Si-SiO2
interface in Metal-Oxide-Semiconductor (MOS) devices. The new model utilizes both the high
frequency capacitance-voltage (HF C-V) measurement and the corrected photo HF C-V method
suggested in this work for calculating the Dit spectrum as a function of Si forbidden energy band
gap. The degree of distortion of the surface band bending caused by photonic illumination was
obtained from the current-voltage (I-V) data measured with and without photonic illumination.
Results exhibit the identical distribution of Dit within the semiconductor band gap, consistent with
the one obtained by the conventional quasi-static C-V method. The newly proposed technique
can be useful for the determination of Dit distribution in MOS devices for which the conventional
quasi-static C-V technique could not be applied due to the leakage current.
PACS numbers: 73.50.Pz
Keywords: C-V, Photo I-V, Interface trap density, Dit
I. INTRODUCTION
Interface traps at the Si-SiO2 interface in MOS devices have been extensively investigated for improving
device reliability. For example, mobility degradation and
threshold voltage shifts are known to be caused by electron trapping at the Si-SiO2 interface. Consequently,
understanding and control of these defects have been at
the core of research among semiconductor interface specialists, and represent a critical step in the fabrication of
integrated circuits.
Several measurement techniques, including highfrequency (HF) C-V, quasi-static (QS) C-V and charge
pumping, have been used to characterize the Si-SiO2 interface in the form of Dit in MOS devices [13]. A comparison of the HF and QS C-V data, for example, can be
easily converted to the Dit spectrum in MOS capacitor.
In addition, the charge pumping technique employed in
metal-oxide-semiconductor field effect transistors (MOSFETs) is used for calculating the mid-bandgap interface
trap density. Both techniques are easy to implement,
and the data obtained are believed to be reliable. However, it has been also known that the direct application of
these techniques to the MOS devices with thin gate oxide, as well as high-k gate dielectric, is extremely difficult
since the leakage currents through thin SiO2 prohibit the
correct calculation of interface properties. For instance,
E-mail:
yhroh@skku.ac.kr
the properties of the Si-SiO2 interface could not be clarified by the conventional HF/QS C-V technique since the
leakage current will be added to the displacement current which is essential to derive the density of interface
traps.
Recently, several groups [46] proposed measurement
techniques in which optical illumination was employed
for characterizing the Si-SiO2 interface. For example,
Kim et al. [6] was able to calculate the Dit value by analyzing the data of photoresponsive C-V and I-V. However, the full spectrum of Dit as a function of Si forbidden energy bandgap has not been reported. In this work,
we investigated the feasibility of a photonic illumination
technique to measure the density of interface traps as a
function of forbidden energy bandgap of Si for which the
conventional QS C-V technique could not be applied due
to the leakage current.
II. EXPERIMENTAL
The samples were fabricated on 4-inch p-type (100) Si
wafers with the doping concentration of 1 1015 cm3 .
After the standard RCA cleaning, a native oxide layer
was removed by immersing the wafers to the buffered HF
solution for 10 seconds. The oxide layer was thermally
grown to the thickness of 3-13 nm using a rapid thermal
processor (RTP). The semi-transparent aluminum electrodes were deposited using a thermal evaporator, and
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C
(1 + 2f CRs )
(1)
where f and Rs are applied ac frequency and series resistance, respectively. The current-voltage properties
with/without photonic illumination was measured using a HP4145B semiconductor parameter analyzer. The
quasi-static C-V curves were measured using a HP4140B
pA-meter. All measurements were performed at room
temperature.
2kT 0 s
q
pno
Qs = sign(s )
F(
s ,
)
(2)
qLD
kT
nn0
q
pno
pn0 Ef 1
s ,
) = [es s + 1 +
e kT A] 2 (3)
kT
nn0
nn0
Characterization of Interface Traps in MOS Devices Using Photonic Young-Wook Lee et al.
Vg = (s V ) + Vox
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(5)
where V is the reduction of a band bending due to photonic illumination. Using Eqs. (4) and (5), the currentvoltage characteristic for the forward bias voltage is given
by
IF = Is exp(
qs
)
kT
(6)
and
q(s V )
)
(7)
kT
for without and with photonic illumination, respectively.
Therefore s and (s - V ) can be obtained from the
derivation of Eqs. (6) and (7), respectively:
Z
kT Vg dIF 1
s =
dv
(8)
q Vg0 dVg IF
IF = Is exp(
and
s V =
kT
q
Vg
Vg0
dIF 1
dv
dVg IF
(9)
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IV. CONCLUSIONS
We suggested the new experimental method for the extraction of the Dit spectrum based on the combination of
photo HF C-V and current-voltage measurements. Results exhibit the identical behavior of Dit distribution
within the Si forbidden energy bandgap as compared to
that obtained by the conventional HF/QS C-V method.
Since the new technique is insensitive to the formation of
direct tunneling current, it can be useful for determining the interface traps density at the Si-SiO2 interface
in MOS devices for which the conventional HF/QS C-V
technique could not be applied due to the leakage current.
dVg
) 1] Cs (s )
ds
(10)
and
Cit = qADit (s )
(11)
ACKNOWLEDGMENTS
This work was supported by grant No. R05-2000-00000263-0 from the Korea Science and Engineering Foundation.
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