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Table of Contents

1) Introduction
2) Getting started
a. Parts List
b. Breadboard tutorial
c. Connecting the Breadboard to the myDAQ
3) Experiment 1: Filters
a. Task 1.1: Passive Low Pass Filter
b. Task 1.2: Inverting Active High Pass Filter
c. Task 1.3: Inverting Band Pass Filter
d. Task 1.4: Second Order Low Pass Filter
4) Experiment 2: R-2R Resistive DAC
5) Experiment 3: Triangle Wave Generator
a. Task 3.1: Basic Comparator Circuit
b. Task 3.2: Basic Integrator Circuit
c. Task 3.3: Triangle Wave Generator
6) Experiment 4: PWM Generator
a. Task 4.1: Pulse-Width Modulator
7) Experiment 5: Light Detector Circuit
8) Experiment 6: Audio
a. Task 6.1: Microphone Pre-Amplifier
b. Task 6.2: Measuring the Performance of a Loudspeaker
9) Experiment 7: Finite State Machine
Appendix: ICs Pin Configurations

Introduction:
This supplement to the myDAQ tool was created in an effort to introduce you to
electronics theory and circuits as well as provide a practical method of getting to know
the capabilities of the myDAQ tool. The experiments include all you need to study, build,
and test some preselected circuits that typify some of the basic elements of electronics
used in many applications from cell phones to MP3 players to automotive control
systems.

About TI
Texas Instruments Incorporated (TI) is a global semiconductor design and
manufacturing company that develops analog ICs and embedded processors.
By employing the world's brightest minds, TI creates innovations that shape the future of
technology. TI is helping more than 100,000 customers transform the future, today.
Learn more at www.ti.com.

Getting Started
Parts List

Operational Amplifier TL072


Comparator
LM311P
Transistor
2N3904
LEDs
Capacitors
Buzzer
Wire Kit
Potentiometers

TI myParts Kit with Analog components


The myParts Kit from the TI University Program
has all the parts you need to get started. To learn
more, visit ti.com/mypartskit.

Breadboard Tutorial
This kit comes with two breadboards (part number BB830T) from BPS. They will be
used to connect the circuitry together as well connect to the myDAQ that will supply
power for the components and also the interconnections required to study the
waveforms and test the circuits. The reasoning behind having two breadboards is that
some experiments feed into one another to create a more complex circuit. By having
two breadboards you can keep a tested circuit intact, build and test the second circuit
on the second breadboard, and then connect the two together for the final experiments.
Internal Connections

The BB830T breadboard has 63 vertical columns on top and 63 columns below. Each
column has 5 connected holes each (the green lines). This is the circuit area. There are
also 4 rails (or distribution strips) for power and ground running horizontally (the red
and blue lines). A distribution strip can be used to carry a signal if it is not needed for
power or ground. Below is an example of how to assemble and connect a circuit to the
breadboard.
We start with the schematic, in this case an integrator circuit used later.

The operational amplifier used in this circuit is a Texas Instruments component, part
number TL072 (http://www.ti.com/product/tl072). It has a pinout and equivalent circuit
shown below. Please ignore the offset pins as this function is not used throughout the
experiments.

This is how it should be assembled on the breadboard.

Connecting the Breadboard to the myDAQ


The connections are made using the screw terminal connector that comes with the
myDAQ tool. The table below shows the pinout for the device. Each experiment will
walk through what connection points have to be made and where they will connect on
the breadboard.

Experiment 1: Filters
Introduction: Electronic filters are used to modify, emphasize, or reject certain ranges
of the frequency content of a signal by altering the gain and phase response of a
specific frequency band. Filters are a fundamental component of many electronic
circuits in a variety of applications, including power electronics, communications, and
audio systems.
This lab will demonstrate the theory and operation of several types of first-order filters,
including low-pass, high-pass, and band-pass filters. Passive and active filters will also
be discussed, as well as a brief introduction to higher order filtering.

Task 1.1: Passive Low-Pass Filter


This section will address the theory and operation of a simple first-order, passive, lowpass filter. Low-pass filters preserve the low frequency content of a signal while
rejecting the high frequency content. The operation of the filter will be demonstrated in
both the time and frequency domain.
Schematic:

Figure 1.1.1: Passive Low Pass Filter

Equations: The transfer function of Figure 1.1.1 can be derived from a simple voltage
division between the stimulus and ground.

Equation 1: Transfer Function of a Passive Low Pass Filter

Notice that when the frequency is small, the gain of the circuit is approximately one.
As the frequency becomes high, the gain of the circuit goes to zero. Alternatively,
consider that when the frequency of the input signal is low, the capacitor operates like
an open circuit, and Vout = Vin. When the frequency is high, the capacitor operates like a
short circuit, and Vout approaches zero.
At the cutoff frequency, fc, the gain of the signal is down 3 dB, equivalent to a gain of
0.708. The cutoff frequency is given by:
Equation 2: Cutoff frequency of a first order filter

Therefore the theoretical cutoff frequency of the circuit show in Figure 1.1.1 is
1026 Hz. The actual -3 dB point observed in the following Bode plots may fall above or
below this value, depending on the accuracy of the components used.
Simulation
1. In order to simulate the circuit, we need to construct the virtual connections to
myDAQ according to Figure 1.1.2:

Figure 1.1.2: Virtual Connections to myDAQ

2. Double-click the NI ELVISmx Bode Analyzer to open its Front Panel and
configure the following settings:
Start frequency
100 Hz
Stop frequency
20 kHz
Steps
10
Mapping
Logarithmic
Device
Simulate NI myDAQ
9

3. Select SimulateRun to start the simulation. The gain and phase responses will
be plotted (Figure 1.1.3).
4. Stop the simulation and enable the cursors of the ELVISmx Bode Analyzer by
going to the Cursors Settings section and selecting Cursor (Sim).
5. Drag the cursor and place it at ~-3 dB (-2.90 dB is acceptable). The cutoff
frequency is ~1000 Hz which matches our theoretical calculation.

Figure 1.1.3 Simulated Data

Laboratory
Materials:
Components
Resistor
Capacitor
Wires

Value
33 k
4.7 nF

Code
Orange | Orange | Orange
472

10

Circuit Configuration:

Figure 1.1.4 Breadboard Connection

Measurement:
1. Connect NI myDAQ (with the corresponding breadboard) to your computer.
2. Open the ELVISmx Bode Analyzer and select your myDAQ in the Device dropdown menu.
3. Click the Run button of the Bode Analyzer. The gain and phase plots will be very
close to the simulated results (Figure 1.1.5).
4. Use Cursor (Real) to measure the cutoff frequency of the real response. In
Figure 1.1.5 the result is 1165.91 Hz at -3.12 dB.

11

Figure 1.1.5 Real Data

Notice that at the cutoff frequency, the signal gain is down by approximately 3 dB. To
show the effect of the filter in the time domain, apply a 102 Hz, 1 Vpp sine wave to the
input of the circuit using the NI ELVISmx Function Generator-XLV8, and view the
response on the oscilloscope.

12

Figure 1.1.6 NI ELVISmx Function Generator

Figure 1.1.7 Scope view with 102 Hz input source

13

Note: Component values for this lab have been selected arbitrarily to accommodate the
limitations of the myDAQ bode analyzer. Other component values and cutoff
frequencies can be accommodated by performing the following exercises at one decade
below the cutoff frequency, at the cutoff frequency, and one decade above the cutoff
frequency.
Notice that the output waveform is approximately 989 mVpp, close to unity gain.
Now apply a 1026 Hz, 1 Vpp sine wave to the input.

Figure 1.1.8 Scope view with 1026 Hz input source

Notice that the output signal is approximately 743 mVpp, or approximately 3 dB down
from the input. Finally, apply a 10.26 kHz, 1-Vpp sine wave to the input.

14

Figure 1.1.9 Scope view with 10.26 kHz input source

Notice that the output signal has been reduced to approximately 10% of the magnitude
of the input signal.
Additional Schematics:

Figure 1.1.10: Passive High Pass Filter

Task 1.2: Inverting Active High Pass Filter


Introduction: The passive filters demonstrated in Task X.1 are valued for their ease of
design and implementation. Passive filters can be used to easily introduce additional
poles into a circuit with a simple calculation, but passive filters also have disadvantages.
First, the precision of the filter is inherently related to the tolerance of the components.
Additionally, passive filters often require large resistor and capacitor values, which can
result in high output impedance.
15

Active filters can reduce the output impedance of a filter, as well as apply gain to a
signal and buffer the filter from the rest of the circuit. Most important, active filters are
the fundamental building block of higher order filters. This section will demonstrate the
operation of an inverting, first-order, high-pass filter.
For first-order, active filters, the cutoff frequency is given by Equation 2, as before, and
the gain is given by the ratio (R1 / R2).
Schematic:

Figure 1.2.1: Inverting Active High Pass Filter

Simulation
1. In order to simulate the circuit, we need to construct the virtual connections to
myDAQ according to Figure 1.2.2:

Figure 1.2.2: Virtual Connections to myDAQ

16

2. Double-click the NI ELVISmx Bode Analyzer to open its Front Panel and
configure the following settings:
Start frequency
100 Hz
Stop frequency
20 kHz
Steps
10
Mapping
Logarithmic
Device
Simulate NI myDAQ
3. Select SimulateRun to start the simulation. The gain and phase responses will
be plotted (Figure 1.2.3).
4. Stop the simulation and enable the cursors of the ELVISmx Bode Analyzer by
going to the Cursors Settings section and selecting Cursor (Sim).
5. Drag the cursor and place it at ~-3 dB (-3.12 dB is acceptable). The cutoff
frequency is ~1000 Hz which matches our theoretical calculation.

Figure 1.2.3 Simulated Data

17

Laboratory
Materials:
Components
Op-amp
Resistor(x2)
Capacitor
Wires

Value
TL072CP
33 k
4.7 nF

Code
8-DIP
Orange Orange Orange
472

Circuit Configuration:

Figure 1.2.4 Breadboard Connection

Measurement:
1. Connect NI myDAQ (with the corresponding breadboard) to your computer.
2. Open the ELVISmx Bode Analyzer and select your myDAQ in the Device dropdown menu.
3. Click the Run button of the Bode Analyzer. The gain and phase plots will be very
close to the simulated results (Figure 1.2.5).
4. Use Cursor (Real) to measure the cutoff frequency of the real response. In
Figure 1.2.5 the result is 1000 Hz at -3.14 dB.

18

Figure 1.2.5 Real Data

Note:
The reason why there is a kind of step-up for the phase plot in the Real Data is when
the phase reaches -180, the algorithm inside the Bode Analyzer automatically add 360
to make it a positive value.
Additional Questions:
Now apply input signals of 102 Hz, 1026 Hz, and 10.26 kHz and view the output on the
oscilloscope, as in Task 1.1. What happens?

19

Additional Schematics:

Figure 1.2.6: Non-Inverting Active High Pass Filter

Figure 1.2.7: Inverting Active Low Pass Filter

Task 1.3: Inverting Band Pass Filter


Introduction: First-order bandpass and band-stop filters can be designed easily by
implementing a high-pass and low-pass filter simultaneously. This section demonstrates
the operation of an inverting, active bandpass filter.
Schematic:

20

Figure 1.3.1: Inverting Active Bandpass Filter

Simulation
1. In order to simulate the circuit, we need to construct the virtual connections to
myDAQ according to Figure 1.3.2:

Figure 1.3.2: Virtual Connections to myDAQ

2. Double-click the NI ELVISmx Bode Analyzer to open its Front Panel and
configure the following settings:
Start frequency
100 Hz
Stop frequency
20 kHz
Steps
15
Mapping
Logarithmic
Device
Simulate NI myDAQ
21

3. Select SimulateRun to start the simulation. The gain and phase responses will
be plotted (Figure 1.3.3).
4. Stop the simulation and enable the cursors of the ELVISmx Bode Analyzer by
going to the Cursors Settings section and selecting Cursor (Sim).
5. Drag the cursor and place it at ~-6 dB (-6.02 dB is acceptable). The cutoff
frequency is ~1000 Hz which matches our theoretical calculation.

Figure 1.3.3 Simulated Data

Laboratory
Materials:
Components
Op-amp
Resistor(x2)
Capacitor(x2)
Wires

Value
TL072CP
33 k
4.7 nF

Code
8-DIP
Orange Orange Orange
472

22

Circuit Configuration:

Figure 1.3.4 Breadboard Connection

Measurement:
1. Connect NI myDAQ (with the corresponding breadboard) to your computer.
2. Open the ELVISmx Bode Analyzer and select your myDAQ in the Device dropdown menu.
3. Click the Run button of the Bode Analyzer. The gain and phase plots will be very
close to the simulated results (Figure 1.3.5).
4. Use Cursor (Real) to measure the cutoff frequency of the real response. In
Figure 1.3.5 the result is 1000 Hz at -6.17 dB.

23

Figure 1.3.5 Real Data

Notice that this is simply a high-pass filter and a low-pass filter, both with cutoff
frequencies of 1026Hz. The gain of the circuit is again given by the ratio (R1/R2).
Additional Question:
How can Figure 1.3.1 be modified to implement a band-stop filter?

Task 1.4: Second-Order, Low-Pass Filter


Introduction: This section will introduce second order filters and demonstrate the
operation of a Sallen-Key second-order, low-pass filter.
There are many common filter topologies used to realize high-order filtering, such as
Butterworth, Bessel, and Chebyschev. The Sallen-Key circuit is valued for its simplicity
and gain accuracy in realizing various second-order transfer functions. In designing
higher order filters, various tradeoffs determine the ideal filter topology for achieving
optimum performance in a given application. A more complete discussion of secondorder filtering and the performance characteristics of various filter topologies can be
found at http://focus.ti.com/lit/an/sloa049b/sloa049b.pdf.
24

Schematic:

Figure 1.4.1: Sallen-Key, Second-Order Low-Pass Filter

Simulation
1. In order to simulate the circuit, we need to construct the virtual connections to
myDAQ according to Figure 1.4.2:

Figure 1.4.2: Virtual Connections to myDAQ

2. Double-click the NI ELVISmx Bode Analyzer to open its Front Panel and
configure the following settings:
Start frequency
100 Hz
Stop frequency
20 kHz
Steps
30
Mapping
Logarithmic
Device
Simulate NI myDAQ

25

3. Select SimulateRun to start the simulation. The gain and phase responses will
be plotted (Figure 1.4.3).
4. Stop the simulation and enable the cursors of the ELVISmx Bode Analyzer by
going to the Cursors Settings section and selecting Cursor (Sim).
5. Drag the cursor and place it at ~-6 dB (-6.17 dB is acceptable). The cutoff
frequency is ~1079.78 Hz which matches our theoretical calculation.

Figure 1.4.3 Simulated Data

Laboratory
Materials:
Components
Op-amp
Resistor(x2)
Capacitor(x2)
Wires

Value
TL072CP
33 k
4.7 nF

Code
8-DIP
Orange Orange Orange
472

26

Circuit Configuration:

Figure 1.4.4 Breadboard Connection

Measurement:
1. Connect NI myDAQ (with the corresponding breadboard) to your computer.
2. Open the ELVISmx Bode Analyzer and select your myDAQ in the Device dropdown menu.
3. Click the Run button of the Bode Analyzer. The gain and phase plots will be very
close to the simulated results (Figure 1.4.5).
4. Use Cursor (Real) to measure the cutoff frequency of the real response. In
Figure 1.4.5 the result is 1165.91 Hz at -6.33 dB.

27

Figure 1.4.5 Real Data

Note:
The filter shown in Figure 1.4.1 has a cutoff frequency of 1061 Hz according to Equation
3. Notice that at the cutoff frequency, the signal gain is down 6 dB rather than only 3 dB,
as in the first order case. Also note that the second order filter results in a 180 phase
shift, compared to 90 in the first order filters.

Equation 3: Cutoff frequency of a second-order SallenKey topology filter

Preview: Audio crossovers are an important class of filters used to direct different
frequency components of a signal to different speakers in an audio system. High
frequency content is routed to speakers optimized for high frequency content (tweeters),
while low frequency content is routed to speakers optimized for low frequency content
(woofers).

28

Subsequent experiments will characterize the frequency content of common audio


signals and demonstrate the effect of filters on audio signals.

29

Experiment 2: R-2R Resistive DAC


Introduction: This lab will create an 8-bit, digital-to-analog converter (DAC). To do this,
select the DigOut virtual instrument (VI) on the NI ELVISmx Instrument Launcher.
The eight digital I/O pins will be set as outputs and used to bias an R-2R resistive
network. This will in turn create an analog voltage that will be fed through a voltage
follower op amp topology to supply current to a load. This is commonly done in practice
to remove loading effects on a signal or power supply rail.

Figure 2.1: NI Instrument Launcher

Background:
The R-2R resistive DAC will work with any two sets of resistors with as close to an R-2R
ratio as possible. First Nodal Analysis will be used on simpler 2-bit DAC to show the
math behind how a resistive DAC works.

30

Figure 2.2: The 2-Bit R-2R Resistive DAC

To perform nodal analysis, the sum of the current going into and out of each node will
be set equal to each other. Mathematically this can be done by labeling each node with
a voltage reference label; then the current terms work out to be the change in voltage
divided by resistance between each node. The output voltage will be solved for in terms
of D0 and D1, which is shown below.
Node VA:

Substitute

Node VO:

in equation on left

The process would repeat for however many bits used. If you used a 4-bit DAC with bits
D0 to D3 left to right, their corresponding weights would be 1/16, 1/8, 1/4 and 1/2. If the
digital level for the I/O bits were set to 3.3 volts, the four possible output values for the
four possible inputs would be as follows.
Table 2.1: 2-Bit DAC Output Values
Decimal
0
1
2
3

Binary
00
01
10
11

Output Voltage
0.000
0.825
1.650
2.475

This can also be shown graphically by the following.

31

Figure 2.3: Ideal 2-Bit DAC Performance

You may have noticed that the DAC cannot output the full scale range of voltages up to
the level of the digital I/Os. The maximum output voltages of these types of resistive
DACs are as follows.

Besides full-scale voltage, another very important characteristic with dealing with DACs
is resolution. The resolution is the smallest increment in voltage the DAC is capable of
outputting. Another way to say this is the resolution is the change in voltage due to
asserting the least significant bit (LSB). This can be defined by:

where

is the supply level of the digital I/Os and N is the number of bits the DAC has.

As mentioned before the converter that will be built in this lab will be an 4-bit converter;
the resolution will be 0.20625V (given
is 3.3V) or 0.3125V (given
is 5V). Below
is the schematic of the 4-bit DAC that will be used for this lab. The resistors chosen are
10k-ohms and 20k-ohms.
Note:
The closer the resistor values are to being an R-2R ratio the more accurate the DAC will
be. The
in the myDAQ template is 5V but 3.3V in real device!

32

Simulation

Figure 2.4: Schematic for 4-Bit DAC

The ground symbol on the lower left corner of the schematic will need to be connected
to AGND and DGND pins on the myDAQ. The four digital I/Os on the myDAQ will each
be connected to their corresponding D0 through D3 pins on the schematic.
With 4 bits there are 24 or 16 possible output voltage settings. Once the resistive
network DAC is set up, the following buffer op amp will be built at the output to reduce
the effects of output loading. This means that when a load is attached to the DAC, the
output will not vary as much.

Figure 2.5: Buffer Operational Amplifier

With this op amp topology the output voltage will remain the same as the input voltage.
The V+ and V- pins on the TL072CP chip will be connected to the +15 and -15 on the
myDAQ, respectively. To simulate this circuit, first set the DigOut VI with Lines to Write
to 0-3. This enables all four digital I/O pins by default in simulation, which is shown
below.

33

Figure 2.6: Setting the Digital I/O Pins

To check the output voltage, open the DMM VI on the NI Instrument Launcher in
Figure 2.1 and connect the virtual connections to myDAQ according to Figure 2.7

Figure 2.7: Virtual Connections to myDAQ

The following window will open. Keep the settings as default. For the Mode setting,
select Auto.

34

Figure 2.7: Digital Multimeter VI

Run the simulation and set the I/O Pins and check the output on the DDM to see if it is
correct according to our theoretical calculation.

Figure 2.8 Simulation for binary 1101

35

Laboratory
Materials:
Components
Op-amp
Resistor(x5)
Resistor(x3)
Wires

Value
TL072CP
20 k
10 k

Code
8-DIP
Red Black Orange
Brown Black Orange

Circuit Configuration:

Figure 2.9 Breadboard Connection

Measurement:
To measure voltage, connect the two banana plugs to the HI and COM connectors on
the bottom of the myDAQ. Attach the red plug to the HI port used for voltage, and attach
the black banana plug to the center COM port. Next, connect the black probe to a
ground reference and the red probe to the output of the op amp.
To test the functionality of the circuitry, start from binary 0000 on the Digital Writer
window and increment the output pins. Check the corresponding output voltage using
the formula below.

36

Figure 2.8: Setting the Digital I/O Pins


Figure 2.9: Digital Multimeter VI Sensing DAC Output Voltage

NOTE: -The first few increments may not register on the Multimeter.
-Keep this circuitry on your breadboard for Experiment 4.

37

Experiment 3: Triangle Wave Generator


This lab will introduce a triangle wave generator that can be used to create pulse width
modulated (PWM) signals.

Task 3.1: Basic Comparator Circuit


First we will discuss a basic comparator circuit.
Schematic:

Figure 3.1.1: LM311P Block Diagram

Figure 3.1.2: Basic Comparator

Equations: A comparator essentially compares two voltages. If the voltage at the


positive input is greater than the voltage at the negative input, the output will be high. If
the voltage at the positive input is lower than the voltage at the negative input, the
output will be low.
The LM311P is considered an open collector comparator, meaning that the output is the
collector of a BJT. When the positive input is greater than the negative, the output looks
like an open circuit. Thus, youll need a pull-up resistor on the output to get a high level
38

out. When the negative input is greater than the positive, the output looks like a short
circuit to Vcc. The output of a comparator as a function of the inputs is given as:

Task 3.2: Basic Integrator Circuit


Introduction: An inverting op-amp can be set up as an integrator by simply replacing
the feedback resistor with a capacitor. This will create a circuit that integrates the input
voltage. Build the circuit shown in Figure 3.2.1.
Schematic:

Figure 3.2.1: Basic Integrator Circuit

Equations: From ideal op-amp theory, the inputs of the op-amp will remain at the same
potential. Since the positive input is tied to ground, the negative input will also be at
ground potential. Thus, the current into R is:

The current into a capacitor is (note that the current is considered negative due to the
passive sign convention, where Vcap is taken from Vout to the positive input of the op
amp):

Rearranging, taking the integral, and accounting for the initial voltage gives:

39

Since the current into the input of an ideal op-amp is assumed to be zero, iC = -iR and
the output voltage is equal to the voltage across the capacitor:

This equation shows that the circuit integrates the input voltage at a rate of 1/RC. If VIN
is a DC voltage than the output will change with a constant slope of VIN/(RC) versus
time. Therefore, if the input to the integrator is a square wave, the output will rise when
the input is a constant low level and will fall when the input is a constant high level. This
is the basis of the triangle wave generator.

Task 3.3: Triangle Wave Generator


Introduction: By combining the integrator with a comparator, we can make a simple
triangle wave generator. Since the comparator only has two output levels, it can be
used as a square wave generator. As the output of the triangle wave climbs, feedback
can be used to trip the comparator as the output passes through a desired value. The
integrator will then begin to fall and again, the comparator will be tripped when the
integrator passes through a certain value.
Build the circuit shown in Figure 3.3.1. Keep in mind that the transistor shown at the
output of the comparator is actually internal to the LM311P and thus, no transistor
should be installed there. You can find the datasheet and pin diagram of the LM311P
and TL072CP by going to www.ti.com and using the Search by Part Number box.

40

Schematic:

Figure 3.3.1: Triangle Wave Generator

Equations:
The best way to analyze this circuit is to look at what happens when the comparator is
high and what happens when the comparator is low.
When the comparator is low:

Figure 3.3.2: Comparator Low

41

Figure 3.3.2 shows the triangle generator after being redrawn with some simplifications
made. For the sake of simplifying the discussion, the saturation voltage of the LM311P
has been ignored. The 2N3904 that is being used as a switch is off when the
comparator is low. Also, assume that Vout is sitting at 0V.
First, the comparator trip point will be determined such that the comparator output will
transition from low to high. Since the negative input is tied to ground, when the output of
the comparator is low, the positive input must be negative. Since the input to the
integrator is negative, the output of the integrator will climb, during which Vfb becomes
less negative. When Vfb passes through zero, the output of the comparator will switch.
The output voltage that causes Vfb to reach 0V can be calculated as follows:

Therefore, the integrator will ramp up the output voltage until it hits 3 V, at which point
the comparator output will transition from low to high.
Now we will find the lower trip point. The schematic redrawn for a high comparator
output is shown below:

Figure 3.3.3: Comparator High

42

Notice that the BJT now looks like a short circuit because the transistor has become
saturated, which shorts out R2. Therefore, it is easy to find the lower trip point because
Vfb is equal to Vout. Therefore the lower trip point is 0V. This means that we will have a
triangle wave that starts at 0V, climbs to 3V, and falls back to 0V. This process will
repeat over and over.
Next, we will determine the climbing and falling times of the triangle wave. As shown
before, the output voltage of the comparator can be calculated by:

Looking at the rising output case first:

Since the comparator has been calculated to switch when VOUT reaches 3.0V:

By similar logic, for the case when the comparator is high and the output is falling,
where V0 = 3.0V:

Since the comparator will switch when VOUT is 0V:

Notice that tr = tf. This tells us that the output triangle wave will be symmetrical.
The frequency of the triangle wave can then be calculated by:

43

The screen shot below shows the output of the triangle wave generator. Notice that the
triangle wave is not perfectly symmetric and the frequency is slightly off from our
calculated value. This is due to the assumptions that were made in the beginning of the
calculations. The second screen shot shows the triangle wave and comparator output
together for a more intuitive sense of the circuits operation (The frequency and voltages
are slightly off due to loading effects at the comparator output).
Simulation
1. In order to simulate the circuit, we need to construct the virtual connections to
myDAQ according to Figure 3.3.4:

Figure 3.3.4 Virtual Connections to myDAQ

2. Let us Run the simulation and observe the output on the NIELVISmx
Oscilloscope. As we can see, the frequency is about 2.383 kHz which is close to
our theoretical calculation.

44

Figure 3.3.5 Simulation for the Triangle Wave Generator

Laboratory
Materials:
Components
Comparator
Op-amp
Transistor
Resistor
Resistor
Resistor
Resistor(x2)
Capacitor
Wires

Value
LM311P
TL072CP
2N3904
10 k
100 k
200 k
1M
1 nF

Code
8-DIP
8-DIP
NPN
Brown Black Orange
Brown Black Yellow
Red Black Yellow
Brown Black Green
102

45

Circuit Configuration:

Figure 3.3.5 Breadboard Connection

Measurement:
Running the NI ELVIS Oscilloscope in real mode, we can find the frequency is
approximately 2.443 kHz which is very close to our simulation result.

46

Figure 3.3.6 Real Triangle Wave and Square Wave

Additional Questions:
Try changing the integration capacitor from a 1 nF to a 2.2 nF. How does the output
change?
What would happen if R3 and T2 were removed from the circuit? Pull out the
components and see how the output of the generator changes.

47

Experiment 4: PWM Generator


Introduction: This lab will put together the triangle wave generator and DAC for use as
an LED dimmer.

Task 4.1: Pulse-Width Modulator


Introduction: Using a triangle wave and a comparator, a pulse-width modulated signal
can be created. We will use the DAC as our input signal and the resulting output signal
will have a duty cycle that is proportional to the input voltage. We will then use the PWM
signal to dim an LED.
Build the circuit shown in Figure 4.1.1 below. Hook up the triangle wave generator to the
node labeled Vtriangle and the output of the DAC to the node labeled Vdac. Play
around with the bits of the DAC and observe how the brightness of the LED changes.
Schematic:

Figure 4.1.1: Pulse-Width Modulator

Equations:
Just like the comparator circuit from the triangle wave generator, when the positive input
is lower than the negative, the output will be low. Therefore, when Vtriangle is greater than
Vdac, the output is low. When the output is low, the output transistor looks like a short
circuit. The forward diode voltage for a red LED is approximately 2V. Thus, the current
through the LED can be calculated as:

48

When Vtriangle is greater than Vdac, the output is high. In the case of the LM311P, when
the output is high, this translates to the output transistor being off, which looks like an
open circuit. If the output transistor looks like an open circuit, then no current can flow
through the LED, and therefore the LED is off.
Since the triangle wave is periodic and the DAC output voltage is fixed at a DC level,
the current through the LED will be a square wave with a duty cycle that is proportional
to the DC level. Higher DAC output voltage will result in a higher current duty cycle,
which will make the LED brighter. Lower DAC output voltage will result in a lower
current duty cycle, which will make the LED dimmer. The SPICE simulation results are
shown below. Two values of Vdac are shown in the simulation for better understanding of
the operation of the circuit.
Simulation
1. In order to simulate the circuit, we need to construct the virtual connections to
myDAQ according to Figure 4.1.2:

Figure 4.1.2: Virtual Connections to myDAQ

2. Open the NI ELVISmx Digital Writer-XLV3, configure the digital output 0111 as
shown in the following figure 4.1.3.

49

Figure 4.1.3 Digital Writer Configuration

3. For the Function Generator, create a 3.30 Vpp triangle waveform with 1.64 V DC
Offset as the input signal source. Run the simulation and open the oscilloscope
to view the output PWM wave.(Figure 4.1.4 and Figure 4.1.5)

Figure 4.1.4 Configuration for the Function Generator

50

Figure 4.1.5 PWM Simulation

Note: If simulation error occurs try to set the Maximum Timestep (TMAX) to 1.0000e004 or run the Convergence helper to resolve this problem.
Laboratory
Materials:
Components
Comparator
LED
Resistor
Resistor(x3)
Resistor(x5)
Wires

Value
LM311P
CQX35A
220
10 k
20 k

Code
8-DIP
Red
Red Red Brown
Brown Black Orange
Red Black Orange

51

Circuit Configuration:

Figure 4.1.6 Breadboard Connection

Measurement:
For real measurement, change the configurations myDAQ1(NI myDAQ) in the Device
List and observe it in the scope, we can see it in Figure 4.1.7

52

Figure 4.1.6 Real Data for the PWM generator

From the above figure, we can see the real curve and the simulation one are close. Play
with the Digital Output to adjust the brightness of the LED and make sure you
understand the theory described in the previous section.

53

Experiment 5: Light Detector Circuit


Introduction: With the comparator output driving an LED, the next step will be to sense
the intensity of the LED. This lab will build a light detector circuit using an op amp and
an everyday light emitting diode (LED). It's common knowledge that when a current
flows through an LED it emits light, but you may not have known that they also work in
reverse. When an LED is exposed to light, it will create a small current from cathode to
anode due to the photovoltaic effect. Using this property of LEDs, we can use them not
only to produce light, but to detect it as well. This small current then can be amplified
into a large voltage through the use of a transimpedance amplifier. However there are
some limitations to this approach. First, LEDs best detect light at wavelengths shorter
than the light they normally emit. This circuit will first be performed using the green LED
as the source to drive the red LED (The frequency of green light is higher than red one).
This circuit will output a voltage that is proportional to the intensity of ambient light. The
higher intensity the incident light the LED is exposed to, the higher the output voltage of
the ambient light sensor circuit will be. The following schematic will be used to sense
ambient light.

Figure 5.1 Schematic of Light Detector Circuit

This circuit can be described very simply. When light shines on a LED there is a
corresponding current that flows backwards through the LED (direction shown by red
arrow in Figure 5.1). Also, by characteristics of ideal operational amplifiers, both input
terminals equal 0 volts. The blue arrows represent the direction of current that will be
used to solve for output voltage in terms of resistance.

Substitute V1 into the equation on the left:


54

For this lab the following component values will be used:


o R1 = 1M-ohm
o R2 = 1k-ohm
o R3 = 10k-ohm
Therefore the circuit ideally would have an output voltage equal to:

This means that a very small current can correspond to a measurable output voltage.
To test this circuit shine the light from the LED on the output of the comparator directly
at the LED of the light detector (point the tops of the LEDs towards each other). By
increasing the output of the DAC the LED will get brighter and the measured voltage on
the output of the light detector circuit will increase.
Laboratory
Materials:
Components
Value
Comparator
LM311P
Op-Amp
TL072CP
LED
CQX35A
LED
CQX35A
Infrared Emitter Diode
Infrared Receiver Diode
Resistor
220
Resistor(x2)
1k
Resistor(x4)
10 k
Resistor(x5)
20 k
Resistor
1M
Wires

Code
8-DIP
8-DIP
Red
Green
Transparent
Black
Red Red Brown
Brown Black Red
Brown Black Orange
Red Black Orange
Brown Black Green

55

Circuit Configuration:

Figure 5.2 Breadboard Connection

Measurement:
By setting the output of the digital I/O pins to 0111 or half of full value the following
capture was made.

56

Figure 5.2 Setting the Digital I/O Pins

Figure 5.3 Capture of Light Detector Circuit

57

Notice that the Frequency of the captured waveform is at 1 kHz which is what the
frequency of the triangle wave generator was set at. Also note that the duty cycle of the
captured is at 43% due to the fact the DAC was set at 50% of full scale.

Infrared and remote controls


Most remote controls for electronic appliances use a near infrared diode to emit a beam
of light that reaches the device. A 940 nm wavelength LED is typical. This infrared light
is invisible to the human eye, but picked up by sensors on the receiving device.
By turning on and off the diode at a specific frequency and modulating (adding or mixing)
data (keystrokes from the remote), a device can communicate wirelessly to the intended
target (tv, radio, etc.). Looking back at your experiment, you can imagine an infrared
detector in the appliance that will convert the pulses of light received to digital data.
Different manufacturers of infrared remote controls use different protocols to transmit
the infrared commands. The RC-5 protocol that has its origins within Philips, uses, for
instance, a total of 14 bits for each button press. The bit pattern is modulated onto a
carrier frequency that, again, can be different for different manufacturers and standards,
in the case of RC-5, a 36 kHz carrier is being used.
Other consumer infrared protocols are, for instance, the different SIRCS versions used
by Sony, the RC-6 from Philips, the Ruwido R-Step, or the NEC TC101 protocol.
Let us change the LEDs in the previous section from Green to the Infrared Emitter
Diode and the Red LED into the Infrared Receiver one; therefore, this can be used to an
everyday remote control. Below is a capture taken from pointing a remote control at the
light detector circuit with and IR LED in place of the original Green LED. The circuit was
able to pick up a click of the remote control.

58

Figure 5.4 Breadboard Connection

59

Figure 5.5 Capture of a click of a Remote Control


As we can see in Figure 5.5, the output of a click of a remote control is a combination of
ones and zeros.

60

Experiment 6: Audio
Introduction: This lab will demonstrate the theory and operation of non-inverting
amplifiers as well as their practical application to amplify the signal of a microphone. We
will construct a non-inverting amplifier to increase the output signal of a microphone,
and use this circuit to measure the performance of a loudspeaker.

Task 6.1: Microphone Pre-Amplifier


Electret capsule microphones are very popular due to their decent performance and low
price. The simplest way to imagine the microphones operation is to view it as a resistor
whose value varies when a sound wave hits it. If a bias current flows through this
varying resistance, it will create a small voltage that must be amplified for useable
purposes.
Schematic:

Figure 6.1.1: Microphone and amplifier circuit

In the above circuit, R4 provides the bias current for the microphone. Capacitor C1
prevents the DC voltage across the microphone from being amplified, while allowing the
AC signal to pass to the amplifier. Resistor R2 provides a DC bias current path for the
TL072CP but also creates a high-pass filter with C1, whose cut off frequency can be
determined as:

The TL072CP, R1 and R3 form the non-inverting amplifier whose gain can be described
with the equation:
61

Simulation
1. In order to simulate the circuit, we need to construct the virtual connections to
myDAQ according to Figure 6.1.2:

Figure 6.1.2: Virtual Connections to myDAQ

2. NI ELVISmx Bode Analyzer is used to verify the performance of the circuit using
an AC Sweep. Double-click the NI ELVISmx Bode Analyzer to open its Front
Panel and configure the following settings:
Start frequency
Stop frequency
Steps
Mapping
Device

10 Hz
20 kHz
10
Logarithmic
Simulate NI myDAQ

3. Select SimulateRun to start the simulation. The gain and phase responses will
be plotted (Figure 6.1.3).
4. Stop the simulation and enable the cursors of the ELVISmx Bode Analyzer by
going to the Cursors Settings section and selecting Cursor (Sim).
5. Drag the cursor and place it at 37 dB (37.05 dB is acceptable). The cutoff
frequency is ~15.85 Hz which matches our theoretical calculation.

62

Figure 6.1.3: Simulated Data

The simulation shows that the circuit has a gain of 40 dB as predicted and its low
frequency roll-off occurs around 15.9 Hz. The upper frequency roll-off is created by the
bandwidth of the op-amp itself. For small signals, the easiest method to predict the
bandwidth of the amplifier is to use the gain/bandwidth product (GBW) specified by the
manufacturer. The TL072 has a GBW of 3 MHZ, by dividing this number by our gain of
101, we can predict the 30 kHz bandwidth of the amplifier seen in the simulation.
Laboratory
Materials:
Components
Op-amp
Resistor(x2)
Resistor
Resistor
Capacitor
Wires

Value
TL072CP
1k
10 k
100 k
10

Code
8-DIP
Brown Black Red
Brown Black Orange
Brown Black Yellow
Electrolytic

63

Circuit Configuration:

Figure 6.1.4 Breadboard Connection

The Bode application included with the myDAQ can be used to verify the operation of
the circuit once its built. Be sure to install the capacitor with polarity in the correct
orientation and care should be taken when inserting the microphone into the
breadboard.

64

Figure 6.1.5: Real-world performance of the microphone amplifier circuit

Figure 7: Screenshot using "scope" to verify the operation of the circuit.

65

Task 6.2: Measuring the performance of a loudspeaker


Introduction: The non-inverting amplifier constructed in the previous section makes it
much easier to interface the microphone to the myDAQ. Now the microphone can be
used for real-world measurements and recording.
Schematic:

Figure 6.2.1: Circuit configuration for measuring the performance of a loudspeaker.

In order to drive the included speaker with the myDAQ, a buffer circuit needs to be
constructed. By removing the feedback resistors from the non-inverting amplifier circuit
and connecting the output of the opamp directly to the inverting input, the circuits gain
is now reduced to 1. This means that the voltage at the output of the opamp will match
the voltage at the input. You may be wondering what the benefit of the circuit is if it
doesnt provide any gain to the signal? The advantage of a buffer is that it provides the
necessary current to drive a low impedance load while still presenting a high-impedance
load to the source. Notice in the above schematic that the analog output of the myDAQ
does provide current to the 150 Ohm speaker, the opamp does. The impedance seen
by the analog output is the value of R5, 10k Ohms in this case.
Note: In the PartsKit Box, there is only one Buzzer. You need to buy an extra
loudspeaker and a microphone to build the real circuit. We will use the Buzzer as an
example as described below. The test procedures are the same if you use a
loudspeaker. Also note that Figure 6.2.3 and Figure 6.2.4 are only for reference, they
may vary a lot among different types of speakers.

66

Laboratory
Materials:
Components
Op-amp
Resistor(x2)
Resistor(x2)
Resistor
Capacitor
Buzzer
Wires

Value
TL072CP
1k
10 k
100 k
10

Code
8-DIP
Brown Black Red
Brown Black Orange
Brown Black Yellow
Electrolytic
AC 1005G RPA LF

Circuit Configuration:

Figure 6.2.2 Breadboard Connection

By connecting the buffer input to the analog output of the myDAQ and the microphone
amplifier to an analog input, the frequency response of the speaker can be measured.
The DSA application can be used to view the harmonic content of the speakers output.

67

Figure 6.2.3: Frequency response of the included loudspeaker, measured by the microphone
circuit.

Figure 6.2.4: Harmonic content of the included loudspeaker when playing a 2 kHz tone.

68

Experiment 7: Finite State Machine


Introduction: Digital systems are the basis for computers and computational logic. The
groundwork for digital systems is Digital Logic, which implements Boolean logic using
an electronic circuit. Using transistors to interpret input signals and switch outputs on
or off, logic gates can be created for each Boolean operation (AND, OR, etc).
By combining these Boolean operations, even more complex operations can be
performed. This is called Combinational Logic. Any Boolean expression can be
decomposed into simple Boolean logic operations, and then built using logic gates to
create an electronic circuit that implements the expression.
The goal of this experiment is to reinforce state machine concepts by having students
design and implement a state machine using simple chips and a protoboard. This
experiment also introduces students to basic physical components.
This experiment is based upon a lab written by Dr. Bonnie Ferri at Georgia Tech.
Background:
The general steps to be followed for performing state machine design include:
1.) Convert a description of the problem into a state transition diagram.
2.) Transfer the information from the state transition diagram to a state transition logic
table that has inputs consisting of system inputs and current values of the state, S i, and
outputs consisting of system outputs and next state values, NSi.
3.) Design a combination circuit to implement the logic in the table.
4.) Select the chips to implement the combinational circuit and to implement the
memory portion of the state machine, for example, D flip flops can be used to implement
registers.
5.) Draw a pin diagram to illustrate how to wire the chips together to implement the state
machine logic.
6.) Insert the chips into a protoboard and wire the ground, high voltage, enables, and
clock pins.
7.) Complete the circuit by making the connections indicated from Step 5.).
8.) Test the circuit.
Notation and Definitions:

69

States: A = 00, B = 01, C = 10, D =11 where the states are defined by the values stored
in the registers; for example, State B corresponds to S1S0 = 01 where S1 is the value of
Register 1 and S0 is the value of Register 0. The next state for values of the registers is
defined by NSi for Register i. For example, if the current state is B and the next state is
C, then S1S0 = 01 and NS1 = 1 and NS0 = 0.
External input: The external input in this circuit is denoted as X.
3 to 8 Decoder: Signals A0 A2 represent the inputs and Y0-Y7 represent the outputs.
The convention is that A2 represents the most significant bit of a binary number and A0
represents the least significant bit; for example, and input of 011 is designated as
A2A1A0 = 011. Note: the output ports of 74LS138N are inverted unless we add an
extra inverter (74LS04N) to convert them back!

Figure 7.1 3-to-8 Decoder

Registers: Registers are the basic units of memory in a digital circuit. They can store
a 0 or 1 and output it for other circuits to use. To change the value in the register, the
new value is put on the incoming pin and the clock signal is changed from 0 to 1
(positive edge) to store the new value. Registers can be made from D flip flops.
Pin Connection Diagram: A pin connection diagram shows the physical layout of the
connections between components. Each component is shown along with the
corresponding pin numbers for that component. The pin diagram for the logic
expression F = (A OR B) OR (C OR D) is shown below. The pin numbers correspond to
the pins as labeled above for the 74LS32 2-input OR chip.

Figure 7.2 Pin Diagram for F = (A+B) + (C+D)

70

To build this circuit, you would need to connect a wire from pin 3 of the IC to pin 9,
another wire from pin 6 to pin 10. Pins 1, 2, 4, and 5 are inputs and connect to outputs
from other components while pin 8 is connected to an LED or an input to another
component.
Example:
Consider a state machine defined by the state transition diagram in Figure 7.3.

Figure 7.3 State Transition Diagram

This state machine has the following truth table:


State S1 S0
A
0 0
A
0 0
B
0 1
B
0 1
C
1 0
C
1 0
-1 1
-1 1

X New State NS1 NS0


0
B
0
1
1
A
0
0
0
C
1
0
1
A
0
0
0
C
1
0
1
A
0
0
0
---1
----

We can use the Karnaugh Map to simplify the state table; therefore, we can obtain the
expressions for NS1 and NS0:
X S1S0

0
1

00 01 11 10
1

NS0 = S1 S0 X
00 01 11 10
1
1

X S1S0

71

1
NS1 = S1 S0 X + S1 S0 X
Thus, we need to wire the Y0 directly to NS0 and connect Y2 and Y4 through an OR
gate for NS1 .The corresponding circuit diagram is given as:

Figure 7.4 State Machine Schematic

Using the pin layouts defined in the Appendix, a pin diagram for the state machine with
schematic shown in Figure 7.4 is

Figure 7.5: Pin diagram for state machine in Figures 1 and 2. For simplicity, some of the
connections, such as ground, VCC, clock and reset are not shown.

72

Prelab:

Figure 7.6 State Transition Diagram

1) For the state transition diagram shown, complete the truth table below.
State S1 S0
A
0 0
A
0 0
B
0 1
B
0 1
C
1 0
C
1 0
D
1 1
D
1 1

X New State NS1 NS0


0
A
0
0
1
B
0
1
0
A
0
0
1
D
1
1
0
A
0
0
1
B
0
1
0
A
0
0
1
C
1
0

2) Draw the circuit diagram for the state machine. Your circuit should include a
decoder, two registers, and 2- or 3-input OR gates.
We can use the Karnaugh Map to simplify the state table; therefore, we can
obtain the expressions for NS1 and NS0:
00 01 11 10
0
1
1 1
1
NS0 = S1S0 X + S1 S0X + S1 S0 X
X S1S0

X S1S0

00 01 11 10

0
73

1
1 1
NS1 = S1S0 X + S1S0 X
Thus, we need to wire Y1 and Y3 through an OR gate and feed into another OR
gate with Y5 for NS0 (This method is OK if you do not have a 3 input OR IC), Y3
and Y7 pass through an OR gate for NS1.The corresponding circuit diagram is
given as:

Figure 7.7 State Machine Schematic

3) Draw the pin connection diagram for the state machine. Start with the basics of
the pin diagram shown below, and complete it using Figure 7.7 as a guideline.
Use the IC descriptions in the appendix to determine the proper pins to use.

Figure 7.8: Pin diagram for state machine in Figures 7.7. For simplicity, some of the connections,
such as ground, VCC, clock and reset are not shown.

74

Simulation
1. In order to simulate the circuit, we need to construct the virtual connections to
myDAQ according to Figure 7.9

Figure 7.9 Virtual Connections to myDAQ

2. Open the NI ELVISmx Digital Writer and set the Bit 0 as the X, Bit 1 as the
Clock signal. Note that the registers change their states at rising edge. We can
observe this Line States in the NI ELVISmx Digital Reader or on the two virtual
LEDs. (Figure 7.10)

75

Figure 7.10 NI ELVISmx Digital Writer and Reader for Simulation

Laboratory
Build the Finite State Machine defined in the Example section of this lab with the pin
connection diagram shown in Figure 7.8. Note that we will use the myDAQ to supply
power.
Materials:
Components
3 to 8 Decoder
Inverter Buffer
2 Input OR
D Flip Flop
Resistor(x2)
LED(x2)
Wires

Value
SN74LS138N
SN74LS04N
SN74LS32N
SN74LS74N
220
CQX35A

Code
16-DIP
14-DIP
14-DIP
14-DIP
Red Red Brown
Red

Circuit Configuration:

76

Figure 7.11: Breadboard Connection (ICs from left to right: 74LS138N, 74LS04N, 74LS32N,
74LS74N)

The circuit is wired for your reference, it is better to separate the different parts with
different colours that can be easy to debug.

Connect the myDAQ digital ground to the Green GND wire and myDAQ +Vcc =
5V to the Orange wire marked +Vcc in Figure 7.11.

The input to the state machine should come from the myDAQ. Digital IO lines 0-3
(just pick 0) to Pin 1 of the decoder, and configure that line as a Write line.

Vcc and GND are connected to all of the ICs.

The ICs are all oriented so that the bottom left pin is PIN 1 (when the board is
oriented as shown above).

The light emitting diodes (LEDs) are connected to S0 and to S1. In addition,
connect them to the myDAQ. Configure the myDAQ lines 4-7 as read lines and
use them to check any intermediate points that interest you when troubleshooting the circuit.
77

The clock button advances the clock. The register stores the values of its input
and passes the value to its output after each time that the clock button is pushed.

Steps:
1. Make sure that the power is turned off of the board prior to constructing the
circuit.
2. Complete the circuit according to the PIN Connection Diagram shown in Figure
7.11. Use the loose lead wires that are supplied with the kit. The color of wire is
insignificant. Refer to the protoboard description to see which holes are
connected within the protoboard, and refer to the appendix to see the pin
numbers of the ICs.
3. Turn on the power to the circuit.
4. Now, test the State Machine to make sure it is working properly. First reset the
state machine to put it in state A. Set the DIP switch (Bit 0) to 0 and then press
the clock button. Change the input to 1 and press the clock button to see the next
state value. Move the DIP switch to either the on or off position, and then press
the clock button to change the state. Verify that this sequence follows the
transitions as dictated by the state transition diagram in Figure 7.6.

78

Figure 1.12 NI ELVISmx Digital Writer and Reader for Real Measurement

Additional Question:
Build the Finite State Machine designed for the Example in Figure 7.3
1. Turn off the power to the circuit before making any changes.
2. Build the circuit using the pin connection diagram that was completed in the
example.
3. When the state machine is complete, turn on the power. Reset the state machine
to put it in state A, and test the functionality of this circuit according to Figure 7.3.

79

Appendix: ICs Pin Configurations


3-to-8 Decoder/Demux IC (74LS138N):

80

Register (D-Flip Flop) IC (74LS74N):

81

2 Input OR Gate IC (74LS32N)

82

Inverter Buffer/Driver IC (SN74LS04N)

83

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