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- 1989


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1 -1

1989

802.0=801.18:681.31/058/


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() , 1989



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Computer,
Computers and Electronic Engineering, Proceedings
of the IEEE, IEEE Transactions on Computers, Compu
ter Design, Electronic Design, EDN,


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:
117218, ,-218,.,.14,.1,

1-2

- 3 -

ACU (arithmetic and


control unit)

(authorized
acce&s)

ADC (airborne digi


tal computer)


AADC (advanced avio
nics digital computer)

AADIS (automatic air


defence information
system)


ADCCP (advanced data
communication cont
rol procedure)




//



AC (application call)

ACF (advanced commu


nication function)



//
ACMSC (Association
for Computing Machi
nery Standards
Committee)



//
ACU (automatic call
ing unit)

ADPS (automatic data


processing system)



ADX (automatic data
exchange)


;

AFR (acceptable
failure rate)


//
AIIM (Association for
Information and Ima
ge Management)

ACU (address control


unit)

AIM (artificial in
telligence machine)


; ,

-4 -

AIM (associative in
dex method)



AIS (artificial in
telligence system)




AIST (Agency of In
dustrial Science and
Technology)



//
ALCOM (algebraic
compiler)



ALS (arithmetic left
shift)

AM (array memory)

//
AM (associative
memory)



AM (auxiliary memory)


(automatic mess
age processing cen
ter)



AMU (alterable mic
rocomputer unit)

-

1-3

(automatic mes
sage exchange)

AN (access network)


AN (activation name)

/
/
AN (arbitration net
work)

//
(access point)

/ /
(application pro
gram)


(application
processor)


//
(associative
processor)


(auxiliary pro
cessing machine)


//
APS (auxiliary power
system)

APU (array processor


unit)


ARS (arithmetic right
shift)

ART (automated reaso


ning tool)

ASC (associative
structure computer)

BAR (base address


register)

ASM (auxiliary stora


ge module)

(begin bracket)


//

BBI (begin bracket


indicator)

ASPR (armed services


procurement regula
tions)

(begin chain)


BCI (begin chain
indicator)

ASR (automatic speach


recognition system)

BCR (block check


register)

ATDM (asynchronous
time division multi
plexing)

BCR (breack control


register)

BCSA (binary synchro


nous communication
adapter)

ATIS (automatic
terminal information
service)

BCW (buffer control


word)

AUW (atomic unit of


work)

//

(back end pro


cessor)

//

(adaptive cross
parity code)

BER (bit error rate)

//
6

//

BER (backward
recovery)


//

(Butterfly paral
lel procesor)

,!
(breakpoint trap)

(between bra
ckets)

BR (bus request)

(between chains)

BS (backspace)

BF (boundary func
tion)

BSC (binary synchro


nous communication)

/
DLC/

BFS (base file sys


tem)

BGU (bus guardian


unit)

BILBO (built-in lo
gic block observation)


BL (bootstrap loader)

BIU (basic informa
tion unit)

(channel adapter)
-
CADPP (context addresable parallel pro
cessor)


(content addres
sable memory)
;
,

BLU (basic link unit)




//

CAMP (control and


monitoring processor)

BMS (basic mapping


support)

//

CAP (computer aided


production)

BNC (bayonet nut


connector)
- 7

CAP (cellular array


processor)

CAR (channe1 addre ss


register)

CAS-before-RAS (lomn address strobe
before raw address
strobe)
,




//
CASSM (context add
ressed segment sequ
ential memory)
-

/
/
CBN (call by name)
//
CBV (call by value)
//
(comand chaining)

(cross check)

(connection con
firm)


(channel-check
holder)

CCIF (computer-tocomputer interface)


CCR (condition code


register)

CCV (configuration
control unit)

//
CD (cross domain)

CD (change direction)

//
CD (character disp
lay)
-

CD (data chaining)

CDB (common data
bus)

CDI (change direc
tion indicator)

//
CDP (control and
display panel)

CDRM (cross domain


resource manager)

//
CDROM (compact-disk
read only memory)
-
8

CE (channel end)

" " /
/
CFDS (central fault
display system)

CN (communication
network)


CODASYL (Conference
on Data Systems
Languages)

CICS (customer in
formation control
system)

/,

,


/



CISC (oomplex inst
ruction set compu
ter)

(communication
controller)


/
/


COMTRAC (computer ai
ded traffic control)

CIT (Council for


Industriel Technology)


//

CONFIG (configura
tion services)

CLC (cluster control


ler)


//

CONWIN (contention
winner)

CLR (clear/reset/)

//


/, /, .

CMDR (command reject)

WIN

CMI (compaction
indicator)

COSS-CICS (customer
on-line security
system)

CHS (configuration
management system)

CPI (compression
indicator)

CMU (common mapping


unit)
1-5

CPMGR (connection
point manager)


/be/

CSMA/CD




/
/

CPI (compaction
indicator)


CR (connection re
quest)

CSR (control & state


register)

CR (carriage return)

CSU (communication
system user)

CRC (cyclic redun


dancy check)


CRCC (cyclic redun
dancy check code)

(channel-tochannel)

CRMMFCS (continuously
reconfiguring multi
microprocessor flight
control system)

DA (dielectric
anisotropy)

DAC (directed acyc


lic graph)

CRU (communications
register unit)

DAF (device address


field)

CS (control section)

DAF (destination
address field)

CSESS (control ses


sion request)


//

DAP (distributed
array processor)

CSL (computation
structures language)

10

DASD (direct access


storage device)



DBA (data base
administrator)

DBC (data base


computer)

DBCCP (data base


command and control
processor)


//
DC (dual current)


//
DC (dynamic compu
ter)

DC (diagnostic center)


DC (data check)



DB/DC (data base/
data communication
system)

DC (dynamic compu
ter) group

DBMS (data base ma


nagement system)

DCA (distributed com


munication architec
ture)



DBOS (disk-drum ba
sed operation system)

DCA (dynamic computer


architecture)

/
/
DBP (data base
processor)

DCE (digital control


element)

DBR (data buffer re


gister)

DCE (data communica


tions equipment)

//


DC (disconnect con
firm)

DCF (data count


field)


DDC (direct digital

11 -

control)

DDCMP (digital data


communications mes
sage protocol)

DEM (demand select)



DEST (destination)
;
, ,
DST

DDE (demand driven


evaluation)

DFC (data flow com


puter)
,

DDE (data driven


evaluation)

DFC (data flow cont


rol)

DDM (data definition


module)
//

DFG (data flow graph)



,

DDL (data definition


language)

DFP (data flow pro


gram)
,

DDN (data driven


network)
,

DDR (dynamic device


reconfiguration)

DIRMU (distributed
reconfigurable mul
tiprocessor)


DDS (dataphone digi


tal service)

AT&T

DIS (data inscrip


tion system)

DE (device end)

DIS (dynamic instruc


tion set)

DEDEX (design diver


sity experimental
system)

12

DLC (data link


control)

processing system)


DPS (data production
set)

DLSAP (destination_
link service access
point)

//

DPU (disk processor


unit)

DM (disconnect mode)

//

DR (duplex redundan
cy)

DMC (destination me
mory controller)

DR (disconnect
request)

//

DN (distribution
network)

/ /

DRAW (direct read


after write)
//


//

DNA (digital network


architecture)

DOV (data-over-voice)
--
//
DPA (direct page
register)

DRCDPS (distributed
real time control
data processing
system)

DPA (dynamic parallel


architecture)

DRP (decentralized
redundant processor)

*

DPR (distributed pro


gram reliability)

DS (dynamic scatte
ring)

DS (device select)
//

DPS (distributed
1-7

15

DSDS (dataphone swi


tched digital ser
vice)

(expedited date
acknowledgement)


//

DSE (data switching


exchange)

EAR (effective add


ress register)

DSPMF (dynamic sour


ce program modifica
tion facility)

(end bracket)


EBI (end bracket
indicator)

DSS (decision sup


port system)

EBIU (end basic


information unit)

DST (destination)
CM. DEST
D-SWN (digital swi
tching network)

(end chain; end


of chain)


ECC (error correc
ting circuit)

DT (data traffic)

ECI (end chain


indicator)

DTE (data terminal


equipment;

ECMA (European Computor Manufactures


Association)

DT TPDU (data trans


port protocol data
unit)



//
DUV (data-under-voi)

//



ED TPDU (expedited
transport protocol
date unit)



//

- 14 -

ED TSDU (expedited
transport service
data unit)



ESDI (enhanced small
devices interface)



//

EFI (expedited flow


indicator)

ESDS (entry sequen


ced data set)


//

EMARS (error manage


ment and reconfigu
ration system)

ESS (electronic swi


tching system)



EVA (eigenvalue
assignement) problem

(electromagnetic
compatibility)



EXP (expedited)

(emulator trap)


ENR (enable presenta
tion)

EXR (exception requ


est)


EXRD (EXR indicating
definite response
requested)

EOI (end of idle)


(emulation program)

ER (error register)

EXRE (EXR indication


exception response
requested)


ERCL (exchange re
cord length field)


ERP (exception respon
se indicator)


ERPS (error recovery
procedure)

,

EXRN (indication
no-response requested

,

EXT (end of text)


~ 15 -

FER (forward error


recovery)


//

FACCE (family concept


computing elements)

FFS (formatted file


system)

FACE (fault coverage


estimation)

FFTP (fast Fourier


transfer processor)

FAF (fit and forget)

" "
//

FFT (file format


table)

FAX machine


FGP (fifth genera
tion project)

FC (functional cont
rol)



//


//
FCS (frame check
sequence)

FI (function inter
preter)


FI (format indica
tor)

FDC (factory data


link)

FIB (file informa


tion block)

FDL (functional
description language)

FID (format identi


fication field)

FDM (frequency divi


sion multiplexing)

FIS (fixed instruc


tion set)

FDPS (fully distribu


ted processing sys
tem)

FLU (fault location


unit)

16


//
FPLA (field programm
able logic array)

FM (file maintenan
ce)

FPM /functional
program machine)

FM (function manage
ment)


FMD (function manage
ment data)

FPMR (Federal proper


ty management regu
lation)

FMHC (concatenated
function management
header)

FR (file revision)

FMT (format)

FRACAS (failure re
porting and correc
tive action system)

FMT (file map table)

FRC (functional
redundancy checking)

FNN (four nearest


neighbor network)

,

//

FRESH (force requi


rement expert sys
tem/

FOB (fiber optical


bus)

FOSP (fiber optic


scattering processor)

FRM (frame)

FRMR (frame reject)

FPA (floating point


accelerator)
1-9


17

//

FS (file structure)

GAM (graphic access


method)

FSM (finite state


machine)


FSQS (free standing
operating system)

GAPP (graphic arith


metic parallel pro
cessor)

FSP (first speaker)


//

GCN (generalized
cube networt)

FSR (full scale


range)

GCR (group coding


recording)

FTBBS (fault tole


rant building block
computer)

GDB (global data


base)

FTMP (fault tolerant


multiprocessor)

GDP (general data


processor)

FTP (fault tolerant


processor)

GEN (generator)

FTSP (fault tolerant


spaceborne computer)

GIC (general inter


face control)



GPIB (general pur
pose interface bus)

FW (firmware)

GPR (general purpo


se registor)

GA (global address)

18

GRTS (general remote


terminal system)

HEP (heterogeneous)
element processor)



HLIR (high level
internal representa
tion)

(host adapter)

HNIL (high noise im


munity logic)

(host computer)

(host channel)

HPDM (heterogeneous
parallel distributed
machine)

HDL (hardware desc


ription language)

HDLC (high level


data link control)

HPT (head per track)


//
HS (half session)

//

HDP (horizontal data


processing)

HSID (half session


identification)

HDX CONT (half-duplex with contention)

HSA (home storage


address)

HDX FF (HDX flipflop)

HSDC (high speed


data channel)


//

HEMP (high electron


mobility transistor)

(horisontal tab)


1-10


19

1CDT

HTL (high threshold


logic)

IDA (indirect data


addressing)

IAP (intelligent
analog peripheral)

IDD (imaging and


display device)


IEU (instruction
execution unit)

IAR (instruction add


ress register)

IPS (interchange
file separator)

IAS (immediate access


storage)

IGS (independent
graphic support)

IB (instruction
block)

IGS (interchange
group separator)

IC (instruction co
de)


IC (interface cont
rol)

IKBS (intelligent
knowledge base sys
tems )


ICA (integrated
communication adap
ter)

IL (iteration level)


ILU (initiating lo
gical unit)

ICB (input channel


buffer)

ICE (in-circuit
emulator)

ILUS (initiating
logical unit ser
vices )


20



IM (instruction
memory)

message data trans


mission system)

IRMS (integrated
record message sys
tem

IMC (intermodule
communication)


IML (initial machine
load)

10 (input-output)

IMP (interface messa


ge processor)

IMQ (input message


queue)

I0S (input-output
supervisor)

-
IOS (input-output
scheduler)

-
(input-output
trap)

IMR (interrupt mask


register)

IPC (interprocess
communication

IMS (intelligent
matrix switch)


IPL (initial pro
gram loading)

IPR (isolated pa
cing response)

INB (in-bracket sta


te)

" 11
INC (in-chain state)

" 11

IPS (information
processing system)

INOP (inoperative)

INTR (interrupt)

IRDS (integrated
reliability system)

IMDTS (integrated
1-11



21 -

IRG (inter record


gap)

(knowledge
engineering environ
ment )

IRR (interrupt re
quest register)

//

KIP (knowledge in
formation proces
sing)

IRS (interchange
record separator)

KSDS (key-sequenced
data-set)

ISDN (integrated
services digital
network)

ISR (interrupt servi


ce register)

LA (local address)

LAC (look-ahead
logic)

ISU (instruction
stream processing
unit)

LANC (local area


network connector)

IU (interface unit)

LB (left byte)

IUS (interchange
unit separator)

//

LCLV (liquid crystal


light valve)

LDN (local device


network)

JCC (joint communi


cation center)


//

JES (job entry system)


- 22 -

LECC (linear error


correcting code)

LLCDU (logical
link control data
unit)

LF (line feed)



//


LFS (logical file
system)

LLIR (low level


internal representa
tion)



LFU (least frequent
ly used)

LM (left margin)


LNR (longest next
reference)

LGL (logical left


shift)


LGR (logical right
shift/

LPE (large processor


unit)


//

LH (link header)

LPU (local proces


sing unit)

LIL (library inter


connection language)


LPS (logical presen
tation space)

LIOCS (logical input/


output control sys
tem)

LRC (longitudinal
redundancy check)


LRU (least recently
used)

LIPS (logical inferen


ces per second)


,
,


/

/
23

LRU (linear replacable unit)

LUSTAT (logical unit


state)

LSA (lost subarea)


LSAP (link service
access point)


//

MAC (multiapplica
tion computer)

LSDU (link service


data unit)

//


//

MADREC (malfunction
detection and recor
ding)

LSID (local session


identification field)


//

MADU (medium access


data unit)

LSSD (level sensitive


scan design)

,
/
/

MAFT (multicomputer
architecture for
fault tolerance)

LT (link trailer)

LTC (line-time clock)


LTR (least transition
probability)

(multiply-add
module)

-
/ /
MAP (multiassociative processor)

LU (logical unit)

MAU (medium access


unit)

LUS (logical unit


services)

24

MC,y/C (microcont
roller)

MDT (mean down time)

(multipoint
communication)

MESC (message elec


tronic switching
computer)


MCDP (microprogram
med communication
data processor)

MFD (master file


directory)

MCEL (machine check


extended logout)

MFM (modified
frequency modulation)

(maintenance
channel)

M^FM (modified-modified frequency modu


lation)


MCI (man-computer
interface)

-
,
-

MFT (multiprogram
ming fixed number of
tasks)

(master control
program)

MGR (manager)

(message control
program)

(magnetic head)

MCU (microprogram
control unit)

MIA (microinstruc
tion address)


MIL (module inter
connection language)

MD (mode)

MDR (mainstorage
data register)

MIN (multistage

25-

interconnection)

(maximum presen
tation position)

MIPS (military
information proces
sing system)

MPS (multiprocessor
system)

MITI (Ministry of
International Trade
and Industry)

MPU (memory and


processor unit)



,
5-
//


MS (memory system)

(mass memory)

MSG (message)

MMAR (main memory


address register)

MSIMD (multiple
SIMD)




//

MMU (memory mapping


and management unit)

MSOCC (multisatelli
te operations cont
rol center)

MNI (memory network


interface)

MSS (mass storage


system)

MOC (middle of chain)

MPF (mapping field)

MSX (microsoft-x)

"
",


MPL (maximum presen


tation line)



(massively paral
lel processor)

(meantime bet
ween maintenance

,
26

actions)

facility)

NDA (negative di
electric anisotropy)

(message to ope
rator)



//


MU (matching unit)

NDAP (network deter


mination aid proces
sor


MVT (multiprogram
ming variable numberof tasks)

NLC (nematic liquid


crystal)

MUT (mean up time)

NMR (N-modular re
dundancy)

N-

NA (ne twork addr s s )

NON-VON (Non-vonNeuman)

NAI (no address inst


ruction)


/
-/


NASDAQ

NR (frame number
received)

NAU (network address


able unit)

NRC (network routing


center)

NCP (network control


program)

NS (network sevices)


NSH (network services
header)

NCC (network control


center)

NS (frame number senU

NCCF (network commu


nication control

27

NSA (non-sequenced
acknowledgement)

OCCF (operator com


munication control
facility)


NSI (no-sequenced
information)

OCIS (organized cri


me information sys
tem)


NSP (non-sequenced
poll)

NTIC (National Tech
nical Information
Service)

OD (optical disk)

ODS (optical disk
storage)

NVP (N-version pro


gramming)
N-

ODT (octal debugging


technique)

(operand memory)

OAF (origin address


field)

OP (output processor)
,

OAR (operand address


register)

OPRB (open record


buffer keyword)

OB (output buffer)

(on-board pro
cessor)

OSI (open system


interconnect) model

//

OBRM (on-board rep


laceable module)

OSR (output shift


register)

(operation control
ler)

28

PDA (parallel data


adapter)

(pacing request/
pacing response)

PDF (piecewise date


flow architecture)

PBI (process branch


indicator)

(phase encoding)

PC (parity control)

(processing ele
ment)

PC (path control)


//

(positive
electrically cont
rolled birefringencing crystal)

(path control
element)

(punched card
equimpemnt)

(program execu
tion module)

PCI (processor com


munication interface)



PCI (program control
led interrupt)



PEND (pending state)


P/F (poll bit for
primary station;
final frame bit for
secondary station)

PCP (primary control


program)

PDA (positive dielec


tric anisotropy)


;

//
PF (parity formation)

- 29 -

PFS (physical file


system)

PIP (parallel infor


mation processing)

PI (pacing indica
tor)

PIRQ (program inter


rupt request)

PIA (programmable
interface adapter)


//

PIS (priority inter


rupt system)

PIC (programmable
interrupt controller)


//

PIT (pass-if-true)

PID (pseudo-interrupt
unit;

PLO (phase-locked
oscillator)

PIF (pass-if-false)



PLU (path informa
tion unit)

PIM (parallel infe


rence machine)

PIM (priority inter


rupt module)

PLU (primary logical


unit)


//
PIM-D (PIM based _.
data flow mechanism)

PLUS (primary logical


unit services)


//
PMD (program monito
ring and diagnostics)

PIM-R (PIM based on


reduction mechanism)

- 30 -

PMI (procedure
information)

PMS (processor memo
ry switch)

le multiprocessor)

PS (presentation
service)

PSC (partially
selfchecking module)

(page map table)

(presentation
position)

PSC (power supply


control)

PPS (point-to-point
system)


//

PSD (processor state


descriptor)

PPU (peripheral
processor unit)


PPU (procedure pro
cessor unit)

PSF (point-spread
function)


/ /
PSI (personal sequental inference machi
ne)

PPU (primary physi


cal unit)

PRI (primary)

PRISM (parallel
reductions in shared
memory)




PSM (processor-switch
memory)

- //
PU (physical unit)


PUS (PU services)


//

PRRMP (partioned sourses reconfigurab-

51 -

PUC (primitive unit


for computation)

Q
QC (quiescing complete)

QUIP (quick inquiry
processor)

R
RAC (read address
counter)

RAC (reconfigurable
array computer)
EM

RALU (ALU-register)
-

RASP (retrieval and
sort processor)

RB (recovery block)

RB (right byte)
//
RBP (remote batch
processing)

RC (remote concentra
tor)


RQP (relational
associative proces
sor)


RD (request for
disconnect)

RDI (relational
date interfac)

RDS (relational da
ta system)

REC (recovery)

REJ (reject)

REMP (reconfigurable
multiprocessor)

RH (request/response
header)

RIM (research instru


ment module)


RIM (request initia
lization mode)

32 -

RIMMS (reduced inst


ruction set multimicrocomputer system)

RP (recovery point)

RISC (reduced instruc


tion set computer)


RIT (report instruc
tion table)


RLL (run length
limited method)




RM (right margine)

RMP (reconfigurable
multiprocessor)


ROSF (remote operator


control facility)


ROR (release on
request)

ROSS (route oriented


simulation system)

RPA (reconfigurable
parallel architectu
re)


RQ (result queue)

RQ (request)

RQD (request indica


ting definite res
ponse requested)
,

RQE (request indica
ting exception res
ponse requested)
,

RQI (request initia
lization )

RQN (request indica
ting no response)
,

RR (ready to receive)

RR (recovery region)

RRDS (relative re
cord data set)

- 33 -

RRI (request/response indicator)


-

,

RU (request-response unit)
-

RSET (reset)

RWD (release when


done)


RSP (response)

RT (remote terminal)

RTAM (remote termi
nal access method)

S
SABH (set asynchro
nous balanced mode)

RTE (real time


execution)

SABME (set asynchro


nous balanced mode
extended)



//

RTI (return from


interrupt)

RTI (response type
indicator)

SADT (structural
analysis and design
technique)

SAF (switched net


work access facility)

RTL (register trans


fer level)

RTR (ready to recei


ve)

RTT (return from
trap)

SAL (single assign


ment language)

/ DF/
SAR (single assign
ment rule)

RTU (remote terminal


unit)

34

SARM (set asynchro


nous response mode)



SARME (set asynchro
nous response mode
extended)




SBI (synchronous
backplane intercon
nect)



SBO (simple
overlap)rule

SC (single current)

SCB (string control


byte)

SCB (string control


block)

SCCM (self-checking
computer module)



SCP (strategic com
puting program)



//
SCP (system control
processor)

SCRA (Scientific
Computer Research
Association)

SBT (synchronous bi
nary transmission)

SBWP (space band


width product)

,


/ /
SC (session control)

/
/

-


//
SCS (strategy compu
ting and survivabili
ty)

SCS (SNA character


string)

SC (selector chanel)


35 -


SNA

SCSI (small computer


system interface)

SFG (signal flow


graph)

/ /

SDA (synchronous da
ta adapter)

SFU (scheduler
function unit)

SDF (structured data


flow) model

SID (session identi


fication)

SDI (sense data


indicator)

SIF (serial interfa


ce)

SIFT (software imple


mented fault toleran
ce)
,

SDT (start data


traffic)

SEA (single exucution array)

SEADS (statistical
error analisys data
summary)


SIM (set initializa


tion mode)

SLAPP (systolic line


ar algebra parallel
processor)

SEC (single error


correcting) code
,

SLI (suppress length


indicator)

SEL (select)

SERF (sub-element
redundent tolerance)

SLIM (spatial light


modulator)

36


/
/
SLSAP (source link
service assecc point)


SLU (secondary logi
cal unit)

SLUS (secondary logi


cal unit services)

//
SM (structure memory)

//
SMSM (self-managing
secondary memory


SNAP (standard net
work access protocol)


8NC (sense code)

;

SNF (sequence number
field)

SNRM (set normal
response mode)


SNRHE (set normal
response mode exten

ded)



SP (signal proces
sor)

SP (supervisor pro
cessor)


SP (stack pointer)

SPC (stored-program
control)

SPE (small processor
element)

SPOOL (simultaneous
peripheral opera
tions on-line)

-
SPU (secondary phy
sical unit)

//
SPU (system proces
sing unit)

SRI (stack reference
indicator)

SSCP (system servi


ces control point)

37 -

SSR (stretch-service
recording medium;



//

format)

SVP (service proces


sor)


SST (session started)

SYS REQ (system


request)


SST (shared segment
table)

SSV (state-save me
mory unit)

TAM (teleprocessing
access method)

TARP (test and res


tore processor)

STA (station)

STAR (self testing


and repairing)

(transmission *trol)

STB (strobe)

(transport con
nection)

STR (synchronous
transit-receive ter
minal )


(transmition
control element)

SUC (schedulable unit


of computation)



SVC (service)

(transport
connection end
point)

(transmission
header)

SVC MGR (service


manager)



TIC (transfer in

SVF (set vertical

- 38 -

channel)


TIMS (transmission
impairment measure
ment system)

TN (twisted nematic
effect)

TN (terminal node)

TIP (terminal inter


face processor)


TOS (top of stack)

//


TP (test point)

TIP (track informa


tion processor)

TP (terminal pro
cessing)

(logical track
end)

TPDU (transport
protocol data unit)

TL (transmit leader)

TRAC (Texas reconfigarable array pro


cessor)

TLU (terminating
logical unit)



"
"

TRNS (teleprocessing
network simulator)

(top margine)

(template memory
controller)

TRN (trans parant)


TS (transmission
subsystem)

TMR (triple modular


redundancy)

TS (termination
system)

TMS (time multiple


xed switch)

39


TS (transport ser
vice )

rectory)

TSAP (transport
service access point)

UFO (user files on


line)

UHM (universal host


machine)



TSC (totally self
checking)


TSL (three state
logic)

UI (unnumbered
information)

UP (unnumbered poll)


UPC (universal pro
duct code)

TSDU (transport
service data unit)


//

TSW (task status


word)

UPM (undefined pro


tocol machine)

USART (universal
synchronous asynch
ronous receiver
transmitter)

U (unnumbered)


UA (unnumbered
acknowledgement)

UDS (united data


system)

-
//
UUT (unit under test)

UE (unit exception)

VAN (value-added
network)


UFD (user file di

40 -

computer)

VCS (vertical channel


select)

VM (view mode)


VOT (voice onset
time)

VDP (vertical data


processing)


//

VPP (variable pro


cessor pipeline)

VEM (vector element


by element multiply)

VRC (vertical redun


dancy check)

VES (vector element


by element sum)

VRC (visible record


computer)

VGMD (variable gra


ting mode device)


/
/

VT (value trace)


VTL (variable thre
shold logic)

VHSIC (very high


speed integrated cir
cuit)

VIC (variable instruc


tion computer)

WAC (write address


counter)

VIPER (verificable
integrated processor
for enhanced relia
bility)

WIN (contention
winner)
. CONWIN

WORN (write once


read memory)

VLIWC (very long


instruction word
41

WP (word processor)

YAMP (vertical
amplifier)

//

WP (word processing)

XAMP (horizontal
amplifier)

//

ZE (zeros extended)

ZPI (zone position
indicator)

42

!
,
.

/" ", ,
/ 150 . .
:
117218, , -218, . , 14, . 1
207366
411613 VCPSU,
: 331-40-88

- 43 -

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