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Design
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
3 Description
2 Applications
Device Information(1)
PART NUMBER
TLV3501
TLV3502
PACKAGE
SOT-23 (6)
1.60 mm 2.90 mm
SOIC (8)
3.91 mm 4.90 mm
SOT-23 (8)
1.63 mm 2.90 mm
SOIC (8)
3.91 mm 4.90 mm
VCM = 1V
VS = 5V
CLOAD = 17pF
8
Rise
7
6
Fall
5
4
3
0
20
40
60
80
100
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
4
4
5
5
6
7
17
17
17
17
17
17
18
4 Revision History
Changes from Revision D (July 2005) to Revision E
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
TLV3501, TLV3502
www.ti.com
(1)
NXA
(1)
-IN
TLV3501: D Package
8-Pin SOIC
Top View
SHDN
(1)
NC
SHDN
V-
OUT
IN
V+
+IN
V+
+IN
OUT
NC
(1)
(1)
SOIC
SOT-23
I/O
DESCRIPTION
+IN
NC
1, 5
OUT
Output
SHDN
V+
V+
OUT A
OUT B
A
IN A
+IN B
IN B
B
4
I/O
DESCRIPTION
NAME
NO.
IN A
+IN A
IN B
+IN B
OUT A
Output, channel A
OUT B
Output, channel B
V+
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
Supply
Voltage
Current
(2)
(V) 0.3
(2)
(3)
(V+) + 0.3
10
mA
74
mA
125
150
150
40
Junction, TJ
Storage, Tstg
(1)
UNIT
5.5
Temperature
MAX
65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails must
be current-limited to 10 mA or less.
Short-circuit to ground, one comparator per package.
Electrostatic discharge
3000
500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Supply voltage
VIL
VIH
TA
Operating temperature
(1)
MIN
NOM
2.2
2.7
MAX
UNIT
5.5
(V+) 1.7
(V+) 0.9
40
125
When the SHDN pin is within 0.9 V of the most positive supply, the part is disabled. When it is more than 1.7 V below the most positive
supply, the part is enabled.
DBV (SOT-23)
D (SOIC)
UNIT
6 PINS
8 PINS
RJA
192.2
129.5
C/W
RJC(top)
134.8
75.9
C/W
RJB
37.1
69.8
C/W
JT
28.3
29.7
C/W
JB
36.7
69.3
C/W
RJC(bot)
C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
TLV3501, TLV3502
www.ti.com
D (SOIC)
DCN (SOT-23)
8 PINS
8 PINS
UNIT
191.6
C/W
RJA
116.4
RJC(top)
61.7
43.9
C/W
RJB
57
120.3
C/W
JT
18.5
14.4
C/W
JB
56.5
118.6
C/W
RJC(bot)
C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
TEST CONDITIONS
MIN
TYP
MAX
6.5
UNIT
OFFSET VOLTAGE
VOS
VCM = 0 V, IO = 0 mA
dVOS/dT
TA = 40C to +125C
PSRR
VS = 2.7 V to 5.5 V
100
Input hysteresis
mV
V/C
400
V/V
mV
VCM = VCC/2
10
pA
IOS
VCM = VCC/2
10
pA
(V+) 0.2
(V) 0.2
CMRR
57
55
70
dB
INPUT IMPEDANCE
1013 || 2
Common-mode
13
Differential
10
|| pF
|| pF
|| 4
OUTPUT
VOH, VOL
IOUT = 1 mA
30
50
mV
SHUTDOWN
tOFF
30
ns
tON
100
ns
(4)
VL
Comparator is enabled
VH
IQSD
(V+) 1.7
(V+) 0.9
pA
POWER SUPPLY
VS
Specified voltage
Operating voltage range
IQ
(1)
(2)
(3)
(4)
Quiescent current
2.7
5.5
Higher end
2.2
Lower end
5.5
VS = 5 V, VO = High
3.2
V
V
mA
VOS is defined as the average of the positive and the negative switching thresholds.
Not production tested.
The difference between IB+ and IB.
When the shutdown pin is within 0.9 V of the most positive supply, the part is disabled. When it is more than 1.7 V below the most
positive supply, the part is enabled.
Submit Documentation Feedback
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
www.ti.com
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TEMPERATURE RANGE
Specified range
40
125
Operating range
40
125
TEST CONDITIONS
VIN = 100 mV,
Overdrive = 20 mV
T(pd)
At TA = 25C
MIN
TYP
MAX
4.5
6.4
ns
ns
10
ns
12
ns
At TA = 40C to
+125C
At TA = 25C
7.5
At TA = 40C to
+125C
UNIT
t(SKEW)
0.5
ns
fMAX
Overdrive = 50 mV, VS = 5 V
80
MHz
tR
1.5
ns
1.5
ns
tF
(1)
(2)
(3)
(4)
Fall time
(4)
TLV3501, TLV3502
www.ti.com
Input
VIN (V)
VIN (V)
Input
5
VOD = 100mV
3
2
VOD = 50mV
VOD = 20mV
VOUT (V)
VOUT (V)
VOD = 50mV
VOD = 5mV
1
0
VOD = 20mV
VOD = 100mV
VOD = 5mV
2
1
0
1
10
10
20
30
1
10
40
10
20
30
40
Time (ns)
Time (ns)
5.0
Fall
4.5
Rise
4.0
3.5
4.5
4.0
Fall
3.5
Rise
3.0
40 25
25
50
75
100
3.0
40 25
125
25
VOD = 20 mV
75
100
125
VOD = 50 mV
50
Temperature (C)
Temperature (C)
7
6
Fall
5
Rise
7
6
5
Fall
Rise
0
20
40
60
80
100
20
40
60
80
100
VOD = 20 mV
VOD = 50 mV
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
www.ti.com
110
8
7
6
5
90
70
Fall
4
Rise
3
2
50
40 25
25
VCM = 1 V
10
VIN (mV)
VIN (mV)
0
10
125
500
0
500
VOUT (V)
VOUT (V)
100
2
1
0
0
1
2
1
0
20
40
60
80
100
VDD = 5 V
10
12
14
16
18
20
Time (ns)
Time (ns)
VIN = 20 mVPP
Figure 10. Response to 100-MHz Sine Wave (2.5-V Dual
Supply into 50- Oscilloscope Input)
4.0
3.8
3.8
3.6
3.6
75
VOD = 20 mV
3.4
3.2
3.0
2.8
2.6
3.4
3.2
3.0
2.8
2.6
2.4
2.4
2.2
2.2
2.0
2.0
2
40 25
25
50
75
100
125
Temperature (C)
50
Temperature (C)
TLV3501, TLV3502
www.ti.com
3.5
CLOAD = 50pF
3.0
2.5
2.0
5V
(from off to on)
2.7V
(from off to on)
1.5
5V
(from on to off)
1.0
2.7V
(from on to off)
0.5
20
CLOAD = 20pF
15
10
CLOAD = 10pF
5
CLOAD = 0.5pF
0
0
20
40
60
80
Frequency (MHz)
100
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
www.ti.com
7 Detailed Description
7.1 Overview
The TLV3501 and TLV3502 devices both feature high-speed response and include 6 mV of internal hysteresis
for improved noise immunity with an input common-mode range that extends 0.2 V beyond the power-supply
rails.
+
OUT
IN
0.1F
2.2F
VIN
TLV3501
VOUT
VREF
Figure 15. Input Current Protection for Voltages Exceeding the Supply Voltage
10
TLV3501, TLV3502
www.ti.com
0.1F
2.2F
VIN
TLV3501
VOUT
VREF
11
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
www.ti.com
0.1F
2.2F
VIN
TLV3501
R1 = 51
VOUT
R 2 = 10k
VREF
12
TLV3501, TLV3502
www.ti.com
1/3 (V+)
V+
1.38R1C
VS = 5V R
1
1k
C
62pF
VOUT
R2
5k
R2
5k
t
f = 10MHz
V+
R2
5k
Copyright 2016 Texas Instruments Incorporated
Figure 19. TLV3501 Device With Upper and Lower Thresholds With 1-V Hysteresis
Submit Documentation Feedback
13
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
www.ti.com
VHI
TLV3502a
TLV3502a
VIN
VIN
VOUT
VOUT
SN74AHC00
SN74LVC1G02
TLV3502b
TLV3502b
VLO
VHI
V
V
VOUT
VOUT
VIN
VIN
VHI
VHI
VLO
VLO
Time
Time
14
TLV3501, TLV3502
www.ti.com
10 Layout
10.1 Layout Guidelines
For any high-speed comparator or amplifier, proper design and printed-circuit board (PCB) layout are necessary
for optimal performance. Excess stray capacitance on the active input, or improper grounding, can limit the
maximum performance of high-speed circuitry.
Minimizing resistance from the signal source to the comparator input is necessary to minimize the propagation
delay of the complete circuit. The source resistance, along with input and stray capacitance, creates an RC filter
that delays voltage transitions at the input, and reduces the amplitude of high-frequency signals. The input
capacitance of the TLV350x, along with stray capacitance from an input pin to ground, results in several
picofarads of capacitance.
The location and type of capacitors used for power-supply bypassing are critical to high-speed comparators. The
suggested 2.2-F tantalum capacitor does not need to be as close to the device as the 0.1-F capacitor, and
may be shared with other devices. The 2.2-F capacitor buffers the power-supply line against ripple, and the 0.1F capacitor provides a charge for the comparator during high-frequency switching.
In a high-speed circuit, fast rising and falling switching transients create voltage differences across lines that
would be at the same potential at DC. To reduce this effect, use a ground plane to reduce difference in voltage
potential within the circuit board. A ground plane has the advantage of minimizing the effect of stray capacitances
on the circuit board by providing a more desirable path for the current to flow. With a signal trace over a ground
plane, at high-frequency the return current (in the ground plane) tends to flow right under the signal trace. Breaks
in the ground plane (as simple as through-hole leads and vias) increase the inductance of the plane, making it
less effective at higher frequencies. Breaks in the ground plane for necessary vias must be spaced randomly.
15
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
www.ti.com
SD
C2
C1
RT2
VOUT
RT1
DUT
+VIN
GND
+VS
VIN
SD
VOUT
RT2
RT1
DUT
C1 C2
+VS
GND
+VIN
VIN
C1
100nF
RT2
50
TLV3501
C2
2.2F
VOUT
+VIN
RT1
50
Shutdown
16
TLV3501, TLV3502
www.ti.com
PRODUCT FOLDER
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TLV3501
Click here
Click here
Click here
Click here
Click here
TLV3502
Click here
Click here
Click here
Click here
Click here
11.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
17
TLV3501, TLV3502
SBOS321E MARCH 2005 REVISED APRIL 2016
www.ti.com
11.7 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
18
www.ti.com
19-Apr-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Eco Plan
Lead/Ball Finish
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
TLV3501AID
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TLV
3501
TLV3501AIDBVR
ACTIVE
SOT-23
DBV
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
NXA
TLV3501AIDBVRG4
ACTIVE
SOT-23
DBV
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
NXA
TLV3501AIDBVT
ACTIVE
SOT-23
DBV
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
NXA
TLV3501AIDBVTG4
ACTIVE
SOT-23
DBV
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
NXA
TLV3501AIDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TLV
3501
TLV3501AIDR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TLV
3501
TLV3501AIDRG4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TLV
3501
TLV3502AID
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TLV
3502
TLV3502AIDCNR
ACTIVE
SOT-23
DCN
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
NXC
TLV3502AIDCNRG4
ACTIVE
SOT-23
DCN
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
NXC
TLV3502AIDCNT
ACTIVE
SOT-23
DCN
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
NXC
TLV3502AIDCNTG4
ACTIVE
SOT-23
DCN
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
NXC
TLV3502AIDG4
ACTIVE
SOIC
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TLV
3502
TLV3502AIDR
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TLV
3502
TLV3502AIDRG4
ACTIVE
SOIC
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TLV
3502
(1)
Samples
www.ti.com
19-Apr-2015
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV3502 :
Automotive: TLV3502-Q1
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
17-Apr-2015
Device
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
TLV3501AIDBVR
SOT-23
DBV
3000
178.0
TLV3501AIDBVT
SOT-23
DBV
250
TLV3501AIDR
SOIC
2500
TLV3502AIDCNR
SOT-23
DCN
TLV3502AIDCNT
SOT-23
DCN
TLV3502AIDR
SOIC
B0
(mm)
K0
(mm)
P1
(mm)
9.0
3.23
3.17
1.37
4.0
178.0
9.0
3.23
3.17
1.37
330.0
12.4
6.4
5.2
2.1
3000
179.0
8.4
3.2
3.2
250
179.0
8.4
3.2
2500
330.0
12.4
6.4
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
8.0
Q3
4.0
8.0
Q3
8.0
12.0
Q1
1.4
4.0
8.0
Q3
3.2
1.4
4.0
8.0
Q3
5.2
2.1
8.0
12.0
Q1
17-Apr-2015
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLV3501AIDBVR
SOT-23
DBV
3000
180.0
180.0
18.0
TLV3501AIDBVT
SOT-23
DBV
250
180.0
180.0
18.0
TLV3501AIDR
SOIC
2500
367.0
367.0
35.0
TLV3502AIDCNR
SOT-23
DCN
3000
195.0
200.0
45.0
TLV3502AIDCNT
SOT-23
DCN
250
195.0
200.0
45.0
TLV3502AIDR
SOIC
2500
367.0
367.0
35.0
Pack Materials-Page 2
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