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PLASMA TV
SERVICE MANUAL
CHASSIS : PD81A

MODEL : 42PG6000 42PG6000-ZA


CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CONTENTS

CONTENTS .............................................................................................. 2

SAFETY PRECAUTIONS ..........................................................................3

SPECIFICATION ........................................................................................4

ADJUSTMENT INSTRUCTION .................................................................6

TROUBLE SHOOTING ............................................................................11

BLOCK DIAGRAM...................................................................................20

EXPLODED VIEW .................................................................................. 30

SVC. SHEET ...............................................................................................

PRINTED CIRCUIT DIAGRAM ....................................................................

Copyright©2008 LG Electronics. Inc. All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE


Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the Do not use a line Isolation Transformer during this check.
servicing of a receiver whose chassis is not isolated from the AC Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
power line. Use a transformer of adequate power rating as this between a known good earth ground (Water Pipe, Conduit, etc.)
protects the technician from accidents resulting in personal injury and the exposed metallic parts.
from electrical shocks. Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
It will also protect the receiver and it's components from being Reverse plug the AC cord into the AC outlet and repeat AC voltage
damaged by accidental shorts of the circuitry that may be measurements for each exposed metallic part. Any voltage
inadvertently introduced during the service operation. measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it In case any measurement is out of the limits specified, there is
with the specified. possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.

Keep wires away from high voltage or high temperature parts. Leakage Current Hot Check circuit

Due to high vacuum and large surface area of picture tube, AC Volt-meter
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.

Good Earth Ground


such as WATER PIPE,
Leakage Current Cold Check(Antenna Cold Check) CONDUIT etc.
To Instrument’s 0.15uF
With the instrument AC plug removed from AC source, connect an
exposed
electrical jumper across the two AC plug prongs. Place the AC METALLIC PARTS
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone 1.5 Kohm/10W
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright©2008 LG Electronics. Inc. All right reserved. -3- LGE Internal Use Only
Only for training and service purposes
SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement.

V Application Range
This spec is applied to the 42” PLASMA TV used PD81A Chassis.

Chassis Model Name Market Brand Remark


PD81A 42PG6000 Austria,Belgium,Bulgaria,Coratia,Czech,Denmark,Finland, LG
France,Germany,Greece,Hungary,Italy,Luxembourg,
Netherlands,Norway,Poland,Portugal,Rumania,Russia,Ser
bia,Slovenia,Spain,Sweden,Switzerland,UK

V Specification
Each part is tested as below without special appointment.
1) Temperature : 25±5°C (77±9°F), CST : 40±5
2) Relative Humidity: 65±10%
3) Power Voltage: Standard Input voltage (100-240V~, 50/60Hz)
* Standard Voltage of each product is marked by models.
4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with SBOM.
5) The receiver must be operated for about 20 minutes prior to the adjustment.

V Test Method
1) Performance : LGE TV test method followed.
2) Demanded other specification
Safety : CB specification
EMC : CISPR 13 specification
Model Market Appliance Remark
42PG6000-ZA Austria,Belgium,Bulgaria,Coratia,Czech,Denmark,Finlan Safety : IEC/EN60065
d,France,Germany,Greece,Hungary,Italy,Luxembourg, EMI : EN55013
Netherlands,Norway,Poland,Portugal,Rumania,Russia, EMS : EN55020
Serbia,Slovenia,Spain,Sweden,Switzerland,UK

V General Specification ( 42” XGA )


No Item Specification Remark

1 Display Screen Device 42” Wide Color Display Module Plasma Display Panel
2 Aspect Ratio 16:9
3 PDP Module PDP42G1,
RGB Closed(Well) Type Glass Filter(38%)
Pixel Format : 1365horiz. By 768 vertical
4 Operating Environment 1)Temp. : 0~40deg LGE SPEC.
2)Humidity : 20~80%
5 Storage Environment 3)Temp. : -20~60deg
4)Humidity : 10~90%
6 Input Voltage 100-240V~, 50/60Hz Maker : LG

Copyright©2008 LG Electronics. Inc. All right reserved. -4- LGE Internal Use Only
Only for training and service purposes
V Module Specification2

No Item Specification Remark

1 Market Austria,Belgium,Bulgaria,Coratia,Czech,Denmark,Finland 25 Country


,France,Germany,Greece,Hungary,Italy,Luxembourg,
Netherlands,Norway,Poland,Portugal,Rumania,Russia,
Serbia,Slovenia,Spain,Sweden,Switzerland,UK
2 roadcasting system 1) PAL/SECAM BG EU(PAL Marker)
2) PAL/SECAM DK
3) PAL I / II
4) SECAM L/L’
5) DVB T
3 Receiving system Analog : Upper Heterodyne
Digital : COFDM
4 Scart Jack(2EA) PAL, SECAM Scart1 Jack is Full scart and support
RF-OUT(Analoge)
Scart2 Jack is Half scart and support
MNT-OUT
5 Video Input (1EA) PAL, SECAM, NTSC
6 S-Video Input (1EA) PAL, SECAM, NTSC Analog(D-Sub 15Pin)
7 Component Input (1EA) Y/Cb/Cr, Y/Pb/Pr HDMI1/DVI,HDMI2,HDMI3,HDMI4
8 RGB Input RGB-PC
9 HDMI Input(4EA) HDMI-PC L/R Input
HDMI-DTV
10 Audio Input (3EA) RGB/DVI Audio, Component, AV
11 SPDIF Out(1EA) SPDIF OUT Side(X-Studio Only PG60 Series)
12 USB For SVC, S/W Download, X-Studio

Copyright©2008 LG Electronics. Inc. All right reserved. -5- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
* Using ‘power on’ button off the control R/C, power on TV.
1. Application Object
These instructions are applied all of the 42” PLASMA TV,
PD81A Chassis. 4. Auto-control adjustment process
V All adjustment process is executed one time through RS-232C.
V Command send -> ADC Calibration -> Model name
2. Note download -> EDID download.
(1) Because this is not a hot chassis, it is not necessary to use
NO Item CMD1 CMD2 Data 0 Remark
an isolation transformer. However, the use of isolation
transformer will help protect test instrument. 1 Ready a d 0 0 Ready
(2) Adjustment must be done in the correct order. 2 ADC a d 1 0 ADC start
(3) The adjustment must be performed in the circumstance of
3 ADC a d 9 9
25±5°C of temperature and 65±10% of relative humidity if
there is no specific designation. Confirmation
(4) The input voltage of the receiver must keep 100-240V~, 4 ADC a d 9 0
50/60Hz.
Mode Out
(5) The receiver must be operated for about 15 minutes prior
to the adjustment. 5 Download a e 0 0 Transmitting adjustment mode In
Mode In instruction, operate adjustment command.
O After RGB Full white HEAT-RUN Mode, the receiver must
6 EDID a e 1 0~4,9 All=0 ; HDMI1,2,3,4=1,2,3,4 ; RGB=9
be operated prior to adjustment.
O Enter into HEAT-RUN MODE Download
1) Press the POWER ON KEY on R/C for adjustment. 7 Check EDID a e 2 0~4,9 All=0 ; HDMI1,2,3,4=1,2,3,4 ; RGB=9
2) OSD display and screen display PATTERN MODE.
Status
- Select “3. Test Pattern” by using D/E(CH+/-) and
press ENTER(V) 8 Define model a e 5 1~7 Model define index(Data0) are listed at
- Select “White” by using (F/GVOL+/-) and press name next table.
ENTER(V)
9 Adjustment a e 9 9 EDID data existence check in SET

* Set is activated HEAT-RUN without signal generator in Confirmation assembly


this mode. 10 Download a e 9 0
* Single color pattern(RED/BLUE/GREEN) of HEAT-RUN
Mode Out
mode uses to check PANEL.

* Using ‘power on’ button off the control R/C, power on TV. V Adjsutment process protocol(RS-232C)
All adjustment process is executed one time through RS-232C.
CMD1 CMD2 Data 0 Remark
Do not connect extrenal input calbe.
a e 5 3 42PG6000-ZA
3. S/W auto download using the USB
Memory stick
* Using ‘power on’ button of the control R/C, power on TV. 5. Manual model name download
USB file(EPK) version must be bigger than downloaded
version of main B/D. (1) Press ADJ KEY on R/C for model name D/L.
(1) Insert the USB memory sick the PCB ASSEMBLY. (2) Select “0.Model Option” and press ENTER(V).
(2) Using ‘power on’ button of the control R/C, power on TV. (3) Select model name by using D / E (CH+/-)and press
(3) S/W download process is executed automatically. ENTER(V).

Model Name Model Option Value


42PG6000-ZA 56000000

Copyright©2008 LG Electronics. Inc. All right reserved. -6- LGE Internal Use Only
Only for training and service purposes
6. Manual ADC Adjustment (2) RGB(128bytes)

RF Input AV / Component / RGB input


NO SIGNAL or White noise NO SIGNAL

V Adjustment is done using internal ADC, so input signal is


not necessary.
V Do not connect external input cable.

6-1. Required Equipment


(1) Press ADJ KEY on R/C and enter EZ ADJUST. -> Detail EDID Options are below (ⓐ, ⓑ, ⓒ, ⓓ, ⓔ)
(2) Select “1.EDID D/L” by using D / E (CH+/-) and press
ENTER(V). ⓐ Product ID
(3) Select “Start” by using F/G(VOL+/-) and press ENTER(V). Model Name EDID MODEL Product ID FUCTION
(4) ADC Adjustment is executed automatically. 42PG6000-ZA 42PG6000-ZA 40239(9D2F) Analog
40240(9D30) Digital

7. EDID Download ⓑ Serial No


=> Controlled on production line
7-1. Required Equipment
ⓒ Month, Year
*Do not connect HDMI and RGB cable. => Controlled on production line:
(1) Press ADJ KEY on R/C and enter EZ ADJUST. ex) Monthly: ‘11’ -> ‘0B’
(2) Select “5.EDID D/L” by using D / E (CH+/-) and press Year: ‘2007’ -> ‘11’
ENTER(V).
(3) Select “Start” and press ENTER(V). ⓓ Model Name(Hex)
(4) EDID download is executed automatically. Model Name Model Name(Hex)
(5) Press EXIT key on R/C.
42PG6000 00 00 00 FC 00 34 32 50 47 36 30 30 30 0A 20 20 20 20
7-2. EDID DATA
(1) HDMI1(256bytes) ⓔ Checksum
=> Changeable by total EDID data.

8. PCMCIA CARD Checking Method


: You must adjust DTV29 Channel and insert PCMCIA CARD
to socket.

1) If PCMCIA CARD works normally, normal signals display


on screen. But it works abnormally, “No CA module” words
display on screen.
* Set up “RF mode” before launching products.

Copyright©2008 LG Electronics. Inc. All right reserved. -7- LGE Internal Use Only
Only for training and service purposes
Each PCB assembly must be checked by check JIG set. * Before adjusting White-balance, the AV ADC should be done.
(Because power PCB Assembly damages to PDP Module, If ADC status were “NG”, Need to ADC adjustment.
especially be careful)
10. Adjustment of White Balance
9. POWER PCB Assy Voltage 10-1. Required Equipment
Adjustments (Va, Vs Voltage adjustments) (1) Color Analyzer : CS-100, CA-100+(CH.10), CA-
210(CH.10))
9-1. Test Equipment : D.M.M. 1EA * Please adjust CA-100+/CA-210 by CS-1000 before
measuring.
9-2.Connection Diagram for Measuring -> You should use Channel 10 which is Matrix
: refer to Fig.1 compensated.

9-3. Adjustment Method N Color temperature standards according to CSM and Module.
(1) Va Adjustment CSM PLASMA Remark
1) After receiving 100% Full White Pattern, HEAT RUN.
2) Connect + terminal of D.M.M to Va pin of P811, connect Cool 11000K
- terminal to GND pin of P811.
Normal 9300K
3) After turning VR901, voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top. Warm 6500K
(Deviation; ±0.5V)

(2) Vs Adjustment N Change target luminance and range of the Auto adjustment
1) Connect + terminal of D.M.M to Vs pin of P811, connect W/B equipment.
– terminal to GND pin of P811. Target luminance 65
2) After turning VR951, voltage of D.M.M adjustment as
same as Va voltage which on label of panel right/top. Range 20
(Deviation; ±0.5V)

N White balance adjustment coordinate and color temperature.


Cool CS-1000 CA-100+(CH.10) CA-210(CH.10)
X 0.276 0.276±0.002 0.276±0.002
y 0.283 0.283±0.002 0.283±0.002
uv 0.000 0.000 0.000
Medium CS-1000 CA-100+(CH.10) CA-210(CH.10)
X 0.285 0.285±0.002 0.285±0.002
y 0.293 0.293±0.002 0.293±0.002
uv 0.000 0.000 0.000
Warm CS-1000 CA-100+(CH.10) CA-210(CH.10)
X 0.313 0.313±0.002 0.313±0.002
(Fig.1) Connection diagram of power adjustment for measuring y 0.329 0.329±0.002 0.329±0.002
uv 0.003 0.003 0.003

Copyright©2008 LG Electronics. Inc. All right reserved. -8- LGE Internal Use Only
Only for training and service purposes
10-2. Connection Picture of the Measuring 11. Adjustment of White Balance
Instrument(On Automatic control)
(1) Inside PATTERN is used when W/B is controlled. Connect (1) Press ADJ KEY on R/C and enter EZ ADJUST.
to auto controller or push control R/C IN-START -> Enter Select “3. Test Pattern” by using D/E(CH+/-) and press
the mode of White-Balance, the pattern will come out. ENTER(V)
Select “White” by using F/G(VOL+/-) and press ENTER(V)
and heat run over 15minutes.
(2) Zero Calibrate CA-100+/CA-210, and when controlling,
Full White Pattern CA-210 stick the sensor to the center of PDP module.
(3) Press ADJ KEY on R/C and enter EZ ADJUST.
Color
ANALYZER Select “2. White Balance” and press G(VOL +).
TYPE : CA-210 Set test-pattern on and display inside pattern.
(5) Control is carried out on three color temperatures, COOL,
MEDIUM,WARM.
RS-232C Communication
(Control is carried out thress times)
(Fig.6) Auto AV(CVBS) Color Balance Test Pattern
<Temperature : COOL>
- R-Cut / G-Cut / B-Cut is set to 64/
10-3. Auto-control interface and directions - Control R-Gain and G-Gain.
(1) Adjust in the place where the influx of light like floodlight - Each Gain is limited to 192.
around is blocked.(illumination is less than 10ux) <Temperature : MEDIUM>
(2) Measure and adjust after sticking the Color Analyzer(CA- - R-Cut / G-Cut / B-Cut is set to 64/
100+, CA210) to the side of the module. - Control R-Gain and G-Gain.
(3) Aging time - Each Gain is limited to 192.
- After aging start, keep the power on(no suspension of <Temperature : WARM>
power supply) and heat-run over 15 minutes. - R-Cut / G-Cut / B-Cut is set to 64/
- keep white pattern using inside pattern. - Control G-Gain and B-Gain.
- Each Gain is limited to 192.
A Auto adjustment Map(RS-232C)
RS-232C COMMAND CENTER
[CMD ID DATA] Min (DEFAULT)
MAX
12. Input the Shipping Option Data
Cool Med Warm Cool Med Warm 1) Push the IN-START key in a Adjust Remocon.
R Gain jg Ja js 00 192 192 192 255 2) Input the Option Number that was specified in the BOM, into
G Gain
the Shipping area.
jh Jb je 00 192 192 192 255
3) The work is finished, Push V Key.
B Gain ji Jc jf 00 192 192 192 255
R Offset 65 65 62 128

42PG1 G Offset 56 56 53 128 13. Set Information


B Offset 71 70 76 128 (Serial No& Model name)
13-1. Check the serial number & Model Name
(1) Push the menu button in DTV mode.
(2) Select the SETUP -> Diagnostics -> To set.
(3) Check the Serial Number.

Copyright©2008 LG Electronics. Inc. All right reserved. -9- LGE Internal Use Only
Only for training and service purposes
14. SET factoring condition 15. Flash Memory Download
(1) This adjustment is setting factory shipment mode. 15-1. Configuration Environment
(2) Push the IN-STOP key of adjustment remote controller before (1) To installation the ‘LG Term’, extract ‘lgterm.zip’ to a folder.
the factory shipment. (2) Execute ‘lgterm.exe’.

No Item Condition Remark

1 Input Mode Antenna


2 Volume Level 10
3 Mute Off
4 Aspect Ratio 16:9
5 SET ID 1 (3) Before downloading epk file, change the baud-rate value.
6 Picture PSM Vivid 1) Press the ‘IN-START’ button.
2) Select the ‘System’ menu.
Color Temp. Medium 3) Enter ‘115200bps’ on the ‘Baudrate’.
Advanced Cinema Off 4) Exit the menu.

Black level Auto 15-2. Download epk file using ‘LG Term’
7 Sound
(1) Execute ‘lgterm.exe’
SSM Standard
(2) Select a serial port and change a baud-rate value.
AVL Off 1) Select a serial port which is connected through a RS-
232 cable on ‘Setup’ Menu.
Balance 0
* If the selected port is not connected, a warning message
TV Speaker On will appear.
2) Change the baud-rate from a default value to
8 Time Auto Clock On
‘115200bps’ on ‘Setup’ Menu.
Manual Clock --
Off Timer / On Timer Off
Sleep Timer / Auto Off
9 Option SIMPLINK On
Key Lock Off
ISM Method Normal
Power Saving Off
10 Channel Memory Analog
Digital
(3) Press the OK button.
(4) Turn on the TV set and press the ‘Enter’ key at the same
time.
(5) Douglas prompt will appear.
(6) Insert ‘swuhz’ and enter.
(7) Change the baud-rate to ‘460800bps’ on ‘Setup’ Menu.
(8) Press ‘Alt+F’, ‘T’, ‘Z’, ‘S’ in order.
(9) Select the epk file.

(10) It will take 4~5 minutes.


(11) To apply last epk file, TV set should be restarted.

Copyright©2008 LG Electronics. Inc. All right reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
TROUBLE SHOOTING GUIDE

1. Power Board
1-1. The whole flowchart which it follows in voltage output state

Start check

Doesn't the Yes Is it identical No Is the Interface


screen whole come with Power Off signal operated?
out? condition?

Yes Yes

No 1. Check the Power Off 2. Check the Interface


condition. signal condition.

Doesn't the Yes Doesn't the No Doesn't the No Doesn't the


low pressure output St-by 5V signal 5V Monitor signal VSC signal RL-ON
come out? come out? come out? come out?

Yes Yes Yes

No 3. Check the St-by 5V 4. Check the 5V Monitor 5. Check the VSC RL-ON
signal circuit. signal circuit. signal.

No

Doesn't the Yes Doesn't the No Doesn't the Doesn't the


high tension output VSC signal Vs-ON Vs, Va voltage output VSC low pressure
come out? come out? come out? output come out?

Yes Yes Yes

No 7. Check the VSC Vs-ON 8. Check the Vs, Va 6. Check the VSC low
signal voltage output circuit. pressure output

When the When the When the


Does Y, Z B/D Module Y B/D Module Z B/D Module
high tension Yes input connector is remove, No No
input connector is input connector is
output voltage Drop does Power Board hightension removed, does output removed, does output
occur? output voltage Drop voltage drop voltage Drop
occur? occur? occurs?
No
Yes Yes Yes

9. Check the Power 10. Check the Z B/D 11. Check the Y B/D
Manufacture enterprise Board Output high Module output circuit Module output circuit
meaning of a passage tension circuit

Copyright©2008 LG Electronics. Inc. All right reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
1-2. Power Board Structure
(1) Pin Layout

(2) Pin Spec

AC INLET PDP MODULE VSC BOARD


NO NO
CN1 P11 P12 P21
1 AC Vs Vs 1/2 16V 16V
2 NC Vs Vs 3/4 GND GND
3 AC NC NC 5/6 12V 12V
4 GND GND 7/8 GND GND
5 GND GND 9/10 5V 5V
6 Va Va 11/12 5V 5V
7 Va Va 13/14 GND GND
8 GND GND 15/16 GND GND
9 M5V M5V 17/18 5V_MNT AC_DET
10 M5V M5V 19/20 RL_ON VaVs_ON
Wafer P/N YH396-03P YH396-10P YH396-10P 21/22 M5V_ON GND
Wafer P/N SMW200-22C

Copyright©2008 LG Electronics. Inc. All right reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
2. No Power
(1) Symptom
1) Doesn’t minute discharge at module.
2) Non does not come in into the front LED.

(2) Check following

No
A Power cord is plugged with TV set? Plug in power cord.

Yes

Is the AC-INLET connected with No


Connect the AC-INLET
the power board?

Yes

Is the Fuse(F101,F801) on No
Replace the Fuses.
Power Board normal?

Yes

Is the Power Board with No


Connect the Cable.
VSC Board though Cable connected?

Yes

Measure output voltages(16V,12V,5V) on the power board.


If the measured values is not normal, replace power board.

Copyright©2008 LG Electronics. Inc. All right reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
3. Protect Mode
(1) Symptom
1) After once shining, it does not discharge minutely
from module.
2) The Rely falls.(The sound is audible “click”)
3) It is converted with the color where the front LED
is red from green.

(2) Check following

No No
Is the Power Board Is output the normality Low/High Replace Power
normal ? voltage except Stand-by 5V? Board.

Yes

No Yes
Is the each connector After connecting well each connector, Replace the
normal? the normality it operates? connector.

Yes
Is the output voltage
No Yes Yes Replace
Is the Y-Board Is the Fuse(FS201) on Y-B/D normal after remove
normal? normal?(In case of open is replace) P209 connector of Y-Board.
Y-B/D?
Yes
Is the output voltage
No Yes normal after remove Yes Replace
Is the Z-Board Is the Fuse (FS1) on Z-B/D normal?
normal? (In case of open is replace) P3 connector of Z- Z-Board.
B/D?
Yes
After remove P211 output voltage normality:
No Is the output voltage normal after Yes
Is the X- Board Replace Right X-B/D
remove P242 connector of
normal? After remove P23 output voltage normality:
X-B/D?
Replace Left X-B/D
Yes

No Yes
Is the Ctrl Board Is the output voltage normal after Replace
normal? remove P163 connector of Ctrl-B/D? X-Board.

Yes

No Yes
Is the Is the output voltage normal after After remove P1001 normal operation:
VSC Board normal? remove P1001 of VSC Board? Replace VSC Board

Yes

No
Is the COF of X, Y, Z After crisis COF of each board, check the normality operates.
normal ? If in case normality operates, correspondence COF Fail is replace the module.

Copyright©2008 LG Electronics. Inc. All right reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
4. No Raster
(1) Symptom
1) No OSD and image occur at screen.
2) It maintains the condition where the front LED is green.

(2) Check following

Does minute discharge No NO Is output the normality NO Replace the Power


Is the VAVS on?
At Module? Low/High voltage except board
stand-by 5V?
YES

Yes
Check the PDP Module

Is the LVDS cable co No Reconnect the LVDS


nnect well from Ctrl cable in P501
Board to VSC Borad?

Yes

No Operates FLI106X0H(IC100)? Yes


Is the VSC Board Replace the
1. Check the Monitor OUT by SCART2 : Connect the another TV set
normal? VSC B/D.
2. Check the LVDS clock(R537,R538) on the VSC Borad by Oscilloscope?

No

Replace FLI106X0H
IC(IC100)

Copyright©2008 LG Electronics. Inc. All right reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
5. In case of occurring strange screen into specific mode
5-1. In case the OSD does not displayed
(1) Symptom
1) LED is green.
2) The minute discharged continuously becomes Accomplished from module.

(2) Check following

1. Is damage in the LVDS cable? Yes


2. Isn’t the LVDS cable connect well from 1. Replace cable
Ctrl Board to VSC Board? 2. LVDS Cable connect well from Ctrl Board to VSC Borad

No

No Operates FLI106X0H(IC100)? Yes


Is the VSC Board Replace the
1. Check the Monitor OUT by SCART2 : Connect the another TV set
normal? VSC B/D.
2. Check the LVDS clock(R240,R243) on the VSC Borad by Oscilloscope?

No

Replace FLI106X0H
Yes IC(IC100)

Is the Ctrl Board of Module normal? No


1. Check the LED on the Ctrl Board Replace the Ctrl B/D
2. Check the 5V_ON on the Power Board by the DMM.

Copyright©2008 LG Electronics. Inc. All right reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
5-2. In case of does’t display the screen into specific mode
(1) Symptom
1) The screen does not become the display from specific input mode
(RF, AV, Component, RGB, DVI).

(2) Check following


1) Check the all input mode should become normality display.

(3) In case of becomes unusual display from RF mode

No Is the RF Cable connected well? Yes Is normal the Input voltage, IIC Communication?
Is the Tuner normal? 1.Check the Input Voltage 5V(L303), 3.3V(L1022), 1.8V(TU301 Pin22)
1. Check the another TV set.
2. Check the Analog/Digital IIC(A:R334,R335 D:R342, R343)
No No

Yes Cable inserts well or Change the RF Cable Replace the Tuner(TU301)

Block A
No
Operates the FLI106X0H IC(IC100)? Replace the FLI106X0H
1.Check the Monitor OUT by SCART2 : Connect the another TV SET (IC100).
2.Check the LVDS clock(R537, R538) on the VSC Board by Oscilloscope?
3.Check the each Input Source. ATV(TV_CVBS : R302), DTV(TU301 Pin23),
S/AV Mode( SIDE_CVBS_IN : R1160), Component/RGB
(COMP_Y, V/HSYNC : R1122, R1174, R1180)
HMDI(SDA/SCL : IC201 Pin29, Pin30), SCART(SC1/2_CVBS_IN : R977, R521)
on the VSC Board by Oscilloscope.

(4) In the case of becomes unusual display from side S-video/AV mode

Is Video input of the AV Jack (JK700, 707) normal? No


Check the input source of Equipment
1. Check the CVBS signal in AV jack by Oscilloscope

Yes

Same as Block A

Copyright©2008 LG Electronics. Inc. All right reserved. - 17 - LGE Internal Use Only
Only for training and service purposes
(5) In the case of becomes unusual display from Component, RGB mode
Is R,G,B input and H,V Sync of the JK701, 703 normal? No
Check the input source of Equipment
1. Check the RGB signal/H(V)SYNC in the RGB Cable

Yes

Same as Block A

(6) In the case of becomes unusual display from HDMI mode

Is the HDMI(IC201) No Is the TMDS waveform between the No


Replace the IC201.
normal? IC and HDMI jacks normal?

Yes

Same as Block A

(7) In the case of becomes unusual display from SCART mode


No
Is Video input of A/V jack normal? Check the input source.

Yes

Same as Block A

Copyright©2008 LG Electronics. Inc. All right reserved. - 18 - LGE Internal Use Only
Only for training and service purposes
6. In case of no sound
(1) Symptom
1) LED is Green.
2) Screen display but sound is not output.

(2) Check following

All input(mode) is no Yes Is the speaker On it menu? No Set on speaker in menu.


sound? 1. Menu > Audio > TV Speaker ON/OFF (TV Speaker OFF ? ON)

No YES

Only HDMI is No No Download Is the speaker Cable normal?


Sound? the EDID data 1. Isn’t damage in the Speaker Cable?
2. Is the Speaker cable connect well form VSC B/D to Speaker.
Yes
No

Change or Reconnect the


No Check the Tuner IN/OUT
Only RF is no sound? Speaker Cable.
TV_L/R_OUT( R356) Yes

Yes

Yes
Only RF is no sound? Replace the VSC B/D

No

IC601(Audio AMP) operates Normal?


Check the Input Sound IN/OUT 1.Check 1.8V, 3.3V, 16V input Voltage (L607, IC601 Pin8, IC601 Pin32)
AV1(SC1_LIN : R1140, SC1_RIN : R1134) 2.Check the IIC communication (SDA/SCL : R645, R643)
AV1(SC2_LIN : R1146, SC2_RIN : R1145) 3.Check the Audio Signal is normal.(SPK_L/R : L603, L604, L606, L610)
AV3(SIDE_LIN : R1306, SIDE_RIN: R1307 )
PC(PC_LIN: R631, PC_RIN : R630)
Component (COMP_LIN : R1178, COMP_RIN: R1179) YES No

Replace the Audio AMP IC


(IC601).

Replace the VSC Board

Copyright©2008 LG Electronics. Inc. All right reserved. - 19 - LGE Internal Use Only
Only for training and service purposes
Main Block Diagram
TS[0], CLK, SY, VAL

TS[0:7]
Demux
WXGA Panel

Buffer
LVDS TMDS ODD[10 bit]

IC402
DATA[0:7]

74LVC541A(PW)
IC405
Bi-Buffer
Module I2C

Card
PCMCIA

Tuner

TU301

Only for training and service purposes


DDR2 Data[0:15]
Address[0:14] DDR2 SDRAM

(TDFV-G135D1)
Buffer
(64MByte)
DDR2 Address[0:12] Qimonda

IC406,407,408
74LVC542A5 74LCX244MTC
IC701

o V
f
di T
y
nl
Au or D
DDR2 SDRAM

O
(64MByte)
DDR2 Data[16:31]

Copyright©2008 LG Electronics. Inc. All right reserved.


Qimonda

Tuner V out
SCART1 CVBS, SIF, AM Audio IC701

RGB, CVBS, audio L/R


Host Address[1:16]
Audio L/R in NOR Flash
MPE (32MB)
Audio L/R out Host Data[0:15] SPANSION
I2S IC404

- 20 -
MSP4458 I2S Digital amp
Muxed audio LPF
(NTP3000A)
IC601
SCART2 Audio L/R out
Audio L/R in SPDIF
CVBS
BLOCK DIAGRAM

SPDIF_OUT
DTV/MNT OUT

IC502
USB
I2C EEPROM

NLASB3157
24LC512
CVBS, Y/C, L/R IC907
Side AV1
o TX/RX
Y Pb Pr, L/R di
COMP1 Au
R y
RGB, L/R L/ nl RX MAX3232CDR
O
RGB IC101
TX
TX RS-232C
TX
IC1013

HDMI1, TMDS[0:7]
NLASB3157

TMDS351PAG
HDMI2, IC201
HDMI3 FLI10306 I2C
TMDS[0:7] MICOM
WT61P8 AT24C16AN
HDMI4 IC802 IC801

LGE Internal Use Only


SCART 1 SCART 2
Sc art1R , G, B
[ A2P] , [ B2P] , [ C2P] 1:Audio R out (TV) 1:Audio R out (DTV)
Sc art1C VBS
[ A4 P] 2:audio R in 2:audio R in
Sc art1I D
12V- > 3. 3VL evels hif ter [ LBADC_IN4] 3:audio L out (TV) 3:audio L out (DTV)
Sc art1F B 4:audio GND 4:audio GND
TRB UF [ C4 P]
5:blue GND 5:GND
TUNER_VOUT [ SCART_FB]
TR Ad j [ 15] VIDEO TUNER 6:audio L in 6:audio L in
TR Ad j
TR Ad j 7:Blue 7:NC

Only for training and service purposes


TU_MAIN
LPF [ SV3P] 8:SCART ID 8:function select
Sc art1L ink
LevelAd j VXO_DE 9:green GND 9: NC
Sc art1L / R
LevelAd j 10:data 2 (NC) 10:data 2 (NC)
SIF
TVO UTL / R AMA UDIO
LPF TRB UF FLI10306 11:Green 11:NC

Copyright©2008 LG Electronics. Inc. All right reserved.


MUTE_LINE
I2S 12:data1 (NC) 12:data1 (NC)
MICOM [ GPIOA4] TRN et [ AUD_IN_I2S]
MSP4458 13: Link (red GND) 13: Link
Muxed Aud io [ AUD_OUT1_L,R]
Sc art2C VBS 14:data GND (NC) 14:data GND (NC)
[ SV4P]
REC8C trl1 15:Red 15: NC
Rec o rd ingC trl Level [ VXI_D15]
Sc art2I D g enerato r REC8C trl2 16:SCART FB 16: NC
0V,6 V, 11V [ VXI_D16]

- 21 -
Sc art2I D 17:video GND 17:video GND
12V- > 3. 3VL evels hif ter [ LBADC_IN5]
18:RGB Control GND 18:GND
DTV/ MNT_VOUT NLASB3157
[ VDAC_GY_YC_P]
TRA MP[ 6d B]
19:CVBS out (TV out) 19:CVBS out (DTV out)
Vid eoS / W [ VOUT2]
DTV/ MNTs witc hC trl 20:CVBS in 20:CVBS in
[ VXO_D13]
Sc art2L ink 21:safety GND 21:safety GND
LevelAd j VXO_VS
Sc art2L / R 22:GND 22:GND
LevelAd j
DTV/ MNTL / R 23:GND 23:GND
LPF TRB UF

MUTE_LINE_DTV
MICOM [ GPIOA5] TRN et
MSP4458 [ AUD_OUT1_L,R]
Muxed Aud io
SIDEY / CVBS
[ SV2P]
SIDEC
[ B4P]
SIDER
LevelAd j [ AUD_IN_R4]
SIDEL
LevelAd j [ AUD_IN_L4]
SIDESS / W
[ VXO_D11]
SIDEC VBSL ink
[ VXO_D1]

LGE Internal Use Only


BlockDiagram ( Component & RGB & HDMI)
COMP_Y
[A3P] HDMI1 5V DET
[VXO_D20]
COMP_PB HDMI2 5V DET
[B3P] [VXO_D19]
COMP_PR HDMI3 5V DET HDMI 2 TMDS[8bit]
[C3P]
[VXO_D21]
COMP_L Level Adj [AUD_IN_L3] DDC HDMI2 I2C
COMP_R [HDMI_B_HPD]
HP DET S/W1
Level Adj [AUD_IN_R3]
COMP Link HP DET S/W2
[VXO_D22]

Only for training and service purposes


[VXO_D0] HP DET S/W3 EDID
VGA_R [HDMI_A_HPD] AT24C02BN
[A1P]
VGA_G
[B1P]
VGA_B
[C1P] HDMI 2 TMDS[8bit]
RGB Link

Copyright©2008 LG Electronics. Inc. All right reserved.


[VXO_HS]

IC201
HSYNC 74HC14D HDMI SW TMDS[8bit] DDC HDMI2 I2C
Schmitt triggering [AHS_ACS] [ARX]

TMDS351PAG
VSYNC
Usage : BUF [AVS] HDMI I2C [SW]
[2WIRE_S1] EDID
PC L,R
[AUD_IN_L5,R5] AT24C02BN

- 22 -
CEC_REMOTE

D_SUB_I2C [2WIRE_S0] HDMI 3 TMDS[8bit]

EDID DDC HDMI3 I2C


EEPROM
[DSDA1,DSCL1] UCOM RX FLI10306
AT24C02BN MICOM
EDID
UCOM TX HDMI EQ Ctrl AT24C02BN
2 RX [VXO_D6]
3 TX HDMI Select 1
[GPIOA0] [GPIOB1] FET Bi-BUF
HDMI Select 2

IC502
[GPIOA1] MICOM

NLASB3157
6 RX CHAPLIN RX

IC101
4TX CHAPLIN TX HP DET S/W4

MAX3232CDR
[VXI_D23]
HDMI4 5V DET
[VXO_CLK]
HDMI SW TMDS[8bit]
[BRX]
[2WIRE_S2]
G-probe DDC HDMI4 I2C
EDID
AT24C02BN

LGE Internal Use Only


BlockDiagram ( FE & PCMCIA)
TS[0], CLK, SY, VAL
CI Detect

FE_TS[0:7] 74LVC541A(PW) TS_IN[0:7] CI_TS[0:7]


Buffer
IC402 CI Detect [POD_DETECT_N]
CI DATA[0:7] 74LVC542A5 CI DATA Dir Select

Only for training and service purposes


[POD_DIR_N]
Bi-Buffer HOST DATA[0:7]
IC405
CI Detect

Tuner

TU301
74LCX244MTC POD Address[4:7]

Copyright©2008 LG Electronics. Inc. All right reserved.


CI Address[0:7] Buffer

(TDFV-G135D1)
IC406 HOST Address[0:3]

CI Detect
REG HOST Address[4] FLI10306
74LCX244MTC
POD Address[8;9;14]
CI Address[8:14] Buffer

Card

- 23 -
IC407 HOST Address[10:13]

PCMCIA
CI Detect
CI Out Enable HOST Out Enable
5V [POD_OE_HOST_RD]
600mA CI Write Enable HOST Write Enable
CI IORD 74LCX244MTC HOST Address[6]
5V
[AUDO_I2SB_DAT1] CI IOWR Buffer HOST Address[5]
5V_ANN_CTL
TPS2042BDRG4 CI_MIVAL IC408 FE_TS_DATA_VAL
5V_ANN_MNT
FLI10306
Power Distributer CI_MISTRT FE_TS_DATA_SYN
Tuner

[AUDO_I2SB_DAT2]
TU301

IC301 CI_MICLK FE_TS_DATA_CLK


(TDFV-G135D1)

HOST Address[1:24]
HOST DATA[0:15]
HOST Write Enable [POD_WE_HOST_WR]
S29GL256N10TFI020
HOST Out Enable [POD_OE_HOST_RD]
NOR Flash
HOST Chip Enable [HOST_BOOD_CS_N]
MICOM RESET FLASH WP Ctrl
[GPIOE7]
[OOB_CTX]

LGE Internal Use Only


BlockDiagram (Audio & etc)
MICOM
SCART 2

5V
USB20-PWE Scart1 L/R
TPS2042BDRG4 Mute

MUTE_LINE
Power Distributer USB20-OC FLI10306 CTRL
IC901 Scart2 L/R

MUTE_LINE_DTV
[TR]

Only for training and service purposes


5V DTV/MNT LR OUT
600mA Sound IF
USB DP/DM TR BUF Mute
MSP CTRL SCART 1
TR BUF [TR]

Tuner
TU301
4458
AM AUDIO

Copyright©2008 LG Electronics. Inc. All right reserved.


[AUD_IN_L/R 1] Ch. 3

(TDFV-G135D1)
Comp L/R Level Adj TR BUF TR BUF

SIDE L/R [AUD_IN_L/R 1] Ch. 4 [AUD_OUT1 L/R]


Level Adj TV LR OUT
PC L/R [AUD_IN_L/R 1] Ch. 5 Level Adj
Level Adj Bit CLK, LR CLK,
CR Ch Data
SW_RESET
[VXO_D5] 16V

- 24 -
[AUD_MCLK0] Audio Master CLK
[AUDO_I2SA_BCLK] Bit CLK
TPY : 10W+10W
NTP3000 MAX : 15W+15W
[AUDO_I2SA_WCLK] LR CLK
[AUDO_I2SA_DAT0] LR Ch. Data Digital AMP LPF
MPE LPF

I2C 3.3V
[RESET]
[FAULT]
[AUDO_SPDIR_OUT]

AUDIO_MUTE
MICOM

SPDIF_OUT

LGE Internal Use Only


BlockDiagram (Reset)

FE_RESET TUNER

Only for training and service purposes


[VXI_D14]

CI_RST
[POD_RESET] PCMCIA

SW_RESET

Copyright©2008 LG Electronics. Inc. All right reserved.


[VXO_D5] NTP3000

FLI10306 MSP
4458
SYS RESET
Tic S/W [RESET_N]

- 25 -
EJTAG RESET
[EJ_RST_N]

KIA7029AF MICOM Reset [NRST]


Power On Reset S29GL256N10TFI020
RESET
IC803 [GPIOE6] NOR Flash
MICOM IC404

LGE Internal Use Only


I2C Control

SDA2_3.3V,SCL2_3.3V Module
[Master I2C 1] X4 : 0x72

Only for training and service purposes


EDID
AT24C02BN
TMDS MICOM
0x50
351PAG
EDID IC202
[Slave I2C 1]
NTP3000

Copyright©2008 LG Electronics. Inc. All right reserved.


AT24C02BN
0x54

TUNER
FLI10306 Digital
EDID R:0x1E
AT24C02BN W:0x1F

TUNER

- 26 -
[Slave I2C 2] SDA1_5V, SCL1_5V Analog
R : 0x87
EDID [Master I2C 0] W : 0x86
AT24C02BN
MVRAM
24LC512
[Slave I2C 0] W : 0xA6
R : 0xA7
EDID
AT24C02BN MSP4458
Digital
R:0x81
W:0x80

[DSDA1,DSCL1]
MICOM
EDID
AT24C02BN

LGE Internal Use Only


Power Voltage BlockDiagram

+5V-TUNER
KA7809 KIA78R05F Tuner
12V (IC1005)
(IC1011)

MSP4458

Only for training and service purposes


KIA78R05F +5V-CI
(IC1007) CI_module

CI_EN

Copyright©2008 LG Electronics. Inc. All right reserved.


5V +3.3V-TUNER
KIA78R33F 1A

- 27 -
Tuner
(IC1012)
+3.3V-CI
3.3V_ON
HDMI S/W, CI buffer, Flash Memory,
NTP3000A, Chaplin(AUD_VREFP )

AZ1117H-1.8TRE +1.8V
(IC1004) Tuner, NTP3000A

AZ1117H-3.3 +3.3V_STBY
(IC1003)
RS-232 Driver, Sub Micom ,

+5V
FET Power S/W
(Q1003)
HDMI S/W, OPTIC Jack, NVRAM, USB
RL_ON/PWR_ON/OFF
MSP4458

16V NTP3000A

LGE Internal Use Only


Power Voltage BlockDiagram

+3.3V-DOUGLAS
5V KIA78R33F 1A
(IC1001)

Only for training and service purposes


3.3V_ON

Copyright©2008 LG Electronics. Inc. All right reserved.


PQ018EZ02ZPH +1.8V_DOUGLAS_DDR
0.23$
(IC1000)
1.8V_DOUGLAS_EN

SC4519STRT

- 28 -
+1.26V_DOUGLAS
600Khz,3A,0.41$
(IC1002)
1.26V_DOUGLAS_EN

LGE Internal Use Only


MEMO

Copyright©2008 LG Electronics. Inc. All right reserved. - 29 - LGE Internal Use Only
Only for training and service purposes
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

305

300

301

306 304
120
200

121 307 290


280
206
230
231
201
303
330 310

331
560 520
332 302
202 204 250
570 203
205 591

590 580
240
910 400
270

260

900

901

- 30 - LGE Internal Use Only


+3.3V_DOUGLAS

IC100
FLI10610H-AA

TDFV-G135D1 D24
LBADC_33 UART0_RXD
A19
DEBUG_RX
C9010 B19
0.1uF UART0_TXD DEBUG_TX

TU301
+1.8V_DOUGLAS_DDR
E23
LBADC_GND
A20

35
AR901 CHAPLIN_RX
1K UART1_RXD

BB[CTR]
IC100

ANT[5V]
C25 B20

RF_AGC
1/16W C9042 C9047 C9055 C9062 C9068 C9072 C9077 C9082 C9087
A2 LBADC_IN1 UART1_TXD +3.3V_STBY CHAPLIN_TX 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF FLI10610H-AA

TP[VT]

+B[5V]
10uF
+3.3V_STBY

SHIELD
C24 C20 R944

AUDIO
+1.26V_DOUGLAS

GND_2

GND_1
0

VIDEO
6.3V 16V 16V 16V 16V 16V 16V 16V 16V

SDA_T
C

SCL_T
AIF_2

AIF_1
LBADC_IN2 UART1_RTS
TUNER

SYNC
+3.3V_CI B25 C19 R945

RESET
A1 0

NC_3

NC_2

NC_1
1.8V

3.3V
+5V LBADC_IN3 UART1_CTS L11 D26

AR902
C9199

MCL

1/16W
VA L

ERR
CVDD12_1 CVSS_1

SDA
B24

RST
0.1uF L12

SCL
D28

S IF

4.7K
SCART1_ID

KDS184
LBADC_IN4 16V P904
L17
CVDD12_2 CVSS_2
E24

D0

D1

D2

D3

D4

D5

D6

D7
A25 12505WS-08A0
0

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

D301
+1.8V_DOUGLAS_DDR CVDD12_3 CVSS_3
R911SCART2_I
D LBADC_IN5 1
L18 E26
A24 B26 CVDD12_4 CVSS_4

1
3.3K L19 E28
LBADC_IN6 TRST
2
CVDD12_5 CVSS_5
M11 G24
R910 F22 B27 R957 3
CVDD12_6 CVSS_6
3.3K
LBADC_RETURN TDI 4
C9045 C9050 C9064 C9070 C9074 C9079 C9084
M12
CVDD12_7 CVSS_7
G26
R912
A27 22 10uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF M17 G27
TDO
5

4.7K CVDD12_8 CVSS_8


1/10W 6.3V 16V 16V 16V 16V 16V 16V M18 J 24
A28 6
CVDD12_9 CVSS_9
TMS 5% M19 J 26
AR903 7
CVDD12_10 CVSS_10
R905
100 D21 B28 V11 J 28
4.7K
2WIRE_M1_SDA TCK
8
1/16W CVDD12_11 CVSS_11
V12 L13
SDA2_3.3V D20 A29 9

CVDD12_12 CVSS_12
2WIRE_M1_SCL EJ_RST_N V13 L14

1/10W
SCL2_3.3V B29 V18
CVDD12_13 CVSS_13
L15

R954
SCL1_5V EJ_DINT CVDD12_14 CVSS_14

1/10W
C9020

R951
V19 L16

4.7K

5%
E20

5%

1K
SDA1_5V 33pF +1.26V_DOUGLAS +1.26V_ADC_DOUGLAS CVDD12_15 CVSS_15
2WIRE_M0_SCL 50V
W11
CVDD12_16 CVSS_16
L24
F20 W12 L26
2WIRE_M0_SDA W13
CVDD12_17 CVSS_17
L28
C29 R913
CVDD12_18 CVSS_18
C320 USB_FLAG USB20-OC1 0 W18 M13
C318 100R927 B12 C28 C9157 C9155 C9156
+3.3V_IO_DOUGLAS W19
CVDD12_19 CVSS_19
M14
4.7uF D_SUB_SD
A 2WIRE_S0_SDA USB_PWRE
N USB20-PWE
1 C9154
0 . 1 uF 0 . 1 uF 0 . 1 uF CVDD12_20 CVSS_20
0.1uF 10V 100R928 A12
10uF
6.3V 16V 16V 16V CVSS_21
M15

READY D_SUB_SC
L 2WIRE_S0_SC
L R985USB_HUB F12 M16
AJ20 0 IOVDD33_1 CVSS_22
F13 N11
AR904 USBPHY_PADP R986USB_HUBUSBUP-DP
F14
IOVDD33_2 CVSS_23
N12
100 D12 AH20 0
1/16W IOVDD33_3 CVSS_24
2WIRE_S1_SDA USBPHY_PADM USBUP-DM F15 N13
+3.3V_CI +1.26V_DOUGLAS_D +1.26V_DOUGLAS

R960

R963
C12 IOVDD33_4 CVSS_25
SDA_HDMI_SW R989USB_HUB_BYPASS F16 N14

100

100
READY

READY
2WIRE_S1_SC
L IOVDD33_5 CVSS_26

R368
IC302

4.7K
SCL_HDMI_SW 0 F18 N15
AG20 USB20-1-DP

READY
IOVDD33_6 CVSS_27
TPS2042BDRG
4 DDC_SDA_4 USBPHY_VRES
R956
R990USB_HUB_BYPASS R914 F19
IOVDD33_7 CVSS_28
N16
DDC_SCL_4 E11 C9019 0
USB20-1-DM 0 AD8 N17
2WIRE_S2_SDA 6.2K 0.1uF C9031 C9035 C9039 C9044 C9049 C9056 C9063 C9069 C9073 C9078 AD10
IOVDD33_8 CVSS_29
N18
D11 C9027
1% 16V 10uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF IOVDD33_9 CVSS_30
+5V GND OC1 2WIRE_S2_SC
L AD11 N19
1 8 C21 6.3V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V
AD12
IOVDD33_10 CVSS_31
N27
IRDATA AD14
IOVDD33_11 CVSS_32
N28
R362 IOVDD33_12 CVSS_33
IN OUT1 2K AD16 P11
2 7 5V_ANN_MNT A13 AD17
IOVDD33_13 CVSS_34
P12
READY PWM3 +3.3V_DOUGLAS +3.3V_IO_DOUGLAS
AD18
IOVDD33_14 CVSS_35
P13
READY B13 IOVDD33_15 CVSS_36
EN1 OUT2 PWM2 U6 P14
3 6 R364 C13 E13 V6
IOVDD33_16 CVSS_37
P15
10K PWM1 DFSYNC Y6
IOVDD33_17 CVSS_38
P16
D13 IOVDD33_18 CVSS_39
R352 0 EN2 OC2 READY CI_EN PWM0 C9026 C9029 C9032 C9036 C9040 C9046 C9053 C9060 C9066 C9071 C9075 C9043 C9048 C9058 AA6 P17
4 5 A21 L910 10uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 10uF 0 . 1 uF 0 . 1 uF IOVDD33_19 CVSS_40
+1.26V_ADC_DOUGLAS AB6 P18
READY PPWR M LB-201209-0120
P-N2 6.3V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 6.3V 16V 16V IOVDD33_20 CVSS_41
P19
5V_ANN_CTL D23 B21 CVSS_42
0.1uF RESET RESET_N PBIAS A1
ADC_VDD12_1 CVSS_43
P26
B2 R11
C316 +3.3V_ADC_DOUGLAS C3
ADC_VDD12_2 CVSS_44
R12
READY +1.26V_DOUGLAS_D
+1.26V_HDMI_DOUGLAS ADC_VDD12_3 CVSS_45
R13
CVSS_46
E4 R14
ADC_VDDA33_1 CVSS_47
+5V +5V F4 R15
+3.3V_OTP G4
ADC_VDDA33_2 CVSS_48
R16
ADC_VDDA33_3 CVSS_49
C9085 C9090 C9096 C9103 C9114 C9136 H4 R17
L921 10uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF ADC_VDDA33_4 CVSS_50
R909 +1.26V_AUD_DOUGLAS K4 R18

IC907 SW901
10K
M LB-201209-0120
P-N2 6.3V 16V 16V 16V 16V 16V
+3.3V_AUD_DOUGLAS
P6
ADC_VDDA33_5 CVSS_51
CVSS_52
R19
T11
TMUE312GAB AUD_AVDD12_1 CVSS_53
R967 24LC512 R6 T12
R969 47K 1 2 AUD_AVDD12_2 CVSS_54
47K RESET +3.3V_DOUGLAS +3.3V_HDMI_DOUGLAS
T13
READY R902 22 C9005 L1
CVSS_55
T14
R970 A0 VCC 3 4 C9001 SCART1_FB
+5V_TUNER 47K 1 8 0.1uF T6
C4P CVSS_56
T15
C9153 5 16V 0.1uF AUD_AVDD33_2 CVSS_57
0.1uF T5 T16
A1 WP READY U5
AUD_AVDD33_3 CVSS_58
T17
2 7 AUD_AVDD33_4 CVSS_59
C9095 C9101 C9112 C9122 U4 T18
R365 R968 L922 10uF 0 . 1 uF 0 . 1 uF 0 . 1 uF U3
AUD_AVDD33_5 CVSS_60
T19
A2 SCL 22 6.3V 16V 16V 16V
10 3 6 SCL1_5V M LB-201209-0120
P-N2 AUD_AVDD33_6 CVSS_61
T24
CVSS_62
R982 R971 +1.26V_DDRPLL U2 T26
Q307 4.7K VSS
4 5
SDA 22 AUD_HP_AVDD33 CVSS_63
U11
SDA1_5V CVSS_64
2SA1504S D22 U12
E +1.26V_DOUGLAS_D+1.26V_AUD_DOUGLAS
DDRPLL_AVDD12 CVSS_65
U13
+1.8V_DOUGLAS_DD
R CVSS_66
D25 U14
B R366 C R367 D27
DDR_VDD_1 CVSS_67
U15
DDR_VDD_2 CVSS_68
C 2.2K 10K +5V
D29
DDR_VDD_3 CVSS_69
U16
BOOSTER C9113 C9123 C9134 F25 U17
B L926 10uF 0 . 1 uF 0 . 1 uF F27
DDR_VDD_4 CVSS_70
U18
Q308 6.3V 16V 16V

R343

R342
M LB-201209-0120
P-N2 DDR_VDD_5 CVSS_71
C322 E 2SC305 F29 U19
C305 2 +3.3V_OTP H24
DDR_VDD_6 CVSS_72
V14
0.1uF

47

47
100pF DDR_VDD_7 CVSS_73
AR301

H27 V15
AR302

AR303

50V DDR_VDD_8 CVSS_74


H29 V16
C9016 C9017 +3.3V_DOUGLAS +3.3V_ADC_DOUGLAS K25
DDR_VDD_9 CVSS_75
V17
0.1uF 47uF R984 DDR_VDD_10 CVSS_76
16V 4.7K K27 V29
33

33

33

READY IC901 K29


DDR_VDD_11 CVSS_77
W14
TPS2042BDRG
4 DDR_VDD_12 CVSS_78

GND OC1
USB 2.0 Jack L923
M LB-201209-0120
P-N2
C9104
10uF
6.3V
C9118
0 . 1 uF
16V
C9128
0 . 1 uF
16V
C9138
0 . 1 uF
16V
M25
M29
N24
DDR_VDD_13
DDR_VDD_14
DDR_VDD_15
CVSS_79
CVSS_80
CVSS_81
W15
W16
W17
1 8 P28 W24
DDR_VDD_16 CVSS_82
R25 W26
IN OUT1 L908 U25
DDR_VDD_17 CVSS_83
W28

R950
OPTION: RF AGC 2 7
DDR_VDD_18 CVSS_84

10K
V27 AA24
FE_TS_DATA_SYN

FE_TS_DATA_CLK

120-ohm DDR_VDD_19 CVSS_85

5
C9025 +3.3V_DOUGLAS +3.3V_AUD_DOUGLAS Y25 AA26

KJA-UB-4-0004
EN1 OUT2
USB20-PWE
1 100uF DDR_VDD_20 CVSS_86
FE_TS_DATA[0]

FE_TS_DATA[1]

FE_TS_DATA[2]

FE_TS_DATA[3]

FE_TS_DATA[4]

FE_TS_DATA[5]

FE_TS_DATA[6]

FE_TS_DATA[7]

3 6 Y27 AA27

4
16V

M
(USE ONLY FOR SECAM
)
DDR_VDD_21 CVSS_87

USB DOWN STREA


R936 R961 Y29 AC24
0 EN2 OC2 0 AB24
DDR_VDD_22 CVSS_88
AC26

SDA1_5V
4 5

3
DDR_VDD_23 CVSS_89

V
C9109 C9119 C9130 AB27 AC28

SCL1_5
C317 USB20-OC1 L924 10uF 0 . 1 uF 0 . 1 uF AB29
DDR_VDD_24 CVSS_90
AE24
FE_TS_DATA_VAL

6.3V 16V 16V

JK901
+5V_TUNER C313 4.7uF
M LB-201209-0120
P-N2
AD25
DDR_VDD_25 CVSS_91
AE26

2
C306 C307 C308 C309 AD27
DDR_VDD_26 CVSS_92
AE28
0.1uF 100pF 0.1uF 220uF 0.1uF 10V DDR_VDD_27 CVSS_93
L303
T

C
FE_RESE

AD29
16V
A

50V 16V 16V 16V


L

R360

1
DDR_VDD_28
FE_SC

FE_SD

MLB-201209-0120P-N
2 Q306 B 10K +1.26V_DOUGLAS_D +1.26V_DDRPLL AF25
DDR_VDD_29 ADC_GND12_1
D4

2SC3052 AGC_SPEED_CT
L AF27 E5
USB POWER ENABLE USB20-1-DM AF29
DDR_VDD_30
DDR_VDD_31
ADC_GND12_2
ADC_GND12_3
F6

E +3.3V_DOUGLAS

H
LOW ACTIV E

CDS3C30GT

CDS3C30GT
USB20-1-DP E22 F5
+3.3V_TUNER C9054 C9061
DDRPLL_AVDD33 ADC_GNDA_1
E3
FE_TS_DATA[0-7],FE_TS_DATA_CLK,FE_TS_DATA_VA L,FE_TS_DATA_SYN

L919 0 . 1 uF 0 . 1 uF +3.3V_DOUGLAS_VDDI F23


ADC_GNDA_2
F1
16V 16V
FE_TS_DATA_VAL

M LB-201209-0120
P-N2 DDR_VDDI_1 ADC_GNDA_3
+1.8V AD23 G5

D901

D902
30V

30V
DDR_VDDI_2 ADC_GNDA_4
G3
ADC_GNDA_5
C326 C325 G25
DDR_VRF_0 ADC_GNDA_6
H5
0.1uF 0.1uF DDR2_VREF R24
DDR_VRF_1 ADC_GNDA_7
J5
16V 16V +3.3V_DOUGLAS +3.3V_LVTX_DOUGLAS +3.3V_LVTX_PLL_DOUGLAS AA25 K5
DDR_VRF_2 ADC_GNDA_8
K3
C9003 R904

USBUP-DM
+3.3V_DOUGLAS_VAA

USBUP-DP
SCART1_VIN
M28 A4P 0.1uF
R907 R908
0 0 V24
DLL_VAA 0
M6
22
C9213 C9214 C9166 R977 R978
DLL_VAA 1 AUD_AVSS12_1 10
33pF 33pF C9030 C9033 C9037 C9051 +3.3V_HDMI_DOUGLAS N6
C9004 R903
0 . 1 uF 510
50V 50V 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF AUD_AVSS12_2
C4 L2
R919 16V 16V 16V 16V HDMI_VDDA33_1 B4P SIDE_CIN
D5 P1 0.1uF

SUSP_IND/LOCAL_PWR/NON_REM
1M

0
HDMI_VDDA33_2 AUD_AVSS33_2 22

100K R920
R334 100 D6 P2
SCL2_3.3
V FE_SC
L X901 HDMI_VDDA33_3 AUD_AVSS33_3

R921
E6 P3

12K
+3.3V_CI 24MHz +3.3V_CI HDMI_VDDA33_4 AUD_AVSS33_4

1%
R346 R347 C312 E7 P4
R335 100 470 82 R374 +1.26V_HDMI_DOUGLAS
HDMI_VDDA33_5 AUD_AVSS33_5
P5
SDA2_3.3V FE_SDA SIF 0.01uF 270 +3.3V_DOUGLAS
+1.26V_DOUGLAS_D D10
AUD_AVSS33_6
HDMI_VDD12_1
1% R302 E8
HDMI_VDD12_2 AUD_HP_AVSS33
U1
0 E9
Q301 TU_MAIN HDMI_VDD12_3

XTAL1/CLKI N
C9121 C9131 C9076 C9081 E10 E21
R301 +3.3V_CI
R345 2SA1504S C319 C9210 C9202 C9211 C9209 C9204 0 . 1 uF 0 . 1 uF 33uF 0 . 1 uF
+3.3V_LVTX_DOUGLAS
HDMI_VDD12_4 DDRPLL_AGND

USBUP_DP

VDDA3329
+5V

M
VDD33PLL

VDD18PLL
330 4 . 7 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF C9200C9205

USBUP_D
16V 16V 10V 16V
4.7K 270pF 6.3V 16V 16V 16V 16V 1uF 0 . 1 uF +5V AE21 A2
1%

RBIAS

XTAL 2
P901 LVTX_VDD33_1 HDMI_GNDA_1

R923 100K
READY 16V 16V AE22 C5
12505WS-06A0
0 LVTX_VDD33_2 HDMI_GNDA_2
R371 E R358 +3.3V_LVTX_PLL_DOUGLAS AF24 C6
0 2SA1504S 100 LVTX_VDD33_3 HDMI_GNDA_3
C7
Q304 HDMI_GNDA_4

36

35

34

33

32

31

30

29

28
R988USB_HUB
B 0 USBDN1_DM VBUS_DET R922 100K
+3.3V_DOUGLAS +3.3V_DOUGLAS +3.3V_DOUGLAS_VDDI AG26 C8
1 USB20-1-DM 1 27 LVTX_PLL_VDD33 HDMI_GNDA_5
C9
R987USB_HUB R962
C N e a r b y p i n F23 Nearby pin AD23 HDMI_GNDA_6

R915 100K
R373 0 USBDN1_DP RESET_N 0 READY A26 C10
USB20-1-DP 2 26 C9206
1K 1uF
OTP_VDD33 HDMI_GNDA_7
D7

1%
2 USBDN2_DM HS_IND/CFG_SEL1 C9201
READY BLUE-DM 3 25
0 . 1 uF
16V +3.3V_DOUGLAS B23
HDMI_GNDA_8
D8
L928 C9164 C9165 C9163 C9196 C9144 RPLL_AVDD33 HDMI_GNDA_9
TUNER_VOUT BLUE-DP USBDN2_DP 4 24 SCL/SMBCLK/CFG_SEL
016V C9159 C9052 C9059 C9162 C9160 C9161
M LB-201209-0120
P-N2 10uF 0 . 1 uF 10uF 0 . 1 uF 10uF +1.26V_DDRPLL
C321 3 BLUE-DM IC902 330uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF
6.3V 16V 6.3V 16V C23 AD21
R357 E 220uF VDDA335 5 USB2512 23 VDD33 6.3V 16V 16V 16V 16V 16V 6.3V
READY
RPLL_AVDD12 LVTX_VSS_1
AD22
USB_HUB
0 16V USB_HUB +1.26V_DOUGLAS_
D LVTX_VSS_2
2SA1504S 4 NC6 6 22
C9212
SDA/SMBDATA/NON_REM1 AE20 AE23
R348 C R372 B Q305 0 . 1 uF USB_AVDD12 LVTX_VSS_3

R918 100K
R917 100K
R916 100K
AG27
Q302 1K NC7 NC21 16V +3.3V_DOUGLAS LVTX_VSS_4
0 B C
7 21 +3.3V_DOUGLAS +3.3V_DAC_DOUGLAS +3.3V_DOUGLAS +3.3V_DOUGLAS_VA A AF20
5 USB_AVDD33_1
2SC3052 READY BLUE-DP NC8 8 20 NC20 AG19 B22
USB_AVDD33_2 RPLL_AGND_1
+1.26V_DOUGLAS AH19 C22
R356 NC9 9 19 NC19 R901
0 USB_AVDD33_3 RPLL_AGND_2
E 1K 6
AM_AUDI O

10

11

12

13

14

15

16

17

18
C9028 C9034 C9038 AD6 AD20
C310 L912 10uF 0 . 1 uF 0 . 1 uF
C9002 C9197 C9198
+3.3V_DAC_DOUGLAS VDAC_VDD12 USB_GND_1
4700pF R350 C315 7 M LB-201209-0120
P-N2 6.3V 16V 16V
10uF 0 . 1 uF 0 . 1 uF
C9152 USB_GND_2
AJ19

NC18
TEST
1K 6.3V 16V 16V

VDD18
N

N
VDDA3310
4700pF AE6 AF19

PRTWR2
1

VDD33CR
PRTPWR

OCS1_

OCS2_
0.1uF VDAC_AVDD 33_1 USB_GND_3
AF5
VDAC_AVDD 33_2
AF6 AC6
VDAC_AVDD 33_3 VDAC_VSS12

2
RTR030P0
+3.3V_OTP +3.3V_DOUGLAS
AD7
VDAC_AVSS33_1

Q901
AG4
VDAC_AVSS33_2

S
C9107
USB_HU
USB_HU
B USB_HU
B B C9158 +1.8V_DOUGLAS_DDR

47K
G
0 . 1 uF

R965
C9207C920 C920
8 3 0 . 1 uF 16V
1uF 0 . 1 uF
0 . 1 uF 16V
16V 16V 16V R964
390

1K
R966
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S 1/10W
5% C

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S Q902 B

Douglas POWER
2N3904S

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. E

TUNER
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC . ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

AUDIO_MUTE
VAVS_ON

DISP_EN
P803

LED_G
LED_R

RESET
12505WS-12A0
0

IC100 CPL_DDR2_D[0-31
]
L803
FLI10610H-AA IR BLM18AG121SN1
D
1 IR
C827 C810
CPL_DDR2_D[0] F24 P27 CPL_DDR2_A[0] 10pF
DDR_D0 DDR_A0
GND 680pF
CPL_DDR2_D[1] M24 U29 CPL_DDR2_A[1] 2 50V
CPL_DDR2_D[2] DDR_D1 DDR_A1 CPL_DDR2_A[2] READY
J25 R26
DDR_D2 DDR_A2 CPL_DDR2_DQS2_
N R778 10 DDR2_DQS2_
N L802
CPL_DDR2_D[3] K26 U26 CPL_DDR2_A[3] KEY2
CPL_DDR2_D[4] DDR_D3 DDR_A3 CPL_DDR2_A[4] CPL_DDR2_DQS2_
P R779 10 DDR2_DQS2_
P 3 KEY2
M26 P25
DDR_D4 DDR_A4 CPL_DDR2_D[18
] R780 10 DDR2_D[18] BLM18AG121SN1
D
CPL_DDR2_D[5] E25 T28 CPL_DDR2_A[5] CPL_DDR2_A[0-12] C808 P_+5V
DDR_D5 DDR_A5 CPL_DDR2_D[19
] R781 10 DDR2_D[19] GND C828
CPL_DDR2_D[6] L25 R27 CPL_DDR2_A[6] CPL_DDR2_DM[0-3] 4 10pF 5pF
CPL_DDR2_D[7] DDR_D6 DDR_A6 50V
F26
DDR_D7 DDR_A7
V28 CPL_DDR2_A[7] READY
READY +3.3V_STBY
CPL_DDR2_D[8] CPL_DDR2_A[8] L805
E29
DDR_D8 DDR_A8
R29
CPL_DDR2_DM[2] KEY1
CPL_DDR2_D[9] 5 KEY1
R782 10

R8031
L29 T29 CPL_DDR2_A[9] CPL_DDR2_DM[3] DDR2_DM[2]
CPL_DDR2_D[10] DDR_D9 DDR_A9 CPL_DDR2_A[ 10] R783 10 C809
H28 V25 CPL_DDR2_D[22
] DDR2_D[22] DDR2_DM[3] BLM18AG121SN1
D P_+5V

100
CPL_DDR2_D[11] DDR_D10 DDR_A10 CPL_DDR2_DM[0] R784 10 GND C829 5pF
CPL_DDR2_D[0-31
] J29 R28 CPL_DDR2_A[11] CPL_DDR2_D[17
]

LCD ONLY : SOFT_TOUCH_BUZZ_CTR


L
DDR2_D[17] 6 10pF
CPL_DDR2_D[12] L27
DDR_D11 DDR_A11
V26 CPL_DDR2_A[ 12] R785 10 50V READY
DDR_D12 DDR_A12
CPL_DDR2_DM[1] CPL_DDR2_D[20
] DDR2_D[20] DDR2_DM[0]
CPL_DDR2_D[13] E27 READY MLB-201209-0120P-N
2 R8050
CPL_DDR2_D[14] DDR_D13 STBY_5V 10K
K28 7
DDR_D14
CPL_DDR2_D[15] CPL_DDR2_DM[0] DDR2_DM[1] C803 C807 L801

LCD ONLY : MOVING_LED_PWM


F28 K24
CPL_DDR2_D[16] DDR_D15 DDR_DM0 CPL_DDR2_DM[1] DDR2_DM[0-3] 4.7uF 0.1uF C830 R8063
Y24 J27 R786 10 GND 10V 10K
CPL_DDR2_D[17] DDR_D16 DDR_DM1 CPL_DDR2_DM[2] CPL_DDR2_D[21
] DDR2_D[21] 8 50V 10pF
AF28 AD24 R787 10 50V
CPL_DDR2_D[18] DDR_D17 DDR_DM2 CPL_DDR2_DM[3] +1.8V_DOUGLAS_DDR CPL_DDR2_D[16
] DDR2_D[16] L806
AC25 AC27 CPL_DDR2_DM[0-3] R788 10 READY
CPL_DDR2_D[23
] LED_R BLM18AG121SN1
D

LCD ONLY : PANEL_CTL


CPL_DDR2_D[19] AD26
DDR_D18 DDR_DM3 DDR2_D[23]
DDR_D19
9 LED_R
CPL_DDR2_D[20] AF26

R8061

1/16W
CPL_DDR2_D[21] DDR_D20 C831 C832
W25 U28 GND
CPL_DDR2_BA0 100pF
1%

CPL_DDR2_D[22] DDR_D21 DDR_BA0 10 470pF

47K
AE25 T27
R771

50V 50V
CPL_DDR2_BA1
680

CPL_DDR2_D[23] DDR_D22 DDR_BA1


Y26
CPL_DDR2_DQS3_
N R706 10
CPL_DDR2_D[24] DDR_D23 DDR2_DQS3_
N LED_G BLM18AG121SN1D IC803
W29 P24
CPL_DDR2_CAS_N DDR2_VREF CPL_DDR2_DQS3_
P R703 10 11
CPL_DDR2_D[25] DDR_D24 DDR_CAS_N DDR2_DQS3_
P LED_G KIA7029AF
AE29
DDR_D25 DDR_RAS_N
N26
CPL_DDR2_RAS_N CPL_DDR2_D[26
] R701 10 DDR2_D[26] L804
CPL_DDR2_D[26] AB28 N25
CPL_DDR2_CS_
N CPL_DDR2_D[27
] R702 10 DDR2_D[27] GND
1%

C833 C826 I 1
CPL_DDR2_D[27] AC29
DDR_D26 DDR_CS_N
T25 12 3 O
R770

C755 C754 100pF 470pF


CPL_DDR2_WE_
N
680

DDR_D27 DDR_WE_N

GPIOE4/LPWM/P06
CPL_DDR2_D[28] AE27 0 . 1 uF 0 . 1 uF AR716 50V 50V
CPL_DDR2_D[29] DDR_D28 50V 50V 10 2
W27
DDR_D29 DDR_CK
P29
CPL_DDR2_C
K 1/16W C814 G C813 C815
CPL_DDR2_D[30] 13 0.1uF 0.1uF 0.1uF
AD28 N29
CPL_DDR2_CK_
N

GPIOE0/PWM0

GPIOE1/PWM1
GPIOE2/PWM2
GPIOE3/PWM3

GPIOD0/HIN1
GPIOD1/HIN2
GPIOE6/VIN2
GPIOE7/VIN1
CPL_DDR2_D[31] Y28
DDR_D30 DDR_CK_N
CPL_DDR2_D[30
] DDR2_D[30] 16V 16V READY

GPIOE5/P07
DDR_D31
U27
CPL_DDR2_CKE CPL_DDR2_D[25
] DDR2_D[25]
DDR_CKE
CPL_DDR2_DQS0_
P H25 CPL_DDR2_D[28
] DDR2_D[28]
DDR_DQS0
CPL_DDR2_DQS0_
N H26 M27
DDR_DQS0_N DDR_ODT DDR2_ODT
G28

NRST
CPL_DDR2_DQS1_
P R709
R772

DDR_DQS1 AR707
10K

CPL_DDR2_DQS1_
N G29 U24 294 10
AB25
DDR_DQS1_N DDR_CAL 1/16W +3.3V_STBY
CPL_DDR2_DQS2_
P 1%
AB26
DDR_DQS2 +3.3V_STBY +3.3V_STBY
CPL_DDR2_DQS2_
N DDR_DQS2_N CPL_DDR2_D[29
] DDR2_D[29]
CPL_DDR2_DQS3_
P AA28
DDR_DQS3 CPL_DDR2_D[24
] DDR2_D[24]

36
35
34
44
43
42
41
40
39
38
37
CPL_DDR2_DQS3_
N AA29
DDR_DQS3_N CPL_DDR2_D[31
] DDR2_D[31] R8058
10K
C825
+3.3V_STBY 10uF VDD33V
C818
0.1uF 1 33 GPIOD2/P10/AD4 R8094
6.3V 16V 10K
GND GPIOD3/P11/AD5

C812 C817
18pF 18pF
CPL_DDR2_D[5] R789 10 DDR2_D[5] READY
2 32

50V 50V
CPL_DDR2_D[0] R790 10 DDR2_D[0] R8093
CPL_DDR2_D[7] R791 10 DDR2_D[7] OSCO 3 31 GPIOD4/P12/AD6 10K
IC802 3.3V_ON

24MHz
R8052

X802
R8029
OSCI 4 30 GPIOD5/P13/AD7

10K
10K
IC100 P_+5V
WT61P8-RN440WT RL_ON/PWR_ONOF
F

FLI10610H-AA R8071
GPIOB6/SSDA 5 29 GPIOD6/TXD2
R792 10 22
UCOM_TX
CPL_DDR2_DQS0_
N DDR2_DQS0_
N
R793 10 SDA2_3.3
V GPIOB5/SSCL GPIOD7/RXD2

R8082
CPL_DDR2_DQS0_
P
CPL_DDR2_D[2] R794 10 DDR2_D[2] DDR2_DQS0_
P READY
SCL2_3.3
V 6 28 UCOM_RX
R8044
GPIOB4/P05 GPIOA0/PWM4/P00

10K
C804
R795 10 22
A18 AD19
0 . 1 uF
16V
7 27 HDMI_SEL1
HDMI4_5V_DET
DDR2_ODT_T
R777 10
DDR2_ODT C18
VXI_CLK VXO_CLK
AE19 GPIOB3/P04 8 26 GPIOA1/PWM5/P01
SCART1_LINK HDMI_SEL2
VXI_DE VXO_DE R8040 R8054
CPL_DDR2_D[3] R796 10 DDR2_D[3] B18 AG18
SCART2_LINK IR
4.7K GPIOB2/IR 9 25 GPIOA2/PWM6/P02 100
CPL_DDR2_D[6] R797 10 DDR2_D[6] VXI_V S VXO_VS 1.8V_DOUGLAS_E
N
D18 AF18 R8069
DDR2_D[0-31]
CPL_DDR2_D[1] R798 10 DDR2_D[1] VXI_H S VXO_HS RGB_LINK 100 GPIOB1/IRQ3/CEC 10 24 GPIOA3/PWM7/P03 1.26V_DOUGLAS_E
N
DDR2_VREF CPL_DDR2_D[4] R799 10 DDR2_D[4] CEC_0
C751 10uF R8087
C752 10uF IC701 6.3VDDR2_VREF IC703 0 GPIOB0/IRQ2 23 GPIOA4/DSCL2

R8055
6.3V E19 AF15
COMP_LINK
11
HYB18T512160AF-3S C750 0.1uF HYB18T512160AF-3S VXI_D 0 VXO_D0 READY

15K
C753 0.1uF 16V AR710 A17 AH16

12
13
14
15
16
17
18
19
20
21
22
16V 10 VXI_D 1 VXO_D1 SIDE_CVBS_LINK
1/16W DDR2_D[13] B17 AJ16
C702 0.1uF DDR2_A[0-12] C722 DDR2_D[16] CPL_DDR2_D[13 ] MODULE_SER_CL
K
DDR2_A[0-12] VREF J2 G8 DQ0 DDR2_D[0] VREF J2 G8 DQ0 DDR2_D[8] VXI_D 2 VXO_D2
DDR2_D[17] CPL_DDR2_D[8] C17 AE15
G2 DQ1 DDR2_D[1] 0.1uF G2 DQ1 DDR2_D[15] MODULE_SER_DATA
CPL_DDR2_D[15 ] VXI_D 3 VXO_D3

GPIOC7/P17/IRQ1
GPIOC6/P16/IRQ0
DDR2_D[2] DDR2_D[18]

GPIOC5/P15/TXD1
DQ2 DQ2

GPIOC4/P14/RXD1
H7 H7 D17 AE16

GPIOC3/AD3
GPIOC2/AD2
GPIOC1/AD1
GPIOC0/AD0

DSCL1
DSDA1
DDR2_A[0] A0 DDR2_A[0] A0

GPIOA5/DSDA2
M8 DQ3 DDR2_D[3] M8 DQ3 DDR2_D[19] CPL_DDR2_DQS1_
N
DDR2_A[1] A1 M3
H3 DDR2_A[1] A1 M3
H3 VXI_D 4 VXO_D4
DDR2_A[2] H1 DQ4 DDR2_D[4] DDR2_A[2] H1 DQ4 DDR2_D[20] R710 10 F17 AF16
A2 M7 DQ5 DDR2_D[5]
A2 M7 DQ5 DDR2_D[21] DDR2_DQS1_
N VXI_D 5 VXO_D5 SW_RESE
T
DDR2_A[3] H9 DDR2_A[3] H9
A3 N2 A3 N2 DDR2_D[22] A16 AG16 HDMI_SW_EQ
DDR2_A[4] A4 F1 DQ6 DDR2_D[6] DDR2_A[4] A4 F1 DQ6
VXI_D 6 VXO_D6
N8
F9 DQ7 DDR2_D[7] N8
F9 DQ7 DDR2_D[23] CPL_DDR2_DQS1_
P R705 10 B16 AH17 +3.3V_STBY
DDR2_A[5] A5 N3 DDR2_A[5] A5 N3 DDR2_D[10] DDR2_DQS1_
P
C8 DQ8 DDR2_D[8] C8 DQ8 DDR2_D[24] CPL_DDR2_D[10
] R704 10 VXI_D 7 VXO_D7 AGC_SPEED_CT
L
DDR2_A[6] A6 N7 DDR2_A[6] A6 N7 C16 AJ17
DQ9 DDR2_D[9] DQ9 DDR2_D[25]

R8030

R8072
DDR2_A[7] C2 DDR2_A[7] C2
A7 P2 DQ10 DDR2_D[10]
A7 P2 DQ10 DDR2_D[26] CPL_DDR2_D[11] R707 10 DDR2_D[11] VXI_D 8 VXO_D8 BOOSTE
R
DDR2_A[8] A8 P8
D7 DDR2_A[8] A8 P8
D7 D16 AE17
D3 DQ11 DDR2_D[11] D3 DQ11 DDR2_D[27] VXI_D 9 VXO_D9 R8091

A 22

L22
DDR2_A[9] A9 P3 DDR2_A[9] A9 P3 D19 AF17 100
D1 DQ12 DDR2_D[12] D1 DQ12 DDR2_D[28] AR711 MUTE_LINE
DDR2_A[10] A10/AP DDR2_A[10] A10/AP VXI_D10 VXO_D10

D_SUB_SC
M2 M2 DDR2_D[29] 10 IC801
DDR2_A[11] D9 DQ13 DDR2_D[13] DDR2_A[11] D9 DQ13
E16 AG17
A11 A11 1/16W

D_SUB_SD
P7 P7 DDR2_D[30]
DQ14 DDR2_D[14] DQ14 SIDE_S_S
W AT24C16AN-10SI-2.
7

R8075
DDR2_A[12] A12 R2
B1 DDR2_A[12] A12 R2
B1
DDR2_D[14] VXI_D11 VXO_D11
B9 DQ15 DDR2_D[15] +1.8V_DOUGLAS_DDR B9 DQ15 DDR2_D[31] CPL_DDR2_D[14 ] A15 AH18
DDR2_D[9]

47K
+1.8V_DOUGLAS_DDR CPL_DDR2_D[9] VXI_D12 VXO_D12 R8092
BA0 BA0 CPL_DDR2_D[12 ] DDR2_D[12] B15 AJ18 DTV/MNT_SWITCH C819 VCC A0 100
DDR2_BA0 L2 DDR2_BA0 L2 VXI_D13 VXO_D13 8 1
+3.3V_STBY MUTE_LINE_DTV
0.1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF

DDR2_BA1
BA1 L3 VDD5 DDR2_BA1 BA1 L3 VDD5 C15 AD15 16V
A1 A1
AR708 FE_RESE
T VXI_D14 VXO_D14

R8080
VDD4 VDD4 C741 C742 CPL_DDR2_A[0-12] 10 DDR2_D[0-31] D15 AE18 WP A1

READY
E1 E1 +3.3V_STBY
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF
0 .1uF

7 2
R711 CK VDD3 R712 200 CK VDD3 330uF 1uF 1/16W REC_8_CTRL
1 VXI_D15 VXO_D15

C801
24pF
200 CPL_DDR2_A[10] DDR2_A[10]

10K
J8 J9 DDR2_CK J8 J9
DDR2_CK CK VDD2 CK VDD2
6.3V 6.3V E15 R8051
DDR2_CK_N K8 M9
C720 C721 DDR2_CK_N K8 M9 CPL_DDR2_A[3] DDR2_A[3] REC_8_CTRL
2 +3.3V_DOUGLAS 22 SCL A2
VXI_D16

z
19.66080H
C724
C725
C726
C727
C728
C729
C730
C731
C732
C733
C734
C735
C736
C737
C738

DDR2_CKE
CKE K2 R1 VDD1 330uF 1uF DDR2_CKE
CKE K2 R1 VDD1
CPL_DDR2_A[7] DDR2_A[7] A14 6 3 R8073
6.3V 6.3V 10K
CPL_DDR2_A[12] DDR2_A[12] VXI_D17 R8053
C703
C704
C705
C706
C707
C708
C709
C710
C711
C712
C713
C714
C715
C716
C717

B14 A22

X801
ODT ODT 22 SDA GND
K9
DDR2_ODT_T K9 AR706 VXI_D18 REF_CLK 5 4 R8068
DDR2_ODT_T CS VDDQ10 CS VDDQ10 C14 A23 10K
L8 A9
DDR2_CS_
N L8 A9 10
DDR2_CS_
N 1/16W VXI_D19 XTAL_I N R8070

24pF
C802
RAS K7 C1 VDDQ9 RAS K7 C1 VDDQ9
CPL_DDR2_A[2] DDR2_A[2] HDMI2_5V_DET 6.8K
DDR2_RAS_N CAS VDDQ8
DDR2_RAS_N CAS VDDQ8
D14 E12
DDR2_CAS_N
L7 C3
DDR2_CAS_N L7 C3 CPL_DDR2_A[9] DDR2_A[9] HDMI1_5V_DET VXI_D20 CLKOUT
WE K3 C7 VDDQ7
DDR2_WE_N
WE K3 C7 VDDQ7
CPL_DDR2_A[5] DDR2_A[5] E14 F21 R8095
DDR2_WE_N VDDQ6 VDDQ6 HDMI3_5V_DET VXI_D21 OBUFC_CLK 6.8K
C9 C9

R8041

R8049

R8057
E9 VDDQ5 E9 VDDQ5 CPL_DDR2_BA1 DDR2_BA1 E17
HP_DET_S/W_2

3.3K

3.3K
DDR2_DQS0_
P LDQS F7 VDDQ4 DDR2_DQS2_
P LDQS F7 VDDQ4 VXI_D22
DDR2_DQS1_
P UDQS G1
DDR2_DQS3_
P UDQS G1 AR717 E18

22
DDR2_DM[0-3] B7 VDDQ3 B7 VDDQ3 10 HP_DET_S/W_4
G3 G3
1/16W VXI_D23
G7 VDDQ2 G7 VDDQ2 +3.3V_DOUGLAS F7
DDR2_DM[0] DDR2_DM[2] CPL_DDR2_WE_
N DDR2_WE_N NC_1
LDM F3 G9 VDDQ1 LDM F3 G9 VDDQ1 CPL_DDR2_A[1] DDR2_A[1] F8 P_+5V
DDR2_DM[1] UDM B3 DDR2_DM[3] UDM B3 R8002 R8004 NC_2
CPL_DDR2_BA0 DDR2_BA0
CPL_DDR2_CKE DDR2_CKE
10K 10K C27 F9

R8065
READY READY TESTMODE0 NC_3

READY
DDR2_DQS0_
N LDQS E8 A3 VSS5
DDR2_DQS2_
N LDQS E8 A3 VSS5 C26 F10

10K
DDR2_DQS1_
N UDQS A8 E3 VSS4
DDR2_DQS3_
N UDQS A8 E3 VSS4 TESTMODE1 NC_4
J3 VSS3 J3 VSS3 R716 10 R8003 R8001 F11
VSS2 VSS2 CPL_DDR2_CK_
N R715 10 DDR2_CK_N 10K 10K NC_5
NC4 L1
N1 NC4 L1
N1
CPL_DDR2_C
K DDR2_CK
READY READY K6
NC5 R3
P9 VSS1
NC5 R3
P9 VSS1
CPL_DDR2_A[0]R714 10 DDR2_A[0] SIF_IN
NC6 R7 NC6 R7
CPL_DDR2_A[4]R713 10 DDR2_A[4]

NC1 B2 VSSQ10
NC1 B2 VSSQ10 AR704
A2 VSSQ9 A2 VSSQ9 10
NC2 B8 NC2 B8 1/16W
E2
A7 VSSQ8 E2
A7 VSSQ8 CPL_DDR2_A[8] DDR2_A[8]
NC3 R8 NC3 R8
D2 VSSQ7
VSSQ6
D2 VSSQ7
VSSQ6
CPL_DDR2_CAS_
N
CPL_DDR2_A[11] DDR2_A[11]
DDR2_CAS_N H I G H : Wr i t a b le

UART_SEL
D8 D8

M5V_ON
5V_MNT

AC_DET
VSSDL E7 VSSQ5 VSSDL E7 VSSQ5 CPL_DDR2_A[6] DDR2_A[6]

KEY2

KEY1
J7 J7
F2 VSSQ4 F2 VSSQ4
+1.8V_DOUGLAS_DDR F8 VSSQ3 +1.8V_DOUGLAS_DDR F8 VSSQ3 DDR2_A[0-12]
H2 VSSQ2 H2 VSSQ2 R724 10
VDDL J1 H8 VSSQ1 VDDL J1 H8 VSSQ1 CPL_DDR2_CS_
N DDR2_CS_
N
R725 10
CPL_DDR2_RAS_
N DDR2_RAS_N
C701 C723
0.1uF 0.1uF THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
Sub-Micom
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
DDR2
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

Copyright©2008 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
+3.3V_DOUGLAS

IC100 IC100
FLI10610H-AA FLI10610H-AA

TV_L/ROUT C9010
D24
LBADC_33 UART0_RXD
A19
B19
DEBUG_RX
M3 R1 R620 0 0.1uF UART0_TXD DEBUG_TX

M4
AUD_IN_L1 AUD_OUT1_L
R2 R621 0
SW_LOUT
PC Sound SCART1 TV_LOUT E23
LBADC_GND
+1.8V_DOUGLAS_DDR

SW_ROUT AR901 A20


M1
AUD_IN_R1 AUD_OUT1_R
T3 JK601
B u f f er Q605 R665 1K
1/16W C25
UART1_RXD
B20
CHAPLIN_RX
C9042 C9047 C9055 C9062 C9068 C9072 C9077 C9082 C9087 IC100
2SC305
2 CHAPLIN_TX
M2
AUD_IN_L2 AUD_OUT2_L
T4
PEJ024-0
1
MU TE Ctrl P_+12V
2K
C24
LBADC_IN1
LBADC_IN2
UART1_TXD
UART1_RTS
C20 0 R944
+3.3V_STBY
+3.3V_STBY 10uF
6.3V
0 . 1 uF
16V
0 . 1 uF
16V
0 . 1 uF
16V
0 . 1 uF
16V
0 . 1 uF
16V
0 . 1 uF
16V
0 . 1 uF
16V
0 . 1 uF
16V +1.26V_DOUGLAS
FLI10610H-AA
E_SPRING
AUD_IN_R2 AUD_OUT2_R 3 +3.3V_CI B25 C19 R945

RESET
Q609 0
C611 0.47uF N5 +5V LBADC_IN3 UART1_CTS L11 D26

AR902
RT1P141C-T112 C9199

1/16W
COMP_LIN T_TERMINAL1 TV_ROUT B24 CVDD12_1 CVSS_1
AUD_IN_L3 6A 0.1uF L12 D28

4.7K
MUTE_LINE SCART1_ID LBADC_IN4 16V CVDD12_2 CVSS_2
C612 0.47uF M5 T1 R630 3 1 A25
P904
12505WS-08A0
0 L17
CVDD12_3 CVSS_3
E24
COMP_RIN AUD_IN_R3 AUD_OUT_HP_L 7A B_TERMINAL1 3.9K R911SCART2_I
D LBADC_IN5 +1.8V_DOUGLAS_DDR L18 E26
PC_AUDIO_R C659 A24 B26
1
CVDD12_4 CVSS_4
C613 0.47uF N3 T2 Q606 2 3.3K L19 E28

R697
LBADC_IN6 TRST
2
CVDD12_5 CVSS_5

6.8K
SIDE_LIN AUD_IN_L4 AUD_OUT_HP_R 4 R_SPRING C697
R623 2SC3052 R667 2K 0.1uF M11 G24
47pF R910 F22 B27 R957 3
CVDD12_6 CVSS_6
C614 0.47uF N4 50V 220K 3.3K
LBADC_RETURN TDI 4
C9050 C9064 C9070 C9074 C9079 C9084
M12
CVDD12_7 CVSS_7
G26
SIDE_RIN AUD_IN_R4 5 T_SPRING
C A27 22 C9045
M17 G27
R606 R912 10uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF
D601 TDO
5

C615 0.47uF N1 AD1 220 CDS3C30GT


H R631 TV_LOUT_SC1
B Q601
4.7K
A28 1/10W 6
6.3V 16V 16V 16V 16V 16V 16V M18
CVDD12_8
CVDD12_9
CVSS_8
CVSS_9
J 24
PC_AUDIO_L AUD_IN_L5 AUDO_SPDIF_OU
T SPDIF_OU
T 7B B_TERMINAL2 3.9K 2SC305
2 5%
READY PC_AUDIO_L C684 AR903 TMS M19 J 26
N2
7

C616 0.47uF R696 25V R905


100 D21 B28 V11
CVDD12_10 CVSS_10
J 28
R647

R698
10uF

6.8K
2.2K 4.7K
2WIRE_M1_SDA TCK
8
PC_AUDIO_R AUD_IN_R5 6B T_TERMINAL2 C696
R624 E 1/16W V12
CVDD12_11 CVSS_11
L13
47pF 1K TV_LOUT D20 A29 9

AB4 50V 220K C643 R651


SDA2_3.3V
2WIRE_M1_SCL EJ_RST_N V13
CVDD12_12 CVSS_12
L14

1/10W
SHIELD_PLATE SCL2_3.3V CVDD12_13 CVSS_13
AUDO_I2SA_BCLK MS_BCLK_AMP 8 D602 R655 B29 V18 L15

R954
R601 6800pF
AC1 AC5 4.7K SCL1_5V EJ_DINT CVDD12_14 CVSS_14

1/10W
22 CDS3C30GT
H 470K C9020

R951
V19 L16

4.7K

5%
E20

5%

1K
+1.26V_DOUGLAS +1.26V_ADC_DOUGLAS
AUDIO_MASTER_CLK AUD_MCLK0 AUDO_I2SA_WCLK MS_WCLK_AMP READY SDA1_5V
2WIRE_M0_SCL 33pF
50V
W11
CVDD12_15 CVSS_15
L24
C619
47pF
AB5 AC4 F20 W12
CVDD12_16 CVSS_16
L26
50V AUD_MCLK1 AUDO_I2SA_DAT0 MS_DAT_AMP C 2WIRE_M0_SDA
C29 R913 W13
CVDD12_17 CVSS_17
L28
READY TV_ROUT_SC
1 USB20-OC1 0 CVDD12_18 CVSS_18
B Q603 USB_FLAG W18 M13
2SC305
2 C681 100R927 B12 C28 C9157 C9155 C9156
+3.3V_IO_DOUGLAS W19
CVDD12_19 CVSS_19
M14
C9154
L6 AD2 R649
R695 25V
10uF
D_SUB_SD
A 2WIRE_S0_SDA USB_PWRE
N USB20-PWE
1 10uF 0 . 1 uF 0 . 1 uF 0 . 1 uF CVDD12_20 CVSS_20
M15
E 2.2K 100R928 A12
SIF_RTN AUDO_I2SB_DAT1 5V_ANN_CTL
1K TV_ROUT D_SUB_SC
L 2WIRE_S0_SC
L
6.3V 16V 16V 16V
F12
CVSS_21
M16
AC2 AE2 R653 AJ20
R985USB_HUB
0 F13
IOVDD33_1 CVSS_22
N11
MS_BCLK AUDIN_I2S_BCLK AUDO_I2SB_DAT2 5V_ANN_MNT R661 AR904 USBPHY_PADP R986USB_HUBUSBUP-DP IOVDD33_2 CVSS_23
100 F14 N12
AB3 4.7K 470K 1/16W
D12 AH20 0 IOVDD33_3 CVSS_24
MS_WCLK C647 2WIRE_S1_SDA USBPHY_PADM USBUP-DM F15 N13
AUDIN_I2S_WCLK +1.26V_DOUGLAS_D +1.26V_DOUGLAS

R960

R963
C12 IOVDD33_4 CVSS_25
6800pF SDA_HDMI_SW F16 N14
AA4 AC3 R989USB_HUB_BYPASS

100

100
READY

READY
+3.3V_CI SCL_HDMI_SW 2WIRE_S1_SC
L 0 F18
IOVDD33_5 CVSS_26
N15
MS_DAT AG20 USB20-1-DP
AUDIN_I2S_DAT AUDO_I2SB_BCLK DDC_SDA_4 USBPHY_VRES F19
IOVDD33_6 CVSS_27
N16
AD3 DDC_SCL_4 E11 R956 C9019
R990USB_HUB_BYPASS
0
R914
0 AD8
IOVDD33_7 CVSS_28
N17
AUDO_I2SB_WCLK 6.2K USB20-1-DM
2WIRE_S2_SDA
MLB-201209-0120P-N

0.1uF IOVDD33_8 CVSS_29


2

C9031 C9035 C9039 C9044 C9049 C9056 C9063 C9069 C9073 C9078 AD10 N18
AA5 D11 1% 16V C9027
10uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF IOVDD33_9 CVSS_30
2WIRE_S2_SC
L AD11 N19
L601

AUDIN_SPDIF_IN C21 6.3V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V IOVDD33_10 CVSS_31
AE1 IRDATA
AD12
AD14
IOVDD33_11 CVSS_32
N27
N28
AUDO_MUTE IOVDD33_12 CVSS_33
L3 A13
AD16
AD17
IOVDD33_13 CVSS_34
P11
P12
AUD_VREFP PWM3 +3.3V_DOUGLAS +3.3V_IO_DOUGLAS IOVDD33_14 CVSS_35
L5 R3 B13 AD18
IOVDD33_15 CVSS_36
P13
C601 C602 C603 C604 AUD_VCM LS_OUT_L PWM2 U6 P14
47uF 0.1uF 10uF 0.1uF C13 E13 IOVDD33_16 CVSS_37
16V 16V 16V 16V L4 R4 SCART2 DTV/MNT_LOUT PWM1 DFSYNC
V6
IOVDD33_17 CVSS_38
P15
C605 C606 AUD_VREFN LS_OUT_R D13 Y6 P16
10uF 0.1uF IOVDD33_18 CVSS_39
16V 16V R5 B u f f er CI_EN PWM0
A21 L910
C9026
10uF
C9029
0 . 1 uF
C9032
0 . 1 uF
C9036
0 . 1 uF
C9040
0 . 1 uF
C9046
0 . 1 uF
C9053
0 . 1 uF
C9060
0 . 1 uF
C9066
0 . 1 uF
C9071
0 . 1 uF
C9075
0 . 1 uF
C9043
10uF
C9048
0 . 1 uF
C9058
0 . 1 uF
AA6
IOVDD33_19 CVSS_40
P17

LS_OUT_SW Q607 R668 PPWR M LB-201209-0120


P-N2 6.3V 16V 16V 16V 16V 16V 16V 16V 16V 16V 16V 6.3V 16V 16V
+1.26V_ADC_DOUGLAS AB6
IOVDD33_20 CVSS_41
P18
P19
2SC305
2 D23 B21
MNT/DTV OUT P_+12V 2K RESET RESET_N PBIAS A1
B2
ADC_VDD12_1
CVSS_42
CVSS_43
P26
R11
RT1P141C-T112 ADC_VDD12_2 CVSS_44
Q610 +3.3V_ADC_DOUGLAS C3 R12
+1.26V_DOUGLAS_D
+1.26V_HDMI_DOUGLAS ADC_VDD12_3 CVSS_45
DTV/MNT_ROUT R13
MUTE_LINE_DTV E4
CVSS_46
R14
3 1 ADC_VDDA33_1 CVSS_47
R669 +5V +5V F4 R15
2 C660 +3.3V_OTP G4
ADC_VDDA33_2 CVSS_48
R16
Q608 0.1uF ADC_VDDA33_3 CVSS_49
C9085 C9090 C9096 C9103 C9114 C9136 H4 R17
2SC3052 2K ADC_VDDA33_4 CVSS_50
SPDIF OPTIC JAC K IC907 R909
10K
L921
M LB-201209-0120
P-N2
10uF
6.3V
0 . 1 uF
16V
0 . 1 uF
16V
0 . 1 uF
16V
0 . 1 uF
16V
0 . 1 uF
16V
+1.26V_AUD_DOUGLAS
+3.3V_AUD_DOUGLAS
K4
ADC_VDDA33_5 CVSS_51
R18
R19
SW901 CVSS_52

+5V
OPTIO
+5V
N R969 R967 24LC512
TMUE312GAB
1 2
P6
R6
AUD_AVDD12_1 CVSS_53
T11
T12
C 47K AUD_AVDD12_2 CVSS_54
47K RESET +3.3V_DOUGLAS +3.3V_HDMI_DOUGLAS
T13
B Q602 READY R902 22 C9005 L1
CVSS_55
T14
DTV/MNT_LOUT_SC2 2SC305
2 C682 R970 A0 VCC 3 4 C9001 SCART1_FB
R663 25V 47K 1 8 0.1uF T6
C4P CVSS_56
T15
R672 R648 10uF C9153 16V 0.1uF AUD_AVDD33_2 CVSS_57
E 2.2K 0.1uF 5 T5 T16
DTV/MNT_LOUT A1 WP AUD_AVDD33_3 CVSS_58
SCART1_RIN

SCART2_RIN
SCART1_LIN

SCART2_LIN
1K 1K 2 7 READY U5 T17
JK602 C644 R652 AUD_AVDD33_4 CVSS_59
AM_AUDI O

C9095 C9101 C9112 C9122 U4 T18


JST1223-00
1 6800pF R658 R968 AUD_AVDD33_5 CVSS_60

SW_ROUT
L922 0 . 1 uF 0 . 1 uF 0 . 1 uF

SW_LOUT
SPDIF_OU
T 4.7K 10uF U3 T19
470K A2 SCL 22 6.3V 16V 16V 16V
GND
3 6 SCL1_5V M LB-201209-0120
P-N2 AUD_AVDD33_6 CVSS_61
T24

1
CVSS_62
R982 R971 +1.26V_DDRPLL U2 T26

F i b er O p t i c
ZD601 4.7K VSS SDA 22 AUD_HP_AVDD33 CVSS_63
U11
C657 VCC 4 5 SDA1_5V CVSS_64

READY

2
D22 U12
DDRPLL_AVDD12 CVSS_65
0.1uF +1.26V_DOUGLAS_D+1.26V_AUD_DOUGLAS U13
C +1.8V_DOUGLAS_DD
R CVSS_66
VINPUT D25 U14

3
+8V_MSP B Q604 D27
DDR_VDD_1 CVSS_67
U15

4
DTV/MNT_ROUT_SC2
MLB-201209-0120P-N
2

2SC305
2 R664 C683 D29
DDR_VDD_2 CVSS_68
U16
FIX_POLE 25V +5V DDR_VDD_3 CVSS_69
R650 E 2.2K 10uF C9113 C9123 C9134 F25 U17
DTV/MNT_ROUT L926 10uF 0 . 1 uF 0 . 1 uF DDR_VDD_4 CVSS_70
0.47uF
0.47uF

0.47uF
0.47uF

0.47uF
0.47uF

1K F27 U18
0.47uF

M LB-201209-0120
P-N2 6.3V 16V 16V DDR_VDD_5 CVSS_71
C693 C694 C648 R654 F29 U19
120-ohm

6800pF R662 DDR_VDD_6 CVSS_72


L602

0.01uF 3.3uF 4.7K +3.3V_OTP H24 V14


0.01uF

470K H27
DDR_VDD_7 CVSS_73
V15
C680
C642

DDR_VDD_8 CVSS_74
3.3uF H29 V16
50V C9016 C9017 +3.3V_DOUGLAS +3.3V_ADC_DOUGLAS K25
DDR_VDD_9 CVSS_75
V17
0.1uF 47uF R984 DDR_VDD_10 CVSS_76
16V 4.7K K27 V29
C607

C620
C629

C690
C627

C621
C626

READY IC901 K29


DDR_VDD_11 CVSS_77
W14
TPS2042BDRG
4 DDR_VDD_12 CVSS_78

C676
0.1uF
C624
100uF
C628
10uF
C685
10uF
GND OC1
USB 2.0 Jack L923
M LB-201209-0120
P-N2
C9104
10uF
6.3V
C9118
0 . 1 uF
16V
C9128
0 . 1 uF
16V
C9138
0 . 1 uF
16V
M25
M29
N24
DDR_VDD_13
DDR_VDD_14
CVSS_79
CVSS_80
W15
W16
W17
16V 16V 16V 1 8 P28
DDR_VDD_15 CVSS_81
W24
+5V READY DDR_VDD_16 CVSS_82
P-N2

R25 W26
IN OUT1 L908 U25
DDR_VDD_17 CVSS_83
W28

R950
2 7
M LB-201209-0120

DDR_VDD_18 CVSS_84
SC1_IN_R

SC2_IN_R

SC3_IN_R

SC4_IN_R

10K
SC1_IN_L

SC2_IN_L

SC3_IN_L

SC4_IN_L

V27 AA24
MONO_IN
VREFTOP

120-ohm DDR_VDD_19 CVSS_85

5
PWM AM P C9025 +3.3V_DOUGLAS +3.3V_AUD_DOUGLAS Y25 AA26

KJA-UB-4-0004
AGNDC

EN1 OUT2
AHVSS
L611

USB20-PWE
1 3 6 100uF Y27
DDR_VDD_20 CVSS_86
AA27

4
AVSS

ASG3

ASG2

ASG1

16V

M
DDR_VDD_21 CVSS_87

USB DOWN STREA


R936 R961 Y29 AC24
0 EN2 OC2 0 AB24
DDR_VDD_22 CVSS_88
AC26
4 5

3
DDR_VDD_23 CVSS_89
C9109 C9119 C9130 AB27 AC28
USB20-OC1 L924 10uF 0 . 1 uF 0 . 1 uF AB29
DDR_VDD_24 CVSS_90
AE24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

6.3V 16V 16V

JK901
M LB-201209-0120
P-N2 DDR_VDD_25 CVSS_91
AD25 AE26

2
DDR_VDD_26 CVSS_92
AD27 AE28
AVSUP CAPL_M DDR_VDD_27 CVSS_93
AD29

1
32 AHVSUP DDR_VDD_28
R628 R627 C618 ANA_IN1+ 49 +1.26V_DOUGLAS_D +1.26V_DDRPLL AF25 D4
DDR_VDD_29 ADC_GND12_1
0.1uF

62K 1.5K 4.7uF AF27 E5


31 CAPL_A
C686

50
10V ANA_IN? USB POWER ENABLE USB20-1-DM AF29
DDR_VDD_30
DDR_VDD_31
ADC_GND12_2
ADC_GND12_3
F6
C610 ANA_IN2+ 51 30 SC1_OUT_
L +3.3V_DOUGLAS
C622

H
TV_LOUT_SC1 LOW ACTIV E

CDS3C30GT

CDS3C30GT
52 29 SC1_OUT_ USB20-1-DP E22 F5
L603
C623

TESTEN R DDRPLL_AVDD33 ADC_GNDA_1


C692 56pF IC602 L609
2pF
50V

0.01uF
56pF
53 28 TV_ROUT_SC1 P_+16V DA-8580 L919
C9054
0 . 1 uF
C9061
0 . 1 uF +3.3V_DOUGLAS_VDDI ADC_GNDA_2
E3
Q611 XTAL_I N VREF1 EAP3831900
1 C656 F23 F1
SIF 54 MSP4458G-C
4 27 SC2_OUT_
R635
2S 2F 0.01uF
M LB-201209-0120
P-N2 16V 16V
AD23
DDR_VDDI_1 ADC_GNDA_3
G5

D901

D902
2SC3875
S R617 XTAL_OUT L 5 .6 R642

30V

30V
C639 DDR_VDDI_2 ADC_GNDA_4
DTV/MNT_LOUT_SC2 R674 G3
C617

0 55 26 SC2_OUT_ C671 0.1uF 4.7K ADC_GNDA_5


2pF
50V

R625 R626 READY TP R 3 .3 G25 H5


24K 470
X601
56 25 DTV/MNT_ROUT_SC2 390pF 1S 1F C658
DDR2_VREF R24
DDR_VRF_0 ADC_GNDA_6
J5
18.432MHz AUD_CL_OUT NC4 C675 R687 C634 C670 C635 0.47uF DDR_VRF_1 ADC_GNDA_7
R677 +3.3V_DOUGLAS +3.3V_LVTX_DOUGLAS +3.3V_LVTX_PLL_DOUGLAS AA25 K5
57 24 330uF 3 .3 0.1uF 0.1uF 0.1uF C631 DDR_VRF_2 ADC_GNDA_8 C9003 R904
NC5 NC3 C638 3 .3 K3

USBUP-DM
25V 390pF R686 +3.3V_DOUGLAS_VAA

USBUP-DP
SCART1_VIN
58 23 C678 0.1uF C673 M28 A4P 0.1uF
NC6 NC2 R671 4.7K R907 R908
DLL_VAA 0 22
0.01uF 0.01uF 0 0 V24 M6 C9166 R977 R978
59 22 DACM_L C663 22000pF 5 .6 C9213 C9214 DLL_VAA 1 AUD_AVSS12_1
D_CTR_I/O_1 4 33pF 33pF C9030 C9033 C9037 C9051 +3.3V_HDMI_DOUGLAS N6
C9004 R903
0 . 1 uF 510 10
60 21 DACM_R C637 L606 50V 50V 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF C4
AUD_AVSS12_2
L2
D_CTR_I/O_0 22000pF R919 16V 16V 16V 16V HDMI_VDDA33_1 B4P SIDE_CIN
61 20 D5 P1 0.1uF

SUSP_IND/LOCAL_PWR/NON_REM
3 1M

0
ADR_SEL VREF2 HDMI_VDDA33_2 AUD_AVSS33_2 22

100K R920
D6 P2

PGND1A_2
PGND1A_1

PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1

PGND1B_2
PGND1B_1
C669 HDMI_VDDA33_3 AUD_AVSS33_3
STANDBYQ 62 19 DACA_L X901

OUT1A_2
OUT1A_1

OUT1B_2
OUT1B_1

R921
E6 P3
R670 1uF

12K
+3.3V_CI 24MHz +3.3V_CI HDMI_VDDA33_4 AUD_AVSS33_4

1%
VDR1B
BST1B
2 E7 P4
NC7 63 18 DACA_R 100
+1.26V_HDMI_DOUGLAS
HDMI_VDDA33_5 AUD_AVSS33_5
P5
SW_RESE
T +3.3V_DOUGLAS AUD_AVSS33_6
64 17 1000pF 1
+1.26V_DOUGLAS_D D10
HDMI_VDD12_1

56
55
54
53
52
51
50
49
48
47
46
45
44
43
C665
10
11
I2S_DA_IN2/3 12
13
14
15
16

E8 U1
HDMI_VDD12_2 AUD_HP_AVSS33
1
2
3
4
5
6
7
8
9

BST1A 42 NC_2 C662 L604 E9


AUDIO_MASTER_CLK 1 HDMI_VDD12_3

XTAL1/CLKI N
C645 1uF
VDR1A VDR2A 1uF C646 C9121 C9131 C9076 C9081 E10 E21
+1.8V 2 41 6602T25009
C +3.3V_CI
I2S_CL4

I2S_CL3
I2S_DA_IN1

C9210 C9202 C9211 C9209 C9204 HDMI_VDD12_4 DDRPLL_AGND


I2S_CL
I2S_WS

I2S_WS4

I2S_WS3
I2C_CL

22000pF 0 . 1 uF 0 . 1 uF 33uF 0 . 1 uF
NC1
I2C_DA

DVSS
I2S_DA_OUT4

+3.3V_LVTX_DOUGLAS

USBUP_DP
DVSUP

VDDA3329
220I2S_DA_OUT

+5V

USBUP_DM
RESETQ

VDD33PLL

VDD18PLL
+3.3V_CI /RESET 3 40 BST2A 4 . 7 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF C9200C9205
R644 L605 C667 JK603 16V 16V 10V 16V
PGND2A_2 6.3V 16V 16V 16V 16V 1uF 0 . 1 uF +5V AE21 A2
MLB-201209-0120P-N
AD
2
39

RBIAS

XTAL 2
4 5 .6 DA-8580 P901 LVTX_VDD33_1 HDMI_GNDA_1
0.01uF

R923 100K
+1.8V L608 VSS_IO PGND2A_1 C666 C641 R641 16V 16V AE22 C5
5 38 EAP3831900
1 12505WS-06A0
0 LVTX_VDD33_2 HDMI_GNDA_2
100

MLB-201209-0120P-N
2 CLK_I 6 IC601 37 OUT2A_2 C651 2S 2F 0.47uF 0.1uF 4.7K R640 +3.3V_LVTX_PLL_DOUGLAS AF24 C6
LVTX_VDD33_3 HDMI_GNDA_3
CLK_O 7 36 OUT2A_1 390pF 3 .3 C7
C677 C632 HDMI_GNDA_4

36

35

34

33

32

31

30

29

28
VDD_IO PVDD2A_2 R988USB_HUB +3.3V_DOUGLAS AG26 C8
8 35 +3.3V_DOUGLAS +3.3V_DOUGLAS_VDDI
100pF 1000pF EAN41584001 C664 1S 1F R636 1 USB20-1-DM 0 USBDN1_DM 1 27 VBUS_DET R922 100K LVTX_PLL_VDD33 HDMI_GNDA_5
DGNDPLL 34 PVDD2A_1 C9
L607

9 3 .3 R987USB_HUB N e a r b y p i n F23 Nearby pin AD23 R962


100
100
220
220

R646 C652 390pF HDMI_GNDA_6

R915 100K
R615

AGNDPLL 10 33 PVDD2B_2 C650 R673 USB20-1-DP 0 USBDN1_DP 2 26 RESET_N C9206


0 READY A26 C10
3.3K 0.1uF LFM 11 NTP3000A 32 PVDD2B_1 R688 0.1uF 4.7K C672
2 1uF
OTP_VDD33 HDMI_GNDA_7
D7
0.01uF BLUE-DM USBDN2_DM HS_IND/CFG_SEL1 C9201 HDMI_GNDA_8
AVDDPLL 12 31 OUT2B_2 5 .6 3 25
0 . 1 uF
16V +3.3V_DOUGLAS B23 D8
C9164 C9165 RPLL_AVDD33 HDMI_GNDA_9
DVDDPLL 13 30 OUT2B_1 BLUE-DP USBDN2_DP SCL/SMBCLK/CFG_SEL
016V C9159 C9052 C9059 C9162 C9160 C9161 L928 C9163 C9196 C9144
P_+16V L610 4 24
M LB-201209-0120
P-N2 10uF 0 . 1 uF 10uF 0 . 1 uF 10uF +1.26V_DDRPLL
NC_1 PGND2B_2 3 BLUE-DM IC902 330uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF C23 AD21
R603
R614
R612
R609
R611

14 29 6.3V 16V 6.3V 16V 6.3V


VDDA335 VDD33 6.3V 16V 16V 16V 16V 16V RPLL_AVDD12 LVTX_VSS_1
C674 C668 C661 C640 5 USB2512 23 READY AD22
SCL1_5V 10uF 0.1uF 10uF
USB_HUB +1.26V_DOUGLAS_
D LVTX_VSS_2

15
16
17
18
19
20
21
22
23
24
25
26
27
28
0.1uF NC6 USB_HUB C9212
SDA/SMBDATA/NON_REM1 AE20 AE23
4 6 22
SDA1_5V R604 6.3V 6.3V 0 . 1 uF USB_AVDD12 LVTX_VSS_3

R918 100K
R917 100K
R916 100K
0.01uF

AG27
+3.3V_DOUGLAS
0.01uF

16V
100pF

NC7 NC21 LVTX_VSS_4

DVSS

SCL

BST2B
SDA
WCK
BCK

PGND2B_1
7 21
SW_RESET

DVDD

FAULT
VDR2B
PROTECT
SDATA
+3.3V_DOUGLAS +3.3V_DAC_DOUGLAS AF20
100 +3.3V_DOUGLAS +3.3V_DOUGLAS_VA A

2
1
+1.8V

PWM_3B/PWM_HP
PWM_3A/PWM_HP
5 USB_AVDD33_1
C609 C649 C630 C679 BLUE-DP NC8 8 20 NC20 AG19 B22
USB_AVDD33_2 RPLL_AGND_1
470pF

0.1uF 0.1uF 330uF +1.26V_DOUGLAS AH19 C22


4.7uF NC9 NC19 R901
C608

9 19 0 USB_AVDD33_3 RPLL_AGND_2
10V 50V 50V 25V 6
C633

10

11

12

13

14

15

16

17

18
C653 C689 C9028 C9034 C9038 AD6 AD20
C9002 C9197 C9198 VDAC_VDD12 USB_GND_1
1uF L912 10uF 0 . 1 uF 0 . 1 uF +3.3V_DAC_DOUGLAS
C687

C636

C625

0.1uF 10uF 10uF 0 . 1 uF 0 . 1 uF AJ19


750

750

750

C654 7 M LB-201209-0120
P-N2 6.3V 16V 16V C9152 USB_GND_2

NC18
TEST
6.3V 16V 16V

VDD18
OCS1_N

OCS2_N
VDDA3310
AE6 AF19

PRTWR2
1

VDD33CR
PRTPWR
22000pF 0.1uF VDAC_AVDD 33_1 USB_GND_3
AF5
R680 220 VDAC_AVDD 33_2
MS_DAT_AMP AF6 AC6
R678 220 VDAC_AVDD 33_3 VDAC_VSS12

2
RTR030P0
R610

R602

R616

MS_WCLK_AMP +3.3V_OTP +3.3V_DOUGLAS


R679 220 R689 AD7
MS_BCLK_AMP AUDIO_MUTE VDAC_AVSS33_1

Q901
R645 100 0 AG4
SDA2_3.3V VDAC_AVSS33_2
MS_WCLK
MS_DAT
MS_BCLK

R643 100
SCL2_3.3V

S
C691 C688
33pF 33pF C9107
READY READY USB_HU
USB_HU
B USB_HU
B B C9158 +1.8V_DOUGLAS_DDR

47K
G
0 . 1 uF

R965
C9207C920 C920
8 3 0 . 1 uF 16V
1uF 0 . 1 uF
0 . 1 uF 16V
16V 16V 16V R964
390

1K
R966
1/10W
5% C

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S Q902 B

Douglas POWER
2N3904S
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. E
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
AUDI O THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

Full SCA RT 1 COMPONENT R1179


3.9K
COMP_RIN
[SCART PIN8]
R1327
6.8K
R1172
220K
D115

L102
3.3uH
IC100 NAND FLASH READY
TV_ROUT FLI10610H-AA
R1129

R1178 P_+12V
470K

C163 C103
1000pF 1000pF 3.9K HOST_D[0]
AH6 AG7
READY COMP_LIN FE_TS_DATA_VAL
R1328

CDI0_VALI D POD_HOST_D
0
6.8K

AH7 AJ8 HOST_D[1]


R1169

3E [RD]O_SPRING
220K

FE_TS_DATA_CLK CDI0_CLK POD_HOST_D


1 HOST_D[2]
SCART1_RIN R AJ6 AG8
+3.3V_CI
D113

FE_TS_DATA_SYN
R1108

CDI0_SYNC POD_HOST_D
2 HOST_D[3]
READY

4E [RD]CONTACT AJ7 AE7


220K

R1134 C121 FE_TS_DATA[0]


D108

R1199
C156 CDI0_D0 POD_HOST_D
3 HOST_D[4]
30V

0 . 0 3 9 uF AJ5 AH9

10K
5pF 1K 25V CDI0_ERROR POD_HOST_D
4 HOST_D[5]
2E [RD]1P_CAN2 AF9
L101
3.3uH
READY
L 2
3
C
POD_HOST_D
5
AJ10 HOST_D[6] +3.3V_CI C418 C417
Q107 POD_HOST_D
6 HOST_D[7] 0.1uF 0.1uF
R1193

5D [WH]C_LUG_L W1 AG10
TV_LOUT B FLASH_WP
1/10W

OOB_CTX POD_HOST_D
7
5%

4.7K

C101 R1121 2SC305


2 W2 AF7
C164 1000pF 470K 2D [WH]1P_CAN W3
OOB_CRX HOST_D8
AH8 IC405
1000pF E1

R1210
READY Pr COMP_P
r REC_8
OOB_DRX HOST_D9
AE8 74LVC245A
R471

12K
IC410
R1140 HOST_D10
R1170

5C [RD]C_LUG_L AJ9 HY27US08121B-TPC


B
1K
D125

HOST_D11 R459
1%

SCART1_LIN W6 AG9 DIR VCC 10K


4.89V / 9.09V_120ohm(LOAD) CI_MCLKO 33
75
READY

JK101 POD_VS2_MCLKO HOST_D12 1 20


CI_DAT_DIR CI_DET
D106

2C [RD]1P_CAN1 AE9
Pb R1194
30V

PSC003-0
3 C105 R1105 C120 C3 AD4
HOST_D13
AH10 C412 NC_1 NC_28
220K 0 . 0 3 9 uF 2 CI_DET 1 48
5pF 1K POD_DETECT_N HOST_D14 CI_DATA[0] A0 OE

AUDIO_R_OUT
25V
READY
5B [BL]C_LUG_L REC_8_CTRL
1 B Q105
2SC305
2 5.19V / 10.91V_1Kohm(LOAD) CI_DAT_DIR
AD5
POD_DIR_N HOST_D15
AF10 2 19 0.1uF
+3.3V_CI NC_2
2 47
NC_27

1 SCART1_B 2B [BL]1P_CAN E1 AE3 AJ15 HOST_A[0]


CI_DATA[1] A1 B0 HOST_D[0]
NC_3
3 46
NC_26
POD_A[4] HOST_A[0]
R1168

COMP_P
b POD_A4_CTX POD_HOST_A
0 HOST_A[1] 3 18
AF3 AH15
1%

AUDIO_R_IN NC_4 NC_25


POD_A[5] HOST_A[1]
READY

2 R1195 C3 Q104 POD_A5_ITX POD_HOST_A


1 HOST_A[2] 4 45
D104

AF2 AG15
1%

3A [GN]O_SPRING

R470 10K
R1103 POD_A[6] HOST_A[2] COMMON INTERFACE
30V

2B POD_A6_ETX POD_HOST_A
2 CI_DATA[2] A2 B1 HOST_D[1] HOST_D[7]
75

AUDIO_L_OUT 1K
Y HOST_A[3] NC_5 I / O7
D124

3 75 AG2 AE14 4 17
REC_8_CTRL
2 2SC305
2 POD_A[7] POD_A7_QTX POD_HOST_A
3 HOST_A[4] HOST_A[3] 5 44
AUDIO_GND 4A [GN]CONTACT AF1 AF14 NC_6 I / O6 HOST_D[6]
4 E1 POD_A[8] POD_A8_CR
X PODREG_HOST_A
4 HOST_A[5] HOST_A[4] 6 43
AG1 AG14 CI_DATA[3] A3 B2 HOST_D[2]
B_GND POD_A[9] POD_A9_DRX POD_IOWR_HOST_A
5 HOST_A[6] HOST_A[5] 5 16 R/B I / O5 HOST_D[5]
5 2A [GN]1P_CAN AH14 7 42
POD_IORD_HOST_A
6 HOST_A[7] HOST_A[6] Bidirec(High:A ->B) HOST_READY
AUDIO_L_IN R1122 AJ14 RE I / O4 HOST_D[4]
6 PPJ209-0
1 0 HOST_A7 HOST_A[7] CI_DATA[4] A4 B3 HOST_D[3] 8 41
COMP_Y W5 AE13 6 15 HOST_OE
B_OUT JK103 GND POD_A[14] POD_A14_MCLKO HOST_A8 CE NC_24
7 R1106 +3.3V_CI Y5 AF12
R1171

CI_MOVAL HOST_CS0_
N 9 40
D123

R1245 POD_BVD2_MOVAL HOST_A9 HOST_A[10]


1%

ID 47K 1K READY Y4 AG12 CI_DATA[5] A5 B4 HOST_D[4] NC_7 NC_23


CI_MOSTRT HOST_A[10]
75

8 SCART1_ID POD_BVD1_MOSTRT POD_HOST_A1


0 HOST_A[11] 7 14 10 39
R1150
READY

C102 AH12
HOST_A[11]
D107

G_GND R1112 R1247 4.7pF POD_HOST_A1


1 HOST_A[12] NC_8 PRE
30V

9 AB1 AJ12
10K

CI_MDO[7] HOST_A[12] 11 38
18K 3.3K POD_D15_MDO
7 POD_HOST_A1
2 HOST_A[13] CI_DATA[6] A6 B5 HOST_D[5]
10
D2B_IN READY CI_MDO[6]
AA1
POD_D14_MDO
6 POD_HOST_A1
3
AE11
HOST_A[13] 8 13 VCC_1
12 37
VCC_2 HOST_D[0-7]
Y1 AF11
G_OUT R1159 CI_MDO[5] POD_D13_MDO
5 HOST_A14 VSS_1 VSS_2
11 1K AB2 AG11 +3.3V_CI CI_DATA[7] A7 B6 HOST_D[6]
SCART1_G CI_MDO[4] POD_D12_MDO
4 HOST_A15 9 12 HOST_D[0-7]
13 36
COMP_LINK
READY

AA2 AH11
1%

D2B_OUT NC_9 NC_22


CI_MDO[3]
D105

12 POD_D11_MDO3 HOST_A16 14 35
30V

R1107 Y2 AE10
+3.3V_CI C116 CI_MDO[2] H/W OPTION(AD13, AH13)
D138

RED_GND POD_D10_MDO
2 HOST_A17 GND B7 HOST_D[7] NC_10 NC_21
30V

13 75 AA3 AF13 R402 R401 R424 R425 10 11


0.1uF CI_MDO[1] POD_D9_MDO1 HOST_A18 4.7K 4.7K 4.7K 4.7K
15 34
RGB_GND 16V Y3 AG13 WXGA : R426,R427(00
)
R1151

CI_MDO[0] READY READY FHD_FRC XGA_FRC CLE NC_20


14 POD_D8_MDO0 HOST_A19 16 33
AE12 XGA : R426,R425(01
) HOST_A[2]
R_OUT HOST_A20 GND HOST_D[3]
10K

AD13 ALE I / O3
15 R422 17 32
HOST_A21 4.7K FHD : R 4 2 4 , R 4 2 7 ( 1 )0 HOST_A[1]
RGB_IO V3 AH13 WE I / O2 HOST_D[2]
16 CI_WAIT POD_WAIT_N HOST_A22 FR C : R 4 2 4 , R 4 2 5 ( 11
) 18 31
R1153 AJ11 HOST_WE
SYNC_GND1 1K V5
HOST_A23
AD9
+3.3V_CI WP I / O1 HOST_D[1]
17 SCART1_LINK 19 30
CI_CD1 POD_CD_1 HOST_A24

R464
R430 R426 R427
READY

SYNC_GND2 V4 R429 H/W VERSION OPTION(AJ11, AD9


) NC_11 I / O0 HOST_D[0]
C115 4.7K

10K
D140

18 CI_CD2 POD_CD_2 4.7K 4.7K 4.7K 20 29

11.RGB Input
30V

AJ13 WXGA_XGA WXGA_FHD


SYNC_OUT 0.1uF POD_WE_HOST_WR HOST_WE
D127

NC_12 NC_19
16V
D117

D122

D126

D128

19 AE4 AF8 21 28
CI_CE1 POD_CE_
1 POD_OE_HOST_R
D HOST_OE
SYNC_IN W4 C NC_13 NC_18
20 SCART1_R JK104 CI_CE2 POD_CE_
2 22 27
COM_GND
P_+5V HOST_ACK
AG3
HOST_ACK B Q401
KCN-DS-1-0089
READY

FLASH_WP NC_14 NC_17


R403 V2 KRC103S
1%

21 +3.3V_CI 23 26
D101

R1104 CI_IRQ 22 POD_READY_IRQ_


N
30V

+3.3V_CI +3.3V_CI V1 AE5 NC_15 NC_16


75 CI_RST POD_RESE
T HOST_DEV_CS2_
N
AF4 E 24 25
A1

A2

22 R421
1.RED R1333
IC102 KDS184
HOST_DEV_CS1_
N
HOST_DEV_CS0_
N
AJ4
HOST_CS0_
N
10K
+3.3V_CI

D141
SHIELD
2.GRN R1155 22
AT24C02BN-10SU-1.
8 AG6
C

6 VGA_R HOST_BOOT_CS_
N HOST_ACK R423
0
R1147
1K
3.BLU 1 11 AH5
10K
R1133 4.NC HOST_READY HOST_READY
R1215

C108 HOST_READY
R1214

SCART1_F
B 4.7pF D_SUB_SD
A C150
7
10K

1K
10K

C R1335 1 8 0.1uF
2 12 22
B Q102 VGA_G
C R11431K 2SC305
2 7.GNC 8 +3.3V_CI
2 7

R1115 8.B_GND READY R1181


R1149

1K B E 3 13 C106 3 6 D_SUB_SC
L
Q101 9.G_GND 4.7pF 100
READY

1%

2SC3052 R1156
10K

R1177
D102

R1101 9
0 R1114 D_SUB_SD
A
4 5
75 R1125 E 4 14 100
3.3K 11.GND R1138
D130
D129

0 1K
READY

12.SDA
READY

10 RGB_LINK +3.3V_CI
5 15
READY

C112
D137

R1109 READY
30V

75 0.1uF R405 R413


16V
R1116
TUNER_VOUT 15.SCL 16 HOST_A[0]
10K 10K
HOST_A[0]
1% 470K READY
R1334 R406 R414
22 10K 10K
VGA_B HOST_A[1] HOST_A[1]
SCART1_VIN 5.DDC_GND R407
READY
R415
6.SYNC_GND
1%

SCART1_VIN C107 10K 10K


R1102 DS_HS HOST_A[2] HOST_A[2]
D103 4.7pF READY +3.3V_CI
C132

R1174
12pF

READY 75 R408 R416


1K 10K 10K
HOST_A[3] HOST_A[3]
Half SCART 2 L106 10.R_GND DS_VS HOST_A[4]
READY
R409
10K
R417
10K
HOST_A[4]
C415 0.1uF
C133
12pF

3.3uH R1180 1K READY


DTV/MNT_ROUT R410 R418 +5V_CI IC408 GND
10K 10K
R1137

C110 HOST_A[5] HOST_A[5] CI_DET


C165
13.HSYNC
470K

1000pF READY
1000pF R411 R419
READY
R1145 14.VSYNC HOST_A[6]
10K 10K
HOST_A[6]
74LCX244MTC

CI_DATA[0-7 ]
1K D_SUB_SC
L READY
SCART2_RIN +5V R412 R420
10K 10K OE1 VCC
READY

R1120

C122 R1158 R1163 R1166 R1175 HOST_A[7] HOST_A[7] 1 20


D112

R1157
220K
C158

0 . 0 3 9 uF
75 75 4.7K 4.7K
25V 75
5pF

READY GND R472 I0 OE2


IC103 HOST_OE 2 19
74HC14
D 47
+5V O4 O0 47
L105 3 18
3.3uH DS_HS 1 14
Boot Strap Setting (NOR FLASH R477
CI_OE
DTV/MNT_LOUT 2 13

R444
ROM DOWNLOAD FOR PD
P Boot, 16bit, Internal OSC) I1 I4
R1136

R473

10K
C109 3 12
C407 HOST_WE 4 17
C162
470K

1000pF 1000pF 4 11
DS_VS 100uF P401 47
H_SYNC_P
C 16V
READY 5 10
O5 COMMON INTERFACE
O1
CI_MIVA L 5 16 47 CI_WE
6 9 CI_CD1 10067972-050L
F
C420 R478
7 8
V_SYNC_PC 0.1uF R476
R1146 16V R474 I2 I5 0
R446 35 HOST_A[6] 6 15 FE_TS_DATA_VAL
1K COMMON INTERFACE 36 CI_DATA[3] 47

R441
SCART2_LIN AR401 100 CI_DATA[4]

10K
JK102 37 3 O6 O2 47
33 7 14
READY

C123 CI_MISTRT
R1118

PSC003-0
3 R1126 38 4 CI_DATA[5] CI_IORD
D110

0 . 0 3 9 uF CI_MDO[4] R479
220K

10 5 4
C157

25V PC_SER_DAT
A C148 39 5 CI_DATA[6]
0.1uF CI_MDO[5] 6 3 I3 I6
5pF

READY 40 6 CI_DATA[7] HOST_A[5] R475 8 13


C126 C127 READY CI_MDO[6] 7 2 FE_TS_DATA_SYN
AUDIO_R_OUT 41 7 47
1 270pF 220pF CI_MDO[7] 1 CI_CE1
50V 50V R4048 42 8 CI_ADDR[10] O7 O3
2
AUDIO_R_IN
R1127 READY READY CI_CE2 0 R437 CI_MCLKI 9 12 47 CI_IOWR
43 9 CI_OE
AUDIO_L_OUT
10 READY 10K 44 10 CI_ADDR[11] R480
3 CI_IORD CI_ADDR[9] +5V GND I7
AUDIO_GND C125 C124 CI_IOWR COMMON INTERFACE
45 11 10 11 FE_TS_DATA_CLK
4 D114 D120 AR402 46 12 CI_ADDR[8]

R436
270pF 220pF
33 CI_ADDR[13]

10K
B_GND 50V 50V 47 13
5 READY READY CI_MDI[ 0] CI_ADDR[14]
5 4 48 14
AUDIO_L_IN CI_MDI[ 1]
6 PC_SER_CL
K 6 3 49 15 CI_WE
D142 CI_MDI[ 2] R456 100
B_OUT KDS184 7 2 50 16 CI_IRQ
7 CI_MDI[ 3]
8
ID R1123 0 C
A2
SIDE CVBS & S_VIDEO CI_DET
+3.3V_CI 8 1 C404
R453
51
COMMON INTERFACE 17
R454 0 C419
0.1uF
GND

GND0.1uF
AR403 33 52 18
G_GND A1 IC402 0 READY READY C411 16V CI_DET
9 D111 REC_8 CI_MDI[ 4] 53 19
0.1uF
5 4 54 20
GND CI_DET
D2B_IN READY 74LVC541A(PW) CI_MDI[ 5] CI_ADDR[12]
10 R1124 R1240 CI_MDI[ 6] 6 3 55 21 GND
G_OUT 47K C402 7 2 CI_ADDR[7]
11
1K
0.1uF CI_MDI[ 7] 56 22 IC406 IC407
SCART2_ID OE1 VCC 8 1 R443 10K CI_ADDR[6]
D2B_OUT 1 20 16V COMMON INTERFACE
57 23 74LCX244MTC +3.3V_CI 74LCX244MTC +3.3V_CI
12 R1131 R1238 58 24 CI_ADDR[5] C414 C413
RED_GND 18K +3.3V_C I
3.3K +3.3V _CI
CI_RST R435 47 CI_ADDR[4] 0.1uF 0.1uF
59 25
13 READY FE_TS_DATA[7] A0 OE2 CI_WAIT AR404 CI_ADDR[3] OE1 VCC 16V OE1 VCC 16V
2 19 COMMON INTERFACE
60 26 1 20 1 20
RGB_GND JK105 REG
R1148

14 33 61 27 CI_ADDR[2]
+3.3V_STBY +3.3V_STBY PPJ218-0
1 CI_MCLKO 5 4 CI_ADDR[1]
R1152

R_OUT FE_TS_DATA[6] A1 Y0
10K

15 3 18 CI_MOVAL 62 28 I0 OE2 I0 OE2


CI_MDI[ 7] 6 3 CI_ADDR[0] HOST_A[0] 2 19 2 19
10K

[YL]O_SPRING 63 29 POD_A[8]
16
RGB_IO
R1154 C141
I C101 4A CI_MOSTRT 7 2 64 30 CI_DATA[0]
MAX3232CDR R1160 FE_TS_DATA[5] A2 Y1 8 1 O4 O0 O4 O0
SYNC_GND1 1K 5A [YL]CONTAC T 1K 4 17 CI_MDI[ 6] AR405 65 31 CI_DATA[1] CI_ADDR[0-14] CI_ADDR[7] 3 18 CI_ADDR[0] 3 18 CI_ADDR[8]
17 SCART2_LINK 0.1uF C145 SIDE_CVBS_LINK CI_MDO[0] REG
SYNC_GND2 C119 4 5 33 66 32 CI_DATA[2]
D139

COMMON INTERFACE

RS-232C Inpu
t CI_MDO[1]
READY

C1+ VCC
30V

18
C114 0.1uF 2A [YL]U_CAN 0 . 1 uF FE_TS_DATA[4] A3 Y2 3 6 67 33 I1 I4 I1 I4
D136

1 16 5 16 CI_MDI[ 5] HOST_A[1] 4 17 4 17
30V

SYNC_OUT 0.1uF 16V CI_MDO[2] 2 68 34 POD_A[7] POD_A[9] HOST_A[4]

R451 0
19 R1306 7
16V BUFFER CI_MDO[3] COMMON INTERFACE COMMON INTERFACE

READY
1 : D a t a c a r r i e r d e t et c [WH]C_LUG 3.9K
SYNC_IN C143 V+ GND 3B
SIDE_LIN FE_TS_DATA[3] A4 Y3 1 8 2
G2 1
G1 O5 O1 O5 O1
20
2 : RX 2 15 6 15 CI_MDI[ 4] CI_ADDR[6] 5 16 5 16
P_+12V 0.1uF C161 COMMON INTERFACE CI_ADDR[1] CI_ADDR[14] CI_ADDR[9]
D131

COM_GND [WH]U_CAN R447 100


R1309

3 : TX 2B
R1304
220K

6.8K

R442
21 100pF
4 : D T R ( D a t a t e r m i n a l r e ayd C1- DOUT1 FE_TS_DATA[2] A5 Y4 CI_CD2 I2 I5 I2 I5

10K
3 14 R1307 READY 7 14 CI_MDI[ 3] +5V GND HOST_A[2] 6 15 6 15
5 : GND 4C [RD]O_SPRING 3.9K POD_A[6] HOST_A[10] POD_A[14]
22 SIDE_RIN
R1342 6 : DSR(Data set read )y C2+ RIN1 FE_TS_DATA[1] A6 Y5 GND
R1310

C160 O6 O2 O6 O2
D132

220K

4 13
6.8K

SHIELD 47 R1343 7 : RT S ( Req uest t o sen d) 5C [RD]CONTACT 8 13 CI_MDI[ 2] CI_ADDR[5] 7 14 7 14


R1303

100pF CI_ADDR[2] CI_ADDR[13] CI_ADDR[10]


E 330 8 : C T S ( C l e a r t o s e n)d C144 R1186 READY
R1119 2SA1504S 9 : RI ( R i ng i n di c a to r) 0.1uF C2- ROUT1 100 [RD]U_CAN FE_TS_DATA[0] A7 Y6 I3 I6 I3 I6
5 12 2C
9 12 GND
R1339

75 C Q103 B CHAPLIN_RX CI_MDI[ 1] HOST_A[3] 8 13 POD_A[5] HOST_A[11] 8 13 HOST_A[13]


27K

R1336 C142 R1187 10K C405


Q106 B 330 C COMMON INTERFACE 0.1uF
C111 P101 100 R428
R1128

C 0.1uF V- DIN1 FE_TS_DATA[0-7] GND Y7 AR406 O7 O3 O7 O3


2SC305
2 R1344 6 11 16V
10K

10uF CHAPLIN_TX 10 11 CI_MDI[ 0] 33 CI_ADDR[4] 9 12 CI_ADDR[3] CI_ADDR[12] 9 12 CI_ADDR[11]


Q108 B 82 16V KCN-DS-1-0088 JK106
1/16W
E 2SC305
2 DTV/MNT_VOUT R1164 R1188 PSJ018-01
DOUT2 DIN2
R1338

100 7 10 100 CI_MISTRT 1 8 GND I7 GND I7


27K

E 2 7 10 11 POD_A[4] 10 11 HOST_A[12]
C118 R1345 1 GND_TER CI_MIVA L
220uF 470 1 3 6
R1337

R1340

R1341

16V RIN2 ROUT2


6 8 9 2 C_LUG_S1 4 5
R1165 CI_MCLKI
330

330

100
1K

2 R1189
100 3 C_LUG_L1
DEBUG_RX
R1324

R1325

READY
100
READY

100

READY
7 R1322 R1347 GND
4 C_LUG_S2
3 100 0
UCOM_RX
8 PC_COMMAND 1/16W 5 C_LUG_L2
SCART2_VIN 5% SIDE_CIN
R1117

SCART2_VIN R1184
READY

1%

4
D109

R1308

75

+3.3V_STBY
D135

100 6 NC1
1%
75

9 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S


7 COM1
5 SIDE_YIN/SIDE_VIN SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
1%
D133

10 R1185
R1312

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS


75
R1346

8 NO1
100
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
10K

IC1013
NLASB3157DFT2G 11 NO2

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .


F l a s h & CI
R1110
+3.3V_STBY 10 COM2 0
SELECT B1 SIDE_S_S
W
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S 6 1
READY

UART_SEL DEBUG_TX
READY

READY

+3.3V _CI
R1113
D119

READY
D116

9 NC2
D134
D118

D121

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.


10K

VCC GND 12 4.7K


5 2 R1111
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS C167
0.1uF SHIELD
A B0
16V
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR 4 3 UCOM_TX
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

External Jack
Copyright©2008 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
IC100
SIDE HDMI

CK+_HDMI2

DDC_SDA_2
D0+_HDMI2

DDC_SCL_2
CK-_HDMI2
D2+_HDMI2

D1+_HDMI2

D0-_HDMI2
D2-_HDMI2

D1-_HDMI2
+5V
FLI10610H-AA
5V_HDMI_3

A1

A2
5V_HDMI_4

KDS184
C2 AH29

D207
RX0- C203 +3.3V_CI
A1P LVTX_ODD_CH0N_DISP23 22 0.1uF

C
R504 22 C502 0.1uF E2 AJ29 16V R202 1K JACK_GND
SCART1_
R A2P LVTX_ODD_CH0P_DISP2
2 RX0+ HP_DET_S/W_3 C213
19 C220
G2 AH28

READY

R299
R505 22 C503 0.1uF 20

R208
0.1uF 0.1uF

47K
COMP_Y A3P LVTX_ODD_CH1N_DISP21 RX1- 18 16V 16V R232
R513 22 C511 0.1uF J2 AJ28 HP_DET_S/W_4
1K

1
19

READY
R207
RX1+ 17 HPD
VGA_B B_GRA LVTX_ODD_CH1P_DISP2
0

47K
R286 22
GND DDC_SDA_3
R507 56 C505 0.1uF D2 AH27 18

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF
0.1uF
16 +5V_POWE
R

C210

C209

C208

C206

C207

C204

C205
RX2- R287 22

C212
AN LVTX_ODD_CH2N_DISP19 DDC_SCL_
3 17
R230
AJ27 DDC/CEC_GND GND

0.1uF
15
DDC_SDA_4

C211
LVTX_ODD_CH2P_DISP1
8 RX2+ 16 229
14 SDA R22
B1 AH26 15 22 DDC_SCL_
4
B1P LVTX_ODD_CLKN_DISP17 RXCLK- 13
CEC_REMOTE SCL
R509 22 C507 0.1uF D1 AJ26 CK-_HDMI3 14
NC
SCART1_
G B2P LVTX_ODD_CLKP_DISP16 RXCLK+ 12

GND_7
VCC_8

VCC_7
R510 22 C508 0.1uF G1 AH25 13

HPD3

SDA2
HPD2
SCL2
11 CEC

VDD
A24

A23

A22

A21
TXCLK_BUF-

B24

B23

B22

B21
COMP_P
b B3P LVTX_ODD_CH3N_DISP15 RX3- 10
CK+
12
R508 22 C506 0.1uF J1 AJ25 CK+_HDMI3 CLK-
D0-
VGA_G G_GRA LVTX_ODD_CH3P_DISP1
4 RX3+ 9
D0-_HDMI3 11

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
CLK_SHIELD
R512 56 C510 0.1uF F2 AH24 8
D0_GND
SDA3 A14 10
TXCLK_BUF+
BN LVTX_ODD_CH4N_DISP3 RX4- DDC_SDA_3 1 48 D2+_HDMI1 CLK+
D0+ SCL3 B14
AJ24 7
D0+_HDMI3 DDC_SCL_3
GND_1
2 47
VCC_6
D2-_HDMI1 9
DATA0 -
TX0_BUF-
LVTX_ODD_CH4P_DISP
2 RX4+ D1- 3 46
6 8
C1 AG29 D1_GND
D1-_HDMI3
CK-_HDMI3
B31 4 45 A13 D1+_HDMI1 DATA0_SHIELD
A31 B13
C1P LVTX_ODD_CH5N_DISPC
LK 5
CK+_HDMI3
5 44 D1-_HDMI1 7 TX0_BUF+
R514 22 C512 0.1uF E1 AG28 D1+
VCC_1 6 IC201 43 GND_6 DATA0 +
SCART1_
B C2P LVTX_ODD_CH5P_DISPD
E 4
D1+_HDMI3 B32 7 42 A12 D0+_HDMI1 6 TX1_BUF-
D0-_HDMI3 TMDS351PAG DATA1 -
R515 22 C513 0.1uF H1 3
D2- A32 8 41 B12 D0-_HDMI1 5
D2-_HDMI3 D0+_HDMI3
COMP_P
r C3P D2_GND
GND_2 9 40 VCC_5 DATA1_SHIELD
R503 22 C501 0.1uF K1 AH23 2 B33 10 39 A11 CK+_HDMI1 4
DATA1 +
TX1_BUF+
VGA_R R_GRA LVTX_EVN_CH0N_DISP13 CH0E- D2+ D1-_HDMI3 A33 B11
1 11 38 CK-_HDMI1 3 TX2_BUF-
R517 56 C515 0.1uF H2 AJ23 GND
D2+_HDMI3 D1+_HDMI3 VCC_2 12 37 SCL1 DDC_SCL_1 DATA2 -
CN LVTX_EVN_CH0P_DISP1
2 CH0E+ 20 2
B34 13 36 SDA1 DDC_SDA_1
AF23 GND D2-_HDMI3 A34 35 HPD1
DATA2_SHIELD

LVTX_EVN_CH1N_DISP11 CH1E- 21
D2+_HDMI3
14 1 TX2_BUF+
D3
SV1P LVTX_EVN_CH1P_DISP1
0
AG23
CH1E+ PANNEL WAFER GND_3
VSADJ
15
16
34
33
EQ
S2 0 R268 HDMI_SW_EQ
DATA2 +

F3 AH22

R201
R519 22 C517 0.1uF

4.7K
DC1R019NB
H
P501 HD

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SIDE_YIN/SIDE_VIN SV2P LVTX_EVN_CH2N_DISP9 CH2E-
R520 22 C518 0.1uF H3 AJ22 JK201 GND
JK204 GND
TU_MAIN QJ41193-F
EE2-7F

S1
Z4

Z3

Z2

Z1
Y4

Y3

Y2

Y1
VCC_3

VCC_4

SCL_SINK
GND_4

GND_5
CH2E+
SMW200-40
C

SDA_SINK
HPD_SINK
SV3P LVTX_EVN_CH2P_DISP
8
R521 22 C519 0.1uF J3 AF22 0 R262
HDMI_SEL2
SCART2_VIN SV4P LVTX_EVN_CLKN_DISP7 CKE-
HDMI_SEL1
R522 56 C520 0.1uF K2 AG22 0 R259
SVN LVTX_EVN_CLKP_DISP6 CKE+ +3.3V_CI
AH21 5V_HDMI_3P_+5V
LVTX_EVN_CH3N_DISP5 CH3E-
5V_HDMI_1 IC202
J6 AJ21 R261 R264

A1

A2
H_SYNC_P
C AHS_ACS LVTX_EVN_CH3P_DISP
4 CH3E+ AT24C02BN-10SU-1.
8 C216
4.7K 4.7K 0.1uF KDS184
H6 AF21 2 1 SDA_HDMI_SW D203
V_SYNC_P
C AV S LVTX_EVN_CH4N_DISP1 CH4E-

C
A0 VCC
AG21 C201
SCL_HDMI_SW 1 8
CH4E+
J4
LVTX_EVN_CH4P_DISP
0
AG25 4 3 22 0.1uF
16V R203 1K A1 WP
R237
0

TXCLK_SW+
2 7

TXCLK_SW-
VOUT2 LVTX_EVN_CH5N_DISPVS HP_DET_S/W_1 R245

TX2_SW+

TX1_SW+

TX0_SW+
19 R241

TX2_SW-

TX1_SW-

TX0_SW-
READY
AG24 6 5

R205
18K 18K

47K
LVTX_EVN_CH5P_DISPH
S 18 A2 SCL
3 6
R524
22
G6 17 DDC_SCL_
3
SCART1_F
B SCART_FB 8 7 16
R285 22
GND
DDC_SDA_1 GND
4 5
SDA
R284 22
DDC_SCL_
1 DDC_SDA_3

SDA2_3.3
V
100 R588 10 9 100 R589
SCL2_3.3
V
15

14
TXCLK_SW-
A10 AG5 C523 0.1uF
CEC_REMOTE

B10
ARXCM VDAC_COMP
AH1 RX0+ 12 11 RX0-
13
CK-_HDMI1
TXCLK_SW+ 12
ARXCP VDAC_BU_N
TX0_SW-
A9 AH2 14 13 11
CK+
ARX0M VDAC_RV_N RX1+ RX1- 10
CK+_HDMI1
TX0_SW+
B9 AH3 9
D0- 5V_HDMI_1P_+5V

A8
ARX0P VDAC_GY_YC_N
AH4
R555
1.8K RX2+ 16 15 RX2- 8
D0_GND
D0-_HDMI1
IC203

A1

A2
TX1_SW- AT24C02BN-10SU-1.
8
ARX1M VDAC_RSET 1% D0+ KDS184
TX1_SW+
B8 18 17 7
D0+_HDMI1 +3.3V_STBY D204
RXCLK-

C
ARX1P RXCLK+ 6
D1-
D1-_HDMI1 A0 VCC
TX2_SW-
A7 AJ1 D1_GND
1 8

B7
ARX2M VDAC_BU_P_1
AJ2 RX3+ +3.3V_CI
20 19 RX3-
5
D1+ A1 WP
R238
0
TX2_SW+ 4 2 7 R242 R246
ARX2P VDAC_BU_P_2 D1+_HDMI1
18K
AJ3 22 21 3
D2-
D2-_HDMI1 A2 SCL
18K
VDAC_GY_YC_P RX4+ RX4- D2_GND R216 3 6

R593
HP_DET_S/W_3
B11 2
56K DDC_SCL_
1

1K
C11
HDMI_A_HPD
PC_SER_DAT
A 24 23 R538 0
PC_SER_CL
K
1
D2+
D2+_HDMI1 GND
4 5
SDA
HP_DET_S/W_1 GND
HDMI_B_HPD 0

R592
1K
R537 R544 0 20
DDC_SDA_1
A11 26 25

MMBD301LT1G
MODULE_SER_DATA ROM_DL MODULE_SER_CL
K GND
R233
21
HDMI_CEC 0 R543
R587 100 R590 DISP_EN 47K
ROM_DL
HD

D202
READY
10K
28 27

30V
R217
HD

0
A6 CH0E+ R527
FHD
0 CH0E- C217
TXCLK_BUF-
B6
BRXCM JK202 R218 0.1uF
TXCLK_BUF+ BRXCP CH1E+ 30 29 CH1E-
QJ41193-F GND
EE2-7F 0

A5 READY 5V_HDMI_2P_+5V
TX0_BUF-
B5
BRX0M
CH2E+ 32 31 CH2E-
CEC_REMOT
E CEC_0 IC204

A1

A2
TX0_BUF+ BRX0P SB D AT24C02BN-10SU-1.
8
KDS184

READY
A4 5V_HDMI_2
34 33

D201
D205

C
TX1_BUF- BRX1M CKE+ CKE-
BSS83 A0
1 8
VCC
B4
TX1_BUF+ BRX1P 36 35 Q201 R239
A3 CH3E+ CH3E- A1
2 7
WP 0
BRX2M R243 R247
TX2_BUF-
B3 C202 G 18K
TX2_BUF+ BRX2P CH4E+ 38 37 CH4E-
22 0.1uF
16V R204 1K
A2
3 6
SCL
18K

HP_DET_S/W_
2
+3.3V_HDMI_DOUGLAS 19 DDC_SCL_
2

READY
40 39

R206
GND SDA

47K
R523 4 5
1 R526 D9 R528 100
DISP_EN 18

249 REXT FHD R529 17 DDC_SDA_2


1% 10K
R283 22
GND
DDC_SDA_2
16
FHD R288 22
DDC_SCL_2
15

14 C218 5V_HDMI_4P_+5V
0.1uF
13
CEC_REMOTE HDMI 5V Detection

0
CK-_HDMI2
12
P502 FHD

R289
11
CK+ 5V_HDMI_3 5V_HDMI_2 IC205
SMW200-26
C 10

A1

A2
R551 R552 CK+_HDMI2 AT24C02BN-10SU-1.
8
75 75 D0- R219 KDS184
1% 1% 9 D0-_HDMI2 R212 10K D206

C
D0_GND
8 10K A0 VCC
1 8
D0+
7 D0+_HDMI2 HDMI3_5V_DET HDMI2_5V_DET R240
D1-
R213 A1 WP 0
6 D1-_HDMI2 R220 2 7 R244 R248
D1_GND 33K 33K 18K
5 18K
A2 SCL
D1+ 3 6
4 D1+_HDMI2
D2-
DDC_SCL_
4
+5V 3 GND SDA
D2-_HDMI2 4 5
IC502 D2_GND 5V_HDMI_1 5V_HDMI_4
R591

NLASB3157DFT2
G 2
DDC_SDA_4
10K

D2+
1
B1 SELECT D2+_HDMI2 R214 R231
1 6 DTV/MNT_SWITCH 20
GND
10K 10K
+5V
GND
GND VCC 21
2 5 HDMI1_5V_DET HDMI4_5V_DET C219
C550 GND 0.1uF
0.1uF R215 R222
B0 A 33K 33K
3 4 50V DTV/MNT_VOUT
JK203 GND
QJ41193-F
EE2-7F

HDMI
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC . LVDS, AFE FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

PRINTED CIRCUIT BOARD

MAIN(TOP) MAIN(BOTTOM)

Control B/D(TOP) PREAMP B/D(TOP)

Control B/D(BOTTOM) PREAMP B/D(BOTTOM)

Copyright©2008 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
Aug., 2008
P/NO : MFL41181004 Printed in Korea

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