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BI 14
TN BI : MCH IU KHIN H THNG (CPU SYSTEM)
M BI : HCO 01 22 14
Gii thiu :
y l bi hc gii thiu v mch in iu khin h thng (CPU) dng trong cc my
CD/VCD. Bao gm: S chc nng, nhim v v nguyn l hot ng ca mch.. ng thi,
hng dn hc sinh thc hnh v cc ni dung: Chn on, kim tra, sa cha v thay th cc
linh kin h hng trong mch iu khin h thng (CPU) ca my CD/VCD.

Mc tiu thc hin: Gip cho hc vin c kh nng

-

Trnh by ng s khi chc nng mch iu khin h thng (CPU).

Trnh by ng nguyn l hot ng ca mch iu khin h thng (CPU).
Chn on, kim tra v sa cha c nhng h hng ca mch iu khin h thng
(CPU).

Ni dung chnh:
Bao gm cc vn chnh sau:
1.
S khi chc nng ca mch iu khin h thng (CPU).
2.
Nhim v v nguyn l hot ng ca mch iu khin h thng
(CPU).
3.
Kho st v phn tch mch in thc t.
4.
Nhng hin tng, nguyn nhn v cch khc phc nhng h hng
ca mch iu khin h thng (CPU)
5.
Chn on, kim tra v sa cha mch iu khin h thng (CPU).
Cc hnh thc hc tp:
I.
1.

NGHE THUYT TRNH TRN LP C THO LUN

S khi chc nng v nhim v ca mch iu khin h thng (CPU): (Hnh 1.1-1)
Do bi hc ch vit cho cp cng nhn nn s khi chc nng bn trong s khng
trnh by (nu mun hiu su, hc module K thut vi x l), ch trnh by s khi dng tm
tc tng qut cc tn hiu lin lc vo/ ra v cc tn hiu quang trng m bo cho mch iu
khin h thng hot ng.

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Hnh 1.1-1: S khi mch iu khin h thng

2. Nhim v v nguyn l hot ng ca mch iu khin h thng (CPU) (Hnh 2.1-1)
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c ci nhn bao qut, tng th cho mt h thng iu khin dng trong my CD/VCD,
chng ta cn nm r mi quan h, lin lc gia mch CPU v cc mch chc nng khc trong
my, nhim v ca chng l g v nguyn l hot ng ca n nh th no?
2.1. Nhm tn hiu m bo cho CPU hot ng:
Ngun cp (+5V) v Mass (Vss): Cp ngun nuI v t cho IC vi x l hot
ng.
Tn hiu RESET: Reset c s dng t li ton b cc trng thi ca vi
x l ti thi im bt u cp in cho my bng cch to mt mc thp t
bin ng vo khi vi x l. Ngi ta c th to xung Reset bng IC (Hnh
2.1-1). hoc bng Transistor ri bn ngoi. (Hnh 2.1-2).

Hnh 2.1-1: Mch RESET dng IC

Hnh 2.1-2: Mch RESET dng Transistor ri bn ngoi

Hot ng ca mch RESET dng transistor nh sau: Khi mi cp in, t C bt
u np, p ti cc B/Q1 thp Q1 tt, Q2 dn ng ra mc thp. Khi t C np y, in p
cc B/Q1 tng cao ,Q1 dn v Q2 tt, ng ra mc cao. Xut hin xung Reset cp cho IC CPU.
.

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Khi to xung ng h (OSC): Khi dao ng to xung ng h (clock) kt ni
vi thch anh dao ng (Hnh 2.1-3) hoc mch dao ng ri bn ngoi (Hnh
2.1-4), n c nhim v to xung nhp cp cho cc mch s bn trong IC vi x l.

Hnh 2.1-3 : Mch to xung Clock dng thch anh

Hnh 2.1-4 : Mch dao ng ri bn ngoi

2.2. Nhm tn hiu iu khin t bn phm (Key) v t iu khin t xa (Remote

Control):
2.2.1.
Cc tn hiu iu khin t bn phm (Key): y l cc tn hiu c cung cp
t bn phm trc mt my do ngi s dng iu khin cho mch iu khin h
thng, nhm thc hin cc chc nng nh lnh Play/Stop, d nhanh Trong my
CD/ VCD, h thng phm lin lc vi CPU di dng ma trn (Hnh 2.2-1)hoc
di dng dng cu phn p (Hnh 2.2-2) c th hin nh sau :
Bn phm dng ma trn: (Hnh 2.2-1)

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Hnh 2.2-1: H thng phm m dng dng ma trn

Nguyn l hot ng:
Khi bm mt phm lnh, xung lnh ti mt ng "Key Out" s ni v mt ng "Key In"
tng ng.
Bng phng thc ny, nu thit k n ng "Key Out" v m ng "Key In" th s phm lnh
thc hin tng ng s l (m x n).
Nh Hnh 2.2-1, ta d dng thy c s lnh iu khin khi vi x l s l 4 x 4 =
16 lnh phn bit.
Trong my CD/ VCD , ngi ta thng b tr cc phm lnh nh sau :
- OPEN/CLOSE :

Lnh np a vo my hoc ly a ra khi my.

- SKIP :
Nhy n v tr bn nhc cn chn.
- SEARCH: D n on nhc cn chn.
- PROGRAM : Chn bi theo chng trnh. V d: Mt a CD/ VCD c ni dung l 12 bn
nhc, ta thch nht l 3 bn nhc theo th t l 2, 4, 6, bn bm cc s 2, 4, 6, trn h thng
phm lnh sau bm Program. Lc ny my CD/ VCD ch pht cc bn nhc theo th t
2, 4, 6,
- REPEAT : Lp li mt bn nhc. Th d : Khi nhn vo "List nhc in sn trn v hp CD/
VCD , ta thch bn nhc s 2, ta mun my ca ta ch pht bn nhc s 2 nhiu ln bm
s "2 sau bm "REPEAT".
- PLAY () : pht li chng trnh
- STOP () : Ngng chng trnh
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- PAUSE () : Tm ngng chng trnh
- F.F () : D ti nhanh. (Fast Foward).
- REW ( ) : D lui nhanh (Rewind)
- DISC CHANGE : i a, c dng trong my c kh nng cha nhiu a, khi bm "Disc
Change", h c s chuyn v tr cn c n cm quang hc pht li chng trnh trn a
. ng thi, mt trc ca my c hin th v tr ca a.
Bn phm n dng cu phn p: (Hnh 2.2-2)

Hnh 2.2-2: H thng phm n dng cu phn p

Nguyn l hot ng:
Thng qua cu phn p m tng vi mi phm lnh c n s c cc mc
in p khc nhau a vo chn Key in tng ng. Do , s c cc lnh khc nhau.

2.2.2.

Tn hiu iu khin t xa (Remote Control):

y l tn hiu iu khin thc hin cc lnh nh cc tn hiu t bn phm, nhng

c khc l cc tn hiu ny c thc hin thng qua b iu khin t xa (bin i tn
hiu quang thnh tn hiu in tng ng) cp cho mch CPU ti chn R/C. y l
chui d liu ni tip.
Thng thng khi gii m hng ngoi c b tr ngay bn trong CPU. nhn
tn hiu t b iu khin t xa ti, ngi ta s dng b thu tn hiu hng ngoi (IR
Receiver). M hnh mch c c th tm tt nh sau (Hnh 2.2-3):

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(Hnh 2.2-3)
2.3. Nhm tn hiu lin lc vi IC nh (ROM): (Hnh 2.3-1)
Tu cu to ca IC CPU m nhm ny c th c hoc khng c. N c s dng
lu tr cc m lnh c nh do nh sn xut ci t v cc m lnh c th thay i do
ngi s dng ci t. Cc tn hiu lin lc gm c:
Cc ng a ch, k hiu l A (Adrress): truyn tn hiu a ch nh cn
Ghi/c t IC vi x l a ti.
Cc ng d liu,k hiu l D (Data): truyn tn hiu Data Vo/ ra nh.
Chn cho php ghi ln RAM : WE (Write Enable).
Chn cho php c t RAM : RE (Read Enable).
Chn chn chp : CS (Chip Select).
V d : S lin lc gia S - RAM vi CPU c th hin nh sau :

Hnh 2.3-1 : S lin lc t RAM n vi x l

2.4. Nhm tn hiu cm bin hoc gim st (Sense) bo v CPU:
2.4.1.
Cm bin hay gim st khay a (Tray Sensor hay Tray SW. hay Open/Close
SW) : c 2 loi cm bin.
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Gim st v tr khay a trn h c (Tray Sensor): (Xem hlnh 2.4.1, hnh 2.4.2)

Tray Sensor hay Tray SW c nhim v nhn din v tr khay a ang ngoi hay vo
hn trong my thng qua mt chuyn mch c kh hoc mt cm bin quang.
Khay a dch chuyn theo trc ca rnh trt thng qua chuyn ng quay ca Loading
Motor, v tr ca khay a trong hay ngoi h c c nhn din bi Tray SW. (c khi cn
c gi l OPEN hay CLOSE SW da vo cc mc cao/thp do cc kha in b tc ng to
ra).

Hnh 2.4.1-1 V tr ca chuyn mch ng/m khay a

S mch lin lc gia Tray SW, vi khi vi x l:
Loi s dng chuyn mch c kh (SW) :

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Hnh 2.4.1-2 : S mch lin lc gia Tray SW vi khi vi x l
Hot ng ca mch :
Khi khay a ngoi my SW h Vi x l nhn mc in p cao (H).
Khi khay a vo trong my SW ng Vi x l nhn mc in p thp
(L) ra lnh ngt Motor Loading.
Loi s dng cm bin quang (Led diode - Photo Transistor) : Hnh 2.4.3
Ngi ta da vo khong che ca h c nhn bit trng thi ca khay a.

Hnh 2.4.1 - 3 : S mch lin lc gia Tray SW vi khi vi x l dng cm bin

quang

Hot ng ca mch :
- Khi khay a ngoi my nh sng t Led khng n c Photo
Transistor Photo Transistor tt chn Tray Sensor mc cao (H).
- Khi khay a vo trong my nh sng i n Photo Transistor Photo
Transistor dn vi x l nhn mc thp (H) lnh iu k hin MDA lm ngt
ng c.
2.4.2. Gim st bo th t a (Position Sensor):
Cm bin ny c trang b trong cc my nhiu a, cha chc nng i a.
Khi bm lnh "Disc Change" n v tr quy nh, Motor i a quay n v tr tng
ng cm quang hc c t ng v tr a v nhc ln,sn sng c d liu ghi sn
trn a. Nh vy, nh sn xut phi thit k mt h thng cm bin nhn bit c
a ang c l a c th t l (I), (2), (3). (4), (5)...

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Vi x l xc nh v tr a thng qua s lng xung pht ra t cm bin a n vi
x l.
S lng xung c to ra nh s lng rnh khot sn trn h c, cc rnh ny
cho php nh sng t Led n Photo Transistor.
V d: v tr a th nht, ngi ta thit k 1 l xuyn sng, a th hai l 2 l,
a th ba l 3 lbng cch m s lng xung trong mt khong thi gian no
, vi x l s nhn bit c v tr a cn c. (Hnh 2.4.2-1)

Hnh 2.4.2-1: Kt cu h c xc nh v tr din a bng nh sng.

S mch lin lc gia cm bin v tr a v vi x l : (hnh 2.4.2-2)

Hnh 2.4.2-1: S mch lin lc gia cm bin v tr a v vi x l.

2.4.3. Cm bin gim st v tr cm quang hc:
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Nh ta bit, cm quang hc c b tr trn h c chuyn ng tnh tin t trong ra
ngoi hoc t ngoi vo trong theo hng vung gc vi cc ng trn ng tm ca a
nh Sled (Slide) motor, s b tr c minh ho nh (Hnh 2.43 -1).

Hnh 2.4.3 -1: S b tr cc thnh phn trn h thng dch chuyn cm quang
hc
Cc thnh phn trong h thng dch chuyn cm quang hc :
(1) : Trc cm quang hc.
(2): Cm quang hc.
(14) : Spindle Motor.
(12): Bnh rng truyn ng.
(10). (11) : Cc bnh rng trung gian.
Kho in nhn din v tr cm quang hc c s dng khng ch chuyn ng
ca khi ny khi v tr trong cng hoc ngoi cng so vi a.
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V d : Trong cc my Sony, kho in Up/Down SW c trang b nhn din trng
th ca cm quang hc, mch in c minh ha nh sau: (Hnh 2.4.3-2)

Hnh 2.4.3-2: Kho in nhn din v tr cm quang hc.

2.5. Nhm cc lnh iu khin ng c np a (Loading Motor) v i a (Disc
Change):
Cc lnh iu khin ng c thng tn ti di dng mt ng lnh (Hnh 2.5.1-1).
Hay t hp nhiu ng lnh iu khin th hin di dng mc Logic (L/H). (Hnh 2.5.1-2).
Thng l lnh cho php ng c hot ng hay khng hot ng.
V d : Khi ng lnh ny mc cao ng c quay,
mc thp ng c khng quay. (Hnh 2.5.1-1).
- Khi chn TT ON = H : Motor ngng quay.
- Khi chan TT ON = L : Motor quay.

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Hnh 2.5.1-1: M hnh iu khin ng/ m ng c a.
V d : Mch iu khin ng c s dng IC BA 6209, s mch iu khin nh sau:

Hnh 2.5.1-2: S mch iu khin motor np khay a.

- Khi chn (5), (6) cng mc cao hoc mc thp ng c khng quay.
- Khi chn (5) = H, chn (6) = L Motor quay thun.
- Khi chn (5) = L, chn (6) =H Motor quay ngc.
2.6. Lnh m ngun Diode Laser (LD ON):
tng tui th ca Diode Laser cng nh bo v mt khi cha c a vo my, ngi
ta cha cp ngun cho Diode Laser khi khay v tr ngoi, bng cch thit k ng lnh m
ngun cho Diode Laser. (Hnh 2.6-1)

Hnh 2.6-1: Lnh m ngun Diode Laser

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Khi chn LD ON = L : Transistor Q dn, cp ngun cho Diode Laser, y l mch in
chung nht, thng gp nht trong cc my CD/VCD.
2.7. Nhm cc tn hiu giao tip vi khi x l m thanh:
2.7.1. Lnh "MUTE " :
Lnh Mute xut pht t khi vi x l thng c dng lm cm tn hiu m
thanh ng ra bng cch ngt m thanh ng ra, hoc ni mass m thanh ng ra
bng cc kho chuyn mch, hoc khng ch khi DSP. Di y l cc dng lm
cm m thanh ng ra :
Lm cm bng mc Logic : (Hnh2.7.1-1)
y ngi ta s dng mc Logic H hoc L ngt m thanh.
Th d:

Hnh2.7.1-1:Mch lm cm m thanh ng ra
Khi chn Mute = H, Q1 dn, Q2 v Q3 dn, ni mass m thanh ng ra.
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Lm cm bng chng trnh:( Hnh2.7.1-2)
Phng php ny c s dng trn cc my hin i. Khi sn xut,ngi ta np
chng trnh ngt vo ROM. Trong trng hp ngt, mt chui xung ni tip
c cp vo IC DSP, bng cch tch d xung lm ngt (bng s lng
xung,cn c vo s t bin v cnh hoc mc Logic) m khi DSP b kho hay
hot ng mt m thanh ng ra hoc c m thanh ng ra.

Hnh2.7.1-2: Mch lm cm m thanh ng ra bng chng trnh.

2.7.2. Nhm cc tn hiu giao tip khc gia vi x l v khi (DSP) :
Thc t gm cc tn hiu sau :
- DATA : ng d liu t CPU gi n iu khin khi DSP.
- CLOCK (CLK): Xung nhp ng b gia khi CPU v DSP.
- XLT (Latch) : Tn hiu cho php cht Data.
- SQ DATA : D liu m ph t DSP n CPU
- SQCK : M ph di dng xung clock t DSP n CPU.
2.8. Nhm cc tn hiu giao tip gia khi CPU v Servo:
Bao gm cc ng sau:
- FOR : Tn hiu "Focus OK" bo t khi Servo v CPU.
- CLOCK (CLK) : Xung nhp gia khi CPU v Servo.
- DATA : D liu.
- C.IN : (Track Count) : Tn hiu (xung) m Track .
II. T NGHIN CU TI LIU LIN QUAN V THO LUN NH
1. c cc tI liu ca s dn trI my CD\VCD ca D n GD dy ngh trang
b ti xng thc hnh.
2. Tham kho sch Tm hng v sa cha u my CD, LD, DVD, CD_ROM,
VCD ca - K s Nguyn Minh Gip.
3. Tham kho sch COMPACT DISC PLAYER - Nguyn l v cn bn sa cha,
tp I, II ca K s Phm nh Bo.
4. Tho lun v t hc thuc cc thut ng vit tt v mch iu khin h thng
(CPU System).
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5.

T nghin cu v tho lun s mch nguyn l mch CPU System ca cc

6.

hng sn xut.
c v nghin cu cc s mch nguyn l mch CPU System ca cc my

7.

thng dng.
Tp phn tch, tho lun v tm lc cc ng tn hiu lin quan n mch
CPU System.

III. THC TP TI XNG

3. Kho st v phn tch mch in CPU trn my CD/VCD thc t:
3.1. Cung cp ti liu lin quan n mch iu khin h thng CPU ca my ang thc
hnh ti xng: Bao gm.
S khi lin lc tng th gia khi CPU vi cc khi chc nng ca hng sn xut.
S mch in nguyn l ( Schematic Diagram) mch iu khin h thng CPU.
Bng tm tt cc thng s k thut quan trng do hng sn xut cung cp, hoc c
th hin ngay trn Schematic Diagram.
Cc ti liu h tr khc (nu c).
3.2. Hng dn thc hnh kho st v phn tch:
Gm cc bc sau:
Hng dn c v Phn tch S khi lin lc tng th gia khi CPU vi cc khi
chc nng.
Hng dn c v Phn tch s mch nguyn l (Schematic Diagram).
Hng dn cch v s lin lc tm tt nh s khi chc nng phn u ca
bi ny. (nu khng c th so dung ngay ti liu s khi lin lc ca hng sn
xut).
Hng dn cch d mch in v cch o cc thng s in p v dng tn hiu
trn my so vi cc thng s chun trn Schematic ca my.
Sau y s gii thiu my Technis PS-770 minh ho cho cc bc nu trn :
Cung cp ti liu:
Cho s lin lc tng th nh (Hnh 3.1-1)
Cho s mch in nguyn l nh ( Hnh 3.1-1a ; 1b v 3.1-1c).
Cc thng s k thut c th hin ngay trn Schematic Diagram.

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Hnh 3.1-1: S lin lc tng th

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Hnh 3.1-1a: S mch in mch iu khin h thng trn my Technis PS-770

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Hnh 3.1-1b: S mch in mch iu khin h thng trn my Technis PS-770

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Hnh 3.1-1c: S mch in nhn tn hiu t xa v mch cm bin ng m khay

a kt ni vi mch iu khin h thng trn my Technis PS-770
3.2.1.

Hng dn c v Phn tch S khi lin lc tng th gia khi CPU vi cc

khi chc nng :

Nhm tn hiu lin lc vi DSP v Servo :
Gii thiu tm tt bng di y
Pin
Pin
No.
I/O
Descriptions
Chn
Vo/ra
Tn chn
s
MCLK
MDATA

O
O

/MLD
SENSE
/FLOCK
/TLOCK
SQCK
SUBQ

O
I
I
I
O
I

DMUTE
STAT

O
I

Function Description
Chc nng
Microcomputer cp xung Clock cho khi DSP Microcomputer (Data
is latched at rising edge.)
Microcomputer cp data (command) cho khi DSP.
Microcomputer cp lnh np tn hiu vo n khi DSP. Mc "L" :
cho php np.
Nhn tn hiu cm bin (Sense signal) t khi Servo bo v.
Nhn tn Focus OK bo v t khi Servo. Mc tch cc thp "L".
Nhn tn Tracking bo v t khi Servo. Mc tch cc thp "L".
Microcomputer cp m ph Q (subcode Q) cho khi DSP.
Nhn d liu Subcode Q t DSP
Microcomputer cp tn hiu lm cm m thanh (Mute) cho khi
DSP. Mc tch cc cao "H".
Microcomputer nhn tn hiu bo trng trng thI t khi DSP
(Status signal) . Tc bo tnh trng ca cc tn hiu giao tip vi
khi DSP v SERVO (CRC, CUE, CLVS, TTSTOP, FCLV, SQOK,
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/SRST

FLAG6, SENSE, FLOCK, and TLOCK).

Microcomputer cp tn hiu Reset cho khi DSP . Mc tch cc
thp "L" .

Ngoi ra cn cc tn hiu giao tip vi cc khi chc khc nh: Bn phm (Key), Nhn
tn hiu RESET, tn hiu Power ON/OFF, c k hiu vit tt v chc nng nh gii thiu
phn l thuyt nn khng cn ni li.
3.2.2. Hng dn c v Phn tch s mch nguyn l (Schematic Diagram):
Trn c s s lin lc tng th gia cc khi chc nng ta bt u c v phn
tch s mch nguyn l ln lt theo tng nhm chc nng nh phn loi S
khi tng qut v s khi ca hng sn xut, t ta nhn bit cc khi chc nng
lin quan nh mch bn phm, mch Reset, mch OSC, Mch nh, mch iu khin
khi ngun cung cp y l cc mch gii thiu cc mc trn v cc bi nh
Servo, DSP, MDA,T , ta s lm quen dn vi cu trc ca mch iu khin h
thng v rn luyn c kh nng c v phn tch bt k mt mch iu khin h
thng ca nhiu my CD/VCD khc.
V d: Chuyn mch S781 v S782 t trn h c chnh l cm bin gim st
khay a (Open/ Close SW) bo v CPU System trn 2 chn: (18) /Open SW c mc
tch cc thp; chn (19) - /Close SW cng c mc tch cc thp. Hoc thch anh (Xtal)
c tn s 4,23Mhz chnh l khung cng hng to xung clock cho h thng v kt ni
vi mch OSC bn trong CPU ti 2 chn (34) X1 v chn (35) X2.
3.2.3. Hng dn cch to s lin lc tm tt nh s khi chc nng phn u
ca bi ny. (nu khng c th s dng ngay ti liu s khi lin lc ca hng
sn xut):
Ban u khi mi lm quen ta nn t mnh v li s lin lc tm sau khi nm chc
cc k hiu chn (thut ng) v chc nng ca cc chn bng cch phin qua ting vit.
Sau khi quen thuc ta nn khai thc trc tip phn s khi lin lc ca hng sn xut
v ch lp li thao tc ny khi ta gp my khng c y ti liu. V d: S lin lc tm

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tt

ca

my

Technis

PS-770

li

nh(H nh3.2-

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Hnh 3.2-1: S tm tt lin lc tn hiu ca mch in mch iu khin h thng

trn my Technis PS-770

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3.2.4. Hng dn cch d mch in v cch o cc thng s in p v dng tn hiu
trn my so vi cc thng s chun trn Schematic ca my:
Cch d mch in: bng cch xc nh cc khi chc nng thng qua cc linh
kin d nhn bit, hoc thng qua m vng ca mch, hoc thng qua cc trm
lin lc nh trm dy lin lc vi bn phm, hoc lin lc vi IC nh, hoc
chnh m s ca IC. Sau khi xc nh vng mch, bo ,bo mch, ta ln lt d
mch theo tng nhm lin lc nh s khi tng qut.
Cch o cc thng s in p v dng tn hiu:
Da vo bng thng s ca hng hoc da vo chc nng ca cc chn
m ta bit n thuc loi Data, xung Clock, hay tn hiu logic, hay p DC m chn
dung c o l My hin sng hay VOM hoc DMM.
Khi o cn ch n bin , tn s, v nhiu i vi tn hiu l Data, xung
Clock. ln v nhiu i vi tn hiu logic, hay p DC.
Tu vo chc nng ca cc tn hiu m ta cn phI cho my hot ng cho
ph hp khi cn kim tra, thng thng cc thng s c o ch Play.
Nhng khi my hng hng th ch Play s khng tn ti v vic tc ng
kim ta tn hiu mt cch chnh xc, nhanh chng hon ton ph thuc vo cch
tc ng theo ch quan ca ta trn c s nm vng chc nng, nhim v v
nguyn tc hot ng ca mch. Nu khng ta s khng pht hin c g c - V
d: Kim tra tn hiu cm bin gim st v tr khay a bo v CPU, tn hiu ny ch
xut hin khi khay a vo ra, nhng khi my hng trong trng hp khay a vo
ra c, lc ny ta phI to ra cho n trng thI theo ta, v d n cng tc
gim st v kim tra thng dng hoc o in p ti chn CPU...
Trn c s l thuyt hc ta ln lt o cc thng s ti cc chn v cc
im TP theo Schematic ca my. nh mch trn c tt cc thng s cc
chn quan trng.
3.3. Tho lun cc hin tng h hng c bn c th xy ra ra theo nhm:
Gm cc hin sau:
My khng hot ng c n bo ngun vo.
Khng ng/ m khay a c.
Khng chn v tr (s th t a) a c.
Khng nhy track hoc tua nhanh c.
Diode Laser khng sng khi a vo trong bo No Disc
4.

Chn on, kim tra v sa cha mch iu khin h thng:

Hin tng h hng do mch iu khin h thng gy ra th cng c th do cc mch

chc nng h hng. Ni cch khc, khi ghi vn mch iu khin h thng h hng c ngha l
ta phi kim tra tt c cc mch in chc nng lin quan n cng hin tng , trc khi i
su kim tra mch iu khin h thng.

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Sau y s l mt s hng dn v gi phn tch theo hin tng trn mt cch bao
qut, tu vo kt cu ca tng my c th m v tr kim tra cng nh mt s chc nng m
trn mi my s khc nhau.
4.1. My khng hot ng c n bo ngun vo:
y l hin tng m vng mch c kh nng h hng kh rng, nn ta cn kim tra
nhanh loi tr vng mch h hng trc khi i vo chi tit. Trong trng hp ghi vn
mch CPU hng ta ln lt kim tra theo th t nh sau:
Kim tra ngun cp cho CPU:
Bao gm cc mc ngun:

Analog Vdd (A.Vdd): thng l +5Vdc, c bit l + 9Vdc.

Digital Vdd (D.Vdd): thng l +5Vdc.

Cc chn Mass ca mch Analog v Digital.

Nu bt c ngun no khng c ta cn kim tra chi tit mch ngun cp cho

chn , nu cn c th cch ly chn ra kim tra.
Kim tra tn hiu RESET: Thng l ta phI kim tra li mch Reset, hoc s dung
my hin sng quan st dng xung ca n khi mi cp ngun. Nu khng c cn
kim tra mch Reset.
Kim tra tn hiu dao ng to xung clock: Ta c th kim tra ti chn thch anh
hoc ti ng ra ca mch dao ng to xung Clk cp cho CPU, bin v tn s
da vo s mch in ca hng sn xut.
Kim tra tn hiu Power On/Off: Khi tt m ngun trn iu khin t xa th tn hiu
ny phI c mc logic thay i (mc p cao hoc thp).

Nu c cn kim tra li mch m ngun cp chnh cho cc khi chc nng.

Nu khng cn kim tra li mch nh (ROM Mem) v IC CPU.

4.2. Khng ng/ m khay a c:

y l hin tng h hng c th lin quan n cc cm bin khay a (Open/Close
SW), bn phm hoc mch ng m khay a. Trng hp nghi vn do mch CPU gy ra ta
kim tra cc mch theo th t sau:
Kim tra Open/Close SW: PhI ng khi a khay a vo trong (o ngui chuyn
mch hoc o nng th p ti chn Open/Close SW ca CPU pI c mc in p
thay i khi a a vo trong. Trng hp dng cm bin quang cn phI kim tra
mch pht quang v thu quang cng nh khe h trn khay a khi khng c xung
hoc mc in p thay i ti chn Open/Close SW ca CPU.
Kim tra phm Open/Close: PhI ng khi n (o thng dng khi khng cp in v
mc p phI thay i ti chn vo phm lnh ca CPU).
4.3. Khng chn v tr (s th t a) a c:

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y l hin tng h hng c th lin quan n cc cm bin v tr khay a hoc
bn phm hoc mch i a. Trng hp nghi vn do mch CPU gy ra ta kim tra cc
mch theo th t sau:
Kim tra Position Sensor: Kim tra tng t mc 4.2
Kim tra cc phm i a (Disc Change): Kim tra tng t mc 4.2
4.4. Khng nhy track (Next) hoc tua nhanh c:
Lin quan n mch CPU system c th do hng phm n hoc khng c tn hiu
ra ti chn FWD, RVS. loi tr nhanh do hng phm n hay mt tn hiu ra t CPU ta
dng REMOTE iu khin. Nu c hng phm NEXT, FWD, RVS Nu khng
c mt hoc gin on tn hiu ra n mch Sled MDA.
4.5. Diode Laser khng sng khi a vo trong bo No Disc:
Lin quan n mch CPU system c th do gin on lnh m ngun cho Diode Laser LD
ON/OFF hoc do hng CLOSE SW nn khng c tn hiu bo khay a vo trong v CPU hoc
do gin on tn hiu ny. loi tr ta nn kim tra 2 tn hiu ny khi khay a vo trong.

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