Darlington Pair

Circuit Description
The c200 is a full discrete, two voltage gain stage power amplifier derived from the classic Lin topology. The power
output stage is configured as emitter followers and biased to class AB.
1st Stage - the Input Differential
The input signal is fed through a network comprising of C1,C2,R1 and R2. Input capacitor C1, prevents DC from the
preceding stage from being injected into the input differential. C1, in combination with R2, form a high pass filter of
3.3Hz at -3dB. R1 and C2 serve to prevent RF from entering the input by setting the corner frequency at 408KHz (3dB).The signal meets Q1 of the input differential Q1 and Q2. Current for the differential is set by a red led constant
current source Q3 at a total of 3.0mA.
2nd Stage - Voltage Amplifier Stage (VAS)
The amplified inverted signal is direct coupled to the 2nd stage through Q4, which is biased into class A by another
current source Q5. In this stage, current is set at 11.6mA by R15. Capacitor C7 (Miller compensation) sets the dominant
pole for stability. Q4, Q5 must be heatsinked.
Vbe Multiplier
Q6 must be connected to the main heatsink where the power transistors are. Apart from being a bias adjustment, it also
acts as a thermal tracking device. Prevents the output transistors from thermal runaway.
Output Stage
In order to prevent the output stage from loading the VAS, drivers Q9 and Q10 are inserted in between to act as buffers.

Output transistors Q11,Q12,Q13 and Q14 are configured as emitter followers operating in class AB. Zobel network
C10,R28 provides final stability against RF oscillations. Q9-Q14 must be connected to the main power heatsink.
Negative Feedback
Negative feedback is global. A fraction of the output signal is fed back into the inverted section of the input differential
via R7 and R8. Total Gain is set at 31x or 30dB. Capacitor C3 is for high frequency compensation whilst C4 ensures that
overall dc gain is at unity.
VI Limiting
Over current protection is by subcircuit Q7, Q8 and R16 through R21, including D2 and D3. It is set to activate at load
impedances of 2 ohms and below, thus protecting the output transistors from operating out of their SOA.

Powering up the c200

Before switching on the power, make sure that the preset R13 is set for maximum resistance and no speakers are
connected to the output of the amplifier. The Vbe multiplier Q6, must also be thermally coupled to the main heatsink to
prevent thermal runaway.
With the input shorted to ground, slowly increase the output of the power transformer to the working voltage of 40-040Vac with a variac. This should be done with an oscilloscope connected to the output of the amplifier.
If the amplifier is properly assembled, there should be no oscillations at the output as you gradually power up the
amplifier's transformer. With the supply rail voltages at +-53.5V, the DC operating points should read TP1=1.65V;
TP2=1.0V; TP3=0.84V; TP4=0.26V and TP5=0.79V.
Once this is established, slowly increase the bias of the output into Class AB to 100mA per output transistor. A DMM
across an emitter resistor (0.39 ohms) should read 39mV. With the oscilloscope set to 5mV resolution, you should be
able to reproduce Fig 1.

Small Power Testing

Switch off the amplifier and connect a 10 watts 8 ohms dummy load to the output. Remove the input short and connect
the signal generator to the amplifier. Set the oscilloscope to 50mV resolution and slowly power up the amplifier again.
Inject a 10KHz square wave for a peak to peak reading of 250mV. You should be able to reproduce Fig 2. There should be
no signs of ringing on the square wave. Rise time should read 2.4us from 10%-90% of 250mVp-p.
Increase the input signal to reflect 10Vp-p as seen in Fig 3. Rise time and square wave should remain unchanged.
Reset the signal generator for 20KHz square wave output. Repeat the above procedure for an output of 10Vp-p and you
should be able to replicate Fig 4. Note the absence of overshoot and ringing and fairly wide bandwidth.
THD Testing
Before we proceed with power testing, substitute the dummy load with a 200 watts, 8 ohms resistor. With the probes of
the THD analyzer connected across the load, spot frequencies of 200Hz, 1KHz, 10KHz and 20KHz are used to test the
amplifier's THD at 1Watt, 60Watts and it's rated output of 125Watts. You should be able to record similar readings as in
Fig 5. It is recommended that the power heatsink and dummy load be suitably cooled to avoid overheating. For 4 ohms
testing, replace load with a 400 watts resistor.
Fig 5 - THD + N

Note that as you gradually increase the output to maximum level, the output waveform should not exhibit any signs of
distortion until clip.
Testing the amplifier at Clip
In Fig 6,7 and 8, the c200 is driven to 1% THD into 8 ohms to determine the waveform at clip. Note the symmetrical
clipping at the three spot frequencies. With a 4 ohms resistive load, similar results were observed.
The Power Supply Unit (PSU)
The PSU (Fig 9) is a conventional, unregulated supply. Input fuse F1 is for safety. Mains switch SW1, has its contacts
straddled by a 4700pF X2 capacitor to suppress "popping" during switch-on. T1 is the power transformer with a
secondary output of 40-0-40Vac. BR1 is the bridge rectifier and C2,C3 are the filter capacitors for DC smoothing.

Fig 6 - 1KHz Sine / 8 ohms@ 1% THD

Fig 7 - 10KHz Sine / 8 ohms @ 1 % THD

Fig 8 - 20KHz Sine / 8ohms@ 1 % THD

Fig 9 - Power Supply Unit

For monoblock, C2,C3 = 10,000uF x2/63V minimum. Transformer secondary should be rated for 250VA. For stereo,
C2,C3 = 22,000uF x2/63V minimum. Transformer should be upgraded to 500VA. Supply rails (Vs) are +-53Vdc.