L

cycle

Instruction
operands

byte

1B

1B

1B

1B

1B

1B

1B

1B

1B

1B

2B

1B

1B

3B

2B

1B

JBC

R7

INC

R6

INC

R5

INC

R4

INC

R3

INC

R2

INC

R1

INC

R0

INC

@R1

INC

@R0

INC

dir

INC

INC

RR

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1B

1B

1B

1B

1B

1B

1B

1B

1B

1B

2B

1B

1B

R7

DEC

R6

DEC

R5

DEC

R4

DEC

R3

DEC

R2

DEC

R1

DEC

R0

DEC

@R1

DEC

@R0

DEC

dir

DEC

DEC

RRC

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

2C

addr16

addr16

2C

LCALL

2C

LJMP

3B

2C

(P0)

bit, rel

(P0)

2B

3B

ACALL

2C

1C

AJMP

NOP

0
JB

ADD

RL

RET

(P1)

AJMP

bit, rel

1B

1B

1B

1B

1B

1B

1B

1B

1B

1B

2B

A, R7

ADD

A, R6

ADD

A, R5

ADD

A, R4

ADD

A, R3

ADD

A, R2

ADD

A, R1

ADD

A, R0

ADD

A, @R1

ADD

A, @R0

ADD

A, dir

ADD

1C

2C

2C

2C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

A, #data

2B

1B

1B

2B

3B

2
JNB
bit, rel

ADDC

RLC

RETI

(P1)

1C

2C

2C

1B

1B

1B

1B

1B

1B

1B

1B

1B

1B

2B

A, R7

ADDC

A, R6

ADDC

A, R5

ADDC

A, R4

ADDC

A, R3

ADDC

A, R2

ADDC

A, R1

ADDC

A, R0

ADDC

A, @R1

ADDC

A, @R0

ADDC

A, dir

ADDC

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

A, #data

2B

1B

1B

2C

ACALL

2B

3B

ORL

dir, A

ORL

(P2)

AJMP

rel

JC

1C

2C

ORL

2C

1B

1B

1B

1B

1B

1B

1B

1B

1B

1B

2B

A, R7

ORL

A, R6

ORL

A, R5

ORL

A, R4

ORL

A, R3

ORL

A, R2

ORL

A, R1

ORL

A, R0

ORL

A, @R1

ORL

A, @R0

ORL

A, dir

ORL

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

A, #data

2B

2C

dir, #data

3B

2B

2B

2B

4
rel

JNC

ANL

dir, A

ANL

(P2)

1C

2C

ANL

2C

1B

1B

1B

1B

1B

1B

1B

1B

1B

1B

2B

A, R7

ANL

A, R6

ANL

A, R5

ANL

A, R4

ANL

A, R3

ANL

A, R2

ANL

A, R1

ANL

A, R0

ANL

A, @R1

ANL

A, @R0

ANL

A, dir

ANL

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

A, #data

2B

dir, #data

3B

2B

2C

ACALL

2B

2B

XRL

dir, A

XRL

(P3)

AJMP

rel

JZ

1C

2C

XRL

2C

1B

1B

1B

1B

1B

1B

1B

1B

1B

1B

2B

A, R7

XRL

A, R6

XRL

A, R5

XRL

A, R4

XRL

A, R3

XRL

A, R2

XRL

A, R1

XRL

A, R0

XRL

A, @R1

XRL

A, @R0

XRL

A, dir

XRL

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

A, #data

2B

2C

dir, #data

3B

2B

2B

2B

6
rel

JNZ

JMP

C, bit

ORL

(P3)

2C

2C

MOV

2C

MOV

1C

MOV

2C

MOV

1C

MOV

1C

MOV

MOV

MOV

MOV

1C

MOV

MOV

MOV

1C

1C

R7, #data

2B

R6, #data

2B

1C

R5, #data

2B

1C

R4, #data

2B

R3, #data

2B

1C

R2, #data

2B

1C

R1, #data

2B

1C

R0, #data

2B

@R1, #data

2B

@R0, #data

2B

dir, #data

3B

A, #data

2B

@A+DPTR

1B

2B

2C

ACALL

2B

2B

C, bit

ANL

(P4)

AJMP

rel

SJMP

2C

2C

MOV

dir, dir

MOV

AB

2C

4C

MOV

2C

2B

2B

2B

2B

2B

2B

2B

2B

dir, R7

MOV

dir, R6

MOV

dir, R5

MOV

dir, R4

MOV

dir, R3

MOV

dir, R2

MOV

dir, R1

MOV

dir, R0

MOV

2C

2C

2C

2C

2C

2C

2C

2C

2C

dir, @R1

2B

dir, @R0

2B

3B

DIV

2C

A, @A+PC
1B

MOV

bit, C

MOV

(P4)

2C

2C

SUBB

2C

1B

1B

1B

1B

1B

1B

1B

1B

1B

1B

2B

A, R7

SUBB

A, R6

SUBB

A, R5

SUBB

A, R4

SUBB

A, R3

SUBB

A, R2

SUBB

A, R1

SUBB

A, R0

SUBB

A, @R1

SUBB

A, @R0

SUBB

A, dir

SUBB

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

1C

A, #data

2B

A, @A+DPTR

MOVC

1B

2B

ACALL

3B

9
2B

MOV

AB

MUL

DPTR

INC

C, bit

MOV

(P5)

4C

2C

1C

2C

MOV

ANL

2B

2B

2B

2B

2B

2B

2B

2B

R7, dir

MOV

R6, dir

MOV

R5, dir

MOV

R4, dir

MOV

R3, dir

MOV

R2, dir

MOV

R1, dir

MOV

R0, dir

MOV

CJNE

CPL

bit

CPL

(P5)

1C

1C

2C

CJNE

2C

2B

1C

1C

2C

1B

2B

1C

1C

2C

1B

3B

1B

1B

2B

2C

1C

1C

1C

2C

(P7)

AJMP
2C

2C

A, @R0
2C

1B

2B

1B

1C

1C

2C

2C

(P7)
2C

@R0, A
2C

1B

2B

1B

1C

1C

2C

2C

R7, #data, rel

2C

CJNE

CJNE

A, R7

XCH

XCH

XCH

1C

R7, rel

DJNZ

DJNZ

DJNZ

2C

A, R7

MOV

MOV

MOV

MOV

MOV

1C

R7, A

MOV

MOV

MOV

MOV

MOV

MOV

R5, #data, rel

A, R5
R5, rel
A, R5
R5, A
2C
1C
2C
1C
1C
3B
1B
2B
1B
1B

CJNE

DJNZ

DJNZ

MOV

MOV

R4, #data, rel

A, R4
R4, rel
A, R4
R4, A
2C
1C
2C
1C
1C
3B
1B
2B
1B
1B

XCH

XCH

DJNZ

MOV

1C

R6, #data, rel

A, R6
R6, rel
A, R6
R6, A
2C
2C
1C
2C
1C
1C
3B
1B
2B
1B
1B

2C

2C

CJNE

CJNE

XCH

DJNZ

MOV

MOV

MOV

dir, A

MOV

CPL

@R1, A

MOVX

1B

MOVX

1B

ACALL

2B

@DPTR, A

MOVX

1B

R2, #data, rel

A, R2
R2, rel
A, R2
R2, A
2C
1C
2C
1C
1C
3B
1B
2B
1B
1B

CJNE

XCH

MOV

MOV

MOV

A, dir

MOV

CLR

A, @R1

MOVX

1B

MOVX

1B

2B

A, @DPTR

MOVX

1B

R1, #data, rel

A, R1
R1, rel
A, R1
R1, A
2C
1C
2C
1C
1C
3B
1B
2B
1B
1B

CJNE

DJNZ

XCHD

XCHD

dir, rel

DJNZ

DA

SETB

bit

SETB

(P6)

R0, #data, rel

A, R0
R0, rel
A, R0
R0, A
2C
1C
2C
1C
1C
3B
1B
2B
1B
1B

XCH

XCH

XCH

A, dir

XCH

dir

POP

ACALL

2B

2B

R3, #data, rel

A, R3
R3, rel
A, R3
R3, A
2C
2C
1C
2C
1C
1C
3B
1B
2B
1B
1B

2C

2C

2C

CJNE

CJNE

CJNE

2C

CLR

bit

CLR

(P6)

2C

SWAP

1B

1B

2B

AJMP

dir

PUSH

@R0, #data,rel
A, @R0
A, @R0
A, @R0
@R0, A
2C
1C
1C
1C
1C
3B
1B
1B
1B
1B

3B

A, dir, rel

3B

A, #data, rel

3B

1B

2B

ACALL

2B

@R1, #data,rel
A, @R1
A, @R1
A, @R1
@R1, A
2C
2C
1C
1C
1C
1C
3B
1B
2B
1B
1B

2C

@R1, dir

2B

@R0, dir

2B

1B

1B

2B

AJMP

ORL

DPTR, #data16
C, /bit
C, /bit
2C
2C
2C
2C
2B
2B
2B
2B

MOVC

1B

2B

2B

2B

Opcode Map

The 8051 Cookbook: A Comprehensive Guide to Architecture, Programming and Interfacing, 2nd Edition