AN N EX U R E 01

( ACADEMIC/RESEARCH PROJECTS )
P R OJECTS COMPLETED:

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D esign and d evelopment of GNRFET based 8 -bit ALU (2015)

Area and power optimized GNRFET and CMOS based 8-bit ALU was designed using various low power
architectures. Performance comparison was done for the designed systems
D esign and o ptimization of Reversible Carry look-ahead adder circuit (2014)
A 16 bit Ca rry Look-Ahead adder was designed using reversible logic i n 90nm C M OS t ec h n o lo gy t o r e d uc e
p o w er dissipation d rastically. Three reversible designs were provided in comparison to the conven ti o n a l CM OS
design and evaluated in terms of power dissipation and power -delay product.
D esign and o ptimization of CNFET based 32bit ALU (2013).
A 32 bit ALU was designed using multi walled CNT-FET. A comparison was done between CNFET and
conventional CMOS design, on power dissipation and delay parameters at 10nm gate length.
D esi gn and development of CMOS, finFET, CNTFET and GNRFET based S emiconductor Memories (2012)
DRAM, 6T, 8T, 9T, 7T and 11T based SRAM systems were designed using conventional MOS technology,
finFET based, CNTFET based and GNRFET technologies. Performance parameters based comparison was do n e
for the designed memory systems.
D esign and p er f or m a n ce c o mp a ri s o n of 6T, 8T and 9T SRAM cells ( 2010)
Analyzed and carried comparative study of SRAMs, focusing on the important parameters like static noise margin
(SNM), Read and Write Noise Margin, Read and Write Delay, Data Retention Voltage, Read and Write
Stability and Leakage Current.
A u t o m ati o n of Railway D e p ar tm ent using E m b ed d e d Microcontroller(2008)
Signalling System, Anti-collision System, Automatic Gate Control, Train Approaching Indicator and Signalling at
track junction features were designed to make the railway a u toma ti o n still stronger through implementation of
wireless technique for providing the ea si est a u to m a ti o n . The project has features like monitoring of remote
signalling lights using only one receiver, greater control range with Frequency Modulation and simultaneous
devices monitoring from remote location as line-of -si gh t arran g em en t not required.
P a n opticon Overview Recent International Advances in Project Management T heory and P ractice
The project involved the project management and its components, role of management, project
manager and his importance. Discussed various project management techniques and their challenges,
values in project mana g em en t and role of project management in managing the projects and its discipline.

P R OJECTS UNDER PROGRESS (TO BE COMPLETED SHORTLY):

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D esign and o ptimization of Graphene based SRAM.
Involves designing a 64x8 S R AM using G raphene Nano-Ribbon F ETs, at 10nm gate length and ev a lu a tio n o f
design parameters such as power dissipation, power -delay product. (PRESENT STATUS: Work completed.
Pending documentation)
D esign and o ptimization of Hybrid Reversible Carry look-ahead adder circuit.
Involves designing a 16 bit H y brid Carry Look-Ahead adder using r eversibl e l o gi c i n 10n m G r ap h e n e F ET ,
Ca r b o n N a n o - T u b e ( CN T ) - F ET a n d F I N F ET technology. Three reversible designs are provided in
comparison to the conventional CMOS design. (PRESENT STATUS: Work completed. Pending
documentation)
D esign and p erformance comparison of d ecomposed 1: 32 De-multiplexers
Involves p er formance (Transistor cost, Power dissipation, input-output delay, power delay product) c omp a ri so n
of multiple decomposed 1: 32 De-multiplexers using G raphene Nano Ribbon FET, CNT-FET and FINF ET a t
10n m gate length. (PRESENT STATUS: Work completed. Pending documentation)
D esign and Dev el o p m en t of GNRFET transistors based Microcontroller
Involves the design and development of a 16-bit microcontroller using Graphene Nano-Ribbon FETs, at 10nm
gate length and evaluation of design parameters such as Power Dissipation, Noise Margin, Data Retention
Voltage and power- del ay product.

A NNE X URE - 02
P AP ER PUBLISHED R EFEREED INTERNATIONAL JOURNALS

GNRFET Based 8-bit ALU, H.V. Ravish Aradhya, Madan H R, Megaraj T M, Suraj M S, Karthik R K, Muniraj R, International
Journal of Electronics and Communication Engineering (IJECE), ISSN: 2278-9914, pp. 45-54, Jan-31-2016
Comparative Study of DRAM for High & Low Power CMOS process technology, M. Akshay Bhounsley, Madan H R, H.
V. Ravish Aradhya, V. Ebenezer, International Journal of Science Research, Volume 01, Issue 03, December 2012, pp.
137-138.
Considerations Of FinFET Based 6T SRAM Design, M. Girish Kumar, Madan H R, H. V. Ravish Aradhya, V Ebenezer,
International Journal of Science Research, Volume 01, Issue 03, December 2012, pp. 134-136.
Comparative Study of SRAM & DRAM for various CMOS process technology, M. Akshay Bhounsley, Madan H R, H. V.
Ravish Aradhya, V. Ebenezer, International Journal of Science Research, Volume 01, Issue 03, December 2012, pp. 141143.
Design and Performance Analysis of 8T SRAM for Different Scaled Technologies, M. F. Md. Luqman, Madan H R, H. V.
Ravish Aradhya, K. Suresh, International Journal of Science Research, Volu me 01, Issue 03, December 2012, pp. 151153.
Design and Optimization of Reversible Carry Look Ahead Adder Circuit, Abhijith A Bharadwaj, Madan H R, Keith S o a r es, H
V Ravish Aradhya, International Journal of Engineering and Science Invention (IJESI ), April 2014, Received the Best Paper
Award.
Design and Performance Comparison of finFET, CNFET and GNRFET based 6T SRAM, Abhijith A Bharadwaj, Immanu el
Keith Soares, Madan H R, H V Ravish Aradhya, International Journal of Science and Research (IJSR) , April 2015 ISSN
(Online): 2319-7064, Impact Factor (2013): 4.438
GNRFET Based 8-Bit ALU, H.V. Ravish Aradhya, Madan HR, Megaraj T M, Suraj M S, Karthik RK, Muniraj R,
International Journal of Electronics and Communication Engineering (IJECE), ISSN (Online): 2278-991X; Vol-5, I ssu e- 1, D ec Jan-2016;Impact Factor(JCC) - 2015:3.6986.
Facile Green Fabrication of Nanostructure ZnO Plates, Bullets, Flower, Prismatic tip, Closed pine cone: Their
Antibacterial, Antioxidant, Photoluminescent and Photocatalytic Properties, Madan H R, H Nagabhushana, S C Sharma, D
Suresh, Darukaprasad, S C Prashantha, Y S Vidya, Spectrochimica Acta Part A: Molecular and Biomolecu l ar S pec tr o sc o py 152
(2016) 404416, Impact Factor: 2.129
I N TERNATIONAL CONFERENCE

FPGA Implementation of SoC using soft core processors and Custom Peripherals, custom instructions for Robotics and
Automation, Anil Kumar D, Madan H R, Research & Reviews: Journal of Embedded System & Applications, 2321 - 8533,
November 2013, pp. 01-06.
H V Ravish Aradhya, Madan H R, Suraj M S, Megaraj T Mahadikar, Muniraj R, Mohammed Moiz, Design, Analysis and
Performance Comparison of GNRFET based 8-bit ALUs, Research Advances in Integrated Navigation Systems (RAINS), 2016
IEEE International Conference on, Bengaluru, 2016 - Published
H V Ravish Aradhya, Madan H R, Suraj M S, Megaraj T Mahadikar, Muniraj R, Mohammed Moiz, Design, Analysis and
Performance Comparison of GNRFET based Adiabatic 8-bit ALU, Recent Trends in Electronics, Information & Communication
Technology, 2016 IEEE International Conference on, Bengaluru, 2016 - Published
H V Ravish Aradhya, Madan H R, Suraj M S, Megaraj T Mahadikar, Muniraj R, Mohammed Moiz, Design and Performance
Comparison of Adiabatic 8-bit multipliers, Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), 2016
IEEE International Conference on, Mangalore, 2016 ---Under Review, Submission 96 Published
H V Ravish Aradhya, Madan H R, Suraj M S, Megaraj T Mahadikar, Muniraj R, Mohammed Moiz, Design and performance
comparison of GNRFET based parallel adder structures using Sub-threshold adiabatic logic, 2016 IEEE Seventh India International
Conference on Power Electronics (IICPE-2016), (Co-sponsored by IEEE PELS-IES Delhi Chapter, & IEEE PES-IAS Delhi
Chapter), submitted, under review
N ATIONAL CONFERENCES

Design and Performance Analysis of 6T SRAM for Different Scaled Technologies, Md. Luqman M F, M. Girish Kumar, Madan
H. R, H.V. Ravish Aradhya, K. Suresh, National conference on Recent Trends in Communication Technolo gy , V o l. n o . 01, pp
238 244, Bangalore, January 2012.
CMOS Realization of Reversible BCD Adder, Girish. R, Akshay Bhounsley M, Madan. H. R, H. V. Ravish Aradhya,
Mehrunnisa Begum S. P., National conference on Recent Trends in Communication Technology, Vol. no. 01, pp 227

233, Bangalore, January 2012.

Comparative Study of logic circuits based on MOSFET and FinFET under 32 nm process technology, M Girish Kumar, Gi r i sh
R, Madan H R, H V Ravish Aradhya, V Ebenezer, National conference on Recent Trends in Communication Techno logy , V o l .
no. 01, pp 234 237, Bangalore, January 2012.
Comparative Study of DRAM for various CMOS process technology, Akshay Bhounsley M, Md. Luqman M F, Madan H R, H
V Ravish Aradhya, V Ebenezer, National conference on Recent Trends in Communication Technology, Vol. no. 01, pp 245
251, Bangalore, January 2012
Cloud Security- Grand challenge for adoption of Cloud Computing, Shreyas Hirethota, Srinivasa Murthy, Madan H R,
Sheshadri N, National conference on Recent Trends in Communication Technology, Vol. no. 01, pp 221 226, Bangalore,
January 2012.
CMOS Implementation of Reversible Comparators, Akshatha Shrinivas, Shreyas Hirethota, Madan H R, Ravish Aradhya H V,
National conference on Recent Trends in Communication Technology, Vol. no. 01, pp 252 258, Bangalore, January 2012.
Overview of Reversible Logic, Saranya S, Ravi Raj Singh, Soumya, Sapna Upadhyay, Madan H R, National Conference on
Emerging Trends in VLSI & Embedded Systems, ISBN 978-81-928203, Oct 2013.
Design, Analysis and Performance comparison of FinFET based and MOSFET based carry look -ahead adder, Madan H R,
Arjun Krishna Murthy, National Symposium on Instrumentation (NSI -38) , BVB college of Engineering, Hubli, Oct -2013.