CHAPTER 1

Introduction

1.1 Introduction to Microcontrollers

Every day human’s life is associated with an electrical/electronics mechanical

work field, which plays a wide variety role in the world to make ease of work load to
the human being. Although the man is responsible for the presence of all these fields,
he could not trace the speed of these fields. This is the main hint for these fields to
kick out the human beings and come into existence. However, as the man is the
master for each of this universe, he gained command on all these fields to solve his
problems. In this way, the Microcontrollers became necessary to help human being.

Now a day’s all industrial applications involved with microprocessors or

microcontrollers. These are very popular today. Typical microcontroller is a true
computer on a chip.Like microprocessor, microcontroller is a general purpose device,
but one that is meant to read data, performs limited calculations. The prime use of
microcontroller is to control the operation of a machine using a fixed program that is
stored in ROM and that does not change over the life time of system.

For this project, the user needs to interface the microcontroller with the DTMF
receiver.the DTMF is one, which will recognize the ring signal and gives out binary
equivalent of the incoming signal. According to the program written into the
microcontroller, it fallows the data coming out from the DTMF and enable or disable
the buffers.

1
1.2 Introduction to DTMF Receiver

The DTMF is dual tone multi frequency used in telecommunications for

dialing. There are 8 tones of low audio band, and 4 tones of high audio band. One
from each band is added together to generate a dual tone. We can make 16 tones
totally however 10 tones are sufficient for dialing digits 0…9. In this project, to
receive the pass code and control codes sent by the user we have this dtmf transceiver
circuit. After answering the call, if a tone is received this IC 8870 will detect it and
give the code to the microcontroller.

1.3 Introduction to Assembly Language Programming

An assembly language program consists of, among other things, a series of

lines of assembly language instructions. An assembly language instruction consists of
a mnemonic, optionally followed by one or two operands. The operands are the data
items being manipulated, and the mnemonics are the commands to the CPU, telling it
what to do with those items.

An assembly language instruction consists of 4 fields:

[Label:] mnemonic [operand] [comment]

Brackets indicate that a field is optional and not all lines have them.
Brackets should not be typed in:
1.The label field allows the program to refer to a line of code by name. The label
field cannot exceed a certain number of characters.

2.The assembly language mnemonic and operand fields together perform the real
work of the program and accomplish the tasks for which the program was written.
ADD A, B
MOV A, #67

ADD and MOV are mnemonics which produce opcodes."A,B" and "A,#67"

2
 are the operand.

3. The comment field begins with a semicolon comment indicator ";" comments may
be at the end of a line or on a line by themselves. The assembler ignores comments,
but they are indispensable to programmers. Although comments are optional, it is
recommended that they be used to describe the program in order to make it easier for
someone else to read and understand.

Assembling and Running an 89C51 Program

Steps to create an executable assembly language program are as follows:-

1. First we use an editor to type in a program. Many excellent editors or word

processors are available that can be used to create arid/or edit the program. Widely
used editor is MS-DOS edit program. Editor must be able to produce an ASCII
file. For many assemblers, the file names follow the usual DOS conventions but
the source file has the extension "asm" or "src", depending on which assembler
you are using.

2. The" asm" source file containing the program code created in step one is fed to
an 89c51 assembler. The assembler converts the instructions into machine code.
The assembler will produce an object file and list file. The extension for object file
is "obj" while extension for list file is "1st".
3. Assemblers require a third step called linking. The link program takes one or
more object files and produces an absolute file with extension "abs". This abs file
is used by 89c51 trainers that have a monitor program.

1.4 Introduction to Project

3
 When you forget to OPEN/CLOSE the doors, or to switch OFF our electrical
home appliances, to switch ON alarm for industrial protection etc., To OPEN/CLOSE
the doors and to ON/OFF all these equipment automatically we need the domestic
automation.

Every one of knowingly/unknowingly forgets to OPEN/CLOSE the doors and

to switch ON/OFF the electrical devices when we leave the hose or an office. So what
a person does is:

One way to go back to his home and do the operation. If he has to travel a long
distance it will be bit difficult to come back. The best way to operate the appliances
with in seconds by a remote device such as telephone which is done by our project.
As now-a-day telecommunication network is expanding to every where, all are
using telecommunication network as a medium to transfer data, voice etc. Here, for
this project telephone is the medium to transfer the data from any where.

This is one of the best ways to control the appliances which is cost effective
and can be afford by a common man.

4
 CHAPTER 2
AT89C51 Microcontroller

The micro controller generic part number actually includes a whole family of
micro controllers that have numbers ranging from 8031 to 8751 and are available in
N-Channel Metal Oxide Silicon (NMOS) and Complementary Metal Oxide Silicon
(CMOS) construction in a variety of package types.

2.1 Features
1Compatible with MCS 51 Products
24 Kbytes of In System Reprogrammable Flash Memory Endurance: 1,000
write/Erase Cycles
3Fully Static Operation: 0 Hz to 24 MHz
4Three Level Program Memory Lock
5Programmable Serial Channel
6Low Power Idle and Power Down Modes
7Eight-bit CPU with registers A (accumulator) and B
8Sixteen bit program counter (PC) and data pointer (DPTR)
9Eight bit program status word (PSW)
10Eight bit stack pointer (SP)
11Internal ROM or EPROM of 0 to 4K
12Internal RAM of 128 bytes
13Four register banks, each containing eight registers
14Sixteen bytes, which may be addressed at the bit level
15Eighty bytes of general-purpose data memory
16Thirty-two input/output pins arranged as four 8-bit ports:P0-P3
17Two 16-bit timer/counters: T0 and T1
18Full duplex serial data receiver/transmitter: SBUF
19Control registers: TCON, TMOD, SCON, PCON, IP and IE
20Two external and three internal interrupt sources

5
 21Oscillator and clock circuits

2.2 Description

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer

with 4Kbytes of Flash Programmable and Erasable Read Only Memory (PEROM).
The device is manufactured using Atmel’s high density nonvolatile memory
technology and is compatible with the industry standard MCS-51 instruction set and
pin out. The on-chip Flash allows the program memory to be reprogrammed in-
system or by a conventional nonvolatile memory programmer. By combining a
versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a
powerful microcomputer which provides a highly flexible and cost effective solution
to many embedded control applications. The AT89C51 provides the following
standard features: 4 Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit
timer/counters, five vector two-level interrupt architecture, a full duplex serial port,
and on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with
static logic for operation down to zero frequency and supports two software selectable
power saving modes. The Idle Mode stops the CPU while allowing the RAM,
timer/counters, serial port and interrupt system to continue functioning. The Power
down Mode saves the RAM contents but freezes the oscillator disabling all other chip
functions until the next hardware reset.

6
2.3 pin Description

Fig.2.1 Pin diagram of 89C51

Fig.2.2 Block diagram of 89C51 Micro controller

7
Port 0
Port 0 is an 8-bit open drain bi-directional I/O port. As an output port each pin
can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as
high-impedance inputs. Port 0 may also be configured to be the multiplexed low order
address/data bus during accesses to external program and data memory. In this mode
P0 has internal pull-ups. Port 0 also receives the code bytes during Flash
programming, and outputs the code bytes during program verification. External pull-
ups are required during program verification.

Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1
output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port
1 pins that are externally being pulled low will source current (IIL) because of the
internal pull-ups. Port 1 also receives the low-order address bytes during Flash
programming and program verification.

Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2
output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port
2 pins that are externally being pulled low will source current (IIL) because of the
internal pull-ups.

Port 2 emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that uses 16-bit addresses
(MOVX @DPTR). In this application it uses strong internal pull-ups when emitting
1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI),
Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the
high-order address bits during Flash programming.

8
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3
output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins
they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port
3 pins that are externally being pulled low will source current (IIL) because of the
pull-ups. Port 3 also serves the functions of various special features.

Table 2.1 Alternative Use of Port 3

RST
Reset input. A high on this pin for two machine cycles while the oscillator is
running resets the device.

ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address
during accesses to external memory. This pin is also the program pulse input (PROG)
during Flash programming. In normal operation ALE is emitted at a constant rate of
1/6 the oscillator frequency, and may be used for external timing or clocking
purposes. Note, however, that one ALE pulse is skipped during each access to
external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of
SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC

9
instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has
no effect if the micro controller is in external execution mode.

PSEN
Program Store Enable is the read strobe to external program memory. When
the AT89C51 is executing code from external program memory, PSEN is activated
twice each machine cycle, except that two PSEN activations are skipped during each
access to external data memory.

EA/VPP
External access enables. EA must be strapped to GND in order to enable the
device to fetch code from external program memory locations starting at 0000H up to
FFFFH. Note, however, that if lock bit 1is programmed, EA will be internally latched
on reset. EA should be strapped to VCC for internal program executions. This pin also
receives the 12-volt programming enable voltage (VPP) during Flash programming,
for parts that require 12-volt VPP.

XTAL1
Input to the inverting oscillator amplifier and input to the internal lock
operating circuit.

XTAL2
Output from the inverting oscillator amplifier.

Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively, of an inverting
amplifier which can be configured for use as an on-chip oscillator, as shown in Figure
1. Either a quartz crystal or ceramic resonator may be used. To drive the device from
an external clock source, XTAL2 should be left unconnected while XTAL1 is driven.
There are no requirements on the duty cycle of the external clock signal, since the

10
input to the internal clocking circuitry is through a divide-by-two flip-flop, but
minimum and maximum voltage high and low time specifications must be observed.

Fig.2.3 Oscillator Connections

Note: c1, c2 = 30 pF 10 pF for crystals

=40pF 10pF for ceramic Resonators

Fig.2.4 Internal Architecture of 89C51

11
2.4 Idle Mode

In Idle mode, the CPU puts itself to sleep while the entire on chip Peripherals
remain active. The mode is invoked by software. The content of the on-chip AM and
all the special functions registers remain unchanged during this mode. The idle mode
can be terminated by any enabled interrupt or by a hardware reset. It should be noted
that when idle is terminated by a hardware reset, the device normally resumes
program execution, from where it left off, up to two machine cycles before the
internal reset algorithm takes control. On-chip hard-ware inhibits access to internal
RAM in this event, but access to the port pins is not inhibited. To eliminate the
possibility of an unexpected write to a port pin when Idle is terminated by reset, the
instruction following the one that invokes Idle should not be one that writes to a port
pin or to external memory.

2.4.1 Power down Mode

In the power down mode the oscillator is stopped, and the instruction that
invokes power down is the last instruction executed. The on-chip RAM and Special
Function Registers retain their values until the power down mode is terminated. The
only exit from power down is a hardware reset. Reset redefines the SFRs but does not
change the on chip RAM. The reset should not be activated before VCC is restored to
its normal operating level and must be held active long enough to allow the oscillator
to restart and stabilize.

2.5 Program Memory Lock Bits

On the chip are three lock bits which can e left un-programmed (U) or can be
programmed (P) to obtain the additional features listed in the Table 2.2 below.

When lock bit 1 is programmed, the logic level at the EA pin is sampled and
latched during reset. If the device is powered up without a reset, the latch initializes to
a random value, and holds that value until reset is activated. It is necessary that the

12
latched value of EA be in agreement with the current logic level at that pin in order
for the device to function properly.

2.6 Program Counter and Data Pointer

The 89C51 contains two 16-bit registers the programs counter (PC) and the
data pointer (DPTR), Each is used to hold the address of a byte in memory. The PC is
the only register that does not have an internal address. The DPTR is under the control
of program instructions and can be specified by its 16-bit name, DPTR, or by each
individual byte name, DPH and DPL. DPTR does not have a single internal address;
DPH and DPL are each assigned an address.

2.7 A and B Registers

The 89C51 contains 34 general purpose, working, registers. Two of these,
registers A and B, hold results of many instructions, particularly math and logical
operations, of the 89C51 CPU. The other 32 are arranged as part of internal RAM in
four banks, B0-B3, of eight registers. The A register is also used for all data transfers
between the 89c51 and any external memory. The B register is used for with the A
register for multiplication and division operations.

2.8 Flags and the Program Status Word (PSW)

Flags may be conveniently addressed, they are grouped inside the program
status word (PSW) and the power control (PCON) registers. The 89C51 has four math
flags that respond automatically to the outcomes of math operations and three general-
purpose user flags that can be set to 1 or cleared to 0 by the programmer as desired.
The math flags include Carry (C), Auxiliary Carry (AC), Overflow (OV), and Parity
(P). User flags are named F0, F0 and GF1; they are general-purpose flags that may be
used by the programmer to record some event in the program.

13
 Table 2.2 Functions of PSW

2.9 Internal Memory

The 89C51 has internal RAM and ROM memory for the functions. Additional
memory can be added externally using suitable circuits. This has a Hardware
architecture, which uses the same address, in different memories, for code and data.

2.9.1 Internal RAM

The 128-byte internal RAM is organized into three distinct areas

 Thirty two bytes from address 00H to 1FH that make up 32 working
registers organized four banks of eight registers each. The four register
banks are numbered 0 to 3 and are made up of eight registers named R0 to
R7. Each register can be addressed by name or by its RAM address. Thus
R0 of bank 3 is R0 (if bank 3 is currently selected) or address 18H
(whether bank 3 is selected or not). Bits RS0 and RS1 in the PSW
determine which bank of registers is currently in use at any time when the

14
 program is running. Register banks not selected can be used as a general-
purpose RAM. Bank0 is selected on reset.

 A bit addressable area of 16 bytes occupies RAM byte addresses 20H to

2FH, forming a total of 128 addressable bits. An addressable bit may be
specified by its bit address of 00H to 7FH, or 8 bits may form any byte
address form 20H to 2FH.

 A general-purpose RAM area above the bit area, from 30H to 7FH,
addressable as bytes.

Internal RAM Organization

Fig.2.5 Internal RAM Organization

15
2.9.2 Internal ROM
The 89C51 is organized so that data memory and program code memory can
be in two entirely different physical memory entities. Each has the same address
ranges. Program addresses higher than 0FFFH, which exceeds the internal ROM
capacity, will cause the 89C51 to automatically fetch code bytes from external
program memory. Code bytes can also be fetched exclusively from an external
memory by connecting the external access pin to ground.

2.10 Special Function Register (SFR) Memory

Special Function Registers (SFRs) are areas of memory that control specific
functionality of the 89C51 processor. For example, four SFRs permit access to the
89C51’s 32 input/output lines. Another SFR allows a program to read or write to the
89C51’s serial port. Other SFRs allow the user to set the serial baud rate, control and
access timers, and configure the 89C51’s interrupt system.

2.10.1 Special function registers

SFRs are accessed as if they were normal Internal RAM. The only difference
is that Internal RAM is from address 00H through 7FH whereas SFR registers exist in
the address range of 80H through FFH. Each SFR has an address (80H through FFH)
and a name.

Although the address range 80h through FFH offers 128 possible addresses,
there are only 21 SFRs in a standard 89C51. All other addresses in the SFR range
(80h through FFH) are considered invalid. Writing to or reading from these registers
may produce undefined values or behaviour. The following table lists the symbols,
names and addresses of the 89C51 SFR.

SFR Description
There are four I/O ports of 8 bits each for a total of 32 I/O lines. The four ports
are called P0, P1, P2 and P3.

16
SP (stack pointer)
This is the stack pointer of the micro controller. This SFR indicates where the
next value to be taken from the stack will be read from in Internal RAM. Pushing a
value onto the stack, the value will be written to the address of SP + 1. That is to say,
if SP holds the value 07h, a PUSH instruction will push the value onto the stack at
address 08h. This SFR is modified by all instructions that modify the stack, such as
PUSH, POP, and LCALL, RET, RETI, and whenever interrupts are provoked by the
micro controller. The SP SFR, on start up, is initialized to 07h. This means the stack
will start at 08h and start expanding upward in internal RAM. Since alternate register
bans 1, 2, and 3 as well as the user bit variables occupy internal RAM from addresses
08h through 2Fh, it is necessary to initialize SP in program to some other value such
as 2F, using the alternate register banks and/or bit memory.

DPL / DHL (Data pointer low / high)

The SFRs DPL and DPH work together to represent a 16-bit value called the
Data Pointer. The data pointer is used in operations regarding external RAM and some
instructions involving code memory. Since it is an unsigned two-byte integer value, it
can represent values from 0000H to FFFFH (0 through 65,535 decimal). DPTR is
really DPH and DPL taken together as a 16-bit value. For example, to push DPTR
onto the stack first push DPL and then DPH. Additionally, there is an instruction to
“increment DPTR.” On executing this instruction, the two bytes are operated upon as
a 16-bit value. However, there is no instruction to decrement DPTR.

PCON (Power control)

The Power Control SFR is used to control the 89C51’s power control modes.
Certain operation modes of the 89C51 allow the 89C51 to go into a type of “sleep”
mode that requires much less power. These modes of operation are controlled through
PCON. Additionally, one of the bits in PCON is used to double the effective baud rate
of the 89C51’s serial port.

17
TCON (Timer control)
The Timer Control SFR is used to configure and modify the way in which the
89C51’s two timers operate. This SFR controls whether each of the two timers is
running or stopped and contains a flag to indicate that each timer has overflowed.
Additionally, some non-timer related bits are located in the TCON SFR. These bits are
used to configure the way in which the external interrupts are activated.

TMOD (Timer mode)

The Timer Mode SFR is used to configure the mode of operation of each of
the two timers. Using this SFR the program may configure each timer to be a 16-bit
timer, an 8-bit auto reload timer, a 13-bit timer, or two separate timers. Additionally,
the program may configure the timers to only count when an external pin is activated
or to count “events” that are indicated on an external pin.

TL0 / TH0 (Timer 0 low / high)

These two SFRs, taken together, represent timer 0. Their exact behavior
depends on how the timer is configured in the TMOD SFR; however, these timers
always count up. Increment in value is configurable.

TL1 / TH1 (Timer 1 low / high)

These two SFRs, taken together, represent timer 1. Their exact behavior
depends on how the timer is configured in the TMOD SFR; however, these timers
always count up. Increment in value is configurable.

SCON (Serial control)

The Serial Control SFR is used to configure the behavior of the 89C51’s on-
board serial port. This SFR controls the baud rate of the serial port, whether the serial
port is activated to receive data, and also contains flags that are set when a byte is
successfully sent or received. To use the 89C51’s on-board serial port, it is generally
necessary to initialize the following SFRs: SCON, TCON, and TMOD.

18
 This is because SCON controls the serial port. However, in most cases the
program will wish to use one of the timers to establish the serial port’s baud rate. In
this case, it is necessary to configure timer 1 by initializing TCON and TMOD.

SBUF (Serial control)

The Serial Buffer SFR is used to send and receive data via the on-board serial
port. Any value written to SBUF will be sent out the serial port’s TXD pin. Likewise,
any value, which the 89C51 receive via the serial port’s RXD pin, will be delivered to
the user program via BUF. In other words, when written to SBUF serves as the output
port and when read from as an input port.

IE (Interrupt enable)
The Interrupt Enable SFR is used to enable and disable specific interrupts. The
low 7 bits of the SFR are used to enable/disable the specific interrupts, where as the
highest bit is used to enable or disable ALL interrupts. Thus, if the high bit of IE is 0
all interrupts are disabled regardless of whether an individual interrupt is enabled by
setting a lower bit.
Table 2.3 Functions of Special Function Registers

19
2.11 IP (Interrupt priority)

The Interrupt Priority SFR is used to specify the relative priority of each
interrupt. On the 89C51, an interrupt may either be of low (0) priority or high (1)
priority. An interrupt, may only interrupt, interrupts of lower priority. For example,
configure the 89C51 so that all interrupts are of low priority except the serial
interrupt, the serial interrupt will always be able to interrupt the system, even if
another interrupt is currently executing. However, if a serial interrupt is executing no
other interrupt will be able to interrupt the serial interrupt routine since the serial
interrupt routine has the highest priority.

The 89c51 operations that do not use the internal 128-byte RAM addresses
from 00H to 7FH are done by a group of specific internal registers, each called a
Special Function register, which may be addressed much like internal RAM, using
addresses from 80h to FFH. PC is not part of the SFR and has no internal RAM
address

20
 CHAPTER 3
DTMF Signalling

3.1 Introduction
DTMF stands for “Dual Tone Multi Frequency” (also called Touch Tone or Tel
Touch) and during the 25 years has steadily gaining ground at the expense of the
traditional dial pulse signaling employed in the older telephone sets. Many years ago,
the engineers at Bell labs figured out that the dial pulse system was not the best for
long distances, reliability, using over microwave systems and so on. Their research
showed that you could use tones to represent the digits that the person was dialing.

You could have a single separate tone for each digit, but there is always a
chance that a random sound will be on the same frequency and trip up the system. So,
they reasoned, if you have 2 tones to represent a digit, then a false is less likely to
occur. This is the basis for Dual Tone in the DTMF.

Now, if you have two tones for each digit, and there are 12 keys on the
telephone, (0-9,*, #) then you will need 24 tones. If you remember, most of the tones
at that time were being generated with coils and capacitors instead of solid state IC’s
like they are today. If you didn’t mind a telephone in the size of a Breadbox, the 24-
tones theory would work just fine. However, most people wanted a phone that looked
like a phone and did not cotton to the idea of talking into a loaf of bread.

3.2 Generation of DTMF Signals

The Engineers came up with the idea of row and column tones. That means
that you think of your telephone keypad as a grid. Every button is positioned at the
intersection of horizontal row and vertical column. Each row has a single tone, and
each column has a single tone. When you press a button, you generate both the row
and column tones i.e. 2 tones.

21
 Each button will have at least one different from any other keys. Using a
normal keypad layout with the same 12 buttons, you now need only 7 tones, not 24.

Table 3.1 A Row and Column Grid

1 2 3 697HZ

4 5 6 770HZ

7 8 9 852HZ

0 941HZ

1209HZ 1336HZ 1477HZ

When you press digit 1 on your phone you generate the tones 1209Hz and
697Hz. If you press digit 2, you will now generate the tones 1209Hz that would
complete a digit 1, and a 1336 Hz that would complete a digit 2.

While the Engineers were working on this, they decided to throw in a few
more “special purpose “tone groups. You don’t normally see these on telephones, but
they are alive, well and being used for communication signaling. For lack of
imagination, the Engineers called four of the “extra” digits “A, B, C, and D”. These
all use the same row frequencies as a standard keypad, but they have a special column
tone.

Table 3.2 Row and column Grid with Special Purpose Tones
1 2 3 A 697HZ
4 5 6 B 770HZ
7 8 9 C 852HZ
0 D 941HZ
1209H 1336H 1477H 1633H
Z Z Z Z

22
 The special codes are very useful for preventing a standard telephone from
being used to control remote devices, and can give override status when used
correctly in a two-way radio system.

3.3 DTMF Receiver Development

More than 25 years ago the need for an need for an improved method for
transferring dialing information through the telephone network was recognized.
The main disadvantages of the dialing system (which makes the phone
generate a member of ON-OFF pulses corresponding to the digit dialed by the user)
are:

 The mechanical make and break of the circuit is difficult and closely to
implement through a computer or other electronic device. Some sort of
electromechanical relay is needed.

 The actual time to dial the complete number is fairly long and in fact
depends on the specific number being dialed. For the example, consider
dialing the following 2 numbers at 1 pulse/sec with 0.5 sec between
numbers.

345 takes: 0.3+0.5+0.4+0.5+0.5 = 2.2sec.

789 takes: 0.7+0.5+0.8+0.5+0.9 = 3.4 sec.

This problem is due to two reasons. First, the inter-office lines are tied up for a
long time with just passing digits. Second, the length of the time is uncertain and
depends on the number sequence itself. This means that the receiving circuitry must
be prepared for a variety of time spans and these capability necessities an inefficient
and costly design of circuitry.

23
  These make/break pulses can’t really be used for any other purpose. Once
the numbers are dialed and the call established, any opening or closing of
the loop may be confused with hanging up the phone. The use of dial
pulse for any type of signal, such as to active equipment at the receiver
end is impractical.

 The dial pulses suffer severe distortion over long wire loops.

 The dial pulses require a dc path through the communication channel.

3.4 Advantages of DTMF Signalling

The main advantages of the DTMF tone dialing system are

 The time to send a complete number is greatly reduced. A 3-digit phone

number takes only 1.25 sec regardless of the digits, using 0.25 sec value
for tone and inter tone duration. A 7-digit number can be sending in 3.25
sec so that the phone circuits are tied up for much less duration with the
dialing information.

 The time to send a number is the same regardless of the actual digits
themselves. For example all 7-digit numbers take the same time and so
on. As a result the receiver circuitry is much easier to design.

 The tones can be used for signaling purposes, once the dialing is over. The
phone system is designed to ignore any and all frequencies within the
frequency band that the voice uses. Since the circuitry designed to take
some specific action once the call is established may accidentally be
tripped by the user’s voice. The tones can therefore be used to turn on
equipment or send a coded message to the system at the other end. This is
in contrast to pulse dialing in which the phone system is designed to look

24
 at all times for the opening of the loop to the phone, since this indicates
that the phone has been hung up.

 Circuitry to send tones is easier to build with modern ICs and much easier
to control with computers or other electronic equipment when compared
to pulse dialing systems. This means tone dialing is more compatible with
modern systems and automatic unattended operations.

 The other important advantages are:

1) Convenience
2) Efficiency
3) High reliability in transmission of signals
4) Better performance
5) Small system size
6) Lower power cost due to LSI implementation
7) Lower power consumption due to CMOS technology
8) Existence of complementary technologies such as voice synthesizer

The main reasons that have accelerated the conversion of dial Pulse signaling
equipment to tone dialing are:
 Increase in competition between DTMF receiver manufacturers.
 Switch to MOS/LSI technology, thus taking advantage of
semiconductor pricing curves.
 Acceptance by telephone companies of newer technologies and reduction
of procurement cycle.
 Emergence of new application for DTMF signaling.
 The additional revenue available on the DTMF line quickly amortizes the
cost of DTMF installation.

25
 CHAPTER 4
HARDWARE SETUP
4.1 Block Diagram

Fig.4.1 Block Diagram

4.2 Design and Development

Stage 1 getting 5V supply

26
 Connecting 230v supply to a step-down transformer and bringing it to 12v.
The transformer output is rectified using a full wave rectifier and this rectified A.C
voltage is feed as input to 7805 regulator.
7805 1st pin ------input
2nd pin ----ground
3rd pin -----output
3rd pin i.e. the output is connected as input supply to various ICs used in the circuit.

Check
Now the power is switched on and the 3rd pin of 7805 is checked for 5v supply
with the help of a multimeter.
Stage 2 Ring detection

The telephone line voltage is feed to abridge rectifier. the rectifier output is
filtered and by using a potentiometer we obtain voltage below 5v. This line voltage is
feed as negative input to the comparatorLM393 6th pin. To the positive input we fed
voltage i.e. obtained by connecting 5v supply to the potentiometer. This is connected
to the 7th pin of the LM339 comparator.

High signal at 1st pin of LM393 indicates no ring and a low signal indicates
ring tone on a telephone line.

Check
Initially we check whether the comparator out put i.e.1st pin is a high signal or
not.

Stage 3 DTMF Signal Detection

The telephone line is connected as input to the DTMF decoder IC CM8870.

The telephone line is connected to the second pin of the IC .Crystal oscillator of
3.578M H.Z is connected to seventh and eight pins .Supply voltage is given to tenth
pin, 4 bit BCD output is produced at pins 11 to 14 .Fifteen pin is also an output and is

27
called STD (delay steering).If Std is high then it indicates presence of valid BCD code
on the output lines.

Check all the BCD code output lines are checked for high signal.

28
STAGE 4 Microcontrollers

The outputs from ring sensor and DTMF decoder are fed to microcontroller.
We use port 0 and port2.ring sensor output is fed to P0.5 pin. DTMF output is fed to
pins P0.0 to p0.3.std signal is fed to P0.4 pin P0.7 pin is connected to a relay that
shifts the telephone from ring mode to voice mode.

Similarly pins P1.2to P1.4 all are connected to relay driving circuits. And
stepper motor is connected to P2.1 to P2.4A high signal on these pins switches on the
relay and a low signal turns off the relay.18 and19 pins are connected to 2 terminals of
the oscillators the oscillator terminals are connected to two 33pf capacitors the other
capacitor terminals are shorted and grounded.

Check
The pins 18 and19 of 89c51 are checked the clock pulse with help of an
oscillator.

4.3 Comparator LM393

A comparator as its name implies compares a signal voltage on one input of an
op amp with a known voltage called the reference voltage on the other input. In its
simplest form, it is nothing more than an open loop op amp, with two analog inputs
and a digital out put. The output may be positive or negative saturation voltage
depending on which input is the larger. Comparators are used in circuits such as
digital interfacing, Schmitt triggers, discriminator, voltage-level detectors, and
oscillators.

Basic Comparator
An op amp is used as a comparator. A fixed reference voltage Vref of 2.5v is
applied to the positive input, and the other time varying signal voltage Vin is applied
to the negative input. Because of this arrangement, the circuit is called the
INVERTING COMPARATOR. When Vin is less than Vref, the output voltage Vo is at

29
+Vsat (approximately-Vee) because the +Vsat (approximately+Vee). Thus Vo
changes from one saturation voltage at the negative input is higher than that at the
positive input. On the other hand, when Vin >Vref, the positive input becomes
positive with respect to the negative input, and Vo goes to level to another whenever
Vin=Vref, as shown in fig. in short the comparator is a type of analog to digital
converter. At any given time the Vo waveform shows whether Vin is greater or lesser
than Vref. The comparator is some times also called as VOLTAGE LEVEL
DETECTOR because, for a desired value of Vref the voltage level of the input Vin
can be detected.

General Description
The LM393 series consists of four independent precision voltage comparators
with an offset voltage specification as low as 2 mV max for all four comparators.
These were designed specifically to operate from a single power supply over a wide
range of voltages. Operation from split power supplies is also possible and the low
power supply current drain is independent of the magnitude of the power supply
voltage. These comparators also have a unique characteristic in that the input
common mode voltage range includes ground, even though operated from a single
power supply voltage. Application areas include limit comparators, simple analog to
digital converters, pulse, square wave and time delay generators, Clock timers, multi
vibrators and high voltage digital logic gates. The LM393 is a distinct advantage
over standard comparators.

Fig.4.2 Pin Connection of LM 393

30
Fig.4.3 Inverting Comparator with Hysteresis

(Vcc R1)
 V ref =
(Rref+R1)

 R3 = R1 // Rref // R2

(R1 // Rref) [Vo (max)-Vo (min)]

 Vh=
R1 // Rref + R2

 R2 > Rref // R1

31
Features
 Wide supply voltage range
 LM139/139A Series 2 to 36 VDC or ± 1 to ±18 VDC
 LM2901:2to36 VDC or± 1 to± 14 VDC
 LM3302:2 to 28 VDC or± 1 to ± 14
 Very low supply current drain (0.8mA) independent of supply voltage.
 Low input biasing current:25nA
 Low input offset current: ± 5nA
 Offset voltage : ± 3mV
 Input common –mode voltage range includes GND.
 Differential input voltage range equal to the power supply voltage.
 Low out put saturation voltage: 250mV at 4mA.
 Output voltage compatible with TTL, DTL, ECL, MOS and CMOS logic
systems.

Advantages
 High precision comparators
 Reduced VOS drift over temperature
 Eliminates need for dual supplies
 Allows sensing near GND
 Compatible with all forms of logic
 Power drain suitable for battery operation

32
Absolute Maximum Ratings of LM393

Table 4.1 Absolute Maximum Ratings of LM393

Supply Voltage, V+ 36VDC or ±18VDC
Differential input voltage 36VDC
Input Voltage -0.3 VDC to +36VDC
Input Current (Vin <-0.3VDC) 50mA
Power Dissipation
Molded Dip 1050mW
Cavity Dip 1190mW
Small Outline Package 760mV
Output Short-Circuit to GND continuous
Storage Temperature Range -65°C to +150°C
Lead Temperature (soldering, 10 sec.) 260°C
Operating Temperature Range -40°C to +85°C
LM339/LM339A 0°C to +70°C
LM239/LM239A -25°C to +85°C
LM2901 -40°C to +85°C
LM139/139A -55°C to +125°C
Soldering Information
Dual-In-Line Package
Soldering 10 seconds 2 60°C
Small Outline Package
Vapor Phase (60 seconds) 215°C
Infrared (15 seconds) 220°C
ESD rating (1.5k in series with 100pF) 600V

33
4.4 CM 8870 DTMF Decoder

Description
The CM8870 provides full DTMF receiver capability by integrating both the
band split filter and digital decoder functions in to a single 80-pin DIP, or 20 pin
PLCC package .the CM8870 is manufactured using state -of -the -art CMOS process
technology for low power consumption (35 mW, MAX) and precise data handling .the
filter section uses a switched capacitor technique for both high and low group filter
and dial tone rejection. The CM8870 decoder uses digital counting technique for the
detection and decoding of all 16 DTMF tone pairs in to a 4 bit code. The DTMF
receiver minimizes external component count by providing an on chip differential
input amplifier, clock generator and a latched three state interface bus. The on-chip
clock generator requires only a low cost TV crystal or ceramic resonator as an
external component .The CM8870 DTMF integrated receiver provides the designer
engineer with not only low power consumption, but high performance in a small 18
pin DIP, or 20-pin PLCC package configuration. the CM8870 internal architecture of
a band -split filter section separates the high and low tones of the received pair,
forward by a digital decode section which verifies both the frequency and duration of
the received tones before passing resultant 4-bit code to the out put bus.

Filter Section
Separations of the low group and high group a tone is achieved by applying
the dual-tone signal to the inputs of two 9th order switched capacitor band pass filter
.The bandwidth of this filter corresponds to the bands enclosing the low group and
high group tones. The filter section also incorporates notches at 350HZ and
440HZwhich provides excellent dial tone rejection .Each filter output is followed by
single order switched capacitor section which smoothes the signals prior to limiting.
Signal limiting is performed by high gain comparators. These comparators are
provided with a hysteresis to prevent detection of unwanted low level signal and
noise. The output of the comparators provides full-rail logic swings at the frequencies
of the incoming tones.

34
Decoder section
The CM8870 decoder uses a digital counting technique to determine the
frequencies of the limited tones and to verify that these tones correspond to standard
DTMF frequencies. A complex averaging algorithm is used to protect against tone
simulation by extraneous signals (such as voice) while providing tolerance to small
frequencies variation. The averaging algorithm has been developed to ensure an
optimum combination of immunity to “talk-off” and tolerance to the presence of
interfering signals (third tones) and noise. When the detector recognizes the
simultaneous presence of two valid tones (known as “signal condition”), it rises the
“Early steering” flag (Est.).any subsequent loss of signal condition will cause Est. to
fall.

Steering circuit
Before the registration of a decoded tone pair, the receiver checks for valid
signal duration (refer to as “character-recognition-condition”). This is check is
performed by an external RC time constant driven by Est. Logic high on Est. causes
Vc to rise the capacitor discharges .Providing signal condition is maintained (Est
remains high) for the validation period (t gtp), Vc reaches the threshold (V tst) of the
steering logic to register the tone pair, thus latching its corresponding 4-bit code into
the out put latch. At this point, the GT output is activated and drives Vc to Vdd. GT
continuous to drive high as long as Est. it remains, signaling that a received tone pair
has been registered the contents of the output latch are made available on the 4-bit out
put bus by raising the 3-state control in put (TOE) to logic high. The steering circuit
works in reverse to validate the inter digit pause between signals. Thus, as well
rejecting signals two short to be considered valid, the receiver will tolerate signal
interruption (drop outs) too short to be considered a valid pause. This capability
together with the capability of selecting the steering time constant externally, allows
the designer to tailor performance to meet a wide Varity of system requirement.

35
Guard Time Adjustment
In situations which do not require independent selection of receive and pause,
the simple steering circuit of fig shown in appendix is applicable. Component values
are chosen according to the fallowing formula.
 trec=tdp +tgtp
 tgtp=0.67RC
The value of tdp is a parameter of the device and trec is the minimum signal duration
to be recognized by the receiver’s value for C of 0.1microfarads is recommended for
most applications, leaving R to be selected by the designer. For example, a suitable
value of R for a trec of 40ms would be 300K. A typical circuit using this steering
configuration is shown in figure. The timing requirements for the most
telecommunication applications are satisfied with this circuit. Different steering
arrangements may be used to select independently the guard-times for tone-present
(tgtp) and tone absent (tgta). This may be necessary to meet system specifications
which place both accept and reject limits on both tone duration and inter digit pause.
Guard time adjustment also allows the designer to tailor system parameter such as
talk-off and noise immunity. Increasing trec improves take-off performance, since it
reduces the probability that tones simulated by speech will maintain signal condition
for long enough to be registered. On the other hand, a relative short trec with along
tdd would be appropriate for

 Extremely noisy environments where fast acquisition time and

immunity to drop-outs would be requirements.

Input Configuration
The input arrangement of the CM8870 provides a differential input operational
amplifier as well as a bias source (Vref) which is used to bias the inputs at mid-rail.
Provision is made for connection of a feedback resistor to the op-amp output (GS) for
adjustment of gain. With the op-amp connected for unity gain and Vref biasing the
input at ½ Vdd.

36
Clock Circuit
The internal clock circuit is completed with the addition of a standard
television color burst crystal or ceramic resonator having a resonant frequency of
3.579545 MHz. the CM8870 in a PLCC package has a buffered oscillator output that
can be used to drive clock inputs of other devices such as a microprocessor or other
CM887X’s. Multiple CM 8870s can be connected, such that only one crystal or
resonator is required.

Fig.4.4 Single Ended Input Configuration Of 8870

4.5. Relays
Definition
The Relay is an automatic control element whose output variable undergoes a
change by leaps and bounds when its input variable (electric, magnetic, sound, light,
heat) reaches a set point.

Introduction
The relay is a device that acts upon the same fundamental principle as the solenoid
.The difference between a relay and a solenoid is that a relay does not have a movable core
(plunger) while the solenoid does. Where multiple relays are used, several circuits may be
controlled at once. Relays are electrically operated control switches, and are classified
according to their use as POWER RELAYS or CONTROL RELAYS. Power relays are called
CONTACTORS; control relays are usually known simply as relays.

37
 The function of contactor is to use a relatively small amount of electrical
power to control the switching of a large amount of power. The contactor permits you
to control power at other locations in the equipment, and the heavy power cables need
be run only through the power relay contacts. Only lightweight control wires are
connected from the control switches to the relay coil. Safety is also an important
reason for using power relays, since high power circuits can be switched remotely
without danger to the operator. Control relays, as their name implies, are frequently
used in the control of low power circuits or other relays, although they also have
many other uses. In automatic relay circuits, a small electric signal may set off a
chain reaction of successively acting relays, which then perform various functions.

Classification of Relays
Relays can be classified into many different categories according to their
working principle, physical dimensions, protective features, contact loads and product
applications.

Relays depending on their working principle

Electromagnetic Relays
Relays in which the relative movements of their mechanical components
produce preset responses under the effect of the current in the input circuit are called
electromagnetic relays.
Relays in this category include DC electromagnetic relays, AC
electromagnetic relays, magnetic-latching relays, polarized relays, and reed relays.

DC electromagnetic relays
Relays whose control current in the input circuit is DC.

AC electromagnetic relays
Relays whose control current in the input circuit is AC.

38
Magnetic-latching relays
Relays, after the magnetic steel is introduced into the
magnetic loop, even the relay coil is de-energized the armature iron steel still
maintains its state as that when the coil is energized, with two steady states.

Polarized relays
DC relays whose change of state depends on the
polarity of the input exciting variable.

Reed relays
Relays that rely on the movements of the reed which is
built in the tube and has dual functions as contact reed and armature iron magnetic
circuit for connecting, breaking or switching circuits.

Solid State relays

Relays whose input and output functions are performed
by electronic elements without mechanical movement components.

Time Relays
Relays whose controlled circuit connects or breaks
when the output part is delayed or timed to a preset time after the input signal is
added or erased.

Temperature Relays
Relays that get into motion when the outside
temperature reaches a present point.

Wind-Velocity Relays
When the wind velocity reaches a certain point, the
controlled circuit will connect or break off.

39
Acceleration Relays
When the acceleration of the moving object reaches a
preset point, the controlled circuit will connect or break off.

Relays in other categories

Including photo relays, sound relays, and heat relays.

Relays According To Physical Dimensions

Description Definition

1. Min relays Relays whose maximum edge is no

larger than10mm.

2. Super Min Relays Relays whose max edge is larger than

10mm but not larger than 25mm.

3. Compact Relays Relays whose max edge is larger than

25mm but not larger than 50mm.

Relays according to contact load

Description Definition

1. Micro Power Relays Relays whose current is smaller

than 0.2A.
2. Low power Relays Relays whose current range is in range
of 0.2 – 2A.
3. Medium-power Relays Relays whose current is in range of 2 –
10A.
4. High power Relays Relays whose current is larger than 10A

40
Relays according to protective features
Description
1. Sealed Relays
2. Plastic cased Relays
3. Dust proof Relays
4. Open Relays
Relays according applications
Description
1. Communication relays
2. Machine tool relays
3. House hold appliance relays:
41
Definition
Relays whose contact and coil are sealed
in a metal case by welding or other
methods and therefore enjoy low leakage
rates.
Relays whose contact and coil are sealed
in Plastic case by gluing and have
somewhat Higher leakage rates.
Relays whose contact and coil are sealed
in a Case For protection purposes.
Relays whose contact and coil are not
Protected with a case.
Definition
Relays with contact load ranging from low
level to medium current and therefore
enjoying comparatively low ambient
conditions for use.
Relays used on machine tools with high
contact load power and long service life.
Relays used in house hold appliances
must meet a high safety standard.
 4. Automobile relays: Relays used in automobiles with high
switching load power and high impact
and vibration resistance.

4.6 Relay Driver ULN2003

It is a linear monolithic IC, which is used to drive the stepper motors, relays,
lamps etc. Normally the output current from the micro controller is of 30mA. So by
using this IC i.e.ULN2003 we can boost the current signal up to 600mA. So this IC
generates required voltages.

Description
The ULN2003 is high-voltage, high-current Darlington drivers
comprising of seven NPN darling ton pairs.

Features
 Output current (single output) 500mA MAX
 High sustaining voltage output 50v MIN
 Output clamp diodes
 Input compatible with various types of logic.

Applications
 Relays
 Hammer
 Lamps
 Display (LED) drivers.

42
Pin Configuration of ULN2003

Fig.4.5 Pin configuration of ULN2003

Pin Description
The IC is of 16-pin monolithic linear IC. It has 7darlington pairs internally, of
7 inputs and 7 outputs i.e.1 to 7 are inputs of Darlington pairs and 10 to 16 are the
outputs .8-pin is ground and 9-pin is common free wheeling diode.

Darlington Transistor Operation

For high input impedance we may use two transistors to form a Darlington pair.
This pair in CC configuration provides input impedance as high as 2Mohms. The input
signal varies the base current of the first transistor this produces variation in the
collector current in the first transistor. The emitter load of the first stage is the input
resistance of the second stage. The emitter current of the first transistor is the base
current of the second transistor.

43
4.7 Power Supply Unit

5 volt
Transformer Rectifier Filter Regulator
o/p
Fig 4.6 Power supply unit

Transformer
Transformer is a static device, which transfers electrical energy from one
alternating current circuit to another with out change in frequency. the working
principle behind its operation is faraday’s law of electromagnetic induction which
states that, “whenever current carrying conductor is moved in a magnetic field, flux
linked with the conductor changes and emf is induced in the conductor”.

Transformer is used in step down mode of operation in the sense that it

provides an output; which is in reduced form compared to input. It depends upon
number of turns in the windings i.e., turns ratio.

Primary winding is fed with a supply of 230v, 50Hz a.c which appears as a
voltage approximately 12v across secondary winding. This voltage is fed into rectifier
circuit for rectification.

Rectifier
In power supply unit, rectification is normally achieved by a solid-state diode.
A diode contains two electrodes called anode and cathode. A diode has the property
led electron flow easily in one direction but not in other direction. As a result when a.c
is applied to a diode, electrons only flow when anode is positive and cathode is
negative. Reversing the polarity the voltage applied to a diode will not permit electron
flow. The various methods of rectifying a.c to d.c are half wave and full wave
rectification.

44
 Full wave rectifier is employed in the rectification circuitry in order to obtain
ripple free and efficient d.c output. The rectifier has two diodes. The output from
secondary of step down transformer is fed as input to the rectifier.

Voltage Regulator
A voltage regulator is a circuit that supplies a constant voltage regardless of
changes in load current. Although voltage regulator can design using OPAMP, it is
quicker and easier to use Ic voltage regulator Ic voltage regulator are versatile and
relatively in expensive.

Types of IC voltage regulator

1. Fixed out put voltage regulator
2. Adjustable out put voltage regulator
3. Switching regulator.

Of these MC7805 fixed voltage regulator is employed .they are three terminal
devices with pin 1 and pin 2 representing input and out put respectively and pin 3
indicates ground. The MC 78XXseries of positive fixed voltage regulator designed
with thermal over load protection that shuts down the circuit when subjected to an
excessive power condition the circuit will pass, out put transistor safe area
compensation that reduces the out put short circuit current as voltage across the pass
transistor is increased.

In much low current application, compensation capacitors are not required.

However it is recommended that regulated input be by passed with the capacitor if the
regulator is the connected power supply filter with long wire lengths is if the out put
load capacitance is large. An input by pass capacitor is chosen to provide e good high
frequency characteristics to ensure stable operation under all load condition.

Features of Regulators
 No external components required.
 Internal thermal overload protection.

45
4.8 Circuit Explanation

Firstly, our main aim is to detect the ring on telephone line. We can do this by
observing the telephone line characteristic i.e. the telephone line has a line voltage of
48v passing through it always and when ring occurs an a.c voltage of 120v peak to
peak appears across the line. Observing this difference in voltages we can detect the
ring on the telephone line.

Detecting and measuring these a.c voltages is difficult. So we use a bridge

rectifier for converting a.c voltage to d.c voltage. We also use a potentiometer to bring
down the voltage below 5v.

This line voltage is fed as one input to the comparator. By using the
potentiometer we have obtained a line voltage of 1v. Another input to the comparator
is of 2v which is obtained from the 5v power supply connected to a potentiometer. We
adjust the comparator such that it produces high output in normal condition and the
output goes low when ring occurs.
Line voltage is fed to the negative input of comparator and the reference
voltage (2v) is fed to the positive input of the comparator. Initially when there is no
ring on the line we have 2.5v at the negative input and 2.1v at the positive input. So
the output of comparator is high. When there is ring on telephone line the line voltage
will be greater than the reference voltage (2.5v) and hence the output of comparator
drops so by observing the output of the comparator we can detect presence of ring on
the telephone line.

Comparator output is fed to P0.5 pin of micro controller for counting purpose
whenever the comparator output goes low the count is incremented by one and
compared with the valid number of rings. When the count equals the valid number of
rings then we operate a relay to achieve the off-hook condition of the telephone and
enter’s the voice mode.

The relay is operated by sending one toP0.7 pin of the micro controller.

46
47
48
Generally, the off-hook condition of the telephone is known by the exchange when
the voltage drops from 48v to 24v. Then the exchange feels that the phone is lifted
and it stops sending the ring tone and shifts it into voice mode. In order to obtain the
off-hook condition of the telephone we connect a load across the line such that when
the relay is operated the actual phone line is disconnected and this load is connected
which results with a drop in voltage thus achieving the off-hook condition.

During ring tone we can’t send any DTMF signals. Once the off-hook
condition is achieved and the telephone enters into the voice mode the DTMF signals
can be sent. The DTMF decoder IC CM 8870 receives the DTMF signals and
provides its 4 bit decoded BCD output.

The decoder senses the presence of two valid frequencies at its input and then
provides the corresponding equivalent 4-bit BCD code at its output. This BCD code is
fed as input to the microcontroller. Along with 4 bit BCD code CM8870 IC also
provides a signal std (delayed steering).When this signal is high it indicates the
presence of a valid BCD code at the output of the DTMF decoder.

Firstly, the micro controller checks whether the entered password is correct or
not. If the password is correct then the next output of the DTMF decoder are
considered else it is disconnected and shifts to the normal telephone mode. If the
correct password is entered then the next DTMF output corresponds to the device
selection and also switching ON or switching OFF of the device. In our project we
are using the digits on the telephone keypad in the following fashion for device
selection and operation.

0 - Enter password.
1 - Device 1 turning ON.
2 - Device 1 turning OFF.
3 - Device 2 turning ON.
4 - Device 2 turning OFF.
5 - Rotate stepper motor in forward direction.

49
 6 - Rotate stepper motor in backward direction.
9 Exit password

For example, we have pressed 0, the correct password and then digit 3 is
pressed. Then the device 2 will be turned ON by operating that particular relay. After
all the manipulations are over by pressing digit 9 we come out from voice mode to
normal telephone mode. In this way using the above circuitry we can control the
various devices in the household through telephone dialing.

We have undergone through various critical conditions during our design and
we have overcome those through some modifications in the programming.

They are

 When a person lifts the telephone within a predetermined number of rings

i.e., count then for the next dialing the count should be initialized. For
example if the telephone handset is lifted after three rings then the count
will be stopped at three. Next time when dialing is done after completion of
two rings itself count reaches five and telephone goes to off-hook condition.
So in order to avoid this problem we modified the program in such a way
that the count is reinitialized every time the Call is detected.

 Once the telephone enters the voice mode to come back to the phone mode
we have to enter the exit password. If the user has not pressed anything after
he/she enters into voice mode then the system remains in voice mode and it
never returns to phone mode. We have to switch off the power supply to
bring it back to phone mode. So in order to overcome this we inserted
certain delay in our program such that even if we don’t press any digit after
a certain amount of time the circuit gets disconnected and returns to phone
mode.
After five rings if any body presses invalid password then the circuit gets
disconnected and returns to phone mode.

50
4.9 Flow Chart

Fig.4.9 Flow chart

51
 CHAPTER 5
Programming

5.1 Software development tools

A set of software tools running on PC compatible systems which allows the

user to develop programs for a specific target processor.

Assembler: Allows user to develop target programs in assembly level language. It

usually supports the standard mnemonics, additionally; commands are provided to
define data and storage and to include other program modules.

Compiler: It allows user to develop target programs in a high level language like C or
PASCAL. It usually includes a set of useful library modules also to provide commonly
used mathematical functions etc.

Linker: Allows separately compiled/assembled modules to be linked together to

produce or single object module related to the required physical addresses.

Librarian: Allows user to maintain frequently used object modules in a library file.
These modules can be linked to other modules as and when required using the linker
utility. Facilities exists to and or to delete or update these library modules.

File converter software

The programs running on PC compatible systems, which allow the conversion
of a file in one standard format into a file in another standard format. These tools can
thus be used to overcome the problem of in compatible file formats.

At first the programs are written in assembly language and these files are called
as ASM files. Using ‘x8051’ software this program is converted into OBJ file and then

52
using LINK51 it is converted into HEX file which is in the form of hex numbers then
we dump the program into ROM and execute it.

5.2 Program

; P2.1 STEPPER MOTOR

; P2.2 STEPPER MOTOR
; P2.3 STEPPER MOTOR
; P2.4 STEPPER MOTOR
; P3.7 DOOR SENSOR
; P1.0 ACK BEEP
; P1.2 FOR RELAY1
; P1.4 FOR RELAY2
; P0.0 FORTH BIT OF DTMF O/P FED TO MICROCONTROLLER
; P0.1 THIRD BIT OF DTMF O/P FED TO MICROCONTROLLER
; P0.2 SECOND BIT OF DTMF O/P FED TO
MICROCONTROLLER
; P0.3 FIRST BIT OF DTMF O/P FED TO MICROCONTROLLER
; P0.4 STROBE TO DECIDE WHETHER BINARY
DATA RECEIVED OR NOT
; P0.7 TO KNOW RELAY IN TELEPHONE SIDE OR OUR
CIRCUITRY SIDE

ORG 0 ;ORIGINATING 0 LOCATION

LJMP SXXX ; JUMP TO LABEL SAA
ORG 0050
SXXX: SETB P1.2
SETB P1.4

LCALL SSEC
CLR P1.2
CLR P1.4

53
 LCALL SSEC
SETB P1.2
SETB P1.4
LCALL SSEC
CLR P1.2
CLR P1.4

LCALL SSEC
LCALL FROT
LCALL SSEC
LCALL RROT

SAA: MOV P1,#00H ;ALL RLY OFF

SA: MOV P0,#FFH
MOV P3,#FFH
MOV P2,#00H

CLR P0.6 ; SET RLY TO PH LINE

MOV R0,#00H
LCALL DEL

RR: LCALL RINGCNT

CJNE R4,#01H, SA
XX: JB P0.7,$
LCALL DEL1
JB P0.7,XX
INC R0
YY: JNB P0.7,$
LCALL DEL1
JNB P0.7,YY
CJNE R0,#05H,RR

54
 SETB P0.6

LCALL WDSUBR
CJNE R4,#01H,DISC
LCALL DTD
CJNE R2,#0AH,DISC

FDF: LCALL WDSUBR

CJNE R4,#01H,DISC
LCALL DTD

CJNE R2,#01H,N1
LCALL SSEC
SETB P1.2 ;DEVICE 1 WILL ON
LCALL BEEP
LCALL SSEC

N1: CJNE R2,#02H,N2

CLR P1.2 ;DEVICE 1 WILL OFF
LCALL SSEC
LCALL BEEP
LCALL SSEC
LCALL BEEP

N2: CJNE R2,#03H,N3

SETB P1.4 ;DEVICE 2 WILL ON
LCALL SSEC
LCALL BEEP
LCALL SSEC

55
N3: CJNE R2,#04H,N4
CLR P1.4 ;DEVICE 2 WILL OFF
LCALL SSEC
LCALL BEEP
LCALL SSEC
LCALL BEEP

N4: JNE R2,#05H,N5

LCALL FROT;DOOR WILL CLOSED
MOV P2,#00H
LCALL SSEC
LCALL BEEP
LCALL SSEC

N5: CJNE R2,#06H,N6

LCALL RROT ;DOOR WILL OPEN
MOV P2,#00H
LCALL SSEC
LCALL BEEP
LCALL SSEC
LCALL BEEP

N6: CJNE R2,#09H,FDF

WT: LJMP SA

DISC: CLR P0.6

LCALL DEL
LJMP SA

56
DTD:
PP: MOV R7,#4FH
AEE: MOV R6,#FFH
ADE: MOV R5,#FFH
ABE: JNB P0.4,ACE
LCALL DEL1
JNB P0.4,ABE
EDR: MOV R2,P0
CLR A
MOV A,R2
ANL A,#0FH
MOV R2,A
RET
ACE: DJNZ R5,ABE
DJNZ R6,ADE
DJNZ R7,AEE
MOV R4,#02H
RET

WDSUBR: MOV R7,#4FH

AE: MOV R6,#FFH
AD: MOV R5,#FFH
AB: JNB P0.4,AC
LCALL DEL1
JNB P0.4,AB
MOV R4,#01H ;STATUS CHK #01
OK,#02NOTOK
RET
AC: DJNZ R5,AB
DJNZ R6,AD
DJNZ R7,AE
MOV R4,#02H

57
 RET

DEL1: MOV PSW,#08H

MOV R6,#0FH
L1: MOV R7,#FFH
DJNZ R7,$
DJNZ R6,L1
MOV PSW,#00H
RET

DEL: MOV PSW,#08H

MOV R5,#03H
M1: MOV R6,#FFH
M2: MOV R7,#FFH
DJNZ R7,$
DJNZ R6,M2
DJNZ R5,M1
MOV PSW,#00H
RET

RINGCNT: MOV R7,#0AH

AE1: MOV R6,#FFH
AD1: MOV R5,#FFH
AB1: JB P0.7,AC1
LCALL DEL1
JB P0.7,AB1
MOV R4,#01H
RET

58
 AC1: DJNZ R5,AB1
DJNZ R6,AD1
DJNZ R7,AE1
MOV R4,#02H
RET

SEC:
MOV R7,#1FH
SXAE1: MOV R6,#FFH
SXAD1: MOV R5,#FFH
SXAB1: DJNZ R5,SXAB1
DJNZ R6,SXAD1
DJNZ R7,SXAE1
RET

;************TO ROTATE STEPPER MOTOR IN FORWARD DIRECTION

(TO CLOSE THE DOOR)
FROT:
FTOP: ETB P2.1
CLR P2.2
CLR P2.3
SETB P2.4

LCALL DEL10
SETB P2.1
SETB P2.2
CLR P2.3
CLR P2.4
LCALL DEL10

CLR P2.1
SETB P2.2

59
 SETB P2.3
CLR P2.4
LCALL DEL10

CLR P2.1
CLR P2.2
SETB P2.3
SETB P2.4
LCALL DEL10

JB P3.7,FTOP
LCALL DEL1
JB P3.7,FTOP
RET

;*****************TO ROTATE STEPPER MOTOR REVERSE DIRECTION

(TO OPEN THE DOOR)

RROT: MOV R7,#0BH

RTOP: SETB P2.1
CLR P2.2
CLR P2.3
SETB P2.4
LCALL DEL10

CLR P2.1
CLR P2.2
SETB P2.3
SETB P2.4
LCALL DEL10

CLR P2.1

60
 SETB P2.2
SETB P2.3
CLR P2.4
LCALL DEL10

SETB P2.1
SETB P2.2
CLR P2.3
CLR P2.4
LCALL DEL10

DJNZ R7,RTOP
RET

;**************************** FOR ACKNOWLDGEMENT*******; -----------

DEL10: MOV R4,#12H
L11: MOV R3,#FFH
DJNZ R3,$
DJNZ R4,L11
RET

BEEP: MOV R2,#10H

XM1: MOV R1,#FFH
XM2: MOV R0,#5FH
CPL P1.0
XM3: DJNZ R0,XM3
DJNZ R1,XM2
DJNZ R2,XM1
CLR P1.0
RET

61
SSEC: MOV R2,#06H
F3: MOV R1,#FFH
F2: MOV R0,#FFH
F1: DJNZ R0,F1
DJNZ R1,F2
DJNZ R2,F3
RET
END;

62
 CHAPTER 6
CONCLUSION

The project “TELE CONTROLLED STEPPER MOTOR” using Atmel 89C51

Microcontroller is successfully designed.

We have designed our project so as to rotate the stepper motor in forward

direction and backward direction, by using this we can do OPEN/CLOSE the doors.
And also we control our home appliances which are connected to relays.

AT89C51 had given an acknowledgment to the user if the desired work was
done. Microcontroller produce single beep sound if the door is CLOSED or if the
device was turned ON. And microcontroller produce more beep sounds if the door is
OPENED or if the device was turned OFF.

Future Scope
The project is further extended by using GSM modem instead of
TELEPHONE, with the help of same DTMF and also may control more number.of
devices.

63
 Appendix-A
A.1 DC characteristics of AT89C51 Microcontroller

64
A.2 AC Characteristics of AT89C51

65
 Appendix-B

B.1 Block Diagram of CM 8870 DTMF Decoder

66
B.2 DC and Operating and AC characteristics of CM 8870

67
68
B.3 PIN description of CM 8870

69
 Appendix-C

C.1 Electrical charctreristics of LM 7805

70
 Appendix-D

D.1 Electrical Characteristics of ULN 2003

71
 REFERENCES

1. Douglas V.Hall, “Microprocessor And Interfacing”, (Tata McGraw-Hill,2nd

edition, 2002)
2. Kenneth J. Ayala, “The 8051 Microcontroller programming application”,
(Penram International ,2nd edition, 2003)
3. Muhammad Ali Mazidi and Janice Gillispie Mazidi, “The 8051
Microcontroller and Embedded system”,(PEARSON Education, 2nd edition
2002)
4. Roy Chowdary, “Linear Integrated Circuits”, (New Age International
Publications ,2nd Edition,2000)

URLS
1. www.atmel.com
2. www.efy.com
3. www.calmicro.com

72