Ordering number : EN5505D

LB1845
Monolithic Digital IC

PWM Current Controlling

Stepping Motor Driver

http://onsemi.com

Overview
The LB1845 is a PWM current control type stepping motor driver that uses a bipolar drive scheme. It is particularly
suitable for driving carriage and paper feed stepping motors in printers and similar products.

Features
PWM current control (fixed off time scheme)
Digital load current selection function
Sustained output voltage: 45V
Built-in thermal shutdown circuit

Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter

Symbol

Motor supply voltage

VBB max

Peak output current

IO peak

Continuous output current

Conditions

Ratings

Unit
45

1.75

IO max

1.5

Logic block supply voltage

VCC

7.0

Logic input voltage range

VIN

-0.3 to VCC

Emitter output voltage

VE

Allowable power dissipation

tW 20s

Pd max1

Independent IC

Pd max2

With an arbitrarily large heat sink

1.0

3.0

20.0

Operating temperature

Topr

-20 to +85

Storage temperature

Tstg

-55 to +150

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

Semiconductor Components Industries, LLC, 2013

June, 2013

O1806 MS IM / D3096HA (OT) No.5505-1/9

LB1845
Recommended Operating Ranges at Ta = 25C
Parameter

Symbol

Conditions

Ratings

Unit

Motor supply voltage

VBB

10 to 44.5

Logic block supply voltage

VCC

4.75 to 5.25

Reference voltage

VREF

1.5 to 7.5

Electrical Characteristics at Ta = 25C, VBB = 38V, VCC = 5V, VREF = 5V

Parameter

Symbol

Ratings

Conditions
min

typ

unit
max

[Output Block]
Output stage supply current

Output saturation voltage 1

Output leakage current

IBB ON

12

16

IBB OFF

0.7

0.9

VO(sat)1

IO = +1.0A Sink

1.2

1.4

VO(sat)2

IO = +1.5A Sink

1.4

1.7

VO(sat)3

IO = -1.0A Source

1.1

1.3

VO(sat)4

IO = -1.5A Source

1.3

1.6

IO(leak)1

VO = VBB Sink

IO(leak)2

VO = 0V Source

Sustained output voltage

V(sus)

50
-50

45

mA

A
V

[Logic Block]
Logic supply current

ICC ON

I0 = 0.8V, I1 = 0.8V

19.5

25.3

ICC OFF

I0 = 2.4V, I1 = 2.4V

15.5

20.1

Input voltage

VIH

2.4

VIL
Input current

Current control threshold voltage

0.8

IIH

VIH = 2.4V

IIL

VIL = 0.8V

-10

I0 = 0.8V, I1 = 0.8V

9.5

10

10.5

I0 = 2.4V, I1 = 0.8V

13.5

15

16.5

I0 = 0.8V, I1 = 2.4V

25.5

30

34.5

VREF/VSENSE

Thermal shutdown temperature

mA

10

TS

170

* Note: Design guaranteed value.

Package Dimensions
unit: mm (typ)
3147C
15

12.7
11.2

R1.7

0.4

8.4

28

14

20.0

4.0

4.0

26.75

(1.81)

1.78

0.6

1.0

SANYO : DIP28H(500mil)

No.5505-2/9

LB1845
Pd max - Ta

Allowable Power Dissipation, Pd max - W

24

With an arbitrarily large heat sink

20

16

12
10.4
8

4
3

Independent IC
1.56

0
--20

20

40

60

80

Ambient Temperature, Ta- C

100
ILB00880

Truth Table
ENABLE

PHASE

OUTA

OUTB

OFF

OFF

I0

I1

Output Current

VREF/(10RE) = IOUT

VREF/(15RE) = IOUT2/3

VREF/(30RE) = IOUT1/3

Note: Outputs is OFF when ENABLE is high or in the I0 = I1 = high state.

VCC

RC1

VREF1

PHASE1

ENABLE1

I11

I01

I02

I12

ENABLE2

PHASE2

VREF2

RC2

GND

Pin Assignment

28

27

26

25

24

23

22

21

20

19

18

17

16

15

10

11

12

13

SENSE1

E1

D-GND

NC

OUT 1B

OUT 1A

OUT 2B

OUT 2A

NC

D-GND

E2

SENSE2

14

VBB

VBB

LB1845

ILB00881

No.5505-3/9

LB1845
Block Diagram
VBB
SBD
OUT 1B

SBD
OUT 1A V

VBB
SBD
OUT 2B

BB

SBD
OUT 2A

Output block

Output block

Output block

Output block

Output block

Output block

Output block

PHASE1

Output block

Thermal
shutdown

VCC

PHASE2

ONE
SHOT

RC1

470pF

ENABLE2
I02

+
I12

SENSE2
1k

D-GND
56k

330pF

0.82(1W)

E2

GND

1k

RC2

SENSE1

470pF

E1

56k

I1 1

ONE
SHOT

330pF

I0 1

0.82(1W)

Current control
block

ENABLE1

VREF2

Current control
block

VREF1

ILB00882

Application Circuit Diagram

Ccc
100F Cbb

RC1
27

E1

VREF1
26

Re

D-GND
4
NC
5

SBD

PWM1

OUT1B
Motor

SBD

I01
22

I02
21

I12
20

OUT2A

SBD

D-GND
11
E2
12

Rc
Cc

ENABLE2
19

PWM2

NC
10

Re

ENABLE1
24
I11
23

OUT2B

Rt

PHASE1
25

6
OUT1A

SBD

Ct

PHASE2
18
VREF2
17

SENSE2
13

RC2
16

VBB
14

GND
15

Digital control signals

SENSE1
2

Digital control signals

VCC
28

Rc

Cc

VBB
1

R1

Ct

Off time setting

values
toffCtRt

Re=0.82(1W)
VREF=5V
Rt=56k
Ct=470pF
Rc=1k
Cc=330pF
Cbb=100F

ILB00883

No.5505-4/9

LB1845
Pin Description
Pin No

Pin

1, 14

VBB

SENSE1

13

SENSE2

E1

Function
Output stage power-supply voltage
Set current detection pins.
Connect these pins, fed back through noise filters, to E1 and E2.
The set current is controlled by the resistors Re inserted between these pins and ground.

12

E2

4, 11

D-GND

Internal diode anode connection

OUT1B

Outputs

OUT1A

OUT2B

OUT2A

15

GND

Ground

27

RC1

Used to set the output off time for the switched output signal.

16

RC2

The fixed off times are set by the capacitors and resistors connected to these pins. toff = CR.

26
17

VREF1
VREF2

25

PHASE1

Output phase switching inputs.

18

PHASE2

High-level input: OUTA = high, OUTB = low

24

ENABLE1

Output on/off settings

19

ENABLE2

High-level input: output off

22, 23

I01, I11

Digital inputs that set the output current

21, 20

I02, I12

The output currents can be set to 1/3, 2/3, or full by setting these pins to appropriate combinations of high and low levels.

28

VCC

Output current settings

The output current is determined by the voltage (in the range 1.5 to 7.5V) input to these pins.

Low-level input: OUTA = low, OUTB = high

Low-level input: output on

Logic block power supply

Timing chart for pin switching operations during PWM drive

RC pin

td

Spike noise

E pin

SENSE pin

VOUT pin

toff

ILB00884

Figure 1 Switching Waveforms

toff: Output off time. Determined by external capacitor and resistor Ct and Rt. (toff Ct Rt)
td: Delay time between the point the set current is sensed at the SENSE pin and the point the output turns off.

No.5505-5/9

LB1845
Usage Notes
1. External diode
Since this IC adopts a system based on lower side transistor switching drive, an external diode for the regenerative
current that occurs during switching is required between VBB and VOUT. Use a Schottky barrier diode with a low
feedthrough current.
2. Noise filters
Since spike noise (see Figure 1) occurs when switching to the on state due to the external diodes feedthrough current,
applications must remove noise from the SENSE pin with a noise filter (Cc, Rc) between the E pin and the SENSE
pin.
However, note that if the values of Cc and Rc are too large, the SENSE voltage rise will be slowed, and the current
setting will be shifted towards a higher current level.
3. VREF pin
It is possible to change the output current continuously by continuously changing the VREF pin voltage. However,
this voltage cannot be set to 0V. The VREF pin input impedance is 26k (30%) when VREF is 5V. Since this pin is
used to set the output current, applications must be designed so that noise does not appear on this pin's input.
4. GND pin
Since this IC switches large currents, care must be taken to avoid ground loops when the IC is mounted in the
application. The section of the PCB that handles large currents should be designed with a low-impedance pattern, and
must be separated from the small signal sections of the circuit. In particular, the ground for the sense resistor Re must
be as close as possible to the IC ground.
5. Operation in hold mode
There are cases where a current somewhat larger than the current setting may flow in hold mode (light load mode).
Since this IC adopts a lower side switching, lower side sense system, the emitter voltage falls and the sense voltage
goes to 0 when the switching state goes to off. The circuit then always turns the output on after the toff period has
elapsed. At this time, due to the light load, the existence of the time td, and the fact that the output goes on even if the
output current is higher than the set current, the output current will be somewhat higher than the set current.
Applications should set the current setting somewhat lower than required if this occurs.
6. Function for preventing the upper and lower outputs being on at the same time
This IC incorporates a built-in circuit that prevents the through currents that occur when the phase is switched. The
table lists the output on and off delay times when PHASE and EANBLE are switched.

When PHASE is switched

When ENABLE is on

Sink side

Source side

On delay time

10s

9s

Off delay time

1.5s

3s

On delay time

9s

9s

Off delay time

1.5s

6.5s

7. 1-2 phase excitation and the double 1-2 phase excitation control sequence
To reduce the vibration that occurs when the motor turns, this IC supports 1-2 phase excitation and double 1-2 phase
excitation by using the output current setting digital input pins I0 and I1 without changing the VREF pin voltage.
Tables 1 and 2 list that control sequence, and Figure 2 and Figure 3 present the composite vector diagram for this
sequence.2. Noise filters

No.5505-6/9

LB1845
Table 1 [1-2 phase excitation] 1/2 Step
ENABLE1 = ENABLE2 = 0
Phase A

Phase B

No
PH1

I11

I01

3
4
5

Current

Current

PH2

I12

I02

2/3

2/3

2/3

2/3

2/3

2/3

2/3

2/3

Value

Value

Table 2 [Double 1-2 phase excitation] about 1/4 Step

ENABLE1 = ENABLE2 = 0
Phase A

Phase B

No
PH1

I11

I01

Current

Current

PH2

I12

I02

1/3

Value

Value

2/3

2/3

1/3

1/3

2/3

2/3

1/3

1/3

10

2/3

2/3

11

1/3

12

13

1/3

14

2/3

2/3

15

1/3

Composite Vector Diagram

[1-2 phase excitation]

[Double 1-2 phase excitation]

Phase B

Phase B

(2)

(4)
(1)

(3)
(2)

(1)

(0)

(0)
Phase A

ILB00885

Figure 2 Composite Vector Diagram for the

Sequence in Table 1 (1/4 cycle)

Phase A
ILB00886

Figure 3 Composite Vector Diagram for the

Sequence in Table 2 (1/4 cycle)

No.5505-7/9

LB1845

12

I BB

10

ut
Outp

Logic Block Supply Current, ICC - mA

Output Stage Supply Current, IBB - mA

14

on

8
6
4
2

IBB Output off

0

32

VBB=38V
VREF=5V
Output off

28

28

24

24

20

20

I CC

16

16

12

12

I BB

0
8

12

16

20

24

28

32

36

40

Output Stage Power-Supply Voltage, VBB - V

44

46

28

IC
C

24

20

20

16

16

B
IB

12

12

0
1

ILB00888

VO(sat) - IOUT

(Sink side)
28

24

1.6

32

VBB=38V
VREF=5V
Output on

Logic Block Supply Voltage, VCC - V

ILB00887

ICC, IBB - VCC

32

0
0

Logic Block Supply Voltage, VCC - V

ILB00889

Output Saturation Voltage, VO(sat) - V

Output Stage Supply Current, IBB - mA

Logic Block Supply Current, ICC - mA

ICC, IBB - VCC

32

VCC=5V
VREF=5V

Output Stage Supply Current, IBB - mA

IBB - VBB

16

1.2

0.8

0.4

VBB=45V
VCC=5V
VREF=5V

0
0

0.4

0.8

1.2

1.6

Output Current, IOUT - A

2.0

2.4
ILB00890

VO(sat) -- IOUT

1.6

Output Saturation Voltage, VO(sat) - V

(Source side)

1.2

0.8

0.4

VBB=45V
VCC=5V
VREF=5V

0
0

0.4

0.8

1.2

1.6

Output Current, IOUT - A

2.0

2.4
ILB00891

No.5505-8/9

LB1845

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PS No.5505-9/9