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Data formatting & carrier

Modulation transmitter
Trainer and carrier
Demodulation & data
Reformatting receiver trainer
ST2156 & ST2157

Learning Material
Ver. 1.2

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94, Electronic Complex, Pardesipura


Indore - 452 010 India
Tel: +91-731 4211100
Fax: +91-731-2555643
e mail: info@scientech.bz
Websites: www.caddo.bz
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ST2156 &ST2157

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ST2156 &ST2157

Data Formatting & Carrier Modulation Transmitter Trainer and Carrier


Demodulation & Data Reformatting Receiver Trainer
ST2156 & ST2157
Table of Contents
1.
2.
3.
4.
5.

Safety Instructions
5
Introduction
6
Features
7
Technical Specifications
8 &9
Theory
10
Communication and Communication System
10
Digital Communication
11
Line Coding and Decoding
13
Different Data Formatting techniques
15
Modulation and its purpose
18
Digital Modulation
18
Amplitude Shift Keying (ASK) Technique
18
Frequency Shift Keying (FSK) Technique
20
Phase Shift Keying (PSK) and Differential Phase Shift Keying (DPSK)
Technique
23
Quadrature Phase Shift Keying (QPSK) Technique
26
Differential Quadrature Phase Shift Keying
32
6. Operating Instructions
33
7. Experiments
Experiment 1
34
Study of Data Formats
Experiment 2
36
Study of Amplitude Shift Keying
Experiment 3
39
Study of Frequency Shift Keying
Experiment 4
41
Study of Phase Shift Keying
Experiment 5
45
Study of Differential Phase Shift Keying
Experiment 6
47
Study of Quadrature Phase Shift Keying
Experiment 7
51
Study of Differential Quadrature Phase Shift Keying
8. Warranty & List of Accessories

56

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Safety Instructions
Read the following safety instructions carefully before operating the instrument. To
avoid any personal injury or damage to the instrument or any product connected to it.
Do not operate the instrument if you suspect any damage within.
The instrument should be serviced by qualified personnel only.
For your safety:
Use proper mains cord

: Use only the mains cord designed for this instrument.


Ensure that the mains cord is suitable for your
country.

Ground the instrument

: This instrument is grounded through the protective


earth conductor of the mains cord. To avoid electric
shock the grounding conductor must be connected to
the earth ground. Before making connections to the
input terminals, ensure that the instrument is properly
grounded.

Observe terminal ratings :


Use only the proper Fuse

To avoid fire or shock hazards, observe all ratings and


marks on the instrument.
: Use the fuse type and rating specified for this
instrument.

Use in proper atmosphere : Please refer to operating conditions given in the


manual.

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1.

Do not operate in wet / damp conditions.

2.

Do not operate in an explosive atmosphere.

3.

Keep the product dust free, clean and dry.

ST2156 &ST2157

Introduction
Data Formatting & Carrier Modulation Transmitter Trainer ST2156 and
Carrier Demodulation & Data Reformatting Receiver Trainer ST2157 are
complete digital communication system which efficiently explains all communication
processing steps involved in digital transmission & reception of analog signals.
Various digital modulation techniques viz. ASK, FSK, PSK, DPSK, QPSK etc. can be
implemented using combinations of these two trainers.

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Features
Features of ST2156

On-board Carrier generation circuit (Sine waves synchronized to transmitter


data).

On-board in phase and quadrate phase carrier for QPSK modulation.

Different data conditioning formats NRZ (L), NRZ (M), RZ, Biphase.
(Manchester), Biphase (Mark), AMI, RB.

FSK, PSK, DPSK ASK, QPSK, DQPSK carrier modulation.

On-board Unipolar to Bipolar conversion.

On-board data inverter.

On-board 8-bit Data Source

On-board Clock Source

Features of ST2157

7 different data reconditioning formats NRZ (M), RZ, AMI, RB, Biphase
(Manchester), Biphase (Mark).

ASK, FSK, PSK, DPSK & QPSK carrier demodulation.

On - Board Biphase Clock recovery circuit.

On - Board data squaring circuit and differential decoder.

On - Board 4th Order Butterworth filters

On board 8 bit Data Receiver.

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Technical Specifications of ST2156


Data formats

NRZ (L), NRZ (M), RZ, AMI, RB, Biphase


(Manchester), Biphase (Mark).

Carrier modulation

ASK, FSK, PSK, DPSK, QPSK

On-board carrier

Sine waves synchronized to transmitted data at


1.6 MHz, 960 KHz, (0 deg. phase) 960 KHz, (90
deg. phase)

Test Points

43

Power Supply

220V 10%, 50 Hz.

Power Consumption

3VA (approx.)

Interconnections

2 mm sockets

Dimensions (mm)

W420 x H100 x D255

Weight

2 Kg. (approx)

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Technical Specifications of ST2157


Input

From Model ST2156

Carrier Demodulation

ASK - Rectifier Diode


FSK Detector
PSK / DPSK- Square Loop Detector
QPSK - Fourth Power Loop Detector

Biphase Clock Recovery

By PLL

Power Consumption

6 VA (approx)

Test Points

39

Interconnections

2 mm Sockets

Power Supply

220 V +/- 10%, 50 Hz

Dimensions (mm)

W 420 x H100 x D255

Weight

2 Kgs (approx)

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Theory
Communication and Communication System:
Communications is the field of study concerned with the transmission of information
through various means. It can also be defined as technology employed in transmitting
messages.
In the most fundamental sense, Communication involves implicitly the transmission
of information from one place to another through a succession of processes, as
describe here:

The generation of message signal: voice, music, and picture or computer data.

The description of that message signal by set of symbols.

The encoding of these symbols in a form that is suitable for transmission over
physical medium.

The transmission of encoded symbols to desired destination.

The decoding and reproduction of original symbol.

The recreation of original message.

In a communication system, there are three basic elements, namely, transmitter,


receiver and channel as shown in figure 1

Block diagram of Communication System


Figure 1

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The transmitter is located at one point in space, the receiver is located at some other
point separated from transmitter, and channel is a physical medium which connects
them. The purpose of transmitter is to convert the message signal produced by the
source of information, into a form suitable for transmission over the channel.
However, as the signal propagates along the channel, it is distorted due to channel
imperfections. The received signal is a corrupted version of transmitted signal. The
receiver has the task of operating on the received signal so as to reconstruct a
recognizable form of the original message signal.
Digital Communication:
Digital communications refers to the field of study concerned with the transmission of
digital data. This is in contrast with analog communications. While analog
communication uses a continuously varying signal, a digital transmission can be
broken down into discrete messages. Transmitting data in discrete messages allows
for greater signal processing capability. The ability to process a communication signal
means that errors caused by random processes can be detected and corrected. Digital
signals can also be sampled instead of continuously monitored and multiple signals
can be multiplexed together to form one signal.
Because of all these advantages, and recent advances in wideband communication
channels and solid-state electronics have allowed scientists to fully realize these
advantages, digital communications has grown quickly. Digital communications is
quickly edging out analog communication because of the vast demand to transmit
computer data and the ability of digital communiations to do so.

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Block diagram of Digital Communication System


Figure 2

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A digital communication system represented by the block diagram in figure 2, the


rationale for which is rooted in information theory. The functional blocks of the
transmitter and the receiver, starting from the far end of the channel, are paired as
follows:

Source Encoder-Decoder

Channel Encoder-Decoder

Modulator-Demodulator

The source encoder removes redundant information from the message signal and is
responsible for efficient use of the channel. The resulting sequence of symbol is called
the source code word. The data stream is processed next by the channel encoder,
which produces a new sequence of symbol called the channel code word. Finally, the
modulator represents each symbol of the channel code word by a corresponding
analog symbol, appropriately selected from a finite set of possible analog symbols.
Line Coding and Decoding:
Line coding consists of representing the digital signal to be transported, by an
amplitude- and time-discrete signal that is optimally tuned for the specific properties
of the physical channel (and of the receiving equipment). The waveform pattern of
voltage or current used to represent the 1s and 0s of a digital signal on a transmission
link is called line encoding. The common types of line encoding are unipolar, polar,
bipolar and Manchester encoding.
Line codes are used commonly in computer communication networks over short
distances.
Each of the various line formats has a particular advantage and disadvantage. It is not
possible to select one, which will meet all needs. The format may be selected to meet
one or more of the following criteria:

Minimize transmission hardware

Facilitate synchronization

Ease error detection and correction

Minimize spectral content

Eliminate a dc component

The Manchester code is quite popular. It is known as a self-clocking code because


there is always a transition during the bit interval. Consequently, long strings of zeros
or ones do not cause clocking problems.

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Various Data formatting techniques


Figure 3

Classification of Line codes


Figure 4

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Different Data Formatting techniques:


Non return to zero- level (NRZ-L):
Representation

+5V for data bit 1 and 0V for data bit 0.

Bandwidth

Low bandwidth.

DC Level

High DC component.

Timing Information :

No timing information (For long stream of 1s


and 0s)

Waveforms of NRZ-L
Figure 5
Non return to zero- level (NRZ-M):
Representation

Level transition for bit 1 and unchanged level


for bit 0.

Bandwidth

Low bandwidth.

DC Level

High DC component.

Timing Information

No timing information (For long stream of 0s)

Waveforms of NRZ-M
Figure 6
Return to zero (RZ):
Representation

: 0V for bit 0 and for bit 1, for half bit duration +5V
and the rest of the bit duration is represented as 0V.

Bandwidth

: Twice as that required for the NRZ.

DC Level

: High DC component.

Timing Information

: No timing information (For long stream of 0s)

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Waveforms of RZ-L
Figure 7
Biphase (Manchester):
Representation

: For bit 1, +5V for first half bit time and 0V during
the second half and for bit 0, 0V for first half bit
time and +5V during the second half.

Bandwidth

: Twice as that required for the NRZ.

DC Level

: No DC component.

Timing Information

: Good clock recovery.

Waveforms of Manchester
Figure 8
Biphase (Mark):
Representation

For any bit either 1 or 0, first half bit duration +5V


or 0V and invert of first half during next half bit
duration. Bit 0 Bit Pattern remains the same.
Bit 1

Phase Reversal.

Bandwidth

Twice as that required for the NRZ.

DC Level

No DC component.

Timing Information

Good clock recovery.

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Waveforms of Mark
Figure 9
Return to Bias (RB):
Representation

: During the first half a period, positive level for bit 1


and a negative level for bit 0 and during the second
half bit time, both returns to the bias level.

Bandwidth

: Twice as that required for the NRZ.

DC Level

: The DC component depends on the string of 1s and


0s.

Timing Information : Good clock recovery (Self clocking system).

Waveforms of RB
Figure 10
Alternate Mark Inversion (AMI):
Representation

: Like RB encoding, the AMI always returns to the bias


level during second half of the bit time interval and
during the first half the transmitted level can be a
positive, a negative or bias level, as for a bit 0 bias
level and for a bit 1 either a positive level or negative
level, the level being chose opposite to what it was
used to represent the previous bit 1.

Bandwidth

: Twice as that required for the NRZ.

DC Level

: No DC component.

Timing Information : No timing information (For long sequence of 0s).

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Waveforms of AMI
Figure 11
Modulation and its purpose:
Baseband signals produced by various information sources are not always suitable for
direct transmission over a given channel. These signals are usually further modified to
facilitate transmission. This conversion process is known as Modulation. In this
process, the baseband signal is used to modify some parameter of a high frequency
carrier signal. A carrier is sinusoidal signal of the high frequency, and one of its
parameter such as amplitude, frequency or phase is varied according to the message
signal.
Purpose of Modulation:
1. For realizable height of Antenna.
2. Simultaneous transmission of several signals.
3.

To have a high noise immunity.

Digital Modulation:
In digital modulation, an analog carrier signal is modulated by a digital bit stream.
Digital modulation methods can be considered as digital-to-analog conversion, and
the corresponding demodulation or detection as analog-to-digital conversion. To be
able to transmit the data over long distance, we have to modulate the signal that is
varying phase, frequency or amplitude according to the digital data. At the receiver
separate the signal and the digital information by the process of demodulation.
Some of the digital modulation techniques are described here as follows
Amplitude Shift Keying (ASK) Technique:
The simplest method of modulating a carrier with a data stream is to change the
amplitude of the carrier wave every time the data changes. This modulation technique
is known as Amplitude Shift Keying.
The simplest way of achieving amplitude shift keying is by switching 'ON' the carrier
whenever the data bit is '1' & switching it 'OFF' whenever the data bit is '0' i.e. the
transmitter outputs the carrier for a' 1 ' & totally suppresses the carrier for a '0'. This
technique is also known as ON-OFF keying. Figure 12 illustrates the amplitude shift
keying for the given data stream.
Thus,
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Data = 1 carrier transmitted


Data = 0 carrier suppressed

Amplitude Shift Keying modulation waveform


Figure 12
The ASK waveform is generated by a balanced modulator circuit, also known as a
linear multiplier as shown in the figure 13 given below. As the name suggests, the
device multiplies the instantaneous signal at its two inputs. The output voltage being
product of the two input voltages at any instance of time. One of the inputs is AC
coupled 'carrier' wave of high frequency. Generally, the carrier wave is a sinusoidal
signal since any other waveform would increase the bandwidth, without providing any
advantages. The other input which is the information signal to be transmitted, is DC
coupled. It is known as modulating signal.

Amplitude Shift Keying Modulator


Figure 13

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The data stream applied is unipolar i.e. 0 volts for logic '0' & + 5 Volts for logic '1'.
The output of balanced modulator is a sine wave, unchanged in phase when a data bit
l' is applied to it and is zero when the data bit '0' is applied.
The ASK modulation result in a great simplicity at the receiver. The method to
demodulate the ASK waveform is to rectify it, pass it through the filter & shape up
the resulting waveform. The output is the original data stream. Figure 14 shows the
functional blocks required in order to demodulate the ASK waveform at receiver.

Amplitude Shift Keying Demodulator


Figure 14
Advantages and limitations of Amplitude Shift Keying Modulation:
Amplitude shift keying is fairly simple to implement in practice, but it is less efficient,
because the noise inherent in the transmission channel can deteriorate the signal so
much that the amplitude changes in the modulated carrier wave due to noise addition,
may lead to the incorrect decoding at the receiver. Hence, this technique is not widely
used is practice. Application wise, it is however used in diverse areas such as old
emergency radio transmissions and fiber-optic communications.
Frequency Shift Keying (FSK) Technique:
In frequency shift keying, the carrier frequency is shifted in steps (i.e. from one
frequency to another) corresponding to the digital modulation signal. If the higher
frequency is used to represent data '1' & lower frequency for data '0', the resulting
Frequency shift keying waveform appears as shown in figure 15.
Thus

Data = 1 high frequency


Data = 0 low frequency

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Frequency Shift Keying Waveform


Figure 15
Frequency Shift Keying Modulator:
On a closer look at the FSK waveform, it is apparent that it can be represented as the
sum of two ASK waveforms. This is illustrated in figure 16.

Generation of FSK Waveform from the sum of two ASK Waveforms


Figure 16

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The functional blocks required in order to generate the FSK signal is as shown in
figure 17. There are two ASK modulator, each has different carrier frequencies but
the digital data is inverted in one of the modulator. These two different ASK
modulated signal are applied to the summing amplifier to get FSK modulated signal.

Frequency Shift Keying Modulator


Figure 17
The demodulation of FSK waveform can be carried out by a phase locked loop. As
known, the phase locked loop tries to 'lock' to the input frequency. It achieves this by
generating corresponding output voltage to be fed to the voltage controlled oscillator,
if any frequency deviation at its input is encountered. Thus the PLL detector follows
the frequency changes & generates proportional output voltage. The output voltage
from PLL contains the carrier components. Therefore the signal is passed through the
low pass filter to remove them. The resulting wave is rounded to be used for digital
data processing. Also, the amplitude level may be very low due to channel
attenuation. The signal is 'Shaped Up' by feeding it to the voltage comparator. The
functional block diagram of FSK demodulator is shown in figure 18.

Frequency Shift Keying Demodulator


Figure 18
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Advantages and limitations of Frequency Shift Keying Modulation


Since the amplitude change in FSK waveform does not matter, this modulation
technique is very reliable even in noisy & fading channels. But there is always a price
to be paid to gain that advantage.
The price in this case is widening of the required bandwidth. The bandwidth increase
depends upon the two carrier frequencies used & the digital data rate. Also, for a
given data, the higher the frequencies & the more they differ from each other, the
wider the required bandwidth. The bandwidth required is at least doubled than that in
the ASK modulation. This means that lesser number of communication channels for
given band of frequencies.
Phase Shift Keying (PSK) and Differential Phase Shift Keying (DPSK)
Technique:
Phase shift keying involves the phase change of the carrier wave between 0 and 180
in accordance with the data levels to be transmitted. Phase shift keying is also known
as phase reversal keying (PRK). The PSK waveform for a given data is as shown in
figure 19.
For Binary PSK
S0 (t) = Acos(wt)

represents binary 0

S1 (t) = Acos(wt+ )

represents binary 1

Phase Shift Keying Waveform


Figure 19
Functionally, the PSK modulator is very similar to the ASK modulator. Both uses
balanced modulator to multiply the carrier with the modulating signal. But in contrast
to ASK technique, the digital signal applied to the modulation input for PSK
generation is bipolar i.e. have equal positive and negative voltage levels. When the
modulating input is positive the output of modulator is a sine wave in phase with the
carrier input. Where as for the negative voltage levels, the output of modulator is a
sine wave which is shifted out of phase by 180 from the carrier input. This happens
because the carrier input is now multiplied by the negative constant level.. The
functional block representation of the PSK modulator is shown in the figure 20.
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Phase Shift Keying Modulator


Figure 20
For PSK signal demodulation the square loop detector circuit is used. The PSK
demodulator is as shown in figure 21.

Phase Shift Keying Demodulator


Figure 21
The incoming PSK signal with 0 & 180 phase changes is first fed to the signal
squarer, which multiplies the input signal by itself. The output of this block is a signal
of having twice the frequency to that of the input carrier frequency. As the frequency
of the output doubled, the 0 & 180 phase changes are reflect as 0 & 360 phase
changes. Since phase change of 360 is same as 0 phase change, it can be said that
the signal squarer simply removes the phase transitions from the original PSK
waveform.
The PLL block locks to the frequency of the signal square output & produces a clean
square wave output of same frequency. To derive the square wave of same frequency
as the incoming PSK signal, the PLL output is divided by two.
The following phase adjust circuit allows the phase of the digital signal to be adjusted
with respect to the input PSK signal. Also its output controls the closing of an analog
switch. When the output is high the switch closes & the original PSK signal is
switched through the detector. When the output of phases adjust block is low, the
switch opens & the output of detector output falls to 0 Volts. The demodulator output
contains positive half cycles when the PSK input has one phase & only negative half
cycles when the PSK input has another phase. The phase adjust potentiometer is
adjusted properly. The average level information of the demodulator output which
contains the digital data information is extracted by the following low pass filter. The

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low pass filter output is too rounded to be used for digital processing. Therefore it is
'Squared Up' by a voltage comparator.

Phase Shift Keying Receiver System


Figure 22
Since the sine wave is symmetrical, the receiver has no way of detecting whether the
incoming phase of the signal is 0 or 180 This phase ambiguity create two different
possibilities for the receiver output i.e. the final data stream can be either the original
data stream or its inverse.
This phase ambiguity can be corrected by applying some data conditioning to the
incoming stream to convert it to a form which recognizes the logic levels by changes
that occur & not by the absolute value. One such code is NRZ (M) where a change or
the absence of change conveys the information. A change in level represents data '1'
& no change represents data '0'. This NRZ (M) waveform is used to change the phase
at the modulator. The comparator output at receiver can again be of two forms, one
being the logical inverse of the other. But now it is not the absolute value in which we
are interested. Now the receiver simply locks for changes in levels, a level change
representing a '1' and no level changes representing a '0' thus the phase ambiguity
problem does not makes difference any more. This is known as differential phase shift
keying. This process is known as differential encoding.

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Quadrature Phase Shift Keying (QPSK) Technique:


If we define four signals, each with a phase shift differing by 90 degree then we have
Quadrature Phase Shift Keying (QPSK).
The input binary bit stream d k , d k = 0,1,2,..... arrives at the modulator input at a rate
1/T bits/sec and is separated into two data streams d I (t) and d Q (t) containing odd and
even bits respectively.
d I (t) = d0, d2, d4.....
d Q (t) = d1, d3, d5.....

Serial to Parallel Conversion


Figure 23

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A convenient orthogonal realization of a QPSK waveform , s(t) is achieved by


amplitude modulating the in-phase and quadrature data streams onto the cosine and
sine functions of a carrier wave as follows:
s(t)=1/ 2 dI(t) cos (2ft + /4) + 1/ 2 dQ(t) sin (2ft + /4)

Quadrature Phase Shift Keying Waveforms


Figure 24
In quardrature Phase Shift keying each pair of consecutive data bit is treated as a two
bit (or Dibit) code which is used to switch the phase of the carrier sine wave between
one of four phases 90 apart. The four possible combination of Dibit code are 00, 01,
10 and 11. Each code represents either a phase of 45, 135, 225, and 315 lagging,
relative to the phase of the original un-modulated carrier. The choice of these phases
is arbitrary as it is convenient to produce them. Quadrature phase shift keying offers
an advantage over PSK, in a manner that now each phase represents a two bit code
rather than a single bit. This means now either we can change phase per second or the
same amount of data can be transmitted with half as many phase changes per second.
The second choice results in a lowering of bandwidth requirement.
The four phases are produced by adding two carrier waves of same frequency but 90
out of phases. The 0 phase carrier is called In-phase carrier and is labeled 1 The other
is 90 (lagging) phase carrier termed as the quadrature carrier and is labeled Q.
The I-carrier is controlled by the MSB (most significant bit) of the Dibit code. When
the MSB is a level 0' the phase is 0 degrees when the MSB goes to level 1 the phase
reverses to 180
The Q-carrier starts with 90 out of phase (with respect to reference I carrier). This
carrier is controlled by the LSB (least significant bit) of the digit code when the LSB
is a level 0, the phase is 90 degrees with reference to I-carrier). When the LSB goes
to a level 1, the phase reverses to 270. See figure 25.

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Phasor Diagram
Figure 25
Assume the digit code be 00. This would give a 0 phase to the in phase carrier and 0
phase to quadrature carrier (90 out of phase with respect to I-carrier). If we add these
two waves we would get a 45 resultant. See figure 26.

Phasor Diagram for data bit 00


Figure 26
At any instance of time, there is always a +/- 90 phase difference between the two
modulation outputs. As a result, the amplitude of the resultant phasor will always be
2 times the amplitude of input phase or if they are equal. The creation of four phases
by vector addition is as shown in figure 27.

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Phasor Diagram
Figure 27
It can be appreciated from the above phasor diagram that each phasor switches its
phase depending on the data level exactly in the same way as the same way as the
PSK modulator does. The only difference is that QPSK is sum of two such PSK
modulators.
The QPSK modulator can be configured as shown in the figure 28

Quadrature Phase Shift Keying Modulator


Figure 28

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The two carriers namely I & Q as has been stated, have same frequency but differ in
phase by 90. Also the I data refer to the Dibit MSB & Q data refers to the Dibit LSB.
Each modulator performs phase-shift keying on its respective carrier input in
accordance with respective data input such that,
1.

The output of modulator 1 is a PSK signal with phase shift of 0 and 180
respectively, relative to the I-carrier, and

2.

The output of modulator 2 is a PSK signal with phase shift of 90 and 270
respectively, relative to the I-carrier.

The output of the two modulators is summed by a summing amplifier. As it is clear


from the earlier phasor diagram, the phase of the summing amplifier's output signal
relative to I-carrier, at any instance of time takes one of the four phases 45 135,
225, and 315 depending on the applied debit code. When these Dibit codes alter, the
phase of the QPSK output changes by 0, 90, 180 or 270 from its previous phase
position. Thus the output of the summing amplifier is a QPSK waveform. The
demodulation of QPSK signal is performed by the fourth power loop detector. The
demodulator is quite similar to the one used in PSK system as can be seen from figure
29.
Quadrature Phase Shift Keying Demodulator:
The incoming QPSK signal is first squared in the signal squarer 1. The functioning of
the signal squarer has already been discussed in the PSK Modulator section. The
output of the signal squarer 1 is a signal at twice the original frequency with phase
changes reduced to 0 & 180. This is because all the phase changes are also doubled.
The 0 & 180 phase changes becomes 0 (as 2 x 180 = 360 = 0 phase shift.) and
the 90 and 270 phases both become 180 (since 270 + 270 = 540 = 180 phase
shift)

Quadrature Phase Shift Keying Demodulator


Figure 29
The output of the signal squarer 1 is fed to signal 1. The output of the signal squarer 1
is fed to signal squarer 2. This circuit is identical to signal squarer with frequency
double that of the signal at its input (Quadrupled with respect to the original QPSK
input signal frequency). The 0 and 180 phases changes are also reduced to a 0
phase changes are also reduced to 0 phases shift, since the phases are also doubled
(Also 2 x 180 = 360 = 0 phase shift).
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Therefore, the output from signal squarer 2 is a sinewave at four times the frequency
of the original QPSK carrier signal with no phase changes.
The output of signal squarer 2 is fed to the phase locked loop (PLL) which locks on
the incoming signal & produces a square wave of same frequency as that of the input.
The output of PLL is divided in frequency by a factor of 4 by a 4 circuit. Now the
frequency is same as that of the QPSK carrier signal.
The next stage in demodulation is a phase adjusts Circuit. The output of the phase
adjust circuit are two square waves of same frequency as the input signal applied and
with 90 phase shift between them. Also the phase of the two output signals can also
be adjusted relative to the original QPSK signal. Note that the 90 phase difference
between the two outputs is maintained.
The output of the phase circuit controls the two analog switches. The switch is closed
when the corresponding output goes high. The original QPSK signal is then switched
through to one of the QPSK demodulator. How output can be input with a low level,
the switches are open & the output is pulled down to 0V.
The two outputs from the demodulator are labeled I & Q. Once the correct phase
relation between QPSK signal & phase adjust output have been set, the I & Q outputs
will contain information about original two bit code. This is illustrated in phase or
diagram. See figure 30.

All Angles represent phase LAG with respect to 0


Phasor Diagram
Figure 30

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The average level of the I & Q outputs contains information about the Dibit code. The
average level of the two outputs is extracted by passing them through the low pass
filter. The output of the filters is rounded & cannot be used for digital processing. The
wave 'Squared Up' by a voltage a comparator circuit. As shown in the figure 31.

Quadrature Phase Shift Keying Receiver


Figure 31
Differential Quadrature Phase Shift Keying:
A problem arises at this point. Since the phase information is lost in demodulator, the
receiver does not know which phase is which as a result it might interpret any of the
four phases e.g. 45 QPSK wave. Since there are four possible combinations our
chances of recovering correct code is mere 25% e.g. if the receiver treats one of the
three QPSK Phases to be at 45 phase, then the possibilities which arise are:
1.

'Q' data at 'I' data output 'I' data at 'Q' data output & inverted.

2.

'I' data at 'Q' data output 'Q' data at 'I' data output & inverted.

3.

'I' data at 'Q' data at correct outputs but both data streams inverted.

This leads to phase ambiguity. To overcome this problem, the NRZ (L) data is first
encoded into differentially encoded Dibit format at transmitter. In this format, each
Dibit pair as encoded as a change in the code. This means that we make the phase
change depend on the two bit code at the input instead of making the phase dependent
on two bit code. i.e. still make use of Dibit code but now they mean changes in phase
rather than actual phase
Code

Old Meaning

New Meaning

NRZ (L) Code

The Phase

The Phase Change

45

No Change

315

90

135

180

225

270
Table 1

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At the receiver, once again there are four possibilities the two outputs may be
interchanged or inverted as mentioned above. But now the absolute levels of the
received data are no longer important. The receiver simply has to tell the two bit code
change. As a result phase ambiguity is no longer a problem. To derive NRZ (L)
waveform from the encoded pair a differential Dibit decoder is used at receiver. Its
output is serially transmitted. The fig 43 shows the functional block diagrams of the
QPSK system.
Operating Instructions
1.

The experiments make use of two trainers namely ST2156 & ST2157. ST2156
serves Transmitter device while ST2157 trainer serves as receiver.

2.

Set carrier frequency selection switch according to a carrier frequency used in a


carrier modulation at ST2156 while using PSK & DPSK demodulation.

3.

Do not forget to connect grounds of both the trainers ST2156 & ST2157.

4.

Use reset switch to synchronies LED patterns of receiver same as that of


transmitter.

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Experiment 1
Objective: Study of Data Formats
Equipments Needed:
1. ST2156 Trainer.
2. 2 mm Banana cable
3. Oscilloscope Caddo 802 or equivalent
Circuit diagram:
Refer the figure 1.1 for the connection diagram for Experiment 1.

Figure 1.1
Procedure:
1.

Connect the power supply of ST2156 but do not turn on the power supplies until
connections are made for this experiment.

2.

Make the connections as shown in the figure 1.1.

3.

Switch 'ON' the power.

4.

Connect oscilloscope CH1 to Data In and CH2 to Clock In and observe the
waveforms.

5.

Connect oscilloscope CH1 to Data In and CH2 to NRZ (L) and observe the
waveforms.

6.

Connect oscilloscope CH1 to Data In and CH2 to NRZ (M) and observe the
waveforms.

7.

Connect oscilloscope CH1 to Data In and CH2 to RZ and observe the


waveforms.

8.

Connect oscilloscope CH1 to Data In and CH2 to Biphase (manchester) and


observe the waveforms.

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9.

Connect oscilloscope CH1 to Data In and CH2 to Biphase (Mark) and


observe the waveforms.

10.

Connect oscilloscope CH1 to Data In and CH2 to RB and observe the


waveforms.

11.

Connect oscilloscope CH1 to Data In and CH2 to AMI and observe the
waveforms.

Observations:
1.

The output at Data In is repeating sequence of bits generated by Parallel to


serial Converter.

2.

The NRZ (L) data is same as Data In but it is one bit shifted.

3.

Verify all the formatting techniques according to example patterns given on the
ST2156 board.

Conclusions:
1.

The NRZ(L) waveform simply goes low for one bit time to represent a data 0
and high for one bit time to represent a data 1.

2.

In the NRZ (M) line codes the present level is related to the previous level that
is when logic 1 is to be transmitted change in level occurs and for logic 0 the
level remains unchanged.

3.

In the RZ line codes, the maximum signal frequency of RZ signal occurs when
a string of 1 is transmitted. It is equivalent to sending two logic levels in each
clock period. Thus bandwidth requires is twice as that required for the NRZ
waveforms.

4.

The Biphase Manchester codes always contain at least one transition per bit
time, irrespective of the data being transmitted. Hence the maximum frequency
of the biphase code is equal to the data clock rate when a stream of consecutive
data 1 & 0 is transmitted. Therefore the required bandwidth is same as that of
RZ code & double as that of NRZ (L) code.

5.

In the Biphase Mark if a data 0 is to be transmitted, the sequence of the


transmitted levels will remain same as for the previous bit interval and if a 1 is
to be transmitted , the sequence of the transmitted levels will reverse i.e. phase
reversal will occur.

6.

The Biphase Mark code being very similar to the Biphase (Manchester) coding
requires same amount of bandwidth which is double as that of NRZ (L).

7.

The maximum signal frequency in RB code is equal to the data clock frequency;
the bandwidth requirements is same as that for RZ, Biphase codes and double
that for NRZ codes.

8.

The maximum transition rate for AMI can only occur during a stream of all 1s
thus the bandwidth required is twice that required for the NRZ codes.

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Experiment 2
Objective: Study of Amplitude Shift Keying.
Equipments Needed:
1.

ST2156 and ST2157 Trainers.

2.

2 mm Banana cable

3.

Oscilloscope Caddo 802 or equivalent

Circuit diagram:
Refer the figure 2.1 for the connection diagram for Experiment 2.

Figure 2.1
Procedure:
1.

Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.

2.

Make the connections as shown in the figure 8.1.

3.

Switch 'ON' the power.

4.

On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and


observe the waveforms.

5.

On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of


modulator Circuit (l) on ST2156 and observe the waveforms.

6.

Vary the gain potentiometer of modulator circuit (l) on ST2156 to adjust the
amplitude of ASK Waveform.

7.

On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of


comparator on ST2157 and observe the waveforms.

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Observations:
1.

The output at Data In is repeating sequence of bits generated by Data Source.

2.

The output at Modulator Circuit (l) is the ASK waveform which contains carrier
transmitted for Data 1 and carrier suppressed Data 0.

3.

The output at comparator on ST2157 is the same as Data In on ST2156.

Waveforms Of ASK Modulation


Figure 2.2

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Waveforms Of ASK Demodulation


Figure 2.3
Conclusions:
1.

Amplitude shift keying is fairly simple to implement in practice, but it is less


efficient, because the noise inherent in the transmission channel can deteriorate
the signal so much that the amplitude changes in the modulated carrier wave due
to noise addition, may lead to the incorrect decoding at the receiver.

2.

The technique is not widely used is practice. Application wise, it is however


used in diverse areas and old as emergency radio transmissions and fiber-optic
communications.

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Experiment 3
Objective: Study of Frequency Shift Keying.
Equipments Needed:
1.

ST2156 and ST2157 Trainers.

2.

2 mm Banana cable

3.

Oscilloscope Caddo 802 or equivalent

Circuit diagram:
Refer the figure 3.1 for the connection diagram for Experiment 3.

Figure 3.1
Procedure:
1.

Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.

2.

Make the connections as shown in the figure 3.1.

3.

Switch 'ON' the power.

4.

On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and


observe the waveforms.

5.

On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of


Summing Amplifier on ST2156 and observe the waveforms.

6.

Adjust the potentiometers of both the Modulator Circuit (l) &(ll) onST2156 to
adjust the amplitude of FSK waveform at Summing Amplifiers output on
ST2156.

7.

On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of


comparator on ST2157 and observe the waveforms.

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Observations:
1.

The output at Summer Amplifier is the FSK waveform, Observe that for data
bit '0' the FSK signal is at lower frequency (960KHz) & for data bit '1 the FSK
signal is at higher frequency (1.6 MHz)The output at comparator on ST2157 is
the same as Data In on ST2156.

Waveforms of FSK Modulation & Demodulation


Figure 3.2
Conclusions:
1. The amplitude change in FSK waveform does not matter, therefore FSK
modulation technique is very reliable even in noisy & fading channels.
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Experiment 4
Objective: Study of Phase Shift Keying.
Equipments Needed:
1. ST2156 and ST2157 Trainers.
2. 2 mm Banana cable
3. Oscilloscope Caddo 802 or equivalent
Circuit diagram:
Refer the figure 4.1 for the connection diagram for Experiment 4.

Figure 4.1
Procedure:
1.

Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.

2.

Make the connections as shown in the figure 4.1.

3.

Switch 'ON' the power.

4.

On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and


observe the waveforms.

5.

On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of


Modulator Circuit (l) on ST2156 and observe the waveforms.

6.

Adjust the Gain potentiometer of the Modulator Circuit (l) on ST2156 to


adjust the amplitude of PSK waveform at output of Modulator Circuit (l) on
ST2156.

7.

Now on ST2157 connect oscilloscope CH1 to Input of PSK demodulator and


connect CH2 one by one to output of double squaring circuit, output of PLL,
output of Divide by four ( 2) observe the wave forms.

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8.

On ST2157 connect oscilloscope CH1 to output of Phase adjust and CH2 to


output of PSK demodulator and observe the waveforms. Set all toggle switch
to 0 and compare the waveform now vary the phase adjust potentiometer and
observe its effects on the demodulated signal waveform. (Note: If there is
problem in setting the waveform with potentiometer then toggle the switch
given in PSK demodulator block two to three times to get the required
waveform).

9.

Now connect oscilloscope CH1 to PSK output of PSK demodulator on


ST2157 and connect CH2 Output of Low Pass Filter on ST2157 and observe
the waveforms.

10.

Connect oscilloscope CH1 to Output of Low Pass Filter on ST2157 then


connect CH2 to Output of Comparator on ST2157 and observe the waveforms,
now vary the reference voltage potentiometer of first comparator to generate
desired data pattern.

11.

On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of


comparator on ST2157 and observe the waveforms.

12.

Connect oscilloscope CH1 to Data In then connect CH2 output to Bit decoder
and observe the waveforms. If both data does not matches then try to match it by
varying the phase adjust potentiometer on QPSK Demodulator.

13.

Now try to match the LED sequence by once pressing the reset switch on
ST2156.

Observations:
1.

The output at Data In is repeating sequence of bits generated by Data Source.

2.

The Output of Modulator Circuit (l) is Phase Shift Keying modulated signal.

3.

The output of Double squaring circuit is sinusoidal signal (carrier signal) but
frequency is four times higher than that of carrier used for modulation.

4.

The output of Phase Lock Loop (PLL) is clock signal of same frequency as that
of the output of double squaring circuit and output of Divide by two ( 2) is
clock signal of frequency two times less than the output of PLL signal.

5.

The output of PSK demodulator is a signal having group of positive half cycles
and group of negative half cycles of the carrier signal.

6.

A low pass filter removes high frequency component from demodulated PSK
signal and it makes the signal smooth.

7.

The variation in reference voltage potentiometer affect the Data, to recover Data
correctly potentiometer adjustment is necessary.

8.

The Phase Adjust potentiometer on ST2157 matches the phase of regenerated


clock and carrier with input clock and carrier signal.

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Waveforms of PSK Modulation

Figure 4.2

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Waveforms of PSK Demodulation


Figure 4.3
Conclusions:

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Experiment 5
Objective: Study of Differential Phase Shift Keying.
Equipments Needed:
1.

ST2156 and ST2157 Trainers.

2.

2 mm Banana cable

3.

Oscilloscope Caddo 802 or equivalent

Circuit diagram:
Refer the figure 5.1 for the connection diagram for Experiment 5.

Figure 5.1
Procedure:
1.

Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.

2.

Make the connections as shown in the figure 5.1.

3.

Switch 'ON' the power.

4.

On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and


observe the waveforms.

5.

On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of


Modulator Circuit (l) on ST2156 and observe the waveforms.

6.

Adjust the Gain potentiometer of the Modulator Circuit (l) onST2156 to adjust
the amplitude of PSK waveform at output of Modulator Circuit (l) on ST2156.

7.

Now on ST2157 connect oscilloscope CH1 to Input of PSK demodulator and


connect CH2 one by one to output of double squaring circuit, output of PLL,
output of Divide by four ( 2) observe the wave forms.

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8.

On ST2157 connect oscilloscope CH1 to output of Phase adjust and CH2 to


output of PSK demodulator and observe the waveforms. Now vary the phase
adjust potentiometer and observe its effects on the demodulated signal
waveform

9.

Now connect oscilloscope CH1 to PSK output of PSK demodulator on


ST2157 and connect CH2 Output of Low Pass Filter on ST2157 and observe
the waveforms.

10.

Connect oscilloscope CH1 to Output of Low Pass Filter on ST2157 then


connect CH2 to Output of Comparator on ST2157 and observe the waveforms,
now vary the reference voltage potentiometer of first comparator to generate
desired data pattern.

11.

On ST2156, connect oscilloscope CH1 to NRZ (L) and CH2 to Output of


comparator on ST2157 and observe the waveforms.

12.

Connect oscilloscope CH1 to Data In then connect CH2 output to Bit decoder
and observe the waveforms. If both data does not matches then try to match it by
varying the phase adjust potentiometer on QPSK Demodulator.

13.

Now try to match the LED sequence by once pressing the reset switch on
ST2156.

Observations:
1.

The output at Data In is repeating sequence of bits generated by Data Source.

2.

The Output of Modulator Circuit (l) is Phase Shift Keying modulated signal.

3.

The output of Double squaring circuit is sinusoidal signal (carrier signal) but
frequency is four times higher than that of carrier used for modulation.

4.

The output of Phase Lock Loop (PLL) is clock signal of same frequency as that
of the output of double squaring circuit and output of Divide by two ( 2) is
clock signal of frequency two times less than the output of PLL signal.

5.

The output of PSK demodulator is a signal having group of positive half cycles
and group of negative half cycles of the carrier signal.

6.

A low pass filter removes high frequency component from demodulated PSK
signal and it makes the signal smooth.

7.

The variation in reference voltage potentiometer affect the Data, to recover Data
correctly potentiometer adjustment is necessary.

8.

The Phase Adjust potentiometer on ST2157 matches the phase of regenerated


clock and carrier with input clock and carrier signal.

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Experiment 6
Objective: Study of Quadrature Phase Shift Keying.
Equipments Needed:
1.

ST2156 and ST2157 Trainers.

2.

2 mm Banana cable

3.

Oscilloscope Caddo 802 or equivalent

Circuit diagram:
Refer the figure 6.1 for the connection diagram for Experiment 6.

Figure 6.1
Procedure:
1.

Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.

2.

Make the connections as shown in the figure 6.1.

3.

Switch 'ON' the power.

4.

On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and


observe the waveforms.

5.

On ST2156, connect oscilloscope CH1 to Clock Output and CH2 one by one
to Sine and Cosine output of 960 KHz and observe the waveforms.

6.

On ST2156, connect oscilloscope CH1 to Data In and connect CH2 one by one
to I Data and Q Data outputs and observe the waveforms.

7.

Now connect oscilloscope CH1 to I Data output on ST2156 and connect CH2
one by one to Signal In, Carrier In and Output of modulator circuit (l) on
ST2156 and observe the waveforms.

8.

Now connect oscilloscope CH1 to Q Data output on ST2156 and connect CH2
one by one to Signal In, Carrier In and Output of modulator circuit (ll) on
ST2156 and observe the waveforms.

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9.

Now connect oscilloscope CH1 to Data Out on ST2156 and CH2 to Output
of Summing Amplifier on ST2156 and observe the waveforms.

10.

Set Carrier frequency selection switch to 960 KHz on ST2157.

11.

Now on ST2157 connect oscilloscope CH1 to Input of QPSK demodulator


and connect CH2 one by one to output of double squaring circuit, output of
PLL, output of Divide by four ( 4) observe the wave forms.

12.

On ST2157, connect oscilloscope CH1 to I output of QPSK demodulator and


CH2 to Q output of QPSK demodulator and observe the waveforms. Set all
toggle switch to 0, now vary the phase adjust potentiometer and observe its
effects on the demodulated signal waveforms.

13.

Connect oscilloscope CH1 to I output of QPSK demodulator on ST2157 then


connect CH2 one by one to output of low pass filter, output of Comparator on
ST2157 and observe the waveforms.

14.

Connect oscilloscope CH1 to Q output of QPSK demodulator on ST2157 then


connect CH2 one by one to output of low pass filter, output of Comparator on
ST2157 and observe the waveforms.

15.

Compare the output of comparators on ST2157 with the output I Data and Q
Data on ST2156 respectively.

16.

Connect oscilloscope CH1 to Data In then connect CH2 output to Bit decoder
and observe the waveforms. If both data does not matches then try to match it by
varying the phase adjust potentiometer on QPSK Demodulator.

17.

Now try to match the LED sequence by once pressing the reset switch on
ST2156.

Observations:
1.

The output at Data In is repeating sequence of bits generated by Data Source.

2.

The I Data and Q Data output are even and odd bit sequence of input data
sequence and bit duration is double of input data sequence as shown in the
figure 11.2.

3.

The Output of Modulator Circuit (l) and Modulator Circuit (ll) are Phase Shift
Keying modulated signals, and summation of these two signals are Quadrature
Phase Shifted signal as shown in the figure 6.2.

4.

The output of Double squaring circuit is sinusoidal signal (carrier signal) but
frequency is four times higher than that of carrier used.

5.

The output of Phase Lock Loop (PLL) is clock signal of same frequency as that
of the output of double squaring circuit and output of Divide by four ( 4) is
clock signal of frequency four times less than the output of PLL signal.

6.

The output of QPSK demodulator is a signal having group of positive half


cycles and group of negative half cycles of the carrier signal as shown in the
figure 6.3.

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7.

A low pass filter removes high frequency component from demodulated QPSK
signal and it makes the signal smooth as shown in the figure 6.3.

8.

The variation in reference voltage potentiometer affect the Data, to recover Data
correctly potentiometer adjustment is necessary and recovered Data.

QPSK modulation waveforms

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QPSK demodulation waveforms


Figure 6.3
Conclusion:
1.

The Quadrature Phase Shift Keying modulation is correct for different Data
pattern and also correct for clock and carrier frequencies.

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Experiment 7
Objective: Study of Differential Quadrature Phase Shift Keying.
Equipments Needed:
1

ST2156 and ST2157 Trainers.

mm Banana cable

Oscilloscope Caddo 802 or equivalent

Circuit diagram:
Refer the figure 7.1 for the connection diagram for Experiment 7.

Figure 7.1
Procedure:
1.

Connect the power supplies of ST2156 and ST2157 but do not turn on the power
supplies until connections are made for this experiment.

2.

Make the connections as shown in the figure 7.1.

3.

Switch 'ON' the power.

4.

On ST2156, connect oscilloscope CH1 to Clock In and CH2 to Data In and


observe the waveforms.

5.

On ST2156 connect oscilloscope CH1 to Clock Out and CH2 one by one to
Sine and Cosine output of 960 KHz and observe the waveforms.

6.

Connect oscilloscope CH1 to Data In and connect CH2 one by one to I Data
and Q Data outputs and observe the waveforms.

7.

Now connect oscilloscope CH1 to I Data output of serial to parallel converter


on ST2156 and connect CH2 to Output of differential encoder (l) on ST2156
and observe the waveforms.

8.

On ST2156, connect oscilloscope CH1 to Q Data output of serial to parallel


converter and connect CH2 to Output of differential encoders (ll) and observe
the waveforms.

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9.

Now connect oscilloscope CH1 to Output of differential encoder (l) on


ST2156 and connect CH2 one by one to Signal In, Carrier In and Output of
modulator circuit (l) on ST2156 and observe the waveforms.

10.

Now connect oscilloscope CH1 to Output of differential encoder (ll) on


ST2156 and connect CH2 one by one to Signal In, Carrier In and Output of
modulator circuit (ll) on ST2156 and observe the waveforms.

11.

Set equal amplitude levels of the output signals of Modulator Circuit (1) and
Modulator Circuit (ll) by varying the Gain potentiometers of Modulator
Circuits.

12.

Now connect oscilloscope CH.1 to Data In on ST2156 and CH2 to Output of


Summing Amplifier and observe the waveforms.

13.

Now on ST2157 connect oscilloscope CH1 to Input of QPSK demodulator


and connect CH2 one by one to output of double squaring circuit, output of
PLL, output of Divide by four ( 4) observe the wave forms.

14.

On ST2157, connect oscilloscope CH1 to I output of QPSK demodulator and


CH2 to Q output of QPSK demodulator and observe the waveforms. Now vary
the phase adjust potentiometer and observe its effects on the demodulated signal
waveforms.

15.

Connect oscilloscope CH1 to I output of QPSK demodulator on ST2157 then


connect CH2 one by one to output of low pass filter, output of Comparator on
ST2157 and observe the waveforms.

16.

Connect oscilloscope CH1 to Q output of QPSK demodulator on ST2157 then


connect CH2 one by one to output of low pass filter, output of Comparator on
ST2157 and observe the waveforms.

17.

Compare the output of comparators on ST2157 with the outputs of differential


encoders on ST2156 respectively.

18.

Also compare the output of differential decoders on ST2157 with the output I
Data and Q Data on ST2156 respectively.

19.

Connect oscilloscope CH1 to Output of P/S Converter on ST2157 and CH2 to


Data In on ST2156.

20.

Connect oscilloscope CH1 to Data In then connect CH2 output to Bit decoder
and observe the waveforms. If both data does not matches then try to match it by
varying the phase adjust potentiometer on QPSK Demodulator.

21.

Now try to match the LED sequence by once pressing the reset switch on
ST2156.

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Observations:
1.

The output at Data In is repeating sequence of bits generated by Data Source.

2.

The I Data and Q Data output are even and odd bit sequence of input data
sequence and bit duration is double of input data sequence as shown in the
figure 7.2.

3.

The Output of Modulator Circuit (l) and Modulator Circuit (ll) are Phase Shift
Keying modulated signals as shown in the figure 7.2, and summation of these
two signals are Quadrature Phase Shifted signal as shown in the figure 7.2.

4.

The output of Phase Lock Loop (PLL) is clock signal of same frequency as that
of the output of double squaring circuit and output of Divide by four ( 4) is
clock signal of frequency four times less than the output of PLL signal.

5.

The output of QPSK demodulator is a signal having group of positive half


cycles and group of negative half cycles of the carrier signal as shown in the
figure 7.2.

6.

A low pass filter removes high frequency component from demodulated QPSK
signal and it makes the signal smooth as shown in the figure 7.2.

7.

The Phase Adjust potentiometer matches the phase of regenerated clock and
carrier with input clock and carrier signal respectively.

8.

The recovered data does not find inverted after demodulation.

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DQPSK modulation waveforms


Figure 7.2

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ST2156 &ST2157

DQPSK demodulation waveforms

Figure 7.3

Conclusion:
1.

The Differential Quadrature Phase Shift Keying modulation is correct for


different Data pattern.

2.

The differential encoding and decoding process has an advantage that data will
not find inverted after demodulation.

Scientech Technologies Pvt. Ltd.

55

ST2156 &ST2157

Warranty
1)

We guarantee this product against all manufacturing defects for 24 months from
the date of sale by us or through our dealers. Consumables like dry cell etc. are
not covered under warranty.

2)

The guarantee will become void, if


a)

The product is not operated as per the instruction given in the Learning
Material

b)

The agreed payment terms and other conditions of sale are not followed.

c)

The customer resells the instrument to another party.

d)

Any attempt is made to service and modify the instrument.

3)

The non-working of the product is to be communicated to us immediately giving


full details of the complaints and defects noticed specifically mentioning the
type, serial number of the product and date of purchase etc.

4)

The repair work will be carried out, provided the product is dispatched securely
packed and insured. The transportation charges shall be borne by the customer.

List of Accessories
1.

Patch Cord 16"........................................................................................ 30Nos.

2.

Patch Cord 32 ....................................................................................... 4 Nos.

3.

Power Supply............................................................................................. 2 No.

4.

Learning Material (CD) ............................................................................. 1 No.

Scientech Technologies Pvt. Ltd.

56