FUGI PLC Manual

Preface, Contents
Hardware
WSZ-Series
Controller
Users Manual - I
Hardware
&
Instruction
Introduction of FUJI WSZ Series

Controller
H1
System Architecture
H2
Expansion of WSZ-Controller
H3
Installation Guide
H4
Power Supply Wiring, Power

Consumption Calculation and Power
Sequence Requirements
H5
Digital Input(DI) Circuit
H6
Digital Output(DO) Circuit
H7
Test Run, Monitoring and Maintenance
H8
Instruction
PLC Ladder Diagram
WSZ-Controller Memory Allocation
WSZ-Controller Instruction Lists
Sequential Instructions
Descriptions of Function Instructions
Basic Function Instructions
Advanced Function Instructions
Step Instruction Description
MEHT322
Attention related to safety (Read carefully before application)

For the purpose of ensuring your personal safety and protecting this product and its peripheral equipment, read this
manual regarding the safety functions carefully before installation and operation of the WSZ controller.
The three safety
categories of this manual are classified into Danger, Warning, Caution grades according to the danger level and are
preceded by the ! symbol.
Following is their description:
Danger
Indicates casualty or serious damage or property loss will result if the correct instruction was not followed.
Warning
Casualty or serious damage or property loss may result if the correct instruction was not followed.
Caution
Indicates minor damage or property loss will result if the correct instruction was not followed.
This manual is a guideline for qualified personnel on how to install the WSZ controller correctly and use it safely.
The
qualified personnel stated here means professional electromechanical engineering personnel who is familiar with safety
specifications and methods of grounding, circuit wiring, peripheral equipment system etc. and possesses practical
experience.
Danger
Keep in mind before using the controller
Abnormality in the external power supply or failure of the controller itself will result in the controller or the complete
system emerging in an unsafe status, and may cause unpredictable actions. Such actions may cause human injury,
death, or serious damage of the unit itself. Thus, please design a separate external safety protection circuit, such as
emergency stop circuit, machine replacement device, or redundant safety protection circuit in your application with the
following safety considerations:
1. Emergency stop circuit, safety protection circuit, motor positive/reverse interlock circuit, upper/lower limit
destruction prevention circuit of position control, etc. These circuits should be hardwired and external to the
controller.
2. The controller is unable to detect the abnormality of the input signal circuit (such as overload or interrupted
controller input circuit. The controller interprets them as OFF, then erroneous output may result in the controller
and may cause major safety problems, thus external detection and protection circuits should be provided in
addition to the controller.
3. Output components of the controller such as transistor are possible to cause permanent ON or OFF and resulting
in serious accidents, thus protection by additional external circuits or mechanisms is necessary for the output
points to avoid major safety problems.
Hardware
Contents
Chapter 1Introduction of FUJI WSZ Series Controller
1.1 Appearance of Main Unit................................................................................................................. H1-1
1.2 Appearance of Expansion Unit/Module.......................................................................................... H1-2
1.3 List of WSZ Models.......................................................................................................................... H1-4
1.4 Specifications of Main Unit............................................................................................................... H1-5
1.5 Environmental Specifications .......................................................................................................... H1-6
1.6 Connection Diagrams of Various Models ...................................................................................... H1-7
1.6.1 Main Unit.................................................................................................................................... H1-7
1.6.2 Analog I/O Expansion Module................................................................................................. H1-8
1.6.3 Communication Board (CB)..................................................................................................... H1-8
1.7 Drawings with External Dimensions ............................................................................................... H1-9
Chapter 2System Architecture

2.1 Single-Unit System of WSZ Controller .......................................................................................... H2-1
Chapter 3Expansion of WSZ-Controller

3.1 I/O Expansion ................................................................................................................................... H3-1
3.1.1 Digital I/O Expansion and I/O Numbering............................................................................... H3-1
3.1.2 Numeric I/O Expansion and I/O Channel Mapping ............................................................... H3-3
3.2 Expansion of Communication Port................................................................................................. H3-4
Chapter 4Installation Guide

4.1 Installation Environment................................................................................................................... H4-1
4.2 Precautions of Controller Installation.............................................................................................. H4-1
4.2.1 Placement of Controller............................................................................................................ H4-1
4.2.2 Ventilation Space ...................................................................................................................... H4-2
4.3 Fixation by DIN RAIL........................................................................................................................ H4-3
4.4 Fixation by Screws ........................................................................................................................... H4-4
4.5 Precautions on Construction and Wiring........................................................................................ H4-5
Chapter 5Power Supply Wiring, Power Consumption Calculation, and

Power Sequence Requirements
5.1 Specifications of AC Power Sourced Power Supply and Wiring ................................................. H5-1
5.2 Residual Capacity of Main/Expansion Unit & Current Consumption of Expansion Module
........................................................................................................................................................ H5-3
5.2.1 Residual Capacity of Main/Expansion Unit ............................................................................ H5-3
5.2.2 Maximum Current Consumption of Expansion Module........................................................ H5-3
5.3 Requirement of Power Sequence in Main Unit & Expansion Unit/Module ............................... H5-4
Chapter 6Digital Input (DI) Circuit

6.1 Specifications of Digital Input (DI) Circuit........................................................................................ H6-1
6.2 24VDC Single-End Input Circuit and Wiring for SINK/SRCE Input............................................. H6-2
Chapter 7Digital Output (DO) Circuit

7.1 Specifications of Digital Output Circuit............................................................................................ H7-2
7.2 Single-End Output Circuit ................................................................................................................ H7-2
7.2.1 Structure and Wiring of Single-End Transistor SINK Output Circuit .................................... H7-3
7.3 Speed Up the Single-End Transistor Output Circuit..................................................................... H7-3
7.4 Output Device Protection and Noise Suppression in DO Circuit ................................................. H7-4
7.4.1 Protection of Transistor Output and Noise Suppression....................................................... H7-4
Chapter 8Test Run, Monitoring and Maintenance

8.1 Inspection after Wiring and before First Time Power on............................................................... H8-1
8.2 Test Run and Monitoring ................................................................................................................. H8-1
8.3 LED Indicators on Controller Main Unit and Troubleshooting...................................................... H8-2
8.4 Maintenance ..................................................................................................................................... H8-4
8.5 The Charge of Battery & Recycle of Used Battery........................................................................ H8-4
Instruction
Contents
Chapter 1: PLC Ladder Diagram
1.1
The Operation Principle of Ladder Diagram ............................................................. 1-1
1.1.1
Combination Logic ................................................................................................. 1-1
1.1.2
Sequential Logic .................................................................................................... 1-2
1.2
Differences Between Conventional and PLC Ladder Diagram ................................ 1-3
1.3
Ladder Diagram Structure and Terminology ............................................................ 1-5
Chapter 2: WSZ-Controller Memory Allocation

2.1
WSZ-Controller Memory Allocation .......................................................................... 2-1
2.2
Digital and Register Allocations................................................................................ 2-2
2.3
Special Relay Details ............................................................................................... 2-3
2.4
Special Registers Details ......................................................................................... 2-8
Chapter 3: WSZ-Controller Instruction Lists

3.1
Sequential Instructions ............................................................................................. 3-1
3.2
Function Instructions ................................................................................................ 3-2
Chapter 4: Sequential Instructions

4.1
Valid Operand of Sequential Instructions ................................................................. 4-1
4.2
Element Description ................................................................................................. 4-2
4.2.1
Characteristics of A, B, TU and TD Contacts ............................................................ 4-2
4.2.2
OPEN and SHORT Contact .................................................................................... 4-3
4.2.3
Output Coil and Inverse Output Coil ......................................................................... 4-4
4.2.4
Retentive Output Coil ............................................................................................. 4-4
4.2.5
Set Coil and Reset Coil........................................................................................... 4-5
4.3
Node Operation Instructions..................................................................................... 4-5
Chapter 5: Descriptions of Function Instructions

5.1
The Format of Function Instructions......................................................................... 5-1
5.1.1
Input Control .......................................................................................................... 5-1
5.1.2
Instruction Number and Derivative Instructions ......................................................... 5-2
5.1.3
Operand ................................................................................................................ 5-3
5.1.4
Functions Output (FO) ............................................................................................ 5-6
5.2
Use Index Register(XR) for Indirect Addressing ...................................................... 5-6
5.3
Overflow and Underflow of Increment(+1) or Decrement(-1) ................................. 5-9
5.4
Carry and Borrow in Addition/Subtraction ................................................................ 5-10
Chapter 6: Basic Function Instructions

z
TIMER
(T) .............................................................. 6-2
COUNTER
(C)................................................................ 6-5
SET
(SET) ......................................................... 6-8
RESET
(RST) ......................................................... 6-10
MASTER CONTROL LOOP START
(FUN0) ....................................................... 6-12
MASTER CONTROL LOOP END
(FUN1) ....................................................... 6-14
SKIP START
(FUN2) ....................................................... 6-15
SKIP END
(FUN3) ....................................................... 6-17
DIFFERENTIAL UP
(FUN4) ....................................................... 6-18
DIFFERENTIAL DOWN
(FUN5) ....................................................... 6-19
BIT SHIFT
(FUN6) ....................................................... 6-20
UP/DOWN COUNTER
(FUN7) ....................................................... 6-21
MOVE
(FUN8) ....................................................... 6-23
MOVE INVERSE
(FUN9) ....................................................... 6-24
TOGGLE SWITCH
(FUN10) ..................................................... 6-25
ADDITION
(FUN11) ..................................................... 6-26
SUBTRACTION
(FUN12) ..................................................... 6-27
MULTIPLICATION
(FUN13) ............................................... ...... 6-28
DIVISION
(FUN14) .................................................... 6-30
INCREMENT
(FUN15) .................................................... 6-32
DECREMENT
(FUN16) .................................................... 6-33
COMPARE
(FUN17) .................................................... 6-34
LOGICAL AND
(FUN18) .................................................... 6-35
LOGICAL OR
(FUN19) .................................................... 6-36
BIN TO BCD CONVERSION
(FUN20) .................................................... 6-37
BCD TO BIN CONVERSION
(FUN21) .................................................... 6-38
Chapter 7: Advanced Function Instructions

z
BREAK FROM FOR AND NEXT LOOP

(FUN22) ....................................................7-1
48-BIT DIVISION
(FUN23) .................................................... 7-2
SUM
(FUN24) ................................................... 7-3
MEAN
(FUN25) ....................................................7-4
SQUARE ROOT
(FUN26) ................................................... 7-5
NEGATION
(FUN27) ................................................... 7-6
ABSOLUTE
(FUN28) ................................................... 7-7
SIGN EXTENSION
(FUN29) ................................................... 7-8
GENERAL PURPOSE PID OPERATION

(FUN30) ....................................................7-9
CRC16 CALCULATION
(FUN31) ................................................... 7-10
CONVERTING THE RAW VALUE OF 4 ~20MA ANALOG INPUT

(FUN32) ................................................... 7-11
EXCLUSIVE OR
(FUN35) ................................................... 7-12
EXCLUSIVE NOR
(FUN36) ................................................... 7-13
ZONE COMPARE
(FUN37) ................................................... 7-14
BIT READ
(FUN40) ....................................................7-15
BIT WRITE
(FUN41) ....................................................7-16
BIT MOVE
(FUN42) .................................................. . 7-17
NIBBLE MOVE
(FUN43) ....................................................7-18
BYTE MOVE
(FUN44) ....................................................7-19
EXCHANGE
(FUN45) .................................................... 7-20
BYTE SWAP
(FUN46) .................................................. . 7-21
NIBBLE UNITE
(FUN47) ....................................................7-22
NIBBLE DISTRIBUTE
(FUN48) ....................................................7-23
BYTE UNITE
(FUN49) ....................................................7-24
BYTE DISTRIBUTE
(FUN50) ....................................................7-25
SHIFT LEFT
(FUN51) ....................................................7-26
SHIFT RIGHT
(FUN52) ....................................................7-27
ROTATE LEFT
(FUN53) ....................................................7-28
ROTATE RIGHT
(FUN54) ....................................................7-29
BINARY-CODE TO GRAY-CODE CONVERSION

(FUN55) ....................................................7-30
GRAY-CODE TO BINARY-CODE CONVERSION

(FUN56) ....................................................7-32
DECODE
(FUN57) ....................................................7-34
ENCODE
(FUN58) ....................................................7-35
7-SEGMENT CONVERSION
(FUN59) ....................................................7-37
ASCII CONVERSION
(FUN60) ....................................................7-40
HOUR : MINUTE : SECOND TO SECONDS CONVERSION

(FUN61) ....................................................7-41
SECONDHOUR : MINUTE : SECOND

(FUN62) ....................................................7-42
CONVERSION OF ASCII CODE TO HEXADECIMAL VALUE

(FUN63) ....................................................7-43
CONVERSION OF HEXADECIMAL VALUE TO ASCII CODE

(FUN64) ....................................................7-45
PROGRAM END
(END) ........................................................7-47
LABEL
(FUN65) ....................................................7-48
JUMP
(FUN66) ....................................................7-49
CALL
(FUN67) ....................................................7-50
RETURN FROM SUBROUTINE
(FUN68) ....................................................7-51
RETURN FROM INTERRUPT
(FUN69) ....................................................7-52
FOR
(FUN70) ....................................................7-53
LOOP END
(FUN71) ....................................................7-54
IMMEDIATE IO
(FUN74) ....................................................7-55
DECIMAL-KEY INPUT
(FUN76) ....................................................7-56
HEX-KEY INPUT
(FUN77) ....................................................7-58
DIGITAL SWITCH INPUT
(FUN78) ....................................................7-59
7-SEGMENT OUTPUT WITH LATCH (FUN79) ....................................................7-60
MULTIPLEX INPUT
(FUN80) ....................................................7-62
PULSE OUTPUT
(FUN81) ....................................................7-63
PULSE WIDTH MODULATION
(FUN82) ....................................................7-65
SPEED DETECTION
(FUN83) ....................................................7-66
CUMULATIVE TIMER
(FUN87 ~89) ..............................................7-67
WATCHDOG TIMER
(FUN90) ....................................................7-69
RESET WATCHDOG TIMER
(FUN91) ....................................................7-70
HARDWARE HIGH SPEED COUNTER CURRENT VALUE(CV) ACCESS

(FUN92) ....................................................7-71
HARDWARE HIGH SPEED COUNTER CURRENT VALUE AND PRESET VALUE

WRITING
(FUN93) ....................................................7-72
ASCII WRITE
(FUN94) ....................................................7-73
RAMP FUNCTION FOR DA OUTPUT

(FUN95) ....................................................7-75
REGISTER TO TABLE MOVE
(FUN100) ..................................................7-78
TABLE TO REGISTER MOVE
(FUN101) ..................................................7-79
TABLE TO TABLE MOVE
(FUN102) ..................................................7-80
BLOCK TABLE MOVE
(FUN103) ..................................................7-81
BLOCK TABLE SWAP
(FUN104) ..................................................7-82
REGISTER TO TABLE SEARCH
(FUN105) ..................................................7-83
TABLE TO TABLE COMPARE
(FUN106) ..................................................7-84
TABLE FILL
(FUN107) ..................................................7-85
TABLE SHIFT
(FUN108) ..................................................7-86
TABLE ROTATE
(FUN109) ..................................................7-87
QUEUE
(FUN110) ..................................................7-88
STACK
(FUN111) ..................................................7-90
BLOCK COMPARE(DRUM)
(FUN112) ..................................................7-92
DATA SORTING
(FUN113) ..................................................7-94
ZONE WRITE
(FUN114) ..................................................7-95
MATRIX AND
(FUN120) ..................................................7-97
MATRIX OR
(FUN121) ..................................................7-98
MATRIX EXCLUSIVE OR(XOR)
(FUN122) ..................................................7-99
MATRIX EXCLUSIVE NOR(XNR)
(FUN123) ..................................................7-100
MATRIX INVERSE
(FUN124) ..................................................7-101
MATRIX COMPARE
(FUN125) ..................................................7-102
MATRIX BIT READ
(FUN126) ..................................................7-103
MATRIX BIT WRITE
(FUN127) ..................................................7-104
MATRIX BIT SHIFT
(FUN128) ..................................................7-105
MATRIX BIT ROTATE
(FUN129) ..................................................7-106
MATRIX BIT STATUS COUNT
(FUN130) ..................................................7-107
HIGH SPEED PULSE WIDTH MODULATION OUTPUT

(FUN139) ..................................................7-108
HIGH SPEED PULSE OUTPUT INSTRUCTION

(FUN140) ..................................................7-110
NC POSITIONING PARAMETER VALUE SETTING

(FUN141) ..................................................7-111
STOP THE HSPSO PULSE OUTPUT (FUN142) ..................................................7-112
CONVERT THE CURRENT PULSE VALUE TO DISPLAY VALUE

(FUN143) ..................................................7-113
ENABLE CONTROL OF THE INTERRUPT AND PERIPHERAL

(FUN145) ..................................................7-114
DISABLE CONTROL OF THE INTERRUPT AND PERIPHERAL

(FUN146) ..................................................7-115
MODBUS MASTER INSTRUCTION
(FUN150) ..................................................7-116
COMMUNICATION LINK INSTRUCTION

(FUN151) ..................................................7-117
READWRITE FILE REGISTER
(FUN160) ..................................................7-118
CONVERSION OF INTEGER TO FLOATINGPOINT NUMBER

(FUN200) ..................................................7-120
CONVERSION OF FLOATING POINT NUMBER TO INTEGER

(FUN201) ..................................................7-121
FLOATING POINT NUMBER ADDITION

(FUN202) ..................................................7-122
FLOATING POINT NUMBER SUBTRACTION

(FUN203) ..................................................7-123
FLOATING POINT NUMBER MULTIPLICATION

(FUN204) ..................................................7-124
FLOATING POINT NUMBER DIVISION

(FUN205) ..................................................7-125
FLOATING POINT NUMBER COMPARE

(FUN206) ..................................................7-126
FLOATING POINT NUMBER ZONE COMPARE

(FUN207) ..................................................7-127
FLOATING POINT NUMBER SQUARE ROOT

(FUN208) ..................................................7-129
SIN TRIGONOMETRIC INSTRUCTION

(FUN209) ..................................................7-130
COS TRIGONOMETRIC INSTRUCTION

(FUN210) ..................................................7-131
TAN TRIGONOMETRIC INSTRUCTION

(FUN211) ..................................................7-132
CHANGE SIGN OF THE FLOATING POINT NUMBER

(FUN212) ..................................................7-133
FLOATING POINT NUMBER ABSOLUTE VALUE

(FUN213) ..................................................7-134
Chapter 8: Step Instruction Description

8.1
The Operation Principle of Step Ladder Diagram ................................................... 8-1
8.2
Basic Formation of Step Ladder Diagram ................................................................ 8-2
8.3
Introduction of Step Instructions: STP, FROM, TO, and STPEND........................... 8-5
8.4
Notes for Writing a Step Ladder Diagram ................................................................ 8-11
8.5
Application Examples ............................................................................................... 8-15
8.6
Syntax Check Error Codes for Step Instruction........................................................ 8-22
Hardware
Chapter 1
Introduction of FUJI WSZ Series Controller
The FUJI WSZ Series controller is a new generation of controller equipped with excellent functions comparable to medium or
large controller, with up to three communication ports. The maximum I/O numbers are 256 points for Digital Input (DI) and
Digital Output (DO), 64 words for Numeric Input (NI) and Numeric Output (NO). The Main Units of WSZ are available in MC
type (High-Performance Type). With the combination of I/O point ranges from 24 to 60, a total of 4 models are available. One
DI/DO and two NI/NO models are available for Expansion Unit/Modules. With interface options in RS232 and RS485, the
communication peripherals are available with one board. The various models are described in the following:
1.1
Appearance of Main Unit
All the Main Units of WSZ controller have the same physical structure. The only difference is the case width. There are three
different case sizes, which are 90mm, 130mm, and 175mm. The figure below will use the Main Unit case of the
WSZ-24MCT2-AC as an example for illustration:
1
max.
400mA
24V OUT
S/S
X0
X2
X1
X4
X3
X6
X5
0
4
8
I2
X10
X8
X7
X9
12
X12
X11
max.
400mA
X13
118
8
15
1
6
1
7
16
24V OUT
S/S
X0
X4
X2
X1
X3
220
0
X6
X5
X8
X7
0
4
8
I2
I 2 3
5 6 7
9 I0 I I
I3
POW
POW
RUN
RUN
TX
RX
PORT0
Y1
C0
Y0
Y2
C2
OUT ( Y )
OUT ( Y )
0 I 2 3
4 5 6 7
8 9
Y5
Y4
Y3
C4
RX
0 I 2 3
4 5 6 7
8 9
AC100~240V
IN
X13
ERR
ERR
TX
X12
X11
IN ( X )
IN ( X )
PROGRAMMABLE
CONTROLLER
X10
X9
I 2 3
5 6 7
9 I0 I I
I3
Y6
C6
Y8
Y7
Y9
SINK
SRCE
10
IN
AC100~240V
Y1
C0
11
17
Y0
15
16
Y2
C2
Y4
Y3
Y5
C4
Y6
C6
Y8
Y7
Y9
SINK
SRCE
19
1
9
(Front view
with cover plate removed)
(
)
(
(Front view
without Communication) Board)
13
1 35mm-width DIN RAIL
2 DIN RAIL tab
3 Hole for screw fixation (4.532)
4 Terminals of 24VDC power output and digital input
14
(Pitch 7.62mm)
5
Terminals of main power input and digital output

(Pitch 7.62mm)
15
Standard cover plate (without communication

board)
(Front view with CB-25 Board installed)
H1-1
Cover plate of built-in communication port (Port 0)
8 Indicators for transmit (TX) and receive (RX) status of built-in communication port (Port0)
9 Indicator for Digital Input (Xn)
10 Indicator for Digital Output (Yn)
11 Indicator for system status (POW, RUN, ERR)
12 I/O output expansion header cover [units of 20 points or beyond only], with esthetic purpose and capable of securing
expansion cable
13
14
15
16
17
18
19
20
RS232 communication port (Port1)

RS485 communication port (Port2)
WSZ-CB25 Communication Board (CB)
Screw holes of communication board
Connector for communication board
Connector for Memory Pack
Connector for built-in RS232 communication port (Port 0)
I/O output expansion header, for connecting with cables from expansion units/modules
1.2 Appearance of Expansion Unit/Module

There are two types of cases for expansion unit/modules. One type uses the same case as main unit that of the 90mm, while
the other have thinner 40mm case, which are for expansion modules. All expansion cables (left) of expansion units/modules are
flat ribbon cables (6cm long), which were soldered directly on the PCB, and the expansion header (right) is a 14Pin Header,
with this to connect the right adjacent expansion units/modules. In the following, each of the two types of expansion
units/modules is described as an example:
z
Expansion unit with 90mm width case: [-24XYT-AC]

Digital input
terminal
block
Screw hole
4.5
2
4.52
Expansion cable
connector
Input
status
indicator
Output expansion
header
cover plate
Front view of output expansion
header with cover plate removed
24V IN
S/S
X1
X5
X3
X2
X4
X7
X6
X11
X9
X10
X8
X13
X12
X14
2 3 4
6 7 8
I0 I I I2
I4
I
5
9
I3
IN ( X )
PROGRAMMABLE
CONTROLLER
POW
OUT ( Y )
I 2 3 4
5 6 7 8
9 I0
Y2
C1
Y1
Y5
Y3
C3
Y4
Y6
C5
Y7
C7
Y9
Y8
Y10
SINK
SRCE
Output
expansion
Digital output
terminal block and
Main
power input
(EAP)
DINDIN
RAIL
RAIL tab
H1-2
Output
status indicator
Expansion module with 40mm width case: ( -6AD, -2DA)

Output expansion header
I/O terminal
I/Oblock
Screw hole
4.52
cover plate
4.5 2
Input
status
indicator
Front
view of output expansion
slot with
cover plate removed
S/S
X1
X3
X2
Output
status
indicator
X4
I 2 3 4
IN ( X )
FATEK
POW
OUT ( Y )
I 2 3 4
SINK
SRCE
Y1
Y2
C1
Y3
C3
Y4
Output
expansion head
Expansion cable
connector
DINDIN
RAIL
RAIL tab
I/O
I/O
terminal block
H1-3
1.3
List of WSZ Models
Item Name
Model
Specifications
WSZ-24MCT2-AC
100~240VAC power supply14 points 24VDC digital input (4 points 200KHz high speed, 10 points
20KHz medium speed); 10 points transistor sink output (4 points 200KHz high speed, 4 points 20KHz
medium speed); RS232 port; built-in RTC; detachable terminal block;
WSZ-32MCT2-AC
medium speed); RS232 port ; built-in RTC; detachable terminal block
WSZ-40MCT2-AC
medium speed); RS232 port ; built-in RTC; detachable terminal block
WSZ-60MCT2-AC
20KHz medium speed); 24 points transistor sink output (8 points 200KHz high speed; RS232 port ;
built-in RTC; detachable terminal block
WSZ-24XYT-AC
14 points 24VDC digital input, 10 points transistor sink output, built-in power supply
WSZ-2DA
2 channels, 14-bit analog output module (-10V~0V~+10V or -20mA~0mA~+20mA)
WSZ-6AD
6 channels, 14-bit analog input module (-10V~0V~+10V or -20mA~0mA~+20mA)
WSZ-CB25
1 port RS232 (Port 1) + 1 port RS485 (Port 2) communication board
WSZ-232P0-9F-150
WSZ main unit port 0 RS232 to 9 pins female D-Sub communication cable, length 150cm
WSZ-232P0-9M-400
WSZ main unit port 0 RS232 to 9 pins male D-Sub communication cable, length 400cm
Memory Pack
WSZ-PACK
WSZ program memory pack with 20K words program, 20K words register, write protection switch
Programming
Device
Winproladder for WSZ
WSZ Winproladder Programming software for Windows XP and 7(32 bits)
Main Units
Digital(DIO)
Expansion Unit
Analog Expansion
Modules
Communication
Expansion Board
Communication
Cables
H1-4
1.4
Specifications of Main Unit

* Default Settings
Item
Specification
Note
Execution Speed
0.33usper Sequence Command
Space of Control Program
20K Words
Program Memory
SRAMLithium Battery for Back-up
Sequence Command
36
Application Command
300 (113 types)
Flow Chart (SFC) Command
BIT Status
Single Point
Input Contact(DI)
X0X255 (256)
Output Relay(DO)
Y0Y255 (256)
TR
Temporary Relay
TR0TR39 (40)
Non-Retentive
Internal Relay
Retentive
Special Relay
M1400M1911 (512)
Non-Retentive
Step Relay
S20~S499 can be configured as

retentive type
S500S999 (500)*
Can be configured as non-retentive type
Counter Count Up Status Contact C0C255 (256)

Current 0.01s Time base
Time
0.1s Time base
Value
Register 1s Time base
Retentive
Current
Non-Retentive
CTR Counter 16-Bit
Retentive
Value
32-Bit
Register
Non-Retentive
Retentive
HR
DR
WORD Data
Register
Non-Retentive
Data Register
HR
ROR
T0T255 (256)
T0T49 (50)*
T0 ~ T255 Numbers for each time base
can be flexibly adjusted.
T50T199 (150)*
T200T255 (56)*
C0C139 (140)*
C140C199 (60)*
Can be configured as retentive type
C200C239 (40)*
C240C255 (16)*
R0R2999 (3000)*
D0D3999 (4000)
R3000R3839 (840)*
Retentive
R5000R8071 (3072)*
Read-Only
Register
R5000R8071 can be configured as ROR,

default setting is (0)*
File Register
F0F8191 (8192)*
Input register
R3840R3903
Corresponding to external numeric input
(64)
Corresponding to external numeric

output
Output Register
R3904R3967
Special System Register
R3968R4167 (197) D4000D4095 (96)
Special Register
Real Time Calendar Register
XR
Index Register
VZ (2), P0P9 (10)
0.1ms High Speed Timer register R4152R4154

High Speed
Counter
Register
Except R41524154
(3)
Hardware(4 sets) DR4096DR4110
(4x4)
Software (4 sets) DR4112DR4126
(4x4)
R4128
(min)
R4133
(year)
R4130
(hour)
R4134
(week)
R4131
(day)
External Interrupt Control
32 (16 points input positive/negative edges)
Internal Interrupt Control
8 (1, 2, 3, 4, 5, 10, 50, 100ms)
0.1ms High Speed Timer (HST)
When not configured as ROR, it can

serve as normal register (for read/Write)
ROR is stored in special ROR area and
not consume program space
Must save/retrieved via special
commands
(64)
R4128
(sec)
R4132
(month)
Interrupt
Control
S0S499 (500)*
SR
M1912M2001 (90)
Retentive
OR
Corresponding to External Digital Input

Point
Corresponding to External Digital
Output Point
M800M1399 (600)*
Timer Time Up Status Contact
IR
Include Derived Commands
M0M799 (800)*
TMR
Option: FLASH ROM
1 (16bits), 4 (32bits, derived from HHSC)
H1-5
Accuracy: 20 seconds per day
Channels
High Speed Counter
Hardware High Speed

Counter
(HHSC) /32Points
Software High Speed

Counter
(SHSC) /32Points
Up to 4
Up to 4
Counting
frequency
Counting
modes
Up to 200KHz
Up to 20KHz
(single-end input)
(single-end input)
8 modes (U/D, U/Dx2, P/R, P/Rx2, A/B,
A/Bx2, A/Bx3, A/Bx4)A/B(3 A/B(4)
Channels
Up to 4
Counting
modes
Counting
frequency
y Total number of HHSC and SHSC is

8.
y HHSC can change into High Speed
Timer with 32 bits/0.1ms Time base.
3 modes (U/D, P/R, A/B)

Maximum sum up to 5KHz
Communication
Interface
Port0 (RS232)
Communication Speed 4.8Kbps

921.6Kbps
(9.6Kbps)*
Port1(RS232), Port2(RS485)
Communication Speed 4.8Kbps

921.6Kbps
(9.6Kbps)*
Port12 talk original or Modbus RTU

Master/Slave Communication Protocol
Total 4
Number of Axes
NC
Positioning
Output Frequency
Output
(PSO)
Output Pulse Mode
HSPWM
Output
Total 4
Up to 4
Up to 4
200KHz single-end
transistor output
20KHz single-end
transistor output
3 (U/D, P/R, A/B)
Positioning Language
Special Positioning Programming Language
Number of Points
Up to 4
Output Frequency
Points
72Hz18.432KHz (with 0.1resolution)

720Hz184.32KHz ( with 1resolution)
Max.36 points (all of main units have the
feature)
> 10s(super high speed/high speed input)
Captured input
Captured pulse
width
> 47s(medium speed input)

> 470s(mid/low speed input)
Frequency 14KHz ~ 1.8MHz
X0X15
Setting of Digital Filter
X16X35
Time constant 0 ~ 1.5ms/0 ~ 15ms,

adjustable by step of 0.1ms/1ms
Time constant 1ms~15ms, adjustable by
step of 1ms
H1-6
Chosen by frequency at high frequencies

Chosen by time constant at low frequencies
1.5 Environmental Specifications

Item
Specification
Enclosure
Minimum
5C
Operating Ambient
equipment
Maximum
40C
Temperature
Open
Minimum
5C
equipment
Maximum
55C
Permanent Installation
Storage Temperature
-25C +70C
Relative Humidity (non-condensing, RH-2)
5%95%
Pollution Level
Degree II
Corrosion Resistance
By IEC-68 Standard
Altitude
2000m
Vibration
Note
Fixated by DIN RAIL
0.5G, for 2 hours each along the 3 axes
Secured by screws
2G, for 2 hours each along the 3 axes
Shock
10G, 3 times each along the 3 axes
Noise Suppression
1500Vp-p, width 1us
Withstand Voltage
1500VAC, 1 minute
L, N to any terminal
Warning
The listed environmental specifications are for WSZ controller under normal operation. Any operation in environment
not conform to above conditions should be consulted with FUJI.
1.6
Connection Diagrams of Various Models
1.6.1
z
Main Unit
[7.62mm Terminal Block, detachable in model]
24 point digital I/O main unit (14 points IN, 10 points OUT)
24V OUT
S/S
max.
400mA
X2
X0
X1
X4
X6
X5
X3
X10
X8
X7
X12
X11
X9
X13
FBS-24MAR2-AC
WSZ-24MCT2-AC
FBS-24MCR2-AC
AC100~240V
IN
Y1
Y0
C0
Y2
Y5
Y4
Y3
C2
C4
Y6
SINK
SRCE
Y8
Y7
C6
Y9
max.
400mA
24V OUT
S/S
X0
X2
X1
X4
X6
X5
X3
X10
X8
X7
X9
X12
X11
X14
X13
X16
X15
X18
X17
X19
FBS-32MAR2-AC
WSZ-32MCT2-AC
FBS-32MCR2-AC
IN
AC100~240V
Y1
C0
Y0
Y2
C2
Y4
Y3
Y5
C4
Y6
C6
Y8
Y7
H1-7
C8
Y10
Y9
Y11
SINK
SRCE
24V OUT
S/S
max.
400mA
X0
X2
X1
X4
X3
X6
X5
X10
X8
X7
X12
X11
X9
X14
X13
X16
X20
X18
X15
X17
X19
Y11
C12
X22
X21
X23
FB
S-40MAR2-AC
WSZ-40MCT2-AC
FBS-40MCR2-AC
AC100~240V
IN
Y1
Y0
C0
Y2
Y4
Y3
C2
Y5
Y6
Y8
Y7
C6
C4
Y10
Y9
C8
Y12
SINK
SRCE
Y14
Y13
Y15
max.
400mA
24V OUT
S/S
X0
X2
X4
X1
X3
X6
X5
X10
X8
X7
X9
X12
X11
X14
X13
X16
X15
X18
X17
X20
X19
X22
X21
X26
X24
X23
X25
X28
X27
X30
X29
X34
X32
X31
X33
X35
FBS-60MAR2-AC
WSZ-60MCT2-AC
FBS-60MCR2-AC
IN
AC100~240V
Y2
Y1
C0
1.6.2
Y0
Y5
Y4
Y3
C2
C4
Y8
Y6
C6
Y7
C8
Y10
Y9
Y12
Y11
C12
Y14
Y13
Y16
Y15
C16
Y18
Y17
Y20
Y19
C20
Analog I/O Expansion Module
[7.62mm fixed terminal block]
6 channel A/D analog input module
AG
V
I U B 5V 10V
I0+ I1+
I0- I1C
H
0
AG
C
H
1
WFB
SZ6 AD
S-6AD
C
H
2
C
H
3
2 channel D/A output module
C
H
4
I U B 5V10V
O0+
O1+
O0O1C
H
0
W FB
SZ2D A
S-2DA
C
H
5
I2+ I3+ I4+ I5+

I2- I3- I4- I5-
H1-8
C
H
1
Y22
Y21
Y23
SINK
SRCE
1.6.3
Communication Board (CB)
[DB9F/3Pin plug able terminal block](Below is outlook of CB and the

corresponding cover plate)
1 RS2321 RS485 ports
WSZ-CB25
1.7 Drawings with External Dimensions

(1) Outlook I
Main UnitWSZ-24MCT2-AC, WSZ-32MCT2-AC, WSZ-40MCT2-AC, WSZ-60MCT2-AC
Expansion UnitWSZ-24XYT-AC
PROGRAMMABLE
CONTROLLER
90
90
2 - 4.5
21
80
7.5
unitsmm
W
Model
90mm
WSZ-24MCT2-AC, WSZ-24XYT-AC
130mm
WSZ-32MCT2-AC, WSZ-40MCT2-AC
175mm
WSZ-60MCT2-AC
H1-9
(2) Outlook II
Expansion Nodule WSZ-6AD, WSZ-2DA
20
90
90
FATEK
2 - 4.5
3.8
21
40
80
7.5
unitsmm
H1-10
Chapter 2
2.1
System Architecture
Single-Unit System of WSZ Controller
The Single-Unit system means a system built only by a single WSZ controller and its expansion unit/modules and
communication board. Such system have a limited capability, beyond that capability can incorporate CPU communication
via LINK function for expansions. The figure below shows the block diagram of the Single-Unit system of WSZ controller,
where, besides the available main units, the available communication peripherals resources and I/O expansion
resources are depict on the left and the right respectively.
Digital Input (DI)
DI
Digital I/O Expansion Unit
Intelligent
Peripherals
Encoder
WSZ-24XYT-AC
Main
Unit
WSZ-24MCT2-AC
RS232
Port0
Computer
Port2
Communication
Board
Port1
WSZ-32MCT2-AC
WSZ-40MCT2-AC
WSZ-60MCT2-AC
Port2
Interface
Analog I/O Expansion Module
WSZ-6AD
WSZ-CB25
Human-Machine
DO
WSZ-2DA
Port1
AI
AO
Servo
Digital Output (DO)

For the I/O of WSZ controller, it can achieve a maximum of 256 point digital input (DI), 256 point digital output (DO), 64
word numeric input (NI), and 64 word numeric output (NO).
Regarding communication resources, the WSZ-controller hardware can accommodate up to 3 communication ports (with
a maximum speed of 921.6Kbps). In addition to providing the original communication protocol, it also supports the
Modbus master/slave protocol or any user-defined protocol.
H2-1
Chapter 3
Expansion of WSZ-Controller
If the I/O point of WSZ Main unit is not enough for a specific application, it can be expanded with the additional expansion
unit/modules. Besides I/O point there also have the requirements to expand the communication port in some occasions.
3.1
I/O Expansion
The expansion of WSZ-controller I/O consists of Digital I/O ( DI/O, which status is represented by a single bit) and the
Numeric I/O (NI/O , which status is represented by a 16-bit Word). Either the DI/O or the NI/O expansion is realized
through expansion units or modules cascaded thru the usage of the I/O Output Expansion Connector located at the
right side of WSZ main unit or expansion unit/ module.
The I/O points of WSZ controller system are limited to 512 points of DI/O (256 points for DI and DO, respectively), 128
1 A
words of NI/O (64 words for NI and NO, respectively). Besides this there are two limits imposed by hardware:
2 The total length of the expansion cables
maximum number of 32 units or modules can be used in the expansion.
cannot exceed 5 meters.
Caution
1.
If the I/O points of the application system exceed one of the limitations(256 DI,256 DO,64 NI, 64 NO), while
startup the main unit of WSZ controller will treat this as an illegal I/O configuration, which in return will flag as
an error situation by turn on the ERR LED and put the error code in Y0~Y3 LED(refer the page H8-2, Chapter
8). The corresponding error code will also be indicated in the CPU status register (R4049).
2.
The maximum number of expansion unit/modules of WSZ controller is 32. Beyond this numbers will be treated
as an invalid I/O configuration and the main unit will stop its operation, which in return will flag as an error
situation by turn on the ERR LED and put the error code in Y0~Y3 LED(refer the page H8-2, Chapter 8). The
corresponding error code will also be indicated in the CPU status register (R4049).
Warning
1.
The maximum length of the I/O expansion cable for WSZ controller is 5 meters. Cables longer than that will
cause incorrect I/O operation because of excess signal delay in hardware or noise pickup, resulting in damage
to equipment or posing hazard to operating personnel. Since this kind of situation cannot be detected by the
main unit, users are advised to take extra cautions and necessary measures.
3.1.1
Digital I/O Expansion and I/O Numbering
Digital I/O means I/O with the discrete type status, including digital input (with initial X in DI numbering) and digital
output (with initial with Y in DO numbering). The DI and DO of WSZ controller can both be expanded up to 256 points
(numbered as X0~X255 and Y0~Y255, each with 256 points).
The status of input contacts (X0~X255) of controller come from the input signal connected to the digital input terminal
block on main unit or expansion unit/module; while the status appears at digital output terminal block of main unit and
expansion unit/module reflects the digital output relay (Y0~Y255) status inside controller.
On main unit, at the position below the digital input terminal block and the position above the output terminal block,
there have labels indicate the corresponding signal name. They label each terminal with numbers representing the
corresponding digital input contact Xn and digital output relay Yn. In the example of the main unit in WSZ-24MCT2-AC,
the corresponding digital input contacts on the input terminal block are labeled X0~13, and the corresponding digital
output relays on the output terminal block Y0~Y9. Users only need to locate the printed label for each terminal to find
out its I/O number. The LED status display region also indicates the ON/OFF status for all DI(X0~X13) and DO(Y0~Y9)
on the main unit. Users can easily find each terminal with its I/O number and LED status indication, as shown in the
H3-1
figure below using X10 and Y6 as an example:
24V OUT
S/S
max.
400mA
X0
X2
X1
X4
X6
X3
X5
X10
X8
X7
X12
X11
X9
X13
0 I 2 3
4 5 6 7
8 9 I0 I I
I2 I3
X10
IN ( X )
POW
PROGRAMMABLE
CONTROLLER
RUN
ERR
TX
RX
OUT ( Y )
0 I 2 3
4 5 6 7
8 9
PORT0
Y6
AC100~240V
IN
Y1
C0
Y0
Y2
C2
Y5
Y4
Y3
C4
Y6
C6
Y8
Y7
Y9
SINK
SRCE
While the various expansion unit/modules other than the main units have the same printed labels on the input/output
terminals as the main units do, these labels are only relative I/O numbers, different from the absolute I/O numbers on
main units. The number of a terminal only represents its order on the expansion unit/module. For example, the first
contact is X1 or Y1, the second X2 or Y2, etc. All numbers on the expansion unit/module begin with 1. The actual
number of digital input contact or the output replay, however, is determined by summing the numbers on all previous
expansion units/modules and the main unit. See the following figure and its calculation.
X0
X0 X1
X23
& & & & & & & & & & & & & &X23
X1 X2
Y0 Y1
Y0
& & & & & & & &X14
X1 X2
51
X37
& & & X7

& & & & &X14
WSZ-24XYT-AC
FBS-24XYR
2 expansion
unit
(1/ )
(1/ )
Y15
X44
S-24XYR
1 FB
expansion
unit
st
& & & & & & & & & & & &Y15
38
X24
WSZ-24XYT-AC
WSZ-40MCT2-AC
FBS-40M
Main Unit
( )
X37
X24
Y1 Y2
& & & & & & & &Y10
Y16
Y25
nd
Y1 Y2
26
Y16
& & & & & & & &Y10
35
Y25
As shown in the above figure, because the top X numbers of the previous two units are 23 and 14, respectively, the
number of input contact X7 on second expansion unit should be:
X (23147) X44
H3-2
3.1.2
Numeric I/O Expansion and I/O Channel Mapping
The numeric I/O in WSZ-controller treat 16 single-bit data as one 16-bit numeric data (Word) ranging from the 0~65535.
Since all numeric data of WSZ controller are stored in the register inside controller (16-bit width), therefore numeric I/O
is also called register I/O. The Input Register (IR) has 64 Word (R3840 ~ R3903) for inputs from external numeric input
(NI) module, and the Output Register (OR) also has 64 Word (R3904 ~ R3967) for outputs to external numeric output
(NO) module.
Analog Input Module is of Numeric input (NI) modules which use input register (IR) to convey the status. Analog Output
Module is of Numeric output (NO) modules which output is directly from the Output register (OR). The Analog Input and
Analog Output is of analog voltage or current. Either the magnitude of voltage or current is represented by the 16-bit
value of the corresponding register. The corresponding current/voltage signal of any IR or OR on the NI/O module is
named as a Channel (CH). The channels on the NI module are called numeric input channels (NI channels) and those
on NO module numeric output channels (NO channels). The number of IR/OR used by NI and NO channels on each
module varies depending on the module type or working mode. The following table lists the numbers of IR and OR
used by NI and NO channels on each NI/O module:
NI/O
NI Channel
NO Channel
Module Name
Label
Label
WSZ-6AD
WSZ-2DA
CH0
CH1
CH2
CH3
CH4
CH5
Number of IR
Number of OR
occupied
occupied
(Word)
(Word)
Note
1
1
1
1
1
1
CH0
CH1
1
1
The corresponding IR or OR number calculation of the NI/O module starts from the first expansion unit/module(main
unit itself does not have any NI/O). The first NI channel corresponds to the first IR register (R3840). Adding R3840 with
the number of IR used by the first NI channel gives the IR number of the second NI channel. Adding the IR number of
the second NI channel with the number of IR used by the second NI channel gives the IR number of the third NI
channel. All other numbers can be obtained accordingly. Similarly, the first NO channel corresponds to the first OR
(R3904). Adding R3904 with the number of OR used by the first NO channel gives the OR number of the second NO
channel. (In the cumulative calculation of NI channels, care only for NI channels and disregard DI/O and NO. Similarly,
in the case of NO channels, disregard DI/O and NI channels.) The following figure helps users find out the relation
between NI/O channels and controllers IR and OR.
H3-3
OR
IR
X9
X11
24V IN
X13
AG
V
CH0 (R3904)
X12
X10
X8
X7
I 2 3
5 6 7
9 I0 I I
I3
0
4
8
I2
I0+
I1+
I0I1C
H
0
I U B 5V 10V
C
H
1
24V IN
AG
V
CH1 (R3905)
X6
X5
(R3841)
CH1 (R3849)
(R3840)
CH0 (R3848)
X4
O0+
O1+
O0O1-
I U B 5V 10V
C
H
0
C
H
1
IN ( X )
POW
RUN
ERR
RX
FATEK
FATEK
WSZ-6AD
WSZ-2DA
W S Z- 2 4 MC
POW
POW
T2 - A C
OUT ( Y )
0 I 2 3
4 5 6 7
8 9
Y4
Y3
Y5
C4
C
H
2
Y8
Y6
C6
Y7
Y9
SINK
SRCE
C
H
4
C
H
3
C
H
5
I4+
I5+
I2+
I3+
I4I5I2I3-
(R3844)
CH4 (R3852)
(R3845)
CH5 (R3853)
(R3842)
CH2 (R3850)
(R3843)
CH3 (R3851)
IR
During the startup stage, WSZ controller will automatically detect the types and CH numbers of expansion units. While
operation, the WSZ controller will read the CH input values from the NI module and stores them into corresponding
IR(R3840 ~ R3903) and outputs OR values (R3904~R3967) to channels on the NO module. No pre-configuration or
setting by users is required.
3.2 Expansion of Communication Port

The main unit has one built-in communication port (port 0, with RS232 interface). Expansion of communication ports
can be achieved by employing Communication Board (CB). The available model of CB for WSZ is
Model Number
WSZ-CB25
Specifications
1 RS232 (port1) + 1 RS485 (port2) communication board
Communication board, which can be directly installed on main units, is employed for expansion of communication ports
port1 and port2. The labels of communication ports are marked on the cover plate of communication board, from which
users can easily identify each port. Except that the built-in communication port (Port 0) can only be used for RS 232
interface, all the other ports (Port 1~2) can be used for RS232 or RS 485 interface in CB. The following figure shows an
example of expansion of 3 (maximum allowed number) communication ports (CB25):
H3-4
The most expansion of communication port diagram
Port2
Port1
Port0
H3-5
Chapter 4
Installation Guide
Danger
1. Turn off all power during installation of WSZ controller or related equipments to prevent electric shock
or damage to equipment.
2. Upon completion of all installation wiring, put the protective cover back on the terminal block before
turning on the power to avoid electrical shock.
3. During installation, never remove the dust cover sheet that were surrounded the controller before
wiring is completed to avoid complications such as fire hazards, breakdown, or malfunction caused by
drill dust or wire shreds falling inside controller.
4. Upon completion of installation and wiring, remember to remove the dust cover sheet to avoid fire,
breakdown or malfunction, caused by overheating.
4.1 Installation Environment

Caution
1. Environmental specifications of WSZ controller cannot exceed those listed in this manual. In addition, do
not operate this equipment in environments with oil smoke, conductive dust, high temperatures, high
humidity, corrosion gases, inflammable gases, rain or condensation, and high vibrations and shock.
2. This product has to be housed appropriately whether its used in a system or standalone. The choice and
installation of housing must comply with local national standards.
4.2 Precautions of Controller Installation

To avoid interference, the controller should be installed to keep from noise sources such as high- voltage or
high-current lines and high power switches. Other precautions are:
4.2.1
Placement of Controller
Fixation of WSZ controller, which can be fixed by DIN RAIL or screws, should place vertically and start from the main
unit on the left to the expansion unit on the right. A typical figure of placement is shown below:
max.
400mA
24V OUT
S/S
X0
X2
X1
X4
X3
X6
X5
X10
X8
X7
X12
X11
X9
X1
X13
S/S
X3
X2
X5
X4
X7
X6
0 I 2 3
4 5 6 7
8 9 I0 I I
X11
X9
X8
X10
X1
X13
X14
X12
I2 I3
Y1
Y0
X11
X10
X13
X12
X14
IN ( X )
POW
POW
RX
Y2
C2
X9
X8
I2 I3
PROGRAMMABLE
CONTROLLER
OUT ( Y )
OUT ( Y )
0 I 2 3
4 5 6 7
8 9
0 I 2 3
4 5 6 7
8 9
OUT ( Y )
0 I 2 3
4 5 6 7
8 9
AC100~240V
C0
X7
X6
IN ( X )
PROGRAMMABLE
CONTROLLER
ERR
PORT0
IN
X5
X4
I2 I3
IN ( X )
RUN
TX
X3
X2
0 I 2 3
4 5 6 7
8 9 I0 I I
POW
PROGRAMMABLE
CONTROLLER
S/S
0 I 2 3
4 5 6 7
8 9 I0 I I
Y5
Y4
Y3
C4
Y6
C6
Y8
Y7
Y9
SINK
SRCE
Y3
Y2
C1
Y1
C3
Y5
Y4
Y6
C5
Y7
C7
SINK
SRCE
Y9
Y8
Y10
Y2
C1
Y3
C3
Y1
Y5
Y6
C5
Y4
Y7
SINK
SRCE
Y9
Y10
Y8
C7
Suggested
max.
400mA
arrangement
of
multiple unit
24V OUT
S/S
X1
X3
X2
X5
X4
X7
X6
X9
X11
X10
X8
X1
X13
X12
X14
S/S
X3
X2
X5
X4
X7
X6
X9
PROGRAMMABLE
CONTROLLER
POW
POW
OUT ( Y )
OUT ( Y )
0 I 2 3
4 5 6 7
8 9
0 I 2 3
4 5 6 7
8 9
IN
X14
IN ( X )
IN ( X )
expansion
X13
X12
I2 I3
I2 I3
FATEK
PROGRAMMABLE
CONTROLLER
X11
X10
X8
0 I 2 3
4 5 6 7
8 9 I0 I I
0 I 2 3
4 5 6 7
8 9 I0 I I
AC100~240V
Y2
C1
Y1
Y5
Y3
C3
Y4
Y6
C5
Y9
Y7
C7
H4-1
Y8
Y10
SINK
SRCE
Y2
C1
Y1
Y3
C3
Y5
Y4
Y6
C5
Y7
C7
Y9
Y8
Y10
SINK
SRCE
4.2.2
Ventilation Space
The heat in WSZ controller is ventilated via air circulation. There should reserve more than 20mm space, both below and
above controller, and with vertical installation, for ventilation. as shown in the figure below:
Heat ventilation
X13
Y9
Y8
Y7
Y6
C6
C4
Y5
OUT ( Y )
4 5 6 7
0 I 2 3
8 9
ERR
IN ( X )
RUN
POW
8 9 I0 I I
I2 I3
Y2
Y3
PORT0
Y0
Y2
C2
Y4
Y3
Y5
C4
Y6
C6
Y8
Y7
Y9
SINK
SRCE
C2
IN
max.
400mA
On
floor
Vertical with front
Horizontal
facing out
Wiring
slot
Distance
20mm
20mm
m ax.
400mA
24V O UT
S/S
X0
X2
X1
X4
X3
X6
X10
X8
X7
X5
0
4
8
I2
X12
X11
X9
X13
I 2 3
5 6 7
9 I0 I I
I3
IN ( X )
POW
PROGRAMMABLE
CONTROLLER
RUN
ERR
TX
RX
OUT ( Y )
0 I 2 3
4 5 6 7
8 9
PORT0
IN
A C100~240V
Y1
C0
Y0
Y2
C2
Y4
Y3
AC100~240V
Y1
C0
PROGRAMMABLE
CONTROLLER
AC100~240V
24V OUT
S/S
IN
X0
OUT ( Y )
0 I 2 3
4 5 6 7
8 9
PORT0
Y1
X1
RX
TX
X2
ERR
Y4
RX
X4
X3
RUN
TX
4 5 6 7
X5
IN ( X )
POW
PROGRAMMABLE
CONTROLLER
Y5
C4
Y6
C6
Y8
Y7
Y9
SINK
SRCE
20mm
Distance
20mm
Wiring
slot
H4-2
Y0
I 2 3
5 6 7
9 I0 I I
I3
C0
X13
X12
Hanged
X12
X11
X9
X11
X10
X8
X7
0
4
8
I2
X10
X6
X5
X9
X4
X3
X8
X2
X1
X7
X0
X6
24V OUT
S/S
0 I 2 3
m ax.
400mA
SINK
SRCE
4.3 Fixation by DIN RAIL

In an environment with slight vibration (less than 0.5G), this is the most convenient way of fixation and is easy for
maintenance. Please use DIN EN50022 DIN RAIL, as shown in the figure below.
35mm
(1.38 in.)
1.0mm
(0.039 in.)
7.5mm
(0.29 in.)
Mount
Hold controller facing its front, press it down with a 15 degree tilt onto the DIN RAIL. Swing it down until
the upper edge of DIN RAIL groove on controller back touches the upper tab of DIN RAIL. Then use this
locked-in point as a pivot to press the controller forward on the bottom and lock it in position. The
procedure is illustrated below:
1
Make sure the tab is pressed in, or

it cannot be locked into position.
Dismount
Use a long screwdriver to reach in the hole on the DIN RAIL tab. Pull out the tab to pulled out
position to remove controller, as shown in the figure below.
Tab in pulled out position
H4-3
4.4 Fixation by Screws

In environments with larger vibration (more than 0.5G), the unit must be secured by M3 or M4 screws. Positions and
sizes of screw holes in various models of WSZ controller are illustrated in the following:
:
SizeBA:
90mm
(3.543in)
4mm
(0.157in)
90mm
(3.543in)
2 - 4.5 mm
(0.177 in)
21mm
(0.827in)
B:
C:
Size
130mm
(5.118in)
4mm
(0.157in)
90mm
(3.543in)
2 - 4.5 mm
(0.177 in)
21mm
(0.827in)
H4-4
C:
D:
Size
175mm
1750mm
(6.890in)
4mm
(0.157in)
90mm
(3.543in)
2 - 4.5 mm
(0.177 in)
21mm
(0.827in)
E :D :
Size
20mm
(0.787in)
40mm
(1.575in)
90mm
(3.543in)
3.8mm
(0.150in)
2 - 4.5 mm
(0.177 in)
21mm
(0.827in)
4.5 Precautions on Construction and Wiring

1. During the wiring of WSZ controller, please follow local national standards or regulations for installation.
2. Please chose the wires with proper wire gauge for I/O wiring according to the current loads.
3. Shorter wires are preferred. It is advised that the length of I/O wiring does not exceed 100m (10m for high-speed
input).
4. Input wiring should be separated from output or power wiring (at least 30~50mm apart). In case separation is not
possible, adopt vertical crossing, no parallel wiring is allow.
5. The pitch of WSZ controller terminal block is 7.62mm. The torque for screw and suggested terminal is shown below:
terminal block
M3
M3
7.62 mm
< 6mm
< 6mm
H4-5
torque: 6~8kg-cm
Chapter 5 Power Supply Wiring, Power Consumption

Calculation, and Power Sequence Requirements
WSZ controller internally has three kinds of circuit: a 5VDC logic circuit, a 24VDC output circuit, and a 24VDC input
circuit. They are all powered by the built-in power supply of main/expansion units. Expansion modules other than
main/expansion units do not contain any power supply and are powered by the power supply inside the main/expansion
units.
Caution
In industrial environments, main power may irregularly experience a surge current or high voltage pulse
caused by the start or shut down of high power equipment. Users are advised to take necessary
measures (for example, the use of isolation transformer or other MOV suppression devices) for the
protection of controller and its peripherals.
5.1 Specifications of AC Power Sourced Power Supply and Wiring

The available AC power supplies of WSZ controller are the 24 Watt (POW-24) supply for 20~60PTs main/expansion
unit. POW-24 is to be installed on a main unit or inside an expansion unit, where their appearances are invisible. The
following table lists the specifications:
Sp e c
Model
POW-24
Item
Input Range
Voltage
100 ~ 240VAC -15% / +10%
Frequency
50 / 60HZ -5% / +5%
Max. Power Consumption
36W
Inrush Current
20A@264VAC
Allowable Power Interrupt
20ms(min.)
Fuse Spec.
1A250VAC
Isolation Type
Transformer/Photo Couple Isolation, 1500VAC/minute
Power* 1
Output
5VDC(logic circuit)
5V5%1A(max)
24VDC(output
circuit)
24V10%400mA(max)
24VDC(input circuit)
24V10%400mA(max)
Note * The 5VDC (for logic circuit) output power and the 24VDC (for output circuit) power can be accessed from the I/O expansion
output header located on the right side of the main/expansion units for expansion modules. And the 5VDC power is also
used by communication board (CB25). The 24VDC power for input circuits is provided from the farthest 2 upper left
terminals (labeled +24V OUT-) on the input terminal block of main/expansion unit to input circuit in expansion module or
other sensors.
H5-1
Caution
The schematic diagram of AC power supply wiring in main/expansion units is shown below. Also be cautious
about the following:
Please follow the wiring schemes regulated by local national standards to use single-pole switchbreak hot wire
L, or double-pole switchbreak bothLandN, to turn on or off the AC input power.
In wiring, hot wireLmust be connected to the L
N
terminal on unit, while the ground lineNconnected to the
terminal. Please use wires with diameters 1mm22mm2.
All G
terminals on main unit and expansion unit/module have to be connected to the EG (Earth Ground)
terminal of main power system as shown in the figure below, with wire diameters larger than 2mm2.
Warning
Output of power for sensor cannot be connected in parallel with other powers, in which the conflict between two
sets of power will decrease their lifetime or cause immediate damage. This will induce unexpected malfunction of
controller and cause serious or even deadly damage to people or equipment.
24VDC output
(for input)
24VDC
ex external power
input /
Sensor
input /
Sensor
OR
OR
IN
OUT
Input
OUT
CONVERTER
(DC-DC)
Input
POW-24
24V
POW-24
24V
0V
AC-DC
Power 5V
Supply
0V
24V
F
SW
100-240VAC
main power
24VDC output
(for input)
CPU
Output
0V
control
control
AC-DC
Power
Supply
AI
Expansion
module
mdle
sionExpansion
Main unit
unit
Expansion
Main
e
(W
SZ-6AD,
(FB
S-6AD,
supply
(WSSZ-**MCT2-AC)
- M )
(FB
(FB2DA)
S2DA,
-6AD,
TC6,RTD6...)
EPOW)
TC6,RTD6
L
N
EG
H5-2
5V
0V
24V
Output
Expansion unit
module
Expansion unit
(W SZ-24XYT-AC) , 2DA,
(FBS- EAP)
6...)
5.2 Residual Capacity of Main/Expansion Unit & Current Consumption of Expansion Module
Besides its own circuit usage, the residual capacities of three sets of built-in power supply of main/expansion unit are big
enough for other expansion modules usage. As each model of the main/expansion unit has different residual capacity,
various models of expansion modules also consume different amounts of current. In practice, one has to consider the
match between the two to avoid overload in any of the three sets of output power. In the following, the worst case of the
available residual capacity in each main/expansion unit and the maximum power consumption of expansion modules are
described below spare.
5.2.1
Residual Capacity of Main/Expansion Unit

Extra Capacity
Model
AC
P
O
W
E
R
Main Unit
Output Power
5VDC(logic circuit)
24VDC(output circuit)
24VDC(input circuit)
WSZ-24MCT2-AC
722 mA
320mA
295mA
WSZ-32MCT2-AC
712 mA
310mA
262mA
WSZ-40MCT2-AC
688 mA
290mA
244mA
WSZ-60MCT2-AC
644 mA
250mA
190mA
948 mA
350mA
337mA
Expansion Unit WSZ-24XYT-AC
z In the above table, the residual capacity is calculated according to the most power-consuming model of in
each main/expansion unit by its I/O point number, under the maximum load condition (with both DI and DO ON).
The basic units for calculation are 7.5mA /PT for high/medium speed DI, 4.5mA/PT for low speed DI, 10mA/PT
for high speed DO, 7.5mA/PT for medium speed DO, and 5mA for low speed DO.
Warning
Either for the built-in power supply of the main/expansion unit or the expansion power supply for the expansion
unit, the total amount of current cannot exceed the value listed in the above table. Any violation will cause a
voltage drop by overloading the power supply, or intermittent powered with the supply in protection mode, either
of which will result in unexpected action of controller and cause harm to people or damage to equipment.
5.2.2
Maximum Current Consumption of Expansion Module
Without its own power supply, expansion modules must be supported by the main/expansion unit, expansion power, or
external power supply (24VDC input circuit alone). The following table lists the maximum consumption current of each
expansion module.
Current
Model
24VDC Input Circuit
Numeric I/O Expansion
WSZ-6AD
30 mA
45 mA
Module
WSZ-2DA
18 mA
70 mA
WSZ-CB25
60 mA
5VDC Logic Circuit
The above table lists the required current for the maximum consumption in each expansion module. The 24VDC
input circuit consumes 4.5mA less per point of OFF state DI in DI/O module. The effect of power consumption
variation regarding the ON/OFF state of DI/DO of expansion modules other than DI/DO are less significant and can
be neglected.
The effect of residual capacity variation regarding the ON/OFF state of DI/DO for 5VDC logic circuit can be
neglected.
H5-3
5.3 Requirement of Power Sequence in Main Unit & Expansion Unit/Module

When the power is on, the main unit first detects the type and number of expansion unit/module attached to its
expansion interface and get the actual I/O configuration. Therefore, while the main unit performs detection, the power
in expansion unit/module should be already UP, otherwise, the detected I/O configuration will not correct. Namely, the
power of expansion unit/module should be ON simultaneously or even earlier. There will be no time sequence error
when main unit/expansion unit/module are connected together to one power. If the expansion unit and main unit
powered by different powers (or the same power but different switches), or external power supply is used for expansion
modules, time sequence of both powers should be considered. To solve the problem of the expansion unit/module
power not get ready before main unit power does, WSZ controller provides a special R4150 register which can delay
the detection time of I/O configuration. The time base of R4150 is 0.01sec with a default value of 100 (namely a 1sec
delay), which can be set from 100~500 (1~5sec), as shown in the figure below. If the expansion unit power cannot be
UP within 1sec after main unit power is ON, the R4150 time needs to be set longer to delay the detection by CPU. It
cannot exceed 5sec, however, otherwise the configuration of expansion interface cannot be detected.
s
ec
sec
s
ec
Main
Unit Power
Expansion Unit
()
(Module) Power
No adjustment
R4150
Adjustment
required
requiredR4150
H5-4
Unable
to detect
Chapter 6
Digital Input (DI) Circuit
The WSZ controller provides the single-end 24VDC inputs which use the common terminal to save terminals. The
response speeds of single-end input circuits are available in high, medium and low. The single-end input circuit is set to
SINK or SOURCE (we will use the term SRCE) by the wiring of the common terminals S/S inside controller and
external common wire of input circuits (see Sec. 6.2 for details).
6.1 Specifications of Digital Input (DI) Circuit

24VDC Single-end Input
Item
Specifications
Medium Speed
High Speed
(HSC)
Medium Low
(HSC)
20KHz (HHSC)
Speed
200KHz
Total 5KHz
(Capture input)
Low
Note
Speed
(SHSC)
Input Signal Voltage
24VDC10%
Input
ON Current
Current
Threshold OFF Current
8mA
4mA
2.3mA
2mA
1.5mA
0.9mA
Maximum Input current
10.5mA
7.6mA
4.5mA
Input Status Indication
Displayed by LED: Lit when ON, dark when OFF
Isolation Type
Photo coupler signal isolation
WSZ-24MCT2-AC
Via variation of internal common terminal S/S and external common

wiring
X0~3
X4~13
WSZ-32MCT2-AC
X0~5
X6~15
X16~19
WSZ-40MCT2-AC
X0~5
X6~15
X16~23
WSZ-60MCT2-AC
X0~7
X8~15
X16~35
SINK/SRCE Wiring
List of Input
Response Speed
for Various Models
All Input
Points
Expansion Unit
Noise Filtering Time Constant
Half of maximum
frequency while
A/B phase input
DHF(0ms ~
15ms)
AHF(0.47s)
DHF(0ms ~
15ms)
AHF(4.7s)
HSC: High Speed Counter

HHSC: Hardware High Speed Counter
SHSC: Software High Speed Counter
H6-1
DHF(1ms ~
15ms)
AHF(0.47ms)
AHF(4.7ms)
DHFDigital
Hardware Filter
AHFAnalog
Hardware Filter
6.2 24VDC Single-End Input Circuit and Wiring for SINK/SRCE Input
The 24VDC single-end digital input circuits are available for high, medium and low speed. They all have the similar
circuit structures but with different response speeds. To save input terminals, the circuit of single-end input is
implemented by connecting one end of all input points (photo coupler) inside the controller to the same internal
common point labeled as S/S. The other end of each input circuit is connected to corresponding terminals such as X0,
X1, X2, etc. The S/S common terminal and N single-end inputs comprise of N digital inputs (i.e., only N+1 terminals are
used for N terminals). Therefore, we call this type of input structure the single-end input. The user also needs to do the
same thing when making the connection of external digital input devices. Namely, the one end of all input devices (e.g.,
buttons, switches) are connected together and called the external common wire, while the other ends of input circuits
are connected to the input terminals X0, X1, X2, etc., of controller. Then finish it by connecting the external common
wiring and internal common terminal S/S to the positive/negative terminals of the 24VDC power. When connect the
internal common terminal S/S to 24V+(positive) and the external common wire to 24V (negative), then the circuit
serve as SINK input. On the contrary, while exchange the wiring of the above internal and external common will serve
as a SRCE input. The above wiring schemes can illustrated below:
z Wiring of single-end common SINK input (internal common terminal S/S 24V+, external common
wiring 24V)
External
Common Wiring
External
Power
NPN
Sensor
24VDC
24V-
24V+
S/S
X0
Internal
Common
Terminal
W
FBSSZ
X1
X3
X2
R1
R1
R1
Low speed
R1
R1:5.6K
R2
PLC
Controller
Input devices
R2
R2
R2
R2:1K
24VDC
Middle speed
()
(not
available in
expansion modules)
R1:3.3K
R2:1.2K
X0
X1
X3
X2
z Wiring of single-end common SRCE input(internal common terminal S/S 24V, external common
wiring 24V+)
External
Common Wiring
External
Power
PNP
Sensor
24VDC
24V-
24V+
PLC
Controller
S/S
X0
Internal
Common
Terminal
FBSSZ
W
|
Input Circuit
X1
R2
R1
R1
R1
R1
R2
R2
R2
X3
X2
24VDC
()
(not
available in
expansion modules)
X0
H6-2
X1
X2
X3
Chapter 7
Digital Output (DO) Circuit
The digital outputs of WSZ-controller are available in the single-end output circuit for saving terminal.
The transistor, however, because of its polarities, is needed to be careful about connection with the power (common
point Cn of SINK output must connect to negative end of DC power).
Warning
No over current protection is available in the WSZ series controller. All other output circuits have to be added
with over current or short circuit protections externally, such as fuses, in applications with safety concern.
Terminals labeled byon the terminal block are empty contacts, which cannot be connected with any wire
to maintain the required safety clearance and to avoid damage to the unit.
In situations where simultaneous operations of outputs(such as reverse/forward action of motor) pose safety
concerns, besides the interlock in controller programs, additional interlock circuits are needed outside
controller, as shown below
Controller
PLC
Forward
output
Forward
limit switch
Interlock
Magnetic
switch or
Relay A
A
contact
(NC)
(NC)
Reverse
limit
switch
Magnetic
Interlock
switch or
contact
B
(NC)
Relay B
(NC)
Output
Output
Controller
PLC
Reverse
output
H7-1
7.1 Specifications of Digital Output Circuit

Item
Specification
Maximum switching (working)
Frequency
Single-End Transistor Output

High Speed
Medium Speed
Low Speed
200KHz
20KHz
200Hz
530VDC
Working Voltage
Maximum Load
Current
Resistive
Inductive
Maximum Voltage Drop (@

maximum load)
0.5A
0.6V
2.2V
0.1 mA/30VDC
Leakage Current
Maximum Output
Delay Time
0.5A/ 0.1A (24XYT)
0.5A
ONOFF
OFFON
15s
2s
30s
Output Status Indication
LED is bit when

ON, dark whenOFF
Over Current Protection
N/A
Photo Coupler Isolation
Isolation Type
Transistor (SINK)
Output Type
List of output
Response Speed
For Various Models
WSZ-24MCT2-AC
Y0~3
Y4~7
Y8, 9
WSZ-32MCT2-AC
Y0~5
Y6, 7
Y8~11
WSZ-40MCT2-AC
Y0~5
Y6, 7
Y8~15
WSZ-60MCT2-AC
Y0~7
Expansion
Units/Modules
Y8~23
All output points
7.2 Single-End Output Circuit

Transistor output circuit is single-end output structure. A single-end output in each digital output (DO) takes up only one
terminal. But since any output device has two ends, the one end of several output devices have to be connected
together to one common point (called output common) for single-end output. Then each output point can output via this
common point. The more output device share a same common points, the more terminals are saved, while relatively
increasing the current running through the common point. Combination of any output common with its individual
single-end outputs are called a Common Output Block, which is available in 2, 4 and 8PTs (high-density module) in
WSZ controller. Each Common Output Block is separated from one another. The common terminal has a label initiated
with letter C, while its numbering is determined by the minimum Yn number which comprises the output block. In the
example of the figure below, the number of common terminal of output block Y2 and Y3 is C2, while the number of
common terminal of output Block Y4, Y5, Y6 and Y7 is C4. The various single-end common output circuits are
described below
H7-2
7.2.1
A.
Structure and Wiring of Single-End Transistor SINK Output Circuit

Transistor Single-End SINK Output
FBS-PLC
WSZ-controller
Y2
C2
Y3
Y4
C4
1A
FUSE
Y5
Y6
Y7
2A
FUSE
2PTs
Common Output Block
4PTs Common
Output Block
7.3 Speed Up the Single-End Transistor Output Circuit

With the SINK structure in single-end output transistor circuit, when the transistor switches from ON to OFF, the
junction capacitor between transistor CE electrodes should be charged to near the load voltage VDD before it can stop
the current running through the photocoupler inside the load, which increase the OFF time and decrease the response
speed. This problem can be solved by adding a Dummy load to accelerate charging rate and speed up the working
frequency of transistor output. For the transistor output, Dummy load that are added to the high- and medium-speed
transistor output and generate a load current of 20~50mA is adequate. For low speed transistor where its driving
capability (0.5A) but speed is concerned, adding a Dummy load only decreases its driving capability without any
significant improvement and hence is not recommended. The following diagram shows how to add a Dummy load to
SINK transistor output.
W S ZFB
- c oS -PLC
ntroller
Load
VD D
5~30
VD C
R
I
SIN K
I =
VDD
=20~50mA
R
H7-3
7.4 Output Device Protection and Noise Suppression in DO Circuit

Since the digital output circuit is mainly used for the ON/OFF switching operation, the output components such as
transistors can be deemed as kinds of switch components. Normally, counter-electromotive force voltages are
generated during the ON/OFF operation of these switch components. The effect of surge counter-electromotive force
voltages is particularly serious when heavy capacitive or inductive loads are incorporated, which may cause damage
to the output components or generate noises in other electronic circuits and equipment. Special consideration should
be given to transistors when they are used in high power applications or connected with capacitive or inductive loads
and are described in the following:
7.4.1
Protection of Transistor Output and Noise Suppression
The transistor output already includes Zener diode for counter-electromotive force, which is sufficient for low power
inductive load and medium frequency of ON/OFF application. In conditions of high power or frequent ON/OFF,
please construct another suppression circuit to lower noise interference and prevent voltage from exceeding the limit
or overheating that may damage the transistor output circuit.
Controller
relay output
PLC Relay
output
Inductive load
D : 1N4001 diode or
VDC
equivalent device
Suppress by a diode (for low power)

Controller
relay output
PLC Relay
output
Inductive load
D : 1N4001 diode or
ZD
VDC
equivalent device
ZD : 9V Zener, 5W
Suppress by a diode + Zener (high power and frequent ON/OFF)
H7-4
Chapter 8
Test Run, Monitoring and Maintenance

Warning
During maintenance, be sure to turn off the input power of controller in case the actions to touch any terminal
on controller, or insert and extract accessories (e.g., expansion ribbon cables) are required. Otherwise,
electric shock, short circuit, damaged controller or controller malfunction will be caused if the power is on.
8.1 Inspection after Wiring and before First Time Power on

Before power on, clean all unnecessary objects such as iron chippings and screws, and remove the dust cover sheet
that surround the WSZ-controller.
Make sure that the input power and controller required power is of the same type. When input power is AC power,
please pay attention to connect the hot wire (L) to the L terminal on controller and the ground wire (N) to the N
terminal. Mistakenly connect to terminals other than L and N will result in electric shock, serious damage or
malfunction.
Make sure the load power and controller output circuits are consistent. Connection of AC power to transistor output will
damage controller or result in malfunction.
Make sure the 24VDC input and polarities of SINK in transistor output are consistent with those of your existing wiring.
Any mismatch will result in failure of controller input and damage to the output circuit.
8.2 Test Run and Monitoring

The WSZ controller provides a convenient feature to Disable/Enable the I/O points by whole or individually. Namely,
while controller performs the normal logic scan operation and I/O refreshment, it does not update the status of the
disabled input points according to the actual external input. For the disabled output points, the result of logic scan cant
override the disable status of outputs, only the user can force the state to on or off in order to simulate its operation.
The user only needs to utilize the disable function combined with Monitor to achieve simulating the input or
WINPROLADDER and observe the result. Upon the finish the simulation, revert all the inputs or outputs to Enable state
will bring back normal operation. Refer the instructions of WINPROLADDER for the operation of RUN/STOP controller,
Disable/Enable I/O and monitoring of I/O status and content of register.
Warning
The disable function is to let the input or output status out of program control and switched to the control of
the user (tester) to freely set the disabled input or output to be ON or OFF. In normal controller operation,
when dealing with input or output with safety issues (such as upper/lower limit of detected input or output
emergency stop), the user must make sure whether it can be disabled or overridden to ON/OFF before
starting the disable or override control, to avoid damage to equipment or harm to people.
H8-1
8.3 LED Indicators on Controller Main Unit and Troubleshooting
"Xn" Xn
Input
Status Indicator
max.
400mA
24V OUT
S/S
X0
X2
X1
X4
X3
X6
X5
0
4
8
I2
Receive
Indicator"RX"
RX
X10
X8
X7
X12
X11
X9
X13
I 2 3
5 6 7
9 I0 I I
I3
"POW"
Power Indicator POW
IN ( X )
POW
PROGRAMMABLE
CONTROLLER
"RUN" RUN
Operation
Indicator
RUN
ERR
Transmit
Indicator" TX
TX"
TX
RX
OUT ( Y )
0 I 2 3
4 5 6 7
8 9
PORT0
IN
Error
Indicator
ERR
"ERR"
AC100~240V
Y1
C0
Y0
Y2
Y4
Y3
C2
Y5
C4
Y6
C6
Y8
Y7
Y9
SINK
SRCE
Output Status Indicator Yn or

"Yn"
error
Indicator (when ERR
occurs)
("ERR")
Power IndicatorPOW
After the controller is power on, with correct power source and wiring, thePOWLED indicator in the middle of the
controller nameplate will turn on, indicating that power supply is normal. If the indicator is not on, please try to
temporarily remove the wiring of 24VDC output power for Sensor. If the controller is back to normal, it means that the
load on the power for the 24VDC input circuit is too large so that controller enters overload low voltage protection mode.
(When controller enters overload low voltage protection mode, POW LED is off and there are slight and intermittent
low frequency hissing sounds, from which one can tell if the 24VDC power is overloaded or shorted.)
When the above method still cannot turn on thePOWLED, if it is confirmed that correct power input exists between
controller power input L/N terminals or +/- (DC power), please send the unit to your local distributor for repair.
Operation IndicatorRUN
As long as the CPU is working properly, in the STOP state, this indicator will go on and off for 2 seconds, respectively.
When its in the RUN state, the indicator will go on and off for 0.25 seconds, respectively. To make controller enter into
Run state, or switch from RUN to STOP state, it has to be done through the programmer (WINPROLADDER). Once
controller is set to RUN or STOP, it will keep that state even after power off. The only exception is, when using the ROM
PACK, no matter if its running or stopped before power off, controller will automatically enter RUN state (with correct
ROM PACK syntax check) when power is back. In normal operation of controller upon errors (e.g., errors in WDT timer
and program), controller will automatically switch to STOP state and light theERRerror indicator. If it is a minor error,
the RUN state can be resumed as long as the power is back after an outage. In case of serious errors, the controller
cannot be operated again with the programmer until the problem is solved. If controller cannot be resumed to RUN state
after all, please send it to your local distributor for repair.
Error IndicatorERR
In normal controller operation, either in RUN or STOP state, this indicator will not show any signal (off). If it is on, it
means that the system has an error (e.g., WDT time-out, program error, communication error, etc.)
If it is constantly on, please reset the power. If the situation is still the same, it implies a hardware failure in CPU and has
to be sent to the distributor for repair.
When the ERR indicator flashes with a 0.5 sec interval, it means that some anomaly occurs to controller. At the same
time, status indicators Y0~Y3 switch to serve as indications of 15 error codes (the corresponding outputs are disabled),
which are described in the following
H8-2
Y3
Y2
Y1
Y0
Error
Code
Description
Application program contains the functions not supported by this

CPU
Mismatch of controller ID VS. program ID
Check sum error in LADDER program
System STACK abnormal
Watch-Dog occurs
Exceed main unit I/O
Syntax check error occurs
Expansion I/O modules over limit
Expansion I/O points over limit
10
System FLASH ROM CRC error
11
Reserved
12
Reserved
13
Reserved
14
Reserved
15
Reserved
Indicator on Transmit/Receive of Built-In Communication Port (Port0) TXRX

These two LED indicators are used for the status of transmit/receive of the built-in communication port (Port0). The RX
indicator (green) is for indication when controller receives external signals, while the TX indicator (red) is for indication
when controller transmits signals, both of which are very helpful in monitoring communication condition and debugging.
When controller communicates with external equipment (computer, programmer, intelligent peripherals, etc.), Port0 can
only be used in slave mode (Port1~2 can be used in master mode). Therefore, during its operation, controller must first
receive external signals (RX on) before it can transmit signals back to external equipment (TX on now). When the
communication is fail, one can tell if its controller is not receiving signals or controller is not replying by looking at the
these two indicators. The currents in these two LED are constant and their lighting duration is proportional to the
reception or transmission time. The more received/transmitted data or the slower (bps) reception/transmission, the
longer the reception/transmission time and so is the indication time (brighter visually). If in high speed but small amount
of data, only short and dim brightness is observed. Therefore, the communication condition can be easily distinguished
by these two indicators.
Indicator of Input StatusXn

When external input Xn is ON, the corresponding LED indicator Xn will be on, otherwise it will be off. If it fails to respond
to external input, please check if the terminal wiring is securely connected, or measure the voltage betweenXnand
commonCto see if it has a change of 0V/22V with ON/OFF of input. If it does, it means that an error occurs in
controller input circuit or LED indicator. Or you can locate the problem by using the monitor mode of the programmer to
check if this input status works correspondingly with the external input state.
Indicator of Output StatusYn

When the Yn output of controller is ON, its corresponding output indicator will also be on and its external load will be ON.
If ON/OFF condition of external load is inconsistent with output indicator, please check the wiring of the load, power, and
terminal for secure connection. If the connection is good, then it should be the controller output component failure. The
main reasons to cause the output component failure are:
overload or short circuit that burns output component and results in permanent open or short circuit.
H8-3
Not overloaded, but Inrush current from capacitive load welds relay contacts atON, resulting in permanent ON, or
burns transistor, resulting in permanent ON or OFF.
Not overloaded, but the inductive load without proper snubber circuit causes high voltage sparks between relay contact
atOFFand generate carbon deposition, which separates contacts and causes permanent OFF or intermittent ON/OFF,
or punches through transistor with high voltage, resulting in permanent ON or OFF.
8.4 Maintenance
WSZ controller itself has no user serviceable parts and all maintenance has to be conducted by professional personnel.
During use, in case of any defective unit, please first try to find out the defect from the above error codes on the main unit,
followed by performing maintenance over the entire unit or on the Board level. Send the unit that is still not functioning
well to local distributors.
8.5
The Charge of Battery & Recycle of Used Battery
Every WSZ controller main units have inside one re-chargeable lithium battery to safely maintain program and data during
main power shut down. Each lithium battery was fully charged when the WSZ controller ship out from the factory capable
to retain program and data at least 6 months. There is risk to miss program and data when battery exhaust over 6 months,
the users should mind the date marked on each WSZ controller.
In case exceeding 6 months, users can do battery re-charging by themselves through keeping WSZ controller be
powered for over 12 hours then more 6 months can work smoothly on the data saving.
Warning
Any recharge, disassembly, heating, burning on defective or discarded battery is prohibited.
Otherwise may cause danger of explosion or fire. The chemical material of battery will lead to
environment pollution, easily throw away or treat as normal garbage is prohibited. Please
follow after the local or governments regulation to make proper treatment on discard battery.
H8-4
Instruction
Chapter 1 PLC Ladder Diagram
In this chapter, we would like to introduce you the basic principles of ladder diagram. If you are familiar with PLC Ladder
Diagram, you may skip this chapter.
1.1 The Operation Principle of Ladder Diagram

Ladder Diagram is a type of graphic language for automatic control systems it had been used for a long period since World
War II. Until today, it is the oldest and most popular language for automatic control systems. Originally there are only few
basic elements available such as A-contact (Normally OPEN), B contact (Normally CLOSE), output Coil, Timers and
Counters. Not until the appearance of microprocessor based PLC, more elements for Ladder Diagram, such as differential
contact, retentive coil (refer to page 1-6) and other instructions that a conventional system cannot provide, became
available.
The basic operation principle for both conventional and PLC Ladder Diagram is the same. The main difference between the
two systems is that the appearance of the symbols for conventional Ladder Diagram are more closer to the real devices,
while for PLC system, symbols are simplified for computer display. There are two types of logic system available for Ladder
Diagram logic, namely combination logic and sequential logic. Detailed explanations for these two logics are discussed
below.
1.1.1 Combination Logic

Combination logic of the Ladder Diagram is a circuit that combines one or more input elements in series or parallel and then
send the results to the output elements, such as Coils, Timers/Counters, and other application instructions.
Actual wiring diagram

AC110V
AC110V
X0
X0
Y0
Y0
X1
X1
Y1
Circuit 1
NO(A)
NC(A)
Y1
Circuit 2
NC(B)
NC(B)
X4
X4
X2
X2
Circuit 3
NC
NC
NO
X3
X3
NO
NO
NO
1-1
Y2
Y2
Conventional Ladder Diagram

X0
PLC Ladder Diagram
Y0
circuit 1
circuit 1
X1
Y1
circuit 2
circuit 3
X0
Y0
X1
Y1
circuit 2
X2
X4
X2
Y2
X4
Y2
circuit 3
X3
X3
The above example illustrated the combination logic using the actual wiring diagram, conventional Ladder Diagram, and
PLC Ladder Diagram. Circuit 1 uses a NO (Normally Open) switch that is also called "A" switch or contact. Under normal
condition (switch is not pressed), the switch contact is at OFF state and the light is off. If the switch is pressed, the contact
status turns ON and the light is on. In contrast, circuit 2 uses a NC (Normally Close) switch that is also called "B" switch or
contact. Under normal condition, the switch contact is at ON state and the light is on. If the switch is pressed, the contact
status turns OFF and the light also turns off.
Circuit 3 contains more than one input element. Output Y2 light will turn on under the condition when X2 is closed or X3
switches to ON, and X4 must switch ON too.
1.1.2 Sequential Logic

The sequential logic is a circuit with feedback control; that is, the output of the circuit will be feedback as an input to the
same circuit. The output result remains in the same state even if the input condition changes to the original position. This
process can be best explained by the ON/OFF circuit of a latched motor driver as shown in below.
Actual wiring diagram
AC110V
AC110V
~
STARTswitch
switch
START
X5
X5
NO
NO
Relay
Relay
STOP switch
STOP
switch
Y3
X6
X6
Contact
Contact22
NC
NC
Contact 11
Contact
Motor
Motor
1-2
Conventional Ladder Diagram

X5
X6
PLC Ladder Diagram

X5
Y3
X6
Y3
Y3
Y3
When we first connect this circuit to the power source, X6 switch is ON but X5 switch is OFF, therefore the relay Y3 is OFF.
The relay output contacts 1and 2 are OFF because they belong to A contact (ON when relay is ON). Motor does not run. If
we press down the switch X5, the relay turns ON as well as contacts 1and 2 are ON and the Motor starts. Once the relay
turns ON, if we release the X5 switch (turns OFF), relay can retain its state with the feedback support from contact 1 and it
is called Latch Circuit. The following table shows the switching process of the example we have discussed above.
X5 switch
(NO)
X6 switch
(NC)
MotorRelaystatus
Released
Released
OFF
Pressed
Released
ON
Released
Released
ON
Released
Pressed
OFF
Released
Released
OFF
From the above table we can see that under different stages of sequence, the results can be different even the input
statuses are the same. For example, lets take a look at stage c and stage e , X5 and X6 switches are both released, but
the Motor is ON (running) at stage e and is OFF (stopped) at stage c . This sequential control with the feedback of the
output to the input is a unique characteristic of Ladder Diagram circuit. Sometimes we call the Ladder Diagram a "Sequential
Control Circuit" and the PLC a "Sequencer. In this section, we only use the A/B contacts and output coils as the example.
For more details on sequential instructions please refer to chapter 5 - "Introduction to Sequential Instructions."
1.2 Differences Between Conventional and PLC Ladder Diagram

Although the basic operation principle for both conventional and PLC Ladder Diagram are the same, but in reality, PLC uses
the CPU to emulate the conventional Ladder Diagram operations; that is, PLC uses scanning method to monitor the
statuses of input elements and output coils, then uses the Ladder Diagram program to emulate the results which are the
same as the results produced by the conventional Ladder Diagram logic operations. There is only one CPU, so the PLC has
to sequentially examine and execute the program from its first step to the last step, then returns to the first step again and
repeats the operation (cyclic execution). The duration of a single cycle of this operation is called the scan time. The scan
time varies with the program size. If the scan time is too long, then input and output delay will occur. Longer delay time may
cause big problems in controlling fast response systems. At this time, PLCs with short scan time are required. Therefore,
scan time is an important specification for PLCs. Due to the advance in microcomputer and ASIC technologies nowadays
the scan speed has been enhanced a great deal. The following diagram illustrates the scanning process of a PLC Ladder
Diagram.
1-3
Input processing (Reading the

status of all external input terminals)
X0
First
step
Y0
X1
PLC sequentially executes

the stored program and
M100
X3
X100
M505
X10
Y1
gets new output results

(has not sent to external
terminals yet)
Cyclic execution
Y0
Y126
Last step
Output processing (Output the resulting

signals to external output terminals)
Besides the time scan difference mentioned above, the other difference between the conventional and PLC Ladder
Diagram is Reverse flow characteristic. As shown in the diagram below, if X0, X1, X4 and X6 are ON, and the remaining
elements are OFF. In a conventional Ladder Diagram circuit, a reverse flow route for output Y0 can be defined by the
dashed line and Y0 will be ON. While for PLC, Y0 is OFF because the PLC Ladder Diagram scans from left to right, if X3 is
off then CPU believes node a is OFF, although X4 and node b are all ON, since the PLC scan reaches X3 first. In other
words, the PLC ladder can only allow left to right signal flow while conventional ladder can flow bi-directional.
Reverse flow of conventional Ladder diagram

X0
X0
X3
X3
X1
X1
aa
X4
X4
X2
X2
X6
1-4
X5
X5
Y0
1.3 Ladder Diagram Structure and Terminology

Sample Ladder Diagram
Element
Element
Node
Node
Parallel
block
Parallel block
Serial block
Serial
block
X2
X3
X4
X4
X10
X10
X9
Origin line
Origin
line
X0
X0
X1
X7
X5
X5
X6
X6
Y2
Y2
Branch
Branch
Network 1
Network
X10
Y0
Y0
X11
X11
Y4
Y4
Y4
X12
Network 2
Network
M1
M1
X14
X14
Y5
Y5
X20
X20
Y0
Y0
Network
Network 33
M6
M6
X16
(RemarkThe maximum size of WSZ-controller network is 16 rows X 22 columns)

As shown above, the Ladder Diagram can be divided into many small cells. There are total 88 cells (8 rows X 11 columns)
for this example Ladder Diagram. One cell can accommodate one element. A completed Ladder Diagram can be formed by
connecting all the cells together according to the specific requirements. The terminologies related to Ladder Diagram are
illustrated below.
1. Contact
Contact is an element with open or short status. One kind of contact is called "Input contact"(reference number prefix with X)
and its status reference from the external signals (the input signal comes from the input terminal block).The relation
between the reference number and the contact status depends on the contact type. The contact elements provided by WSZ
series controller include: A contact, B contact, up/down differential contacts and Open/Short contacts. Please refer to for
more details.
2. Origin-line: The starting line at the left side of the Ladder Diagram.
3. Element: Element is the basic unit of a Ladder Diagram. An element consists of two parts as shown in the diagram below.
One is the element symbol which is called OP Code and another is the reference number part which is called
Operand.
Operand
Y15
X100
OP Code
1-5
Element type
Symbol
A Contact
Normally OPEN
B Contact
Normally CLOSE
Up Differential Contact
Down Differential Contact
Remark
can be XYMSTCplease
refer to section 3.2
can be XYMS
Open Circuit Contact

Short Circuit Contact
Output Coil
can be YMS
Inverse Output Coil

Latching Output Coil
Y
L
Remarkplease refer to section 3.2 for the ranges of XYMST and C contacts. Please refer to section 5.2 for the
characteristics of XYMST and C contacts.
There are three special sequential instructions, namely OUT TRn, LD TRn and FOn, which were not displayed on the
Ladder Diagram. Please refer to section 5.1.4 Function Output FO.
4. Block: a circuit consists of two or more elements.
There are two basic types of blocks:
Serial blockTwo or more elements are connected in series to form a single row circuit.
Example:
Parallel block: Parallel block is a type of a parallel closed circuit formed by connecting elements or serial blocks in
parallel.
Example:
Remark: Complicated block can be formed by the combination of the single element, serial blocks and parallel
blocks. When design a Ladder Diagram with mnemonic entry, it is necessary to break down the circuits into
element, serial, and parallel blocks. Please refer to section 1.5.
1-6
Branch: In any network, branch is obtained if the right side of a vertical line is connected with two or more rows of
circuits.
Example:
Branch
Merge line is defined as another vertical line at the right side of a branch line that merges the branch circuits into a
closed circuit (forming a parallel block). This vertical line is called Merge line.
Branch line
Merge line
If both the right and the left sides of the vertical line are connected with two or more rows of circuits, then it is both a
branch line and a merge line as shown in the example below.
Example:
Parallel block 1
Block 1 merge line
Parallel block 2
Block 2 branch line
Network: Network is a circuit representing a specified function. It consists of the elements, branches, and blocks.
Network is the basic unit in the Ladder Diagram which is capable of executing the completed functions, and the
program of Ladder Diagram is formed by connecting networks together. The beginning of the network is the
origin line. If two circuits are connected by a vertical line, then they belong to the same network. If there is no
vertical line between the two circuits, then they belong to two different networks. Figure 1, shows three (13)
networks.
1-7
Chapter 2
WSZ-Controller Memory Allocation
2.1 WSZ-Controller Memory Allocation

Remark:
SRAM
X0
X(256)
X255
Y255
T255
Y255
T255
C0
C(256)
TR(40)
X255
T0
T(256)
DISCRETE
STATUS
AREA
(4096)
X0
Y0
Y(256)
1. When the Read Only Register (ROR)
FBS-PACK
WSZ-PACK
contents of R5000R8071 (depends
T0
on the quantity of configuration) will
C0
be loaded from the ROR's during
Save status
C255
each time of power up or changing
C255
Load status
S0
S0
S(1000)
S999
S999
M0
has been configured by the user, the
Y0
M0
from STOP to RUN mode.

The user can access the ROR through
the corresponding R5000R8071.
Write operation of function
M(2002)
instructions are prohibited in this

M2001
T(256)
C(256)
M2001
T0
ROR area of corresponding R5000
T255
C0
T255
C0
R8071. The others of R5000R8071
C255
R0
C255
R0
that have not been configured for
T0
ROR, they can work as general
R(3840)
purpose registers.
R3839
REGISTER
AREA
(20040W)
R3839
D0
D0
D(4096)
IR , OR
SR(328)
R or ROR
(3072)
Load Register
Read Only Register.
D4095
D4095
R3840
R3840
ROR can be configured up to 3072
R4167
R4167
R5000
R5000
words in maximum.
F0
F0
F8191
F8191
LADDER
PROGRAM
(20KW)
LADDER
PROGRAM
(20KW)
F(8192)
Save Program
LADDER
PROGRAM
AREA
(32KW)
2. There is a dedicated area of program

memory to store the contents of
Save Register
LABEL
(1KW)
LABEL
(1KW)
Load Program
ROR
(3KW)
ROR
(3KW)
DOC
(8KW)
DOC
(8KW)
Memory
Buffer
in in
controller
Memory
Buffer
PLC
PP/Winproladder
2-1
2.2 Digital and Register Allocations

* is default, user configurable
Typee
Symbol
Item
Range
Remarks
Digital Bit Status
Digital Input (DI)
X0X255 (256)
Digital Output (DO)
Y0Y255 (256)
TR
Temporary Relay
TR0TR39 (40)
For branched points
M0M799 (800)*
M1400M1911 (512)
M0M1399 configurable as
Internal
Relays
M800M1399 (600)*
M1911 are fixed to Non-retentive
Non-Retentive
Retentive
Non-Retentive
S0S499 (500)*
S20 S499 configurable as Retentive
Retentive
S500S999 (500)*
S500S999 configurable as Non-retentive
Step
Relays
Timer contact status
T0T255 (256)
Counter contact status
C0C255 (256)
TMR
0.01STime Base
T0 T49 (50)*
0.1S Time Base

1S Time Base
T50T199 (150)*
T200T255 (56)*
The quantity of
each time base can be configured
Retentive
C0C139 (140)*
Configurable as Non-retentive
Non-Retentivee
C140C199 (60)*
Configurable as Retentive
32-bit
Retentive
C200C239 (40)*
Configurable as Non-retentive
Non-Retentive
C240C255 (16)
Configurable as Retentive
Retentive
R0R2999 (3000)*
D0D3999 (4000)
Non-Retentive
R3000R3839 (840)*
DR
or
HR
Data
Registers
IR
Input Registers
R3840R3903 (64)
Map to external AI Register input
OR
Output Registers
R3904R3967 (64)
Map to external AO /Register output
System Special Registers
R3968 R4167 (200)

D4000 D4095 (96)
High-Spped Timer Register
R4152R4154 (3)
Special Register
Register Word Data
16-bit
CTR
CV of
Counter
Register
Non-retentive or Retentive, M1400
M1912M2001 (90)
Special Relay
CV of
Timer
Register
Mapping to external digital I/O
HSC
Registers
Hardware (4sets)
DR4096 DR4110
Software(4sets)
DR4112DR4126
Minute
Second
R4129
R4128
Day
Hour
R4131
R4130
Year
Month
R4133
R4132
Calendar
Registers
Week
R0R3839 configurable as
Non-retentive or Retentive,
D0D3999 are fixed to Retentive
R4134
DR
or
ROR
Data Registers
R5000R8071(3072)*
As general purpose registers if ROR not
Read Only Registers
R5000R8071(0)*
Configurable as ROR for recipe like
FR
File Registers
F0F8191(8192)
Need dedicated instruction to access
XR
Index Registers
V,Z (2), P0 P9 (10)
2-2
been configured.
application
Remark:
During power up or changing operation mode from STOPRUN, all contents in non-retentive relays or
registers will be cleared to 0; the retentive relays or registers will remain the same state as before.
2.3 Special Relay Details

Relay No.
Function
Description
1. Stop, Prohibited Control

M1912
Emergency Stop control
y If ON, controller will be stopped (but not enter STOP mode) and
all outputs OFF.
This bit will be cleared when power up or changing operation
mode from STOPRUN.
M1913
Disable external outputs control
y All external outputs are turn off but the

status of Y0Y255 inside the controller will not be affected.
M2001
Disable/Enable status retentive control yIf M2001 is 0 or enabled, the Disable/Enable status of all
contacts will be reset to enable during power up or changing
operation mode from STOPRUN.
yIf M2001 is disabled and force ON, the Disable/Enable status &
ON/OFF state of all contacts will remain as before during power
up or changing operation mode from STOPRUN.
While testing, it may disable and force ON M2001 to keep the
ON/OFF state of disabled contacts, but dont forget to enable
the M2001 after testing.
2. CLEAR Control
M1914
Clear Non-Retentive Relays
y Cleared When at 1
M1915
Clear Retentive Relays
y Cleared When at 1
M1916
Clear Non-Retentive Registers
y Cleared When at 1
M1917
Clear Retentive Registers
y Cleared When at 1
M1918
Master Control (MC) Selection
y If 0, the pulse activated functions within the master control loop

will only be executed once at first 01 of master control loop.
If 1, the pulse activated functions within the master control loop
will be executed every time while changing 01 of master
control loop.
M1919
Function output control
yIf 0, the functional outputs of some function instructions will

memory the output state, even these instructions not been
executed.
If 1, the functional output of some function instructions without
the memory ability.
M1918/M1919 can be set to 0 or 1 at will around the whole program to meet the control requirements.
2-3
Relay No.
Function
Description
3. Pulse Signals
M1920
0.01S Clock pulse
"1"
M1921
0.1S Clock pulse
"0"
M1922
1S Clock pulse
M1923
60S Clock pulse
M1924
Initial pulse (first scan) d
T(M1920)=0.01S
T(M1921)=0.1S
T(M1922)=1S
T is the pulse period
T(M1923)=60S
"RUN"
"STOP"
M1925
Scan clock pulses e
M1926
Reserved
e M1925
M1927
CTS input status of communication

port 1
d M1924
t
t is the scan time

t
y 0CTS True (ON)

y 1CTS False (OFF)
y When communication port 1 is used to connect with the printer
or modem, it can use this signal and a timer to detect whether
the printer or the modem is ready.
4. Error Messages
M1928
Reserved
M1929
Reserved
M1930
No expansion unit or exceed the limit y 1: Indicating no expansion unit or exceed the limit on number of
on number of I/O points
I/O points
M1931
Immediate I/O not in the main unit

range
M1932
Unused
M1933
System stack error
y 1: Indicating that Immediate I/O not in the main unit range and
the main unit cannot RUN
y 1: Indicating that system stack error
M1934
Reserved
M1935
2-4
Relay No.
Function
Description
5. HSC0/HSC1 Controls (MC/MN)

M1940
HSC0 software Mask
y 1: Mask
M1941
HSC0 software Clear
y 1: Clear
M1942
HSC0 software Direction
y 0: Count-up, 1: Count-down
M1943
Reserved
M1944
Reserved
M1945
Reserved
M1946
HSC1 software Mask
y 1: Mask
M1947
HSC1software Clear
y 1: Clear
M1948
M1949
Reserved
M1950
Reserved
M1951
Reserved
6. RTC Controls
M1952
M1953
RTC setting
30 second Adjustment
M1954
RTC installation checking
M1955
Set value error
7. Communication/Timing/Counting Controls
M1956
Selection of Message Fame Interval

Detection Time
y 0Use system default value as Message Fame Interval Detection

Time for Modbus RTU communication protocol
y 1Use the high byte value of R4148 as Message Fame Interval
Detection Time for Modbus RTU protocol
M1957
The CV value control after the timer

"Time Up"
y 0: The CV value will continue timing until the upper limit is met
after Time Up
y 1: The CV value will stop at the PV value after Time Up (User
may control M1957 within the program to control the individual
timer )
M1958
Communication port 2 High Speed
y 0: Set Port 2 to Normal Speed Link
Link mode selection
y 1: Set Port 2 to High Speed CPU Link
Modem dialing signal selection
y 0: Dialing by TONE when Port 1 connecting with Modem.
M1958 is only effective at slave station

M1959
y 1: Dialing by PULSE when Port 1 connecting wit

Modem.
M1960
Port 1 busy indicator
y 0Port 1 Busy
y 1Port 1 Ready
M1961
Port 1 finished indicator
y 1Port 1 finished all communication transactions
M1962
Port 2 busy indicator
y 0Port 2 Busy
y 1Port 2 Ready
M1963
Port 2 finished indicator
y 1Port 2 finished all communication transactions
M1964
Modem dialing control
y If Port 1 is connected with Modem,

when signal 01 will dial the phone number;
when signal 10 will hang-up the phone.
2-5
Relay No.
Function
Description
M1965
Dialing success flag
y 1: Indicating that dialing is successful (when Port 1 is connected

with Modem).
M1966
Dialing fail flag
y 1: Indicating that dialing has failed (when Port 1 is connected

with Modem).
M1967
Port 2 High Speed Link working

mode selection
y 0: Continuous cycle.
y 1: One cycle only. It will stop when the last communication
transaction is completed (only effective at the master
station).
M1968
Step program status
y 1: Indicating that there are more than 16 active steps in the step
program at the same time.
M1969
Indirect addressing illegal write flag
y 1: Indicating that a function with index addressing attempts to

write cross over the boundary of different type of data.
M1970
Port 0 status
y 1: Port 0 has received and transmitted a message
M1971
Port 1 status
y 1: Port1 has received and transmitted a message
M1972
Port 2 status
y 1: Port2 has received and transmitted a message
M1973
The CV value control after counting

Count-Up
y 0: Indicating that the CV value will continue counting up to the

upper limit after Time-Up.
y 1: Indicating that the CV value will stop at the PV value after
Count-UpUser may control M1973 within the program to
control the individual counter
M1974
M1975
RAMP function (FUN95) slope

control
y 0: Time control for ramping
CAM function (FUN112) selection
y 1: For the circular applications where the electric CAM switch

(FUN112) can support the wrap around situation like the
angle from 359 cross to 0
y 1: Equivalent slope control for ramping
8. HSC2HSC7 Controls
M1976
HSC2 software Mask
y 1: Mask
M1977
HSC2 software Clear
y 1: Clear
M1978
M1979
HSC3 software Mask
y 1: Mask
M1980
HSC3 software Clear
y 1: Clear
M1981
M1982
HSC4 software Mask
y 1: Mask
M1983
M1984
HSC5 software MASK
y 1: Mask
M1985
M1986
HSC6 software Mask
y 1: Mask
M1987
M1988
HSC7 software Mask
y 1: Mask
M1989
M1990
Reserved
2-6
Relay No.
Function
Description
9. PSO0PSO3 Controls
M1991
M1992
Selection of stopping the pulse output y 0Immediately stop while stopping pulse output
(FUN140)
y 1Slow down stop while stopping pulse output
PSO0 Busy indicator
y 0PSO0 Busy
y 1PSO0 Ready
M1993
PSO1 Busy indicator
y 0PSO1 Busy
y 1PSO1 Ready
M1994
PSO2 Busy indicator
y 0PSO2 Busy
y 1PSO2 Ready
M1995
PSO3 Busy indicator
y 0PSO3 Busy
y 1PSO3 Ready
M1996
PSO0 Finished indicator
y 1PSO0 finished the last step of motion
M1997
M1998
M1999
M2000
Selection of Multi-Axis
y 1: Synchronized Multi-Axis
synchronization for High Speed Pulse

Output (FUN140)
2-7
2.4 Special Registers Details
Register No.
R3840
R3903
R3904
R3967
R3968
R3999
Function
Description
For Analog inputs
Input Registers
CH0 : R3840
CH63 : R3903
For Analog outputs
Output Registers
CH0 : R3904
CH63 : R3967
Raw Temperature Registers
For temperature measurement
TP0 : R3968
TP31 : R3999
R4000
Reserved
R4001
Reserved
R4002
Reserved
R4003
Reserved
R4004
Reserved
R4005
High BytePeriod of PWM
For PID temperature control
=0, 2 seconds
=1, 4 seconds
=2, 8 seconds
=3, 1 second
=4, 16 seconds
5, 32 seconds
Low BytePeriod of PID calculation
=0, 2 seconds
=1, 4 seconds
=2, 8 seconds
=3, 1 second
=4, 16 seconds
5, 32 seconds
R4006
Threshold value of output ratio for
heating/cooling loop abnormal detecting (Unit

in %)
R4007
Threshold value of continuous time for
heating/cooling loop abnormal detecting (Unit

in second)
R4008
Maximum temperature for heating loop
abnormal detecting
R4009
Reserved
2-8
Register No.
Function
Description
R4010
Each bit represents 1 sensor,
Installed temperature sensor flag
if bit value = 1 means installed.
R4011
R4012
Each bit represents 1 temperature point, if bit value =

1 means enable control.
PID Temperature control flag
R4013
R4014
Reserved
R4015
Averaging of temperature value

=0, no average on temperature
=1, average by two readings
=2, average by four readings
=3, average by eight readings
=4, average by sixteen readings
R4016
Reserved
R4017
Reserved
R4018
Reserved
R4019
Reserved
R4020
Reserved
R4024
R4025
Total Expansion Input Registers
R4026
Total Expansion Output Registers
R4027
Total Expansion Digital Inputs
R4028
Total Expansion Digital Outputs
R4029
Reserved for system

When the ROM Pack being used to save the ladder
R4030
R4039
program and data registers, these tables describes
Tables to save or read back the data
which registers will be written into the ROM Pack.
registers into or from ROM Pack
The addressed registers will be initialized from ROM

Pack while power up.
R4046
Power up initialization mode selection of data =5530H: Dont initialize the addressed data registers
registers that has been written into ROM
been written into ROM Pack while power up
Pack.
=Others : initialize the addressed data registers been
Communication protocol setting for Port1
Set the Modbus RTU communication protocol
written into ROM Pack while power up

R4047
Port2
R4049
CPU Status Indication
=A55AH, Force CPU RUN

=0, Normal Stop
=1, Function(s) existed that CPU does not support
=2, Controller ID not matched with Program ID
=3, Ladder checksum error
=4, System STACK error
=5, Watch-Dog error
=6, Immediate I/O over the CPU limitation
=7, Syntax not OK
2-9
Register No.
Function
Description
=8, Qty of expansion I/O modules exceeds
=9, Qty of expansion I/O points exceeds
=10, CRC error of system FLASH ROM
R4050
Port 0 Communication Parameters Register
R4051
Reserved
R4052
Indicator while writing ROM Pack
R4053
Reserved
R4054
Define the master station number
Set Baud Rate of Port 0
of the High-Speed CPU Link network
If the master station number is 1,it can ignore this

register.
(FUN151 Mode 3)
To set the master station number other than 1 should:

Low Byte : Station number
High Byte: 55H
R4055
y If high byte is not equal 55H, R4055 will show the

station number of this controller
Controller station number
y If want to set controller station number then R4055

should set to:
Low Byte : Station number
High Byte: 55H
R4056
High Byte :Reserved

Low Byte: High speed pulse output frequency Low Byte: =5AH, can dynamically change the output
dynamic control
frequency of High Speed Pulse Output
R4057
Power off counter
The value will be increased by 1 while power up
R4058
Error station number while Port 2 in High
Used by FUN151 Mode 3 of Port 2
Speed CPU Link

R4059
Error code while Port 2 in High Speed CPU
Used by FUN151 Mode 3 of Port 2
LINK mode
R4059
High byte
Low Byte
Err code
Err count
Error code 0AH, No response

01H, Framing Error
02H, Over-Run Error
04H, Parity Error
08H, CRC Error
2 - 10
Register No.
R4060
Function
Description
The error codes are:
Error code of PSO 0
1: Parameter 0 error
30: Speed setting reference number error
31: Speed value error
32: Stroke setting reference number error
33: Stroke value error
34: Illegal positioning program
35: Step over
36: Step number exceeds 255
37: Highest frequency error
38: Idle frequency error
39: Movement compensation value too large
40: Movement value exceeds range
41: DRVC instruction not allow ABS addressing
R4061
Error code of PSO 1
Same as above
R4062
Error code of PSO 2
Same as above
R4063
Error code of PSO 3
Same as above
R4064
PSO 0
R4065
Being completed step number of positioning
PSO 1
R4066
program
PSO 2
R4067
PSO 3
R4068
Reserved
R4071
R4072
Low Word of PSO 0
R4073
High Word of PSO 0
R4074
Low Word of PSO 1
R4075
R4076
High Word of PSO 1

Pulse count remaining for output
Low Word of PSO 2
R4077
High Word of PSO 2
R4078
Low Word of PSO 3
R4079
High Word of PSO 3
R4080
Low Word of PSO 0
R4081
High Word of PSO 0
R4082
Low Word of PSO 1
R4083
Current output frequency
High Word of PSO 1
R4084
Low Word of PSO 2
R4085
High Word of PSO 2
2 - 11
Register No.
Function
Description
R4086
Low Word of PSO 3
R4087
High Word of PSO 3
R4088
Low Word of PSO 0
R4089
High Word of PSO 0
R4090
Low Word of PSO 1
R4091
Current pulse position
High Word of PSO 1
R4092
Low Word of PSO 2
R4093
High Word of PSO 2
R4094
Low Word of PSO 3
R4095
High Word of PSO 3
R4096
HSC0 current value Low Word
R4097
HSC0 current value High Word
R4098
HSC0 preset value Low Word
R4099
HSC0 preset value High Word
R4100
R4101
R4102
R4103
R4104
R4105
R4106
R4107
R4108
R4109
R4110
R4111
R4112
R4113
R4114
R4115
R4116
R4117
R4118
R4119
R4120
R4121
R4122
R4123
R4124
R4125
R4126
R4127
R4128
Second of calendar
R4129
Minute of calendar
2 - 12
Register No.
Function
R4130
Hour of calendar
R4131
Day of calendar
R4132
Month of calendar
R4133
Year of calendar
R4134
Day of week of calendar
R4135
Reserved
Description
R4136
Current scan time
y Error < 1ms
R4137
Maximum scan time
y Re-calculate when controller changes from STOP to
R4138
Minimum scan time
R4139
RUN
CPU Status
Bit0 =0, Controller STOP

=1, Controller RUN
Bit1 , Reserved
Bit2 =1, Ladder program checksum error
Bit3 =0, Without ROM Pack
=1, With ROM Pack
Bit4 =1, Watch-Dog error
Bit5 =1, MA model main unit (Not used)
Bit6 =1, With ID protection
Bit7 =1, Emergency stop
Bit8 =1, Immediate I/O over range
Bit9 =1, System STACK error
Bit10 =1, ASIC failed
Bit11 =1, Function not allowed
Bit12 , Reserved
Bit13 =1, With communication board
Bit14 =1, With calendar
Bit15 =1, MC main unit
R4140
R4141
R4142
Telephone Number
R4143
R4144
R4145
2 - 13
Register No.
R4146
R4147
Function
Description
Port 1 Communication Parameters
Set Baud Rate, Data bit of Port 1
Register
Transmission Delay & Receive
Time-out interval time Setting,
Low BytePort 1 Receive Time-out interval time

(Unit in 10ms)
while Port 1 being used as the master of
High BytePort 1 Transmission Delay
FUN151 or FUN150
R4148
(Unit in 10ms)
Message Frame Detection Time Interval
.While the communication port being used as the master or

slave of Modbus RTU protocol, the system will give the
default time interval to identify each packet of receiving
message; except this, the user can set this time interval
through the high byte setting of R4148 and let M1956 be
1, to avoid the overlap of different packet of message
frame.
M1956=1, High Byte of R4148 is used to set the new
message detection time interval for Port 1Port 2 (Unit
in ms)
.While the communication port being used to communicate
with the intelligent peripherals through FUN151
instruction, if the communication protocol without the end
of text to separate each packet of message frame, it
needs message detection time interval to identify the
different packet. High byte of R4148 is used for this
setting for Port 1Port 2.
(Unit in ms)
R4149
Modem Interface Setting & Port0

without checking of station number for
Original external communication protocol
y High Byte of R4149:

=55H, Remote-Diagnosis/Remote-CPU-Link
by way of Port 1 through Modem
connection, it supports user
program controlled dial up function
=AAH, Remote diagnosis by way of Port 1
through Modem connection, it
supports Passive receiving & Active
dialing operation mode
=Others, without above function
y Low Byte of R4149:
=1, Port 0 without checking of station number
for Original external
communication protocol (communicating with
HMI/SCADA)
=Others, Port 0 checks station number, it allows
multi-drop network for data acquisition.
R4150
Power on I/O service delay time setting
y Controller is ready for I/O service after this delay time

while power up. The unit is in 0.01s. The default value is
100.
R4151
Circular 1mS time base timer
y The content of R4151 will be increased by 1 every 1ms.

It can be used for a more precise timing application.
R4152
Low word of HSTA CV register
HSTA is high speed timer in 0.1 ms resolution.
R4153
High word of HSTA CV register
R4154
PV register of HSTA
The HSTA can act as 32-bit cyclic timer or fixed time

interrupt timer.
2 - 14
Register No.
R4155
Function
Description
Port 1 & Port 2 without station number

checking for original external
communication protocol

=1, Port 1 without station number
(communicating with HMI/SCADA)
=Others,Port 1 checks station number, it allows
multi-drop network for data acquisition
=1, Port 2 without station number
(communicating with MMI/SCADA)
=Others,Port 2 checks station number, it allows
multi-drop network for data acquisition
R4157
R4158
R4159
System used
Set Baud Rate, Data bitof Port 2

Register
(Not for High Speed CPU Link)
Transmission Delay & Receive
Time-out interval time Setting,
Low BytePort 2 Receive Time-out interval time

(Unit in 10ms)
while Port 2 being used as the master of
High BytePort 2 Transmission Delay

(Unit in 10ms)
FUN151 or FUN150
R4160
Port2 RX/TX time out setting for High
High Byte of R4160 :
Speed CPU Link
=56H, User setting mode if the system default works not

well, Low Byte of R4160 is used for this setting (Not
suggest)
=Others, system will give the default value according to
R4161

Register
(For High Speed CPU Link)
R4162
Fixed time interrupt enable/disable
the setting of R4161

ySet Baud Rate, Parityof Port 2
y Data bit is fixed to 8-bit
y Baud Rate38400 bps
B7
control
B6
B5
B4
B3
100ms 50ms 10ms 5ms 4ms
B2
3ms
B1
B0
2ms 1ms
Bit=0, interrupt enabled

Bit=1, interrupt disabled
R4163
Modem dialing control setting
y Low Byte of R4163 :

=1, Ignore the dialing tone and the busy tone when
dialing.
=2, Wait the dialing tone but ignore the busy tone when
dialing.
=3, Ignore the dialing tone but detect the busy tone
when dialing.
=4, Wait the dialing tone and detect the busy tone when
dialing.
=Any other value treated as value equal 4.
y High Byte of R4163 :
The Ring count setting for Modem auto answer
R4164
V index register
R4165
Z index register
2 - 15
Register No.
Function
R4166
System used
R4167
Model of main unit
Description

=3, 14I + 10O (WSZ-24MCT2-AC)
=4, 20I + 12O (WSZ-32 MCT2-AC)
=5, 24I + 16O (WSZ-40 MCT2-AC)
=6, 36I + 24O (WSZ-60 MCT2-AC)
=1, MC
2 - 16
Register No.
D4000
D4001
Function
Description
Port 1 User-defined Baud Rate Divisor
Port 1 user-defined Baud Rate (1125~1152000 bps)
(R4146 must be 56XFH)
D4000 = (18432000/Baud Rate) - 1
Port 2 User-defined Baud Rate Divisor
Port 2 user-defined Baud Rate (1125~1152000 bps)
(R4158 must be 56XFH)
D4001 = (18432000/Baud Rate) - 1
D4004
Reserved
D4079
D4080
P0 index register
D4081
P1 index register
D4082
P2 index register
D4083
P3 index register
D4084
P4 index register
D4085
P5 index register
D4086
P6 index register
D4087
P7 index register
D4088
P8 index register
D4089
P9 index register
D4090
Reserved
D4095
Remark: All the special relays or registers attached with symbol shown in the above table are write prohibited.
For the special relays attached with symbol also has following characteristics
. Forced and Enable/Disable operation is not allowed.
. Cant be referenced by TU/TD transitional contact (contact will always open)
2 - 17
Chapter 3
WSZ-Controller Instruction Lists
3.1 Sequential Instructions

Instruction
Operand
ORG
ORG NOT
X,Y,M,
ORG TU
S,T,C
ORG TD
ORG OPEN
ORG SHORT
LD
LD NOT
X,Y,M,
LD TU
S,T,C
LD TD
LD OPEN
LD SHORT
Symbol
Execution
Time
Function Descriptions
Starting a network with a normally open (A)
contact
Starting a network with a normally closed
(B) contact
Starting a network with a differential up
(TU) contact
Starting a network with a differential down
(TD) contact
Starting a network with a open circuit
contact
Starting a network with a short circuit
contact
Starting a relay circuit from origin or branch
line with a normally open contact
line with a normally closed contact
line with a differential up contact
line with a differential down contact
line with a open circuit contact
line with a short circuit contact
AND
Serial connection of normally open contact
AND NOT
X,Y,M,
Serial connection
contact
AND TU
S,T,C
Serial connection of differential up contact
of
of
normally
closed
AND TD
Serial connection
contact
differential
down
AND OPEN
Serial connection of open circuit contact
AND SHORT
Serial connection of short circuit contact
Instruction type
0.33us
Network
0.54us
starting
instructions
0.33us
0.33us
Origin or
0.54us
branch line
starting
instructions
0.33us
0.33us
Serial
0.54us
connection
instructions
0.33us
OR NOT
X,Y,M,
Parallel connection of normally open

contact
Parallel connection of normally closed
contact
OR TU
S,T,C
Parallel connection of differential up contact
OR
OR TD
Parallel connection of differential down

contact
OR OPEN
Parallel connection of open circuit contact
OR SHORT
Parallel connection of short circuit contact
ANDLD
Serial connection of two circuit blocks
0.33us
Parallel
0.54us
connection
instructions
0.33us
0.33us
ORLD
Parallel connection of two circuit blocks
3-1
Blocks merge
instructions
Instruction
Operand
Symbol
OUT
Function Descriptions
Execution
Time
Send result to coil

Y,M,S
Send inverted result to coil
OUT NOT
0.33us
OUT L
Instruction type
OUT
Send result to an external output coil and
1.09us
Coil output
instruction
appoint it as of retentive type

Save the node status to a temporary relay
TR
0.33us
LD
Load the temporary relay
TU
Take the transition up of the node status
0.33us
TD
Take the transition down of the node status
0.33us
NOT
Invert the node status
0.33us
Node operation
instruction
0.33us
SET
(S)
Set a coil
1.09us
RST
( R)
0.33us
Reset a coil
1.09us
The 36 sequential instructions listed above are all applicable to every models of WSZ-controller.
3.2 Function Instructions

There are more than 100 different WSZ-Controller function instructions. If put the D and P derivative instructions into
account, the total number of instructions is over 300. On top of these, many function instructions have multiple input
controls (up to 4 inputs) which can have up to 8 different types of operation mode combinations. Hence, the size of
WSZ-controller instruction sets is in fact not smaller than that of a large controller. Having powerful instruction functions,
though may help for establishing the complicated control applications, but also may impose a heavy burden on those
users of small type controllers. For ease of use, WSZ controller function instructions are divided into two groups, the
Basic function group which includes 26 commonly used function instructions and 4 SFC instructions and the advanced
function group which includes other more complicated function instructions, such as high-speed counters and interrupts.
This will enable the beginners and the non-experienced users to get familiar with the basic function very quickly and to
assist experienced users in finding what they need in the advanced set of function instructions.
The instructions attached with symbol are basic functions which amounts to 26 function instructions and 4 SFC
instructions. All the basic functions will be explained in next chapter. The details for the reset of functions please refer
advanced manual.
3-2
General Timer/Counter Function Instructions
FUN
No.
Derivative
Instruction
Name
Operand
T nnn
PV
General timer instructions (nnn range 0255)
C nnn
PV
General counter instructions (nnn range 0255)
UDCTR
CV,PV
7
Function descriptions
16-Bit or 32-Bit up/down counter
Single Operand Function Instructions
4
DIFU
To get the up differentiation of a D relay and store the result to D
5
DIFD
To get the down differentiation of a D relay and store the result to D
10
TOGG
Toggle the status of the D relay
Setting/Resetting
SET
DP
Set all bits of register or a discrete point to 1
RST
DP
Clear all bits of register or a discrete point to 0
Z-WR
114
Zone set or clear
SFC Instructions
STP
STPEND
TO
Snnn
STEP divergent instruction
FROM
Snnn
STEP convergent instruction
Snnn
STEP declaration
End of the STEP program
Mathematical Operation Instructions
11
()
Sa,Sb,D
DP
Perform addition of Sa and Sb and then store the result to D
12
()
Sa,Sb,D
DP
Perform subtraction of Sa and Sb and then store the result to D
13
()
Sa,Sb,D
DP
Perform multiplication of Sa and Sb and then store the result to D
14
()
Sa,Sb,D
DP
Perform division of Sa and Sb and then store the result to D
15
(1)
DP
Adds 1 to the D value
16
(1)
DP
Subtracts 1 from the D value
23
DIV48
Sa,Sb,D
24
SUM
S,N,D
DP
Take the sum of the successive N values beginning from S and store
it in D
25
MEAN
S,N,D
DP
Take the mean average of the successive N values beginning from S

and store it in D
26
SQRT
S,D
DP
Take the square root of the S value and store it in D
27
NEG
DP
Take the 2's complement (negative number) of the D value and store
it back in D
28
ABS
DP
Take the absolute value of D and store it back in D
29
EXT
30
PID
TS,SR,OR,
PR,WR
31
CRC
MD,S,N,D
32
ADCNV
PL,S,N,D
Perform 48 bits division of Sa and Sb and then store the result to D
Take the 16 bit numerical value and extend it to 1 32 bit numerical

value (value will not change)
PID operation
CRC16 checksum calculation

Offset and full scale conversion
3-3
FUN
No.
Name
Operand
Derivative
Instruction
200
IF
S,D
DP
Integer to floating point number conversion
201
FI
S,D
DP
Floating point number to integer conversion
202
FADD
Sa,Sb,D
Addition of floating point number
203
FSUB
Sa,Sb,D
Subtraction of floating point number
204
FMUL
Sa,Sb,D
Multiplication of floating point number
205
FDIV
Sa,Sb,D
Division of floating point number
206
FCMP
Sa,Sb
Comparison of floating point number
207
FZCP
Sa,Sb
Zone comparison of floating point number
208
FSQR
S,D
Square root of floating point number
209
FSIN
S,D
SIN trigonometric function
210
FCOS
S,D
COS trigonometric function
211
FTAN
S,D
TAN trigonometric function
212
FNEG
Change sign of floating point number
213
FABS
Take absolute value of floating point number
Logical Operation Instructions
18
AND
Sa,Sb,D
DP
Perform logical AND for Sa and Sb and store the result to D
19
OR
Sa,Sb,D
DP
Perform logical OR for Sa and Sb and store the result to D
35
XOR
Sa,Sb,D
DP
Take the result of the Exclusive OR logical operation made between

Sa and Sb, and store it in D
36
XNR
Sa,Sb,D
DP
Take the result of the Exclusive OR logical operation made between

Sa and Sb, and store it in D
Comparison Instructions
17
37
CMP
Sa,Sb
DP
Compare the data at Sa and data at Sb and output the result to

function outputs (FO)
ZNCMP
S,SU,SL
DP
Compare S with the zones formed by the upper limit SU and lower
limit SL, and set the result to FO0~FO2
3-4
Data Movement Instructions
FUN
No.
Name
Operand
Derivative
instruction
8
MOV
S,D
DP
Transfer the W or DW data specified at S to D
9
MOV/
S,D
DP
Invert the W or DW data specified at S, and then transfers the result

to D
40
BITRD
S,N
DP
Read the status of the bits specified by N within S, and send it to

FO0
41
BITWR
D,N
DP
Write the INB input status into the bits specified by N within D
42
BITMV
S,Ns,D,Nd
DP
Write the status of bit specified by N within S into the bit specified by
N within D
43
NBMV
S,Ns,D,Nd
DP
Write the Ns nibble within S to the Nd nibble within D
44
BYMV
S,Ns,D,Nd
DP
Write the byte specified by Ns within S to the byte specified by Nd

within D
45
XCHG
Da,Db
DP
Exchange the values of Da and Db
46
SWAP
Swap the high-byte and low-byte of D
47
UNIT
S,N,D
Take the nibble 0 (NB0) of the successive N words starting from S

and combine the nibbles sequentially then store in D
48
DIST
S,N,D
De-compose the word into successive N nibbles starting from nibble

0 of S, and store them in the NB0 of the successive N words starting
from D
49
BUNIT
S,N,D
Low byte of words re-unit
50
BDIST
S,N,D
Words split into multi-byte
160
RW-FR
Sa,Sb,Pr,L
DP
File register access
Shifting/Rotating Instructions
6
BSHF
DP
Shift left or right 1 bit of D register
51
SHFL
D,N
DP
Shift left the D register N bits and move the last shifted out bits to
OTB. The empty bits will be replaced by INB input bit
52
SHFR
D,N
DP
Shift right the D register N bits and move the last shifted out bits to
OTB, The empty bits will be replaced by INB input bit
53
ROTL
D,N
DP
Rotate left the D operand N bits and move the last rotated out bits to
OTB
54
ROTR
D,N
DP
Rotate right the D operand N bits and move the last rotated out bits
to OTB
Code Conversion Instruction
20
BCD
S,D
DP
Convert binary data of S into BCD data and store the result to D
21
BIN
S,D
DP
Convert BCD data of S into binary data and store the result to D
55
BG
S,D
DP
Binary to Gray code conversion
3-5
FUN
No.
Name
Operand
Derivative
instruction
56
GB
S,D
DP
57
DECOD
S,Ns,NL,D
Decode the binary data formed by NL bits starting from Ns bit within
S, and store the result in the register starting from D
58
ENCOD
S,Ns,NL,D
Encoding the NL bits starting from the Ns bit within S, and store the
result in D
59
7SG
S,N,D
Convert the N+1 number of nibble data within S, into 7 segment

code, then store in D
60
ASC
S,D
Write the constant string S (max. 12 alpha-numeric or symbols) into

the registers starting from D
61
SEC
S,D
Convert the time data (hours, minutes, seconds) of the three

successive registers starting from S into seconds data then store to
D
62
HMS
S,D
Convert the seconds data of S into time data (hours, minutes,

seconds) and store the data in the three successive registers starting
from D
63
HEX
S,N,D
Convert the successive N ASCII data starting from S into

hexadecimal data and store them to D
64
ASC
S,N,D
Convert the successive N hexadecimal data starting from S into

ASCII codes and store them to D
Gray code to Binary conversion
Flow Control Instructions
0
MC
The start of master control loop
1
MCE
The end of master control loop
2
SKP
The start of skip loop
3
SKPE
The end of skip loop
END
End of Program
65
LBL
16
alphanumeric
66
JMP
LBL
Jump to LBL label and continues the program execution
67
CALL
LBL
Call the sub-program begin with LBL label
68
RTS
Return to the calling main program from sub-program
69
RTI
Return to interrupted main program from sub-program
70
FOR
71
NEXT
Define the label with 1~6 alphanumeric characters
Define the starting point of the FOR Loop and the loop count N
Define the end of FOR loop
3-6
I/O Function Instructions
FUN
No.
Name
Operand
Derivative
instruction
74
IMDIO
D,N
Update the I/O signal on the main unit immediately
76
TKEY
IN,D,KL
Convenient instruction for 10 numeric keys input
77
HKEY
IN,OT,D,KL
Convenient instruction for 16 keys input
78
DSW
IN,OT,D
Convenient instruction for digital switch input
79
7SGDL
S,OT,N
Convenient instruction for multiplexing 7-segment display
80
MUXI
IN,OT,N,D
81
PLSO
MD, Fr, PC
UY,DY,HO
82
PWM
TO,TP,OT
83
SPD
S,TI,D
139
HSPWM
PW,OP,RS,
PN,OR,WR
Convenient instruction for multiplexing input instruction

D
Pulse output function (for bi-directional drive of step motor)

Pulse width modulation output function
Speed detection function
Hardware PWM pulse output
Cumulative Timer Function Instructions
87
T.01S
CV,PV
Cumulative timer using 0.01s as the time base
88
T.1S
CV,PV
Cumulative timer using 0.1s as the time base
89
T1S
CV,PV
Cumulative timer using 1s as the time base
Watch Dog Timer Control Function Instructions
90
WDT
91
RSWDT
Set the WDT timer time out time to N ms
Reset the WDT timer to 0
High Speed Counter Control Function Instructions
92
HSCTR
CN
Read the current CV value of the hardware HSCs, HSC0HSC3, or

HST on ASIC to the corresponding CV register in the controller
respectively
93
HSCTW
CN,D
Write the CV or PV register of HSC0HSC3 or HST in the controller

to CV or PV register of the hardware HSC or HST on ASIC
respectively
Report Function Instructions
94
ASCWR
MD,S,Pt
Parse and generate the report message based on the ASCII

formatted data starting from the address S. Then report message will
send to port1
3-7
Ramp Function Instructions
FUN
No.
Name
Operand
95
RAMP
Tn,PV,SL,
SU,D
Derivative
instruction
Ascending/Descending convenient instruction
Communication Function Instructions
150
M-Bus
MD,S,Pt
Modbus protocol communication
151
CLINK
MD,S,Pt
Original/Generic protocol communication
Table Function Instructions
100
RT
Rs,Td,L,Pr
DP
Store the Rs value into the location pointed by the Pr in Td
101
TR
Ts,L,Pr,Rd
DP
Store the value at the location pointed by the Pr in Ts into Rd
102
TT
Ts,Td,L,Pr
DP
Store the value at the location pointed by the Pr in Ts into the

location pointed by the Pr in Td
103
BT_M
Ts,Td,L
DP
Copy the entire contents of Ts to Td
104
T_SWP
Ta,Tb,L
DP
Swap the entire contents of Ta and Tb
105
R-T_S
Rs,Ts,L,Pr
DP
Search the table Ts to find the location with data different or equal to
the value of Rs. If found store the position value into the Pr
106
T-T_C
Ta,Tb,L,Pr
DP
Compare two tables Ta and Tb to search the entry with different or

same value. If found store the position value into the Pr
107
T_FIL
Rs,Td,L
DP
Fill the table Td with Rs
108
T_SHF
IW,Ts,Td,
L,OW
DP
Store the result into Td after shift left or right one entry of table Ts.
The shift out data is send to OW and the shift in data is from IW
109
T_ROT
Ts,Td,L
DP
Store the result into Td after shift left or right one entry of table Ts.
110
QUEUE
IW,QU,L,
Pr,OW
DP
Push IW into QUEUE or get the data from the QUEUE to OW (FIFO)
111
STACK
IW,ST,L,
Pr,OW
DP
Push IW into STACK or get the data from the STACK to OW (LIFO)
112
BKCMP
Rs,Ts,L,D
DP
Compare the Rs value with the upper/lower limits of L, constructed

by the table Ts, then store the comparison result of each pair into the
relay designated by D (DRUM)
113
SORT
S,D,L
DP
Sorting the registers starting from S length L and store the sorted
result to D
Matrix Instructions
120
MAND
Ma,Mb,Md,L
Store the results of logic AND operation of Ma and Mb into Md
121
MOR
Ma,Mb,Md,L
Store the results of logic OR operation of Ma and Mb into Md
122
MXOR
Ma,Mb,Md,L
Store the results of logic Exclusive OR operation of Ma and Mb into Md
123
MXNR
Ma,Mb,Md,L
Store the results of logic Exclusive OR operation of Ma and Mb into Md
124
MINV
Ms,Md ,L
Store the results of inverse Ms into Md
125
MCMP
Ma,Mb,L Pr
Compare Ma and Mb to find the location with different value, then

store the location into Pr
3-8
FUN
No.
Name
Operand
Derivative
instruction
126
MBRD
Ms,L,Pr
Read the bit status pointed by the Pr in Ms to the OTB output
127
MBWR
Md,L,Pr
Write the INB input status to the bits pointed by the Pr in Ms
128
MBSHF
Ms,Md,L
Store the results to Md after shift one bit of the Ms. Shifted out bit will
appear at OTB and the shift in bits comes from INB
129
MBROT
Ms,Md,L
Store the results to Md after rotate one bit of the Ms. Rotated out bit
will appear at OTB.
130
MBCNT
Ms,L,D
Calculate the total number of bits that are 0 or 1 in Ms, then store the
results into D
NC Positioning Instruction
140
HSPSO
Ps,SR,WR
HSPSO instruction of NC positioning control
141
MPARA
Ps,SR
Parameter setting instruction of NC positioning control
142
PSOFF
Ps
Stop the pulse output of NC positioning control
143
PSCNV
Ps,D
Convert the Ps positions of NC positioning to mm, Inch or Deg
Disable/Enable Control of Interrupt or Peripheral
145
EN
LBL
Enable HSC, HST, external INT or peripheral operation
146
DIS
LBL
Disable HSC, HST, external INT or peripheral operation
3-9
Chapter 4
Sequential Instructions
The sequential instructions of WSZ-controller shown in this chapter are also listed in section 3.1. Please refer to Chapter
1, "PLC Ladder diagram", for the coding rules in applying those instructions. In this chapter, we only introduce the
applicable operands, ranges and element characteristics, functionality.
4.1 Valid Operand of Sequential Instructions

Operand
Ranges
SM
TR
X0
Y0
M0
M1912
S0
T0
C0
TR0
X255
Y255
M1911
M2001
S999
T255
C255
TR39
ORG
ORG NOT
ORG TU
ORG TD
LD
LD NOT
Instruction
LD TU
LD TD
AND
AND NOT
AND TU
AND TD
OR
OR NOT
OR TU
OR TD
OUT
OUT NOT
OUT L
ANDLD
ORLD
TU
TD
NOT
SET
RST
4-1
OPEN
SHORT
For the relays marked with a symbol in the special relay tableplease refer to section 2.3is write prohibited. In
addition, TU and TD contacts are not supported for those relays as well. The operands marked with a * symbol in the
table shown above should exclude those special relays.
4.2 Element Description

4.2.1
Characteristics of A,B,TU and TD Contacts
X0
Input X0 from the input terminal block
ON
OFF
A contact Element status
B contact Element status
X0
X0
TU contact Element status
X0
t: scan time
X0
TD contact Element status
1
0
1
0
The waveform shown above reveals the function of A, B, TU and TD elements by exercising the external input X0 form
OFF to ON then OFF.
TU (Transition Up): This is the Transition Up Contact. Only a rising edge (01) of the referenced signal will turn on
this element for one scan time.
TD (Transition Down): This is the Transition Down Contact. Only a falling edge (10) of the referenced signal will
turn on this element for one scan time.
TU and TD contact will work normally as described above if the change of the status of the valid referenced operands
listed in the Valid Range of the Operand of Sequential instructions table are not driven by the function instructions.
Remark: For TU(TD) elements which operand is of relay will turn on after the first time the corresponding relay get
driven from 0 to 1(1 to 0). When the next time the corresponding relay get driven from 1 to 1(0 to 0) the
TD(TU) element will turn OFF. Care should be taken while there is a multiple coil usage situation existed
in the ladder program. This situation can be best illustrated at below. In the waveform we can see Y0 TU
b and
e time which only the Y0 TU elements existed between rung 1
element only turn on between
and rung 2 can detect the Y0 rising edge, while other Y0 TU elements out side these two ladder rungs will
never aware the occurrence of the rising edge. For the relays do not have the multiple coil usage in
ladder program, The ON status of corresponding TU or TD element can be sustained for one scan time,
but for relays which contrary to above, the turn on time will shorter than 1 scan time as illustrated at
below.
4-2
Ladder Diagram
Y0
X0
Y1
c
X1
Y0
N+1 times scan
N times scan
Scan Time t
a
X0
X1
A
Y0
Y0
Y0
Y1
Y1
Theinternal
internalaccumulator
accumulatorofofPLC
controller
A : The
Besides the TU/TD instructions which can detect the status change of reference operand, WSZ-controller also
provides the instructions to detect the change of node status (power flow). For details please refer the descriptions of
FUN4 (DIFU) and FUN5 (DIFD) instructions at chapter 6.
4.2.2
OPEN and SHORT Contact
The status of OPEN and SHORT contact are fixed and cant be changed by any ladder instructions. Those two contacts
are mainly used in the places of the Ladder Diagram where fixed contact statuses are required, such as the place where
the input of an application instruction is used to select the mode. The sample program shown below gives an example of
configuring an Up/Down counter (UDCTR) to an Up counter by using the SHORT contact.
7.UDCTR
X0
CK
CV : R
U/D PV : R 10
X1
CLR
4-3
CUP
FUN7 is the UDCTR function. While rising edge of CK input occur, FUN7 will count up if the U/D status is 1 or count down
if the U/D status is 0. The example shown above, U/D status is fixed at 1 since U/D is directly connected from the
origin-line to a SHORT contact, therefore FUN7 becomes an Up counter. On the contrary, if the U/D input of FUN7 is
connected with an OPEN contact from the origin-line, the FUN7 becomes a DOWN counter.
7.UDCTR
X0
U/D PV : R
10
CK
CV :
CUP
X1
CLR
4.2.3
Output Coil and Inverse Output Coil
Output Coil writes the node status into an operand specified by the coil instruction. Invert Output Coil writes the
complement status of node status into an operand specified by the coil instruction. The characteristics depicts at below.
Y0
X0
Y1
X0
Y0
Y1
4.2.4
Retentive Output Coil
The coil element can be categorized into two types, namely Retentive and Non Retentive. For example, M0~M799 can be
specified as the Retentive coils and M800~M1399 can be specified as the Non Retentive coils. One way to categorize the
relay type is to divide the relays into groups. Though this method is simple but for the most applications the coils needed
to be retentive may be in a random order.
X0
X0
Y0
L
Y0
From the above example, if turn the X0 "ON" then "OFF", Y0 will keep at "ON". When change the controller state from
RUN to STOP then RUN or turn the power off then on, the Y0 still keep at ON state. But if use the OUT Y0 instruction
4-4
instead of the OUT L Y0 , Y0 status will be OFF.
4.2.5
Set Coil and Reset Coil
Set Coil writes 1 into an operand specified. Reset Coil writes 0 into an operand specified. The characteristics depicts at
below.
X0
EN
P
SET
EN
P
RST
X1
X0
SET
X1
RST
Y0
4.3 Node Operation Instructions

A node is the connection between elements in a ladder diagram consisting of sequential instruction elements (please
refer to Section 1.2). There are four instructions dedicated for node status operation in WSZ-controller. Using the diagram
below, the three node operation instructions NOT, TU and TD, are illustrated.
Node B
X0
Y0
X1
Y1
Node A
4-5
X0
X1
Node A
Inverse
Incerse
Node B
differential up
differential down
Y0
t
Y1
t
t : Scan time
4-6
Chapter 5
Descriptions of Function Instructions
5.1 The Format of Function Instructions

In this chapter we will introduce the function instructions of WSZ-controller in details. All the explanations for each function
will be divided into four parts including input control, instruction number/name, operand and function output. An example
is shown in below.
Ladder Diagram
Example 1: Single input instruction
Operation control
15
EN (+1)
Carry(FO0)
verflow
CY
CVF O
CUP
Count-Up(FO0)
Example 2: Multiple input instruction
7.UDCTR
Clock
Up/Down count
Clear control
5.1.1
CK
CV : R
U/D PV :
10
CLR
Input Control
Except for the seven function instructions that do not have input control, the number of the input control of other
WSZ-controller function instructions can be ranged from one to four. Execution of the instructions and operations is
dependent on the input control signal or the combinations of the several input control signals. The ladder programming
software for WSZ controller - WinProladder can help user to complete the complex design and document works. In the
ladder program window we can see all the function instructions were displayed by blocks surrounded with abbreviated
words for ease of comprehension, include inputs, outs, function name, and parameter names. As shown in example 2
above, the first input mark "CK" indicates when the "CK" input changes from 0 to 1 (rising edge) the counter will be
increased or decreased by 1 (depending on the "U/D" status). The second input mark "U/D" with a status of 1 represents
the word above slash ("U") and the status 0 represents the word under slash ("D"), that is second input "U/D" states =1,
the counter will be increased by 1 when "CK" input from 0 to 1, and when "U/D"=0, the counter will be decreased by 1.
The third input mark "CLR" indicates when this input is 1, the counter will be cleared to 0. Chapter 6~7 give the
descriptions of input control of each function instruction.
Remark: There are total of seven instructions whose input control should be directly connected to the origin-line
those are MCE, SKPE, LBL, RTS, RTI, FOR, and NEXT. Please refer to chapter 6 and 7 for more
detailed explanations.
All input controls of the function instructions should be connected by the corresponding elements, otherwise a syntax
error will occur. As shown in example 3 below, the function instruction FUN7 has three inputs and three elements before
FUN7. ORG X0, LD X1 and LD X2 corresponds to the first input CK, second input U/D and third input CLR.
5-1
Example 3:
Ladder Diagram
7.UDCTR
X0
CK
CV :
CUP
X1
U/D PV :
10
X2
CLR
5.1.2
Instruction Number and Derivative Instructions
As mentioned before, except for the nine instructions that can be entered using the dedicated keys on the keyboard, other
function instructions must be entered using the "instruction number. Follow the instruction number there are postfixes D,
P, DP can be added which can derive three additional function instructions.
D: Indicates a Double Word (32-bit). The 16-bit word is the basic unit of the registers in WSZ-controller. The data length of
R, T and C (except C200~C255) registers are 16-bit. If a register with 32-bit data length is required, then it is necessary
to combine two consecutive 16-bit registers together such as R1-R0, R3-R2 etc. and those registers are represented
by prefix a D letter before register name such as DR0 represents R1-R0 and DR2 represents R3-R2.
B31
DR0 = R1-R0
B16 B15
B0
R1
R0
High Word register
Low Word register
B31
DWY8 = WY24-WY8
B16 B15
B0
WY24
WY8
High Word register
Low Word register
= Y39Y8
Remark: In order to differentiate between 16-bit and 32-bit instructions while using the ladder diagram, we add the
postfix letter D after the "Instruction number" to represent 32-bit instructions and the size of their operand
are 32-bit as shown in example 2 on P.6-6. The instruction FUN 11D has a postfix letter D, therefore the
source and destination operands need to prefix a letter D as well, such as the augend Sa : R0 is actually
Sa=DR0=R1-R0 and Sb=DR2=R3-R2. Please also pay special attention to the length of the other
operands except source and destination are only one word whether 16-bit or 32-bit instructions are used.
5-2
P: indicates the pulse mode instruction. The instruction will be executed when the status of input control changes from 0
to1 (rising edge). As shown in example 1, if a postfix letter P is added to the instruction (FUN 15P), the instruction FUN
15P will only be executed when the status of input control signal changes from 0 to 1. The execution of the instruction
is in level mode if it does not have a P postfix, this means the instruction will be executed for every scan until the status
of input control changes from 1 to 0. The pulse input is indicated by a symbol "", such as CK, EN, TG etc.. In
this operation manual, an example of the operation statement of a function instruction is shown below.
When the operation controlEN=1 orENP instructionfrom 01,
The first one indicates the execution requirement for non-P instruction (level mode) and the second one indicates the
execution requirement for P instruction (pulse mode). The following waveform shows the result (R0) of FUN15 and
FUN15P under the same input condition.
t is the scan time
Input control
Executes the FUN15P
(R0 initial is 0)
Executes the FUN15
(R0 initial is 0)
0002H
0001H
3
0001H
0002H
0003H
0004H
0005H
0006H
DP: Indicates the instruction is a 32-bit instruction operating with pulse mode.
Remark: P instruction is much more time saving than level instruction in program scanning, So user should use P
instruction as much as possible.
5.1.3
Operand
The operand is used for data reference and storage. The data of source (S) operand are only for reference and will not be
changed with the execution of the instruction. The destination (D) operand is used to store the result of operation and its
data may be changed after the execution of the instruction. The following table illustrates the names and functions of
WSZ controller function instruction's operands and types of contacts, coils, or registers that can be used as an operand.
The names and functions of the major operands:
Abbreviation
Name
Descriptions
The data of source (S) operand are only for reading and reference and will not be
Source
changed with the execution of the instruction. If there are more than one source
operands, each operand will be identified by the footnote such as Sa and Sb.
5-3
Abbreviation
Name
Descriptions
The destination (D) operand is used to store the result of operation. The original data
Destination
will be changed after operation. Only the coils and registers which are not write
prohibited can be the destination operand.
Length
Indicates the data size or the length of the table, usually are constants.
Number
Pr
Pointer
A constant most often used as numbers and times. If there are more than one
constant, each constant will be identified by the footnotes such as Na, Nb, Ns etc..
Used to point to a specific a block of data or a specific data or register in a table.
Generally the Pr value can be varied, therefore cannot be constant or input register.
(R3840~R3847)
CV
Current value
Used in T and C instruction to store the current value of T or C
PV
Set value
Used in T and C instructions for reference and comparison

A combination of a set of consecutive registers forms a table. The basic operation
units are word and double word. If there is more than one table, each table will be
Table
identified by footnotes such as Ta, Tb, Ts and Td etc..

A combination of a set of consecutive registers forms a matrix. The basic operation
M
Matrix
unit is bit. If there is more than one matrix, each matrix will be identified by footnotes
such as Ma, Mb, Ms and Md etc..
Besides the major operands mentioned above, there are other operands which are used for certain special purposes such
as the operand Fr for frequency, ST for stack, QU for Queue etc.. Please refer to the instruction descriptions for more
details.
The types of the operand and their range: The types of operand for the function instructions are discrete, register
and constant.
a) Discrete operand :
There are total five function instructions that reference the discrete operand, namely SET, RST, DIFU, DIFD
and TOGG. Those five instructions can only be used for operations of Y(external output), M
(internal and special) and S(step) relays. The table shown below indicates the operands and ranges of
the five function instructions.
Range
Operand
D
b)
SM
M0 M1912 S0
Y0
Y255 M1911 M2001 S999
Symbol "O" indicates the D (Destination operand) can use this type of
coils as operands. The "*" sign above the "O" shown in SM column
indicates that should exclude the write prohibited relays as operands.
Please refer to page 2-3 for introduction of the special relays.
Register operand :
The major operand for function instructions is register operand. There are two types of register operands: the
native registers which already is of Words or Double Words data such as R, D, T, C. The other is derivative
registers (WX, WY, WM, WS) which are formed by discrete bits. The types of registers that can be used as
instruction operands and their ranges are all listed in the following table:
5-4
Range
WX
WY
WM
WS
TMR CTR
WX0
WY0
WM0
WS0
T0
WX240 WY240 WM1896 WS984 T255
Operand
S
D
HR
IR
OR
SR
ROR
DR
C0
R0 R3840 R3904 R3968 R5000 D0
16/32-bit
+/number
C255 R3839 R3903 R3967 R4167 R8071 D4095
*
*
XR
VZ
P0~P9
The "" symbol in the table indicates can apply this kind of data as operand. The "*" symbol indicates can apply this
kind of data except the write prohibited registers as operand. To learn more about write prohibited registers please refer
to page 2-8 for introduction of the special register.
When R5000R8071 are not set to be read only registers, can used as normal registers (read, and write)
Remark 1: The registers with a prefix W, such as WX, WY, WM and WS are formed by 16 bits. For example, WX0
means the register is formed by X0(bit 0)~X15(bit 15). WY144 means the register is formed by Y144(bit
0)~Y159(bit 15). Please note that the discrete number must be the multiple of 8 such as 0, 8, 16, 24....
Remark 2: The last register (Word) in a table can not be represented as a 32-bit operand in the function because 2
Words are required for a 32-bit operand.
Remark 3: TMRT0T255and CTRC0C255are the registers of timers and counters respectively. Although
they can be used as general registers, they also complicate the systems and make debugging more
difficult. Therefore you should avoid writing anything into the TMR or CTR registers.
Remark 4: T0T255 and C0C199 are 16-bit register. But C200~C255 are 32-bit register, therefore cant be
used as 16-bit operands.
Remark 5: Apart from being directly appointed by registers number (address) as the foregoing discussions, the
registers operand in the range of R0R8071 can be combined with pointer register VZ or P0~P9 to
make indirect addressing. Please refer to the example in the next section (Section 5.2) for the
description of using pointer register (XR) to make indirect addressing.
c)
Constant operands :
The range of 16-bit constant is between -32768~32767. The range of 32-bit constant is between
-2147483648~2147483647. The constant for several function instructions can only be a positive constant. The
range of 16-bit and 32-bit constants are listed in the table shown below.
Classification
Range
16-bit signed number
-3276832767
16-bit un-signed number
032767
32-bit signed number
-21474836482147483647
32-bit un-signed number
02147483647
-3276832767 or
16/32-bit signed number
-21474836482147483647
032767 or
16/32-bit un-signed number
02147483647
It is possible that the length and size of a specific operand, such as L, bit size, N etc.., are different, and the
differences are all directly marked at the operand column. Please refer to the explanations of function
instructions.
5-5
5.1.4
Functions Output (FO)
The Function Output (FO) is used to indicate the operation result of the function instruction. Like control input, each
function outputs shown in the screen of programming software are all attached with a word which comes from the
abbreviation of the output functionality. Such as CY derived from Carry. The maximum number of function outputs is 4
and those are denoted as FO0, FO1, FO2, FO3 respectively. The FO status must be taken out by FO instruction. The
unused FO may be left without connecting to any elements, such as FO1 (CY) shown in Example 4 below.
Example 4 :
Ladder Diagram
X0
11D.(+)
Y0
EN Sa : R
Sb : R
U/S D : R
D=0
CY
Y1
BR
When M1919=0, the FO status will only be updated if the instruction is executed. It will keep the same status until
a new FO status is generated after the instruction is executed again (memory keeping).
When M1919=1, the FO status will be reset to 0 (no memory keeping) if the instruction is not executed.
5.2 Use Index Register(XR) for Indirect Addressing

In the WSZ-controller function instructions, there are some operands that can be combined with pointer register (VZ
P0~P9) to make indirect addressing (will be shown in the operand table if it applicable). However, only the registers in the
range R0R8071 can be combined with an pointer register to perform indirect addressing (other operands such as
discrete, constant and D0D3071 cannot be used for indirect addressing).
There are twelve pointer registers XR (VZP0~P9). The V register in fact is the R4164 of special registers (R3840
R4167) , the Z register is the R4165 and the P0~P9 register is the (D4080~D4089). The actual addressed register by
index addressing is just offset the original operand with the content of the index register.
Original
Operand
Pointer
Register
Actual
Operand
R100
= R150
100
(If V=50)
50
(If V=100)
5-6
= R200
As shown in the above diagram, you only need to change the V value to change the operand address. After combining
the index addressing with the WSZ-controller function instructions, a powerful and highly efficient control application can
be achieved by using very simple instructions. Using the program shown in the diagram below as an example, you only
need to use a block move instruction (BT_M) to achieve a dynamic block data display, such as a parking management
system.
Index Register(P0~P9) Introduction

In indirect addressing application, Rxxxx register can combine VZ & P0P9 for index addressing; Dxxxx register can't
combine VZ for index addressing, but P0P9 are allowed.
When VZ index register being combined with the Rxxxx register,
for example, R0 with VZ, the instruction format is R0V(where V=100, it means R100) or R0Z(where Z=500, it means
R500); when P0P9 index register being combined with the Rxxxx register, the instruction format is RPn (n=09) or
RPmPn (m,n=09), for example RP5 (where P5=100, it means R100) or RP0P1(where P0= 100, P1=50, it means150).
When P0P9 index register being combined with the Dxxxx register, the instruction format is DPn (n=09) or DPmPn
(m,n=09), for example DP3 (where P3=10, it means D10) or DP4P5 (where P4=100, P5=1, it means D101).
It can combine both P0P9 index register, for example P2=20, P3=30, when Rxxxx or Dxxxx register combines both
index register, RP2P3 will point to R50, DP2P3 will point to D50, it means the summation of both index register for indirect
addressing.
08.MOV
M1924
EN
S:
100
D:
P2
1.
Index register P2=100 while power up or first run.
2.
When X23 changes from 01, FUN103 will perform the

table movement, the source starts from R100 (P2=100),
the destination starts from R2000, the amount is 4.
103.BT_M
X23
EN
Ts :
RP3
PR2
Td :
R2000
L :
Coping the content of R100~R103 for R2000~R2003 at

first execution, coping the content of R104~R107 for
R2000~R2003 at second execution
3.
11P.(+)
X23
EN
U/S
Sa :
Sb :
P2
D :
P2
D=0
CY
BR
5-7
Increasing the P2 index register by 4 to point to next 4.
Indirect addressing program example

Ladder Diagram
103.BT_M
EN Ts : R100 V
Td : R2000
L : 4
Resident data
resident
base in controller
data base in
(V=0)
Resident 1
(V=4)
Resident 2
R100
Name
R101
Tel. No.
R102
Car plate No.
R103
Parking No.
R104
Name
R105
Tel. No.
R106
Car plate No.
R107
Parking No.
(V=396) Resident 100
Pointer Register
V
4
Temporary
Display
Monitor
Storage Area
33Community Resident
R2000
Name
Parking System
R2001
Tel. No.
Name:
Name
R2002
Car plate No.
Tel. No.
Tel. No.
R2003
Parking No.
Car plate No.

Parking No.
Car plate No.

Rnnn
Resident 2
Sensor
Station
(R2000)
(R2001)
(R2002)
(R2003)
Parking No.
Description Suppose that there are 100 resident parking spaces available in a parking management system for
community residents. Each resident has a set of basic information including name, telephone number,
number plate and parking number, that occupy four consecutive controller registers as shown in the
above diagram. A total of 400 registers (R100R499) are occupied. Each resident is given a card with a
unique card number (the number is 0 for resident 1, 4 for resident 2 etc.. ) for the sensing pass of the
main entrance and parking lot. The card number will be sensed by the controller and stored into the
pointer register V. The attendants monitor (LCD or CRT) will only display the data grasped by R2000
R2003 in the controller. For example, the card of residence 2 with the card number 4 is sensed, then the
register V=4 and the controller will immediately move the data in R104R107 to the temporary display
storage area (R2000R2003). Hence, the attendants monitor can display the data of residence 2 as
soon as its card is sensed.
5-8
Warning
1. Although using pointer register for indirect addressing application is powerful and flexible, but
changing the V and Z values freely and carelessly may cause great damages with erroneous
writing to the normal data areas. The user should take special caution during operation.
2. In the data register range that can be used for indirect addressing application (R0R8071), the
328 registers R3840R4167 (i.e. IR, OR and SR) are important registers reserved for system or
I/O usage. Writing at-will to these registers may cause system or I/O errors and may result in a
major disaster. Due to the fact that users may not easily detect or control the flexible register
address changes made by the V and Z values, WSZ-controller will automatically check if the
destination address is in the R3840R4067 range. If it is, the write operation will not be executed
and the M1969 flag Illegal write of Indirect addressing will be set as 1. In case it is necessary to
write to the registers R3840R4067, please use the direct addressing.
5.3 Overflow and Underflow of Increment (+1) or Decrement (-1)
(Beginners should skip this section)
The maximum positive value that can be represented by 16-bit and 32-bit operands are 32767 and 2147483647,
respectively. While the minimum negative values that can be represented by 16-bit and 32-bit operands are 32768
and 2147483648, respectively. When increase or decrease an operand (e.g. when Up/Down Count of a counter or the
register value is +1 or -1), and the result exceeds the value of the positive limit of the operand, then Overflow (OVF)
occurs. This will cause the value to cycle to its negative limit (e.g. add 1 to the 16-bit positive limit 32767 will change it
to 32768). If the result is smaller than the negative limit of the operand, then Underflow (UDF) occurs. This will cause
the value to cycle to its positive limit (e.g. deducting 1 from the negative limit 32768 will change it to 32767) as shown in
the table below. The flag output of overflow or underflow exists in the FO of WSZ-controller and can be used in cascaded
instructions to obtain over 16-bit or 32-bit operation results.
5-9
Increase
(Decrease)
Result
Overflow/
Underflow
16-bit Operand
32-bit Operand
-2147483646
-32767
-2147483647
-32768
OVF=1
Increase
Decrease
UDF=1
32767
OVF=1
-2147483648
32766
2147483647
32765
2147483646
-32767
-2147483647
-32768
-2147483648
32767
UDF=1
2147483647
32766
2147483646
32765
2147483645
5.4 Carry and Borrow in Addition/Subtraction

Overflow/Underflow takes place when the operation of increment/decrement causes the value of the operand to exceed
the positive/negative limit that can be represented in the controller, consequently a flag of overflow/underflow is
introduced. Carry/Borrow flag is different from overflow/underflow. At first, there must be two operands making addition
(subtraction) where a sum (difference) and a flag of carry/borrow will be obtained. Since the number of bits of the
numbers to be added (subtracted), to add (subtract) and of sum (difference) are the same (either 16-bit or 32-bit), the
result of addition (subtraction) may cause the value of sum (difference) to exceed 16-bit or 32-bit. Therefore, it is
necessary to use carry/borrow flag to be in coordination with the sum (difference) operand to represent the actual value.
The carry flag is set when the addition (subtraction) result exceeds the positive limit (32767 or 2147483647) of the sum
(difference) operand. The borrow flag is set when addition (subtraction) result exceeds the negative limit (-32768 or
-2147483648) of the sum (difference) operand. Hence, the actual result after addition (subtraction) is equal to the
carry/borrow plus the value of the sum (difference) operand. The FO of WSZ controller addition/subtraction instruction has
both carry and borrow flag outputs for obtaining the actual result.
MSB
+ (-)
1-bit
Carry/Borrow
LSB
16-bit32-bit
To Be Added (Subtracted) Operand
16-bit32-bit
Addition (Subtraction) Operand
16-bit or 32-bit
Sum (Difference) Operand
5 - 10
While all WSZ-controller numerical operations use 2S Complement, the representation of the negative value of the sum
(difference) obtained from addition (subtraction) is different from the usual negative number representation. When the
operation result is a negative value, 0 can never appear in the MSB of the sum (difference) operand. The carry flag
represents the positive value 32768 (2147483648) and the borrow flag represents the negative value -32768
(-2147483648).
Negative Value
Positive Value
(MSB=1)
(MSB=0)
0 Flag
=1
xxx, -2, -1, -32768,
, 32767, 0, 1, xxx
, - 2, -1, 0, 1, 2,
(2147483647)
(-2147483648)
Borrow Flag=1
x
x
Carry Flag=1
MSB
LSB
C=1 B=0 Z=0
x
x
32769
x
x
32768
32767
C=0 B=0 Z=0
32766
C=0 B=0 Z=0
32765
x
x
x
x
x
2
x
x
x
x
x
C=0 B=0 Z=0
C=0 B=0 Z=0
C=0 B=0 Z=1
C=0 B=0 Z=0
-1
C=0 B=0 Z=0
C=0 B=0 Z=0
-32767
C=0 B=0 Z=0
-32768
C=0 B=1 Z=0
-32769
C=0 B=1 Z=0

x
x
-32770
x
x
C = Carry
x
x
B = Borrow
Z = Zero
5 - 11
Negative Value
C=0 B=0 Z=0
-2
x
x
x
x
x
-32766
x
x
x
x
x
Positive Value
C=1 B=0 Z=0

C=0 B=0 Z=0
Chapter 6
Basic Function Instructions
6-2
6-5
SET
6-8
RST
6-10
0 MC
6-12
1 MCE
6-14
2 SKP
6-15
3 SKPE 6-17
4 DIFU
6-18
5 DIFD
6-19
6 BSHF
6-20
7 UDCTR 6-21
8 MOV
6-23
9 MOV 6-24
10 TOGG 6-25
11 ()
6-26
12 ()
6-27
13 ()
6-28
14 ()
6-30
15 (1)
6-32
16 (1)
6-33
17 CMP
6-34
18 AND
6-35
19 OR
6-36
20 BCD 6-37
21 BIN 6-38
6-1
Basic Function Instruction

T
TIMER
Symbol
Operand
Ladder symbol
Time control
EN
TB
Tn
Tn: Timer Number.
PV
TUP
PV: Preset value of the timer.
Time -UP(FO0)
TB: Time Base (0.01s, 0.1s, 1s)

Range
Operand
Tn
PV
WX
WY
WM
WS
WX0
WY0
WM0
WS0
WX240 WY240 WM1896 WS984
TMR CTR
T0
T255
HR
IR
OR
SR
ROR
DR
C0
R0 R3840 R3904 R3968 R5000 D0
0
C255 R3839 R3903 R3967 R4167 R8071 D4095 32767
The total number of timers is 256 (T0T255) with three different time bases, 0.01s, 0.1s and 1s.The
default number and allocation of timers is shown as below (Can be adjusted according to users actual
requirements by the Configuration function):
T0T490.01s timerdefault as 0.00327.67s
T50T1990.1s timerdefault as 0.03276.7s
T200T2551s timerdefault as 032767s
WSZ programming tool will lookup the timers time base automatically according to the Memory
Configuration after the timer number is keyed in. Timers time = Time base x Preset value. In the example
1 below, the time base T0 = 0.01s and the PV value = 1000, therefore the T0 timers time = 0.01s x 1000 =
10.00s.
If PV is a register, then Timers time = Time base x register content. Therefore, you only need to change
the register content to change the timers time. Please refer to Example 2.
The maximum error of a timer is a time base plus a scan time. In order to reduce the timing error in the
application, please use the timer with a smaller time base.
Description
When the time control EN is 1, the timer will start timing (the current value will accumulate from 0) until
Time Up (i.e. CVPV), then the Tn contact and TUP (FO0) will change to 1. As long as the timer control
EN input is kept as 1, even the CV of Tn has reached or exceeded the PV, the CV of the timer will
continue accumulating (with M1957 = 0) until it reaches the maximum limit (32767). The Tn contact status
and flag will remain as 1 when CVPV, unless the EN input is 0. When EN input is 0, the CV of Tn will
be reset to 0 immediately and the Tn contact and Time Up flag TUP will also change to 0 (please refer to
the diagram c below).
If the WSZ OS version is higher than V3.0 (inclusive), the M1957 can be set to 1 so the CV will not
accumulate further after Time Up and stops at the PV value. The default value of the M1957 is 0,
therefore the status of M1957 can be set before executing any timer instruction in the program to
individually set the timer CV to continue accumulating or stop at the PV after Time Up (please refer to the
diagram d below).
6-2

T
Example 1
TIMER
Constant preset value
Ladder diagram
X1
EN
X1
EN
Y0
.01S
T0
1000
P
SET
M1957
.01S
T1
1000
TUP
TUP
An example of taking
Time-Up signal directly
from FO0.
X1
327.67S
10.0S
T0
(CV)
c
M1957=0
(Defaulted)
d
M1957=1
Y0
or
1000
0
T0
T1
(CV)
1000
0
CV
T1
Time Start
Example 2
32767
Time-Up
Variable PV
The preset value (PV) shown in example 1 is a constant which is equal to 1000. This value is fixed and can not
be changed once programmed. In many circumstances, the preset time of the timers needs to be varied while
controller running. In order to change the preset time of a timer, can first use a register as the PV operand (R or
WX, WY...) and then the preset time can be varied by changing the register content. As shown in this example, if
set R0 to100, then T becomes a 10s Timer, and hence if set R0 to 200, then T becomes a 20s Timer.
6-3

T
TIMER
Ladder diagram
X1
EN
.1S
T50
TUP
Y0
T50
An example of applying
the time-up status by
using the T50 contact.
X1
200
100
T50 0
(current value)
c When R0=100
Y0
When R0=200
Y0
Time Start
10.0S
20.0S
c Time-Up
d Time-Up
Remark: If the preset value of the timer is equal to 0, then the timer's contact status and FO0 (TUP) become 1
("EN" input must be at 1) immediately after the controller finishes its first scan because "Time-Up" has
occurred. (TUP) stays at 1 until "EN" input changes to 0.
6-4

COUNTER
16-Bit: C0C19932-Bit: C200C255
Symbol
Operand
Cn: The Counter number
PV: Preset value
Range
Operand
Cn
PV
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
0
WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095 2147483647
There are total 200 16-Bit counters (C0~C199). The range of preset value is between 0~32767. C0~C139
are Retentive Counters and the CV value will be retained when the controller turns on or RUN again after a
power failure or a controller STOP. For Non Retentive Counters, if a power failure or controller STOP
occurs, the CV value will be reset to 0 when the controller turns on or RUN again.
There are total 56 32-Bit counters (C200~C255). The range of the preset value is between 0~2147483647.
C200~C239 are Retentive Counters and C240~C255 are Non Retentive Counters.
The default number and assignment of the counters are shown below, if necessary can use the
"CONFIGURATION" function to change the settings.
To insure the proper counting, the sustain time of input status of PLS should greater than 1 scan time.
The max. counting frequency with this instruction can only up to 20Hz, for higher frequency please use the
high-speed soft/hardware counter.
Description
When "CLR" is at 1, all of the contact Cn, FO0 (CUP), and CV value of the counter CV are cleared to 0 and
the counter stops counting.
When "CLR" is at 0, the counter is allowed to count up. The Counter counts up every time the clock "PLS
" changes from 0 to 1 (adds 1 to the CV) until the cumulative current value is equal to or greater than the
preset value (CV>=PV), the counter "Count-Up" and the contact status of the counter Cn and FO0 (CUP)
changes to 1. If the input status of clock continues to change, even the cumulative current value is equal
and greater than the preset value, the CV value will still accumulate until it reaches the up limit at 32767 or
2147483647. The contact Cn and FO0 (CUP) stay at 1 as long as CV>=PV unless the "CLR" input is set to
1.please refer the diagram c below
If the WSZ OS version is higher than V3.0 (inclusive), the M1973 can set to 1 so the CV will not accumulate
further after Count Up and stops at the PV. M1973 default value is 0, therefore the status of M1973 can
be set before executing any counter instruction in the program to individually set the counter CV to continue
accumulating or stops at the PV after Count Up (please refer to the diagram d below).
6-5

COUNTER
16-Bit: C0C199, 32-bit: C200C255
C
Example 1
16-Bit Fixed Counter
Ladder diagram
RST
M1973
Y1
X0
CK
PLS
CUP
C
1
PV :
X1
CLR
SET
M1973
X0
CK
PLS
CUP
C 2
PV :
X1
CLR
the Count-Up status by
using FO0 directly.
X0
X1
32766
c
M1973=0
(Defaulted)
d
M1973=1
C1
32767 times
5 times
Y1
C2
(CV)
C2
Count Start
Example 2
32767
Count-Up
32-Bit counter with variable preset value
Like a timer, if the PV of a counter is changed to a register (such as R, D, and so on), the counter will use the
register contents as the counting PV. Therefore, only need to change the register contents to change the PV of
the counter while controller is running. Below is an example of a 32-bit counter that uses the data register R0 as
the PV (in fact it is the 32-bit PV formed by R1 and R0).
6-6

COUNTER
16-Bit: C0C199, 32-Bit: C200C255
Ladder diagram
X0
C200
CK
PLS
CLR
R
PV :
X1
CLR
Y1
C200
the time-up status by
using the C200 contact.
X0
X1
C200
(R1=0)
When R0=4
Y1
When R0=9
Y1
10
11
12
13
14
4 times
9 times
Count Start
Count-Up
Count-Up
Remark: If the preset value of the counter is 0 and "CLR" input also at 0, then the Cn contact status and FO0
(CUP) becomes 1 immediately after the controller finishes its first scan because the "Count-Up" has
occurred. It will stay at 1 regardless how the CV value varies until "CLR" input changes to 1.
6-7

SET
(Set coil or all the bits of register to 1)
SET D P
SET D P
Symbol
Operand
Ladder symbol
Set control
Range
Operand
D
DP
SET
EN
D: destination to be set
SM
(the number of a coil or a register)
WY
WM
WS
Y0
M0 M1912 S0
WY0
WM0
WS0
Y255 M1911 M2001 S999 WY240 WM1896 WS984
TMR CTR
T0
T255
HR
OR
SR
ROR
DR
C0
R0 R3904 R3968 R5000 D0
C255 R3839 R3967 R4167 R8071 D4095
Description
When the set control "EN" =1 or "EN" ( P instruction ) is from 0 to 1, sets the bit of a coil or all bits of a
register to 1.
Example 1
Single Coil Set
Ladder Diagram
X0
EN
P
SET
EN
P
RST
X1
X0
SET
X1
RST
Y0
6-8

SET
(Set coil or all the bits of register to 1)
SET D P
Example 2
SET D P
Set 16-Bit Register
Ladder Diagram
X0
EN
R0
P
SET
B15
B0
1 0 1 1 0 1 1 0 1 1 1 0 1 1 0 0
X01
B15
B0
Example 3
R0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
32-Bit Register Set
Ladder Diagram
X0
B31
D
EN SET
R1
R0
R0
B0
1 0 1 1 0 1 1 0 1 0 1 1 1 0 1 1 1 1 1 1 0 1 0 1 1 0 1 1 0 0 0 1
X01
D
R0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
6-9

RESET
(Reset the coil or the register to 0)
RST D P
RST D P
Symbol
Operand
Ladder symbol
Reset control
Range
Operand
D
DP
RST
EN
Y
Y0
Y255
SM
D: Destination to be reset
(the number of a coil or a register)
WY
WM
WS
M0 M1912 S0
WY0
WM0
WS0
M1911 M2001 S999 WY240 WM1896 WS984
TMR
CTR
T0
T255
C0
R0 R3904 R3968 R5000 D0
C255 R3839 R3967 R4167 R8071 D4095
HR
OR
SR
ROR
Description
When the reset control "EN" =1 or "EN" ( P instruction ) from 0 to 1, resets the coil or register to 0.
Example 1
Single Coil Reset
Please refer to example 1 for the SET instruction shown in page 6-8.
Example 2
16-Bit Register Reset
Ladder Diagram
X0
EN
P
RST
6 - 10
DR

RESET
(Reset the coil or register to 0)
RST D P
R0
RST D P
B15
B0
1 1 0 1 1 1 1 0 1 1 1 1 1 1 1 0
X01
D
Example 3
R0
B15
B0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
32-Bit Register Reset
Ladder Diagram
X0
M1399
D
EN RST
WM1384
WM1368
WM1368
WM1368
M1368
0 1 1 0 1 1 1 0 0 0 0 0 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1
X01
D
WM1368
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
6 - 11

FUN 0
MC
FUN 0
MC
Symbol
Operand
Ladder symbol
Master control
EN
0.
MC
N: Master Control Loop number (N=0~127)
the number N cannot be used repeatedly.
Description
There are a total of 128 MC loops (N=0~127). Every Master Control Start instruction, MC N, must
correspond to a Master Control End instruction, MCE N, which has the same loop number as MC N.
They must always be used in pairs and you should also make sure that the MCE N instruction is after the
MC N instruction.
When the Master Control input "EN/" is 1, then this MC N instruction will not be executed, as it does not
exist.
When the Master Control input "EN/" is 0, the master control loop is active, the area between the MC N
and MCE N is called the Master Control active loop area. All the status of OUT coils or Timers within
Master Control active loop area will be cleared to 0. Other instructions will not be executed.
Example
Ladder Diagram
X0
EN
0.
MC
1
Y0
X1
X2
1S
T201
10
Y1
T201
1.
MCE
1
Y2
X1
6 - 12

FUN 0
MC
FUN 0
MC
X0
X1
X2
10
T201
Y0
Y1
10S
Y2
Remark1:MC/MCE instructions can be used in nesting or
interleaving as shown to the right:
Remark2:When M1918=0 and the master input changes from
01, and if pulse type function instructions exist in
the master control loop, then these instructions will
have a chance to be executed only once (when the
first time the master control input changes from 01).
Afterwards, no matter how many times the master
control input changes from 01, the pulse type
function instructions will not be executed again.
When M1918=1 and the master control input
changes from 0 1, and if pulse type function
instructions exist in the master control loop, then
each time the master control input changes from 0
1 the pulse type function instructions in the master
control loop will be executed as long as the action
conditions are satisfied.
When a counting instruction exists in the master
control loop, set M1918 to 0 can avoid counting error.
When the pulse type function instructions in the
master control loop must act upon the 01 input
change by the master control, the flag M1918 should
be set to 1.
6 - 13
X0
MC
0.
MC
MC
0.
MC
MC
0.
MC
MC
1.
MC
MC
1.
MC
MC
1.
MC
X1
X2

FUN 1
MCE
FUN 1
MCE
MASTER CONTROL LOOP END
Symbol
Operand
N: Master Control End number (N=0~127) N
can not be used repeatedly.
Description
Every MCE N must correspond to a Master Control Start instruction. They must always be used as a pair
and you should also make sure that the MCE N instruction is after the MC N instruction. After the MC N
instruction has been executed, all output coil status and timers will be cleared to 0 and no other instructions
will be executed. The program execution will resume until a MCE instruction which has the same N number
as MC N instruction appears.
MCE instruction does not require an input control because the instruction itself forms a network which other
instructions can not connect to it. If the MC instruction has been executed then the master control operation
will be completed when the execution of the program reaches the MCE instruction. If MC N instruction has
never been executed then the MCE instruction will do nothing.
Description
Please refer to the example and explanations for MC instruction.
6-14

FUN 2
SKP
FUN 2
SKP
SKIP START
Symbol
Operand
Ladder symbol
Skip control
EN
2.
SKP
N: Skip loop number (N=0~127),
N can not be used repeatedly.
Description
There are total 128 SKP loops (N=0~127). Every skip start instruction, SKP N, must correspond to a skip
end instruction, SKPE N, which has the same loop number as SKP N. They must always be used as a pair
and you should also make sure that the SKPE N instruction is after the SKP N instruction.
When the skip control "EN" is 0, then the Skip Start instruction will not be executed.
When the skip control "EN" is 1, the range between the SKP N and SKPE N which is so called the Skip
active loop area will be skipped, that is all the instructions in this area will not be executed. Therefore the
statuses of the discrete or registers in this Skip active loop area will be retained.
Example
Ladder Diagram
X0
2.
EN SKP
1
Y0
X1
X2
1S
EN T201
10
Y1
T201
3.
SKPE
1
Y2
X1
6 - 15

FUN 2
SKP
FUN 2
SKP
SKIP START
X0
X1
X2
10
T201
Y0
10S
Y1
Y2
6-16

FUN 3
SKPE
FUN 3
SKPE
SKIP END
Symbol
Operand
N SKIP END Loop number (N=0~127) N
can not be used repeatedly.
Description
Every SKPE N must correspond to a SKP N instruction. They must always be used as a pair and you
should also make sure that the SKPE N instruction is behind the SKP N instruction.
SKPE instruction does not require an input control because the instruction itself forms a network which
other instructions can not connect to it. If the SKP N instruction has been executed then the skip operation
will be completed when the execution of the program reaches the SKPE N instruction. If SKP N instruction
has never been executed then the SKPE instruction will do nothing.
Example
Please refer to the example and explanations for SKP N instruction.
Remark : SKP/SKPE instructions can be used by nesting or interleaving. The coding rules are the same as for
the MC/MCE instructions. Please refer to the section of MC/MCE instructions.
6 - 17

FUN 4
DIFU
FUN 4
DIFU
DIFFERENTIAL UP
Symbol
Operand
Ladder symbol
Input status
TGU
4.
DIFU
D: a specific coil number where the result of
the Differential Up operation is stored.
SM
Y0
Y255
M0
M1911
M1912
M2001
S0
S999
Range
Operand
D
Description
The DIFU instruction is used to output the up differentiation of a node status (status input to "TGU") and
the pulse signal resulting from the status change at the rising edge of the "TG" for one scan time is
stored to a coil specified by D.
The functionality of this instruction can also be achieved by using a TU contact.
Example
The results of the following two samples are exactly the same
Ladder Diagram
Example 1
X1
TG
TGU
4.
DIFU Y
Example 2
Y0
X1
X1
t
t : scan time
Y0
6-18

FUN 5
DIFD
FUN 5
DIFD
DIFFERENTIAL DOWN
Symbol
Operand
Ladder symbol
Input status
TGD
5.
DIFD
N: a specific coil number where the result of
the Differential Down operation is stored.
Range
SM
Y0
M0
M1912 S0
Y255 M1911 M2001 S999
Operand
D
Description
The DIFD instruction is used to output the down differentiation of a node status (status input to "TGD")
and the pulse signal resulting from the status change at the falling edge of the "TGD" for one scan time is
stored to a coil specified by D.
The functionality of this instruction can also be achieved by using a TD contact.
Example
The results of the following two samples are exactly the same.
Ladder Diagram
Example 1
X1
TG
TGD
5.
DIFD Y
Example 2
Y0
X1
X1
t
Y0
6 - 19
t : scan time

FUN 6 D P
BSHF
BIT SHIFT
(Shifts the data of the 16-bit or 32-bit register to left or to right by one bit)
FUN 6 D P
BSHF
Symbol
Shift control
EN
Ladder symbol
6DP.BSHF
D:
OTB
Operand
Shift-out bit (FO0)
D: The register number for shifting

Fill-in bit
INB
Range
Shift direction
L/R
Clear control
CLR
WY
WM
WS
TMR CTR
HR
OR
SR
ROR
DR
WY0
WM0
WS0
T0
C0
R0 R3904 R3968 R5000
D0
WY240 WM1896 WS984 T255 C255 R3839 R3967 R4167 R8071 D4095
Operand
D
Description
When the status of clear control "CLR" is at 1, then the data of register D and FO0 will all be cleared to 0.
Other input signals are all in effect.
When the status of clear control is "CLR" at 0, then the shift operation is permissible. When the shift control
"EN" = 1 or "EN" ( P instruction) from 0 to 1, the data of the register will be shifted to right (L/R=0) or to
left (L/R=1) by one bit. The shifted-out bit (MSB when shift to left and LSB when shift to right) for both
cases will be sent to FO0. The vacated bit space (LSB when shift to left and MSB when shift to right) due to
shift operation will be filled in by the input status of fill-in bit "INB".
Example
Shifts the 16-bit register data

Ladder diagram
X1
EN
6P.BSHF
D : R 3
Y0
OTB
X2
INB
X3
L/R
X4
CLR
B15
X3=1
(Left shift)
Y0
X2
Shifts the 16-bit data to left by one bit

B15
X3=0
(Right shift)
B0

B0

X2
Shifts the 16-bit data to right by one bit
6 - 20
Y0

FUN 7 D
UDCTR
FUN 7 D
UDCTR
UP/DOWN COUNTER
(16-bit or 32-bit up and down 2-phase Counter)
Symbol
Ladder symbol
Clock
PLS
Up/Down count
U/D
Clear counter
CLR
Range
Operand
CV
PV
WX
7D.UDCTR
CV :
Operand
Count-UP (FO0)
CUP
CV: The number of the Up/Down Counter

PV: Preset value of the counter or it's
PV :
WY
register number
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
16/32-bit
+/ number
WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095
Description
When the clear control CLR is 1, the counters CV will be reset to 0 and the counter will not be able to
count.
When the clear control CLR is 0, counting will then be allowed. The nature of the instruction is a P
instruction. Therefore, when the clock PLS is 01 (rising edge), the CV will increased by 1 (if U/D=1) or
decreased by 1 (if U/D=0).
When CV=PV, FO0(Count-Up) will change to 1. If there are more clocks input, the counter will continue
counting which cause CVPV. Then, FO0 will immediately change to 0. This means the Count-Up signal
will only be equal to 1 if CV=PV, or else it will be equal to 0 (Care should be taken to this difference from
the Count-Up signal of the general counter).
The upper limit of up count value is 32767 (16-bit) or 2147483647 (32-bit). After the upper limit is reached,
if another up count clock is received, the counting value will become 32768 or -2147483648 (the lower
limit of down count).
The lower limit of down count value is -32767 (16-bit) or -2147483647 (32-bit). After the lower limit is
reached, if another down count clock is received, the counting value will become 32768 or 2147483648
(the upper limit of up count).
If U/D is fixed as 1, the instruction will become a single-phase up count counter. If U/D is fixed as 0, the
instruction will become a single-phase down count counter.
Example
The diagram below is an application example of UDCTR instruction being applied to an encoder.
Red (POWER + 24VDC)
Green (B phase)
White (A phase)
2-phase encoder
Black
SW
X16
X17
Controller
PLC
6 - 21
X18

FUN 7 D
UDCTR
FUN 7 D
UDCTR
UP/DOWN COUNTER
(16-bit or 32-bit up/down 2-phase Counter)
Ladder Diagram
7.UDCTR
X18
Y0
0
CV : R
CK
PLS
CUP
X17
U/D PV :
X16
CLR
Up(add)
Down(subtract)
X16
X17
X18
R0
0
-1
-2
-3
-4
Y0
Remark 1: Since the counting operation of UDCTR is implemented by software scanning, therefore if the clock
speed is faster than the scan speed, lose count may then happen (generally the clock should not
exceed 20Hz depending on the size of the program). Please use the software or hardware high-speed
counter in the controller. Refer to the High Speed Counter Application in the Advanced Manual.
Remark 2: In order to ensure the proper counting, the sustain time of the status of clock input should greater than
1 scan time.
6 - 22

FUN 8 D P
MOV
FUN 8 D P
MOV
MOVE
(Moves data from S to D)
Description
Ladder symbol
Move control
Operand
8DP.MOV
S :
EN
S: Source register number

D: Destination register number
D :
The S, N, D may combine with V, Z, P0~P9 to serve

indirect addressing
Range
Operand
S
D
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
WX0
C0
R0
WY0
WM0
WS0
T0
R3840 R3904 R3968 R5000
D0
VZ
16/32-bit
+/ number
P0~P9
Description
Move (write) the data of S to a specified register D when the move control input "EN" =1 or "EN" ( P
instruction) from 0 to 1.
Example
Writes a constant data into a 16-bit register.
Ladder Diagram
X0
EN
8P.MOV
S :
R
D :
10
X01
D
R0
10
6 - 23
10
0

FUN 9 D P
MOV/
FUN 9 D P
MOV/
MOVE INVERSE
(Inverts the data of S and moves the result to a specified device D)
Symbol
Ladder symbol
Move control
Operand
9DP.MOV/
S :
EN
S: Source register number

D: Destination register number
D :
S, N, D may combine with V, Z, P0~P9 to serve

indirect addressing
Range
Operand
S
D
WX
WY
WM
WS
WX0
WY0
WM0
WS0
WX240 WY240 WM1896 WS984
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
C0
R0
T0
R3840 R3904 R3968 R5000
D0
VZ
16/32-bit
+/ number
P0~P9
T255 C255 R3839 R3847 R3967 R4167 R8071 D4095
Description
Inverts the data of S (changes the status from 0 to 1 and from 1 to 0) and moves the results to a specified
register D when the move control input "EN" =1 or "EN" ( P instruction) from 0 to1.
Example
Moves the inverted data of a 16-bit register to another 16-bit register.
Ladder Diagram
X0
EN
9.MOV/
R
S :
WY
D :
B15
R0
B0
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 5555H
Y23
X01
WY8
0
8
Y8
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 AAAAH
6 - 24

FUN 10
TOGG
TOGGLE SWITCH
(Changes the output status when the rising edge of control input occur)
FUN 10
TOGG
Symbol
Operand
D: the coil number of the toggle switch
Range
SM
M0 M1912 S0
Y0
Y255 M1911 M2001 S999
Operand
D
Description
The coil D changes its status (from 1 to 0 and from 0 to 1) each time the input "TGU" is triggered from 0
to 1 (rising edge).
Example
Ladder Diagram
X0
10.
TG TOGG Y
TGU
X0
Y0
6-25

FUN 11 D P
ADDITION
(Performs addition of the data specified at Sa and Sb and stores the result in D)
FUN 11 D P
Symbol
Operand
Sa: Augend
Sb: Addend
D : Destination register to store the results
of the addition
Sa, Sb, D may combine with V, Z, P0~P9
to serve indirect addressing
Range
Operand
Sa
Sb
D
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
VZ
16/32-bit
+/ number
P0~P9
Description
Performs the addition of the data specified at Sa and Sb and writes the results to a specified register D
when the add control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If the result of addition is equal to
0 then set FO0 to 1. If carry occurs (the result exceeds 32767 or 2147483647) then set FO1 to 1. If borrow
occurs (adding negative numbers resulting in a sum less than -32768 or -2147483648), then set the FO2 to
1. All the FO statuses are retained until this instruction is executed again and overwritten by a new result.
Example
16-bit addition
Ladder Diagram
11P.(+)
X0
Sa : R
Sb : R
U/S D : R
EN
D=0
Y0
CY
BR
Sa
Sb
R0
R1
12345
20425
R0R132770
X01
D
R2
32768+2=32770
Y01 (carry 1 represents 32768)
6-26

FUN 12 D P
SUBTRACTION
(Performs subtraction of the data specified at Sa and Sb and stores the result in D)
FUN 12 D P
Symbol
Operand
Sa: Minuend
Sb: Subtrahend
D : Destination register to store the
results of the subtraction
Range
Operand
Sa
Sb
D
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
VZ
16/32-bit
+/ number
P0~P9
Description
Performs the subtraction of the data specified at Sa and Sb and writes the results to a specified register D
when the subtract control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If the result of subtraction is
equal to 0 then set FO0 to 1. If carry occurs (subtracting a negative number from a positive number and the
result exceeds 32767 or 2147483647), then set FO1 to 1. If borrow occurs (subtracting a positive number
from a negative number and the resulted difference is less than -32768 or -2147483648), then set FO2 to 1.
All the FO statuses are retained until this instruction is executed again and overwritten by a new result.
Example
16-bit subtraction
Ladder Diagram
X0
12P.(-)
EN Sa : R
Sb : R
D : R
D=0
CY
Y2
BR
Sa
R0
Sb
R1
32767
R0R132772
X01
D
R2
32768432772
Y21borrow 1 represents32768Please refer to section 5.4
6-27

FUN 13 D P
MULTIPLICATION
(Performs multiplication of the data specified at Sa and Sb and stores the result in D)
FUN 13 D P
Symbol
Operand
Sa: Multiplicand
Sb: Multiplier
D : Destination register to store the
results of the multiplication.
Sa, Sb, D may combine with V, Z,
P0~P9 to serve indirect addressing
Range
Operand
Sa
Sb
D
WX
WY
WM
WS
TMR CTR
WX0
WY0
WM0
WS0
WX240 WY240 WM1896 WS984
T0
T255
HR
IR
OR
SR
ROR
DR
XR
C0
R0 R3840 R3904 R3968 R5000 D0
VZ
16/32-bit
+/ number
P0~P9
C255 R3839 R3903 R3967 R4167 R8071 D4095
Description
Performs the multiplication of the data specified at Sa and Sb and writes the results to a specified register
D when the multiplication control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If the product of
multiplication is equal to 0 then set FO0 to 1. If the product is a negative number, then set FO1 to 1.
Example 1
16-bit multiplication
Ladder Diagram
13P.(*)
X0
Sa : R
Sb : R
U/S D : R
EN
Sa
R0
12345
R1
Sb
4567
R3
R2
56379615
6-28
D=0
D<0
Multiplicand
Multiplier
Product

FUN 13 D P
Example 2
MULTIPLICATION
(Performs multiplication of the data specified at Sa and Sb and stores the result in D)
32-bit multiplication
Ladder Diagram
13D.(*)
X0
EN
Sa : R
D=0
Sb : R
2
4
D<0
U/S D : R
R1
Sa
R7
R0
12345678
R3
Sb
R2
456
R6
R5
5629629168
6-29
R4
Multiplicand
Multiplier
Product
FUN 13 D P

FUN 14 D P
DIVISION
(Performs division of the data specified at Sa and Sb and stores the result in D)
FUN 14 D P
Symbol
Operand
Sa: Dividend
Sb: Divisor
of the division.
Range
Operand
Sa
Sb
D
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
R0 R3840 R3904 R3968 R5000 D0

C0
T0
WS0
WM0
WY0
WX0
16/32-bit
+/ number
XR
VZ
P0~P9
Description
Performs the division of the data specified at Sa and Sb and writes the quotient and remainder to registers
specified by register D when the division control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If the
quotient of division is equal to 0 then set FO0 to 1. If the divisor Sb=0 then set the error flag FO1 to 1 without
executing the instruction.
Example 1
16-bit division
Ladder Diagram
14P.(/)
X0
EN Sa: R
Sb: R
U/S D :
Sa
Sb
R3
R0
256
R1
12
R2
21
Remainder
Quotient
6-30
D=0
ERR
Dividend
Divisor

FUN 14 D P
Example 2
DIVISION
(Performs division of the data specified at Sa and Sb and stores the result in D)
32-bit division
Ladder Diagram
14D.(/)
X0
EN Sa: R
D=0
Sb: R
0
2
ERR
U/S D :
R1
Sa
2147483647
R3
Sb
R7
R0
R2
1234567
R6
R5
R4
571634
1739
Remainder
Quotient
6-31
Dividend
Divisor
FUN 14 D P

INCREMENT
FUN 15 D P
1
FUN 15 D P
1
(Adds 1 to the D value)
Operand
D : The register to be increased
D may combine with V, Z, P0~P9 to serve
indirect addressing
Range
Operand
D
TMR
CTR
T0
WS0
WM0
WY0
WY240 WM1896 WS984 T255
WY
C0
C255
WM
WS
HR
OR
HR
HSCR RTCR
SR
ROR
DR
XR
D0
R3904 R3920 R4096 R4128 R4136 R5000
R0
V Z
R3839 R3919 R4047 R4127 R4135 R4167 R8071 D4095 P 0 ~ P 9
Adds 1 to the register D when the increment control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If
the value of D is already at the upper limit of positive number 32767 or 2147483647, adding one to this
value will change it to the lower limit of negative number -32768 or -2147483648. At the same time, the
overflow flag FO0 (OVF) is set to 1.
Example
16-bit increment register
Ladder diagram
X0
EN
15.
(+1)
0V OVF
When V1000100100
D
R100
X01
D
R100
6-32

DECREMENT
FUN 16 D P
1
FUN 16 D P
1
(Subtracts 1 from the D value)
Operand
D : The register to be decreased
D may combine with V, Z, P0~P9 to
serve indirect addressing
Range
Operand
D
WY
WM
WS
TMR CTR
HR
OR
HR
HSCR RTCR
SR
ROR
DR
XR
WY0
WM0
WS0
T0
C0
R0
R3904 R3920 R4096 R4128 R4136 R5000
D0
V Z
WY240 WM1896 WS984 T255 C255 R3839 R3919 R4047 R4127 R4135 R4167 R8071 D4095 P 0 ~ P 9
Description
Subtracts 1 from the register D when the decrement control input "EN" =1 or "EN" ( P instruction) from 0
to 1. If the value of D is already at the lower limit of negative number -32768 or -2147483648, subtracting
one from this value will change it to the upper limit of positive number 32767 or 2147483647. At the same
time, the underflow flag FO0 (UDF) is set to 1.
Example
16-bit decrement register
Ladder diagram
X0
EN
16P.
(-1)
R0
X01
D
R0
6-33
UDF

COMPARE
FUN 17 D P
CMP
FUN 17 D P
CMP
(Compares the data of Sa and Sb and outputs the results to function Outputs)
Ladder symbol
EN
Compare control
17DP.CMP
Sa :
Operand
a=b
Sa=Sb (FO0)
a>b
Sa>Sb (FO1)
Sa: The register to be compared
Sb :
Unsign/Sign
Sb: The register to be compared
U/S
Sa, Sb may combine with V, Z, P0~P9 to

WX
Range
Operand
WY
WM
WS
WS0
WM0
WY0
WX0
WX240 WY240 WM1896 WS984
a<b
Sa<Sb (FO2)
TMR
CTR
HR
T0
T255
C0
C255
IR
OR
HR
HSCR RTCR
SR
ROR
DR
R3804 R3904 R3920 R4096 R4128 R4136 R5000 D0

R0
16/32 bit
+/-number
R3839 R3903 R3919 R4047 R4127 R4135 R4167 R8071 D4095
Sa
Sb
Compares the data of Sa and Sb when the compare control input "EN" =1 or "EN" ( P instruction) from 0 to
1. If the data of Sa is equal to Sb, then set FO0 to 1. If the data of Sa>Sb, then set FO1 to 1. If the data of
Sa<Sb, then set FO2 to 1.
Example
Compares the data of 16-bit register

Ladder diagram
17.CMP
X0
EN
Sa : R
Sb :
a=b
a>b
U/S
Y0
a<b
From the above example, we first assume the data of R0 is 1 and R1 is 2, and then compare the data by
executing the CMP instruction. The FO0 and FO1 are set to 0 and FO2 (a<b) is set to 1 since a<b.
If you want to have the compound results, such as< > etc., please send =< and > results to relay first
and then combine the result from the relays.
M1919=0, when this command in not executed, FO0, FO1, FO2 will remain in the status at last execution.
M1919=1, when this command in not executed, FO0, FO1, FO2 are all cleared to 0.
Control M1919 properly to obtain memory-holding function for functional command output.
6-34

FUN 18 D P
AND
FUN 18 D P
AND
LOGICAL AND
Operand
Sa: The register to be ANDed
Sb: The register to be ANDed
D : The register to store the result of AND
The Sa, Sb, D may combine with V, Z, P0~P9 to
serve indirect addressing application
WX
Range
Operand
WY
WM
WS
TMR CTR
HR
IR
OR
HR
HSCR RTCR
Sa
Sb
SR
ROR
DR
D0
R3804 R3904 R3920 R4096 R4128 R4136 R5000
R0
C0
T0
WS0
WM0
WY0
WX0
16/32 bit
+/-number
WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3919 R4047 R4127 R4135 R4167 R8071 D4095
Performs logical AND operation for the data of Sa and Sb when the operation control input "EN" =1 or "EN"
( P instruction) from 0 to 1. This operation compares the corresponding bits of Sa and Sb (B0~B15 or
B0~B31). The bit in the D is set to 1 if both of the corresponding bits data of Sa and Sb is 1. The bit in the D is
set to 0 if one of the corresponding bits is 0.
Example
Operation of 16-bit logical AND
Ladder diagram
18P.AND
X0
EN
Sa : R
Sb : R
D :
B15
D=0
B0
Sa
R0
1 0 1 1 1 0 1 1 0 1 1 0 1 1 0 1
Sb
R1
1 1 1 0 1 1 1 0 1 0 1 0 0 1 1 0
X01
B15
R2
B0
1 0 1 0 1 0 1 0 0 0 1 0 0 1 0 0
6-35

FUN 19 D P
OR
FUN 19 D P
OR
LOGICAL OR
Operand
Sa: The register to be ORed
Sb: The register to be ORed
D : The register to store the result of OR
The Sa, Sb, D may combine with V, Z, P0~P9 to
WX
Range
Operand
WY
WM
WS
TMR CTR
HR
IR
OR
HR
HSCR RTCR
SR
ROR
DR
D0
WX0
WY0
WM0
WS0
T0
C0
R0
R3804 R3904 R3920 R4096 R4128 R4136 R5000
16/32 bit
+/-number
Sa
Sb
Performs logical OR operation for the data of Sa and Sb when the operation control input "EN" =1 or "EN"
( P instruction) from 0 to 1. This operation compares the corresponding bits of Sa and Sb (B0~B15 or
B0~B31). The bit in the D is set to 1 if one of the corresponding of Sa or Sb is 1. The bit in the D is set to 0 if
both of the corresponding bits of Sa and Sb is 0.
Example
Operation of 16-bit logical OR
Ladder diagram
19.OR
X0
EN
Sa : R
Sb : R
D :
B15
D=0
B0
Sa
R0
1 0 1 1 1 0 1 1 0 1 1 0 1 1 0 1
Sb
R1
1 1 1 0 1 1 1 0 1 0 1 0 0 1 1 0
X01
B15
R2
B0
1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1
6-36

BIN TO BCD CONVERSION
FUN 20 D P
BCD
FUN 20 D P
BCD
(Converts BIN data of the device specified at S into BCD and stores the result in D)
Ladder symbol
Conversion control
EN
20DP.
S :
Operand
BCD
ERR
S : The register to be converted
Error (FO0)
D : The register to store the converted data
D :
(BCD code)
The S, D may combine with V, Z, P0~P9 to serve
indirect addressing
Range WX
Operand
S
WY
WM
WS
TMR CTR
HR
IR
OR
HR
HSCR RTCR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0 R3804 R3940 R3920 R4096 R4128 R4136 R5000 D0
16/32 bit
+/- number
WSZ-controller uses binary code to store and to execute calculations. If want to send the internal controller
data to the external displays such as seven-segment displays, it is more convenient for us to read the result
on screen by converting the BIN data to BCD data. For example, it is more clear for us to read the reading
"12" instead of the binary code "1100."
Converts BIN data of the device specified at S into BCD and writes the result in D when the convertion
control "EN" =1 or "EN" ( P instruction) from 0 to 1. If the data in S is not a BCD value (0~9999 or
0~9999999), then the error flag FO0 is set to 1 and the old data of D are retained.
Example
16-bit BIN to BCD conversion
Ladder diagram
X0
EN
20.
BCD
S :
9999
D :
B15
ERR
0
B0
0 0 1 0 0 1 1 1 0 0 0 0 1 1 1 1
X01
B15
R0
B0
1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
6-37

FUN 21 D P
BIN
BCD TO BIN CONVERSION
FUN 21 D P
BIN
(Converts BCD data of the device specified at S into BIN and stores the result in D)
Operand
S : The register to be converted
D : The register to store the converted data
(BIN code)
The S, D may combine with V, Z, P0~P9 to
Range
Operand
S
D
WX
WY
WM
WS
TMR CTR
HR
IR
OR
HR
HSCR RTCR
SR
ROR
DR
D0
R3840 R3904 R3920 R4096 R4128 R4136 R5000
R0
C0
T0
WS0
WM0
WY0
WX0
The decimal (BCD) data must be converted to binary (BIN) data first in order for controller to accept the
data which is originally in decimal unit (BCD code) inputted from external device such as digital switch
because the BCD data can not be accepted by controller for its operations.
Converts BCD data of the device specified at S into BIN and writes the result in D when the operation
control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If the data in S is not in BCD, then the error flag
FO0 is set to 1 and the old data of D are retained.
Constant is converted to BIN automatically when store in program and can not be used as a source
operand of this function.
Example
16-bit BCD to BIN conversion
Ladder diagram
21P. BIN
X0
EN
X15
S :
WX
D :
ERR
X0
WX0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
X01
B15
R1
B0
0 0 0 0 0 1 0 0 1 1 1 1 0 0 1 0
6-38
Chapter 7 Advanced Function Instructions

z

(FUN22) ....................................................7-1
48-BIT DIVISION
(FUN23) ....................................................7-2
SUM
(FUN24) ................................................... 7-3
MEAN
(FUN25) ....................................................7-4
SQUARE ROOT
(FUN26) ................................................... 7-5
NEGATION
(FUN27) ................................................... 7-6
ABSOLUTE
(FUN28) ................................................... 7-7
SIGN EXTENSION
(FUN29) ................................................... 7-8

(FUN30) ....................................................7-9
CRC16 CALCULATION
(FUN31) ................................................... 7-10
CONVERTING THE RAW VALUE OF 4 ~20MA ANALOG INPUT

(FUN32) ................................................... 7-11
EXCLUSIVE OR
(FUN35) ................................................... 7-12
EXCLUSIVE NOR
(FUN36) ................................................... 7-13
ZONE COMPARE
(FUN37) ................................................... 7-14
BIT READ
(FUN40) ................................................... 7-15
BIT WRITE
(FUN41) ....................................................7-16
BIT MOVE
(FUN42) .................................................. . 7-17
NIBBLE MOVE
(FUN43) ....................................................7-18
BYTE MOVE
(FUN44) ....................................................7-19
EXCHANGE
(FUN45) .................................................... 7-20
BYTE SWAP
(FUN46) .................................................. . 7-21
NIBBLE UNITE
(FUN47) ....................................................7-22
NIBBLE DISTRIBUTE
(FUN48) ....................................................7-23
BYTE UNITE
(FUN49) ....................................................7-24
BYTE DISTRIBUTE
(FUN50) ....................................................7-25
SHIFT LEFT
(FUN51) ....................................................7-26
SHIFT RIGHT
(FUN52) ....................................................7-27
ROTATE LEFT
(FUN53) ....................................................7-28
ROTATE RIGHT
(FUN54) ....................................................7-29

(FUN55) ....................................................7-30

(FUN56) ....................................................7-32
DECODE
(FUN57) ....................................................7-34
ENCODE
(FUN58) ....................................................7-35
(FUN59) ....................................................7-37
ASCII CONVERSION
(FUN60) ....................................................7-40

(FUN61) ....................................................7-41
SECONDHOUR : MINUTE : SECOND

(FUN62) ....................................................7-42

(FUN63) ....................................................7-43

(FUN64) ....................................................7-45
PROGRAM END
(END) ........................................................7-47
LABEL
(FUN65) ....................................................7-48
JUMP
(FUN66) ....................................................7-49
CALL
(FUN67) ....................................................7-50
(FUN68) ....................................................7-51
(FUN69) ....................................................7-52
FOR
(FUN70) ....................................................7-53
LOOP END
(FUN71) ....................................................7-54
IMMEDIATE IO
(FUN74) ....................................................7-55
DECIMAL-KEY INPUT
(FUN76) ....................................................7-56
HEX-KEY INPUT
(FUN77) ....................................................7-58
(FUN78) ....................................................7-59
7-SEGMENT OUTPUT WITH LATCH (FUN79) ....................................................7-60
MULTIPLEX INPUT
(FUN80) ....................................................7-62
PULSE OUTPUT
(FUN81) ....................................................7-63
(FUN82) ....................................................7-65
SPEED DETECTION
(FUN83) ....................................................7-66
CUMULATIVE TIMER
(FUN87 ~89) .............................................7-67
WATCHDOG TIMER
(FUN90) ....................................................7-69
(FUN91) ....................................................7-70
HARDWARE HIGH SPEED COUNTER CURRENT VALUE(CV) ACCESS

(FUN92) ....................................................7-71
HARDWARE HIGH SPEED COUNTER CURRENT VALUE AND PRESET VALUE

WRITING
(FUN93) ....................................................7-72
ASCII WRITE
(FUN94) ....................................................7-73
RAMP FUNCTION FOR DA OUTPUT

(FUN95) ....................................................7-75
(FUN100) ..................................................7-78
(FUN101) ..................................................7-79
TABLE TO TABLE MOVE
(FUN102) ..................................................7-80
BLOCK TABLE MOVE
(FUN103) ..................................................7-81
BLOCK TABLE SWAP
(FUN104) ..................................................7-82
(FUN105) ..................................................7-83
(FUN106) ..................................................7-84
TABLE FILL
(FUN107) ..................................................7-85
TABLE SHIFT
(FUN108) ..................................................7-86
TABLE ROTATE
(FUN109) ..................................................7-87
QUEUE
(FUN110) ..................................................7-88
STACK
(FUN111) ..................................................7-90
BLOCK COMPARE(DRUM)
(FUN112) ..................................................7-92
DATA SORTING
(FUN113) ..................................................7-94
ZONE WRITE
(FUN114) ..................................................7-95
MATRIX AND
(FUN120) ..................................................7-97
MATRIX OR
(FUN121) ..................................................7-98
MATRIX EXCLUSIVE OR(XOR)
(FUN122) ..................................................7-99
MATRIX EXCLUSIVE NOR(XNR)
(FUN123) ..................................................7-100
MATRIX INVERSE
(FUN124) ..................................................7-101
MATRIX COMPARE
(FUN125) ..................................................7-102
MATRIX BIT READ
(FUN126) ..................................................7-103
MATRIX BIT WRITE
(FUN127) ..................................................7-104
MATRIX BIT SHIFT
(FUN128) ..................................................7-105
MATRIX BIT ROTATE
(FUN129) ..................................................7-106
(FUN130) ..................................................7-107

(FUN139) ..................................................7-108

(FUN140) ..................................................7-110

(FUN141) ..................................................7-111
STOP THE HSPSO PULSE OUTPUT (FUN142) ..................................................7-112

(FUN143) ..................................................7-113

(FUN145) ..................................................7-114

(FUN146) ..................................................7-115
(FUN150) ..................................................7-116

(FUN151) ..................................................7-117
READWRITE FILE REGISTER
(FUN160) ..................................................7-118
CONVERSION OF INTEGER TO FLOATING POINT NUMBER

(FUN200) ..................................................7-120

(FUN201) ..................................................7-121

(FUN202) ..................................................7-122

(FUN203) ..................................................7-123

(FUN204) ..................................................7-124

(FUN205) ..................................................7-125

(FUN206) ..................................................7-126

(FUN207) ..................................................7-127

(FUN208) ..................................................7-129

(FUN209) ..................................................7-130

(FUN210) ..................................................7-131

(FUN211) ..................................................7-132

(FUN212) ..................................................7-133

(FUN213) ..................................................7-134
Advanced Function Instruction

FUN22 P
BREAK

BREAK
FUN22 P
BREAK
When execution controlEN=1 orEN P instructionchanges from 01it will terminate the FOR
and NEXT program loop.
The program within the FOR and NEXT loop will be executed N times (N is assigned by FOR instruction)
successively, but if it is necessary to terminate the execution loop less than N times, the BREAK instruction
is necessary to apply.
The BREAK instruction must be located within the FOR and NEXT program loop.
EN RST
70
FOR
D10
EN
17.CMP
Sa :
D100
R0V
Sb :
M200
a=b
a>b
a<b
M200
EN
EN
BREAK
15
(+1)
OVF
71
NEXT
08.MOV
EN S :
V
D1000
D :
DescriptionThe loop count used to execute the FOR and NEXT program loop is assigned by register D10the
program within the FOR and NEXT loop is designed to search the same data storing in D100 from the
register table starting at R0.If it finds, the searching loop will be terminated and then it goes to execute
the program after the NEXT instructionIf it doesn't find, the searching loop will be executed N times (N
is the content of D10) and then it goes to execute the program after the NEXT instruction.
M200 tells the status and D1000 is the pointer of searching.
7-1

FUN 23 P
DIV48
FUN 23 P
DIV48
48-BIT DIVISION
SaStarting register of dividend

SbStarting register of divisor
D : Starting register for storing the division
result (quotient)
Sa, Sb, can combine V, Z, P0~P9 for index
addressing.
Range
HR
OR
SR
ROR
DR
R0 R3904 R3968 R5000 D0
R3839 R3967 R4167 R8071 D4095
Operand
Sa
Sb
D
XR
V, Z
P0~P9
z When operation control EN=1 or EN ( P instruction) changes from 01, will perform the 48 bits division
operation. Dividend and divisor are each formed by three consecutive registers starting by Sa and Sb
respectively. If the result is zero, D=0 output will be set to 1. If divisor is zero then the ERR will be set to 1
and the resultant register will keep unchanged.
z All operands involved in this function are all 48 bits, so Sa, Sb and D are all comprised by 3 consecutive
registers.
Example: 48-bit division

In this example dividend formed by register R2, R1, R0 will be divided by divisor formed by register R5, R4, R3. The
quotient will store in R8, R7, and R6.
23P.DIV48
X0
EN
U/S
Sa : R
Sb : R
D :
D=0
ERR
Sa
Sb
R2
R1
R0
2147483647
R5
R4
R3
1234567
R8
R7
R6
1739
Quotient
7-2

FUN 24 D P
SUM
SUM
(Summation of block data)
FUN 24 D P
SUM
S : Starting number of source register

N : Number of registers to be summed
(successive N data units starting from S)
D : The register which stored the result (summation)
S, N, D, can associate with V, Z, P0~P9 index register to
serve the indirect addressing application.
WX
Range
Operand
S
WY
WM
WS
WX0
WY0
WM0
WS0
WX240 WY240 WM1896 WS984
TMR CTR
HR
IR
OR
SR
ROR
DR
T0
C0
R0 R3840 R3904 R3968 R5000 D0
1
T255 C255 R3839 R3903 R3967 R4167 R8071 D4095 511
XR
V, Z
P0~P9
z When operation control EN=1 or EN ( P instruction) changes from 01, it puts the successive N units of
16 bits or 32 bits ( D instruction) registers for addition calculation to get the summation, and stores the result
into the register which is designated by D.
z When the value of N is 0 or greater than 511, the operation will not be performed.
z Communication port1 or port2 can be used to serve as a general purpose ASCII communication interface. If
the data error detecting method is Check-Sum, this instruction can be used to generate the sum value for
sending data or not use this instruction to check if the received data is error or not.
Example 1When M1 changes from OFFON, following instruction will calculates the summation for 16-bit data.
24P.SUM
M1
EN
S :
z The left illustrates that 6 16-bit registers starting from R0

is calculated for summation, and the result is stored into
the R100 register.
R0
N :
D :
R100
R0=0030H
R1=0031H
R2=0032H
R100=012FH
R3=0033H
R4=0034H
R5=0035H
Example 2When M1 is ON, it calculates the summation for 32-bit data.

24D.SUM
M1
EN
S :
z The left illustrates that three 32-bit registers starting

from DR0, is calculated for their summation, and the
result is stored into the DR100 register.
R0
N :
D :
R100
R1, R0=00310030H
R3, R2=00330032H
R101, R100=00A5009BH
R5, R4=00410039H
7-3

MEAN
(Average of the block data)
FUN 25 D P
MEAN
FUN 25 D P
MEAN
S : Source register number

N : Number of registers to be averaged
(N units of successive registers starting from S
D : Register number for storing result (mean value)
The S, N, D may combine with V, Z, P0~P9 to
serve indirect address application
Range WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
2
D0
R3840 R3904 R3968 R5000
R0
C0
T0
WS0
WM0
WY0
WX0
Operand
S
N
XR
V, Z
P0~P9
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, add the N successive 16-bit or 32-bit
( D instruction) numerical values starting from S, and then divided by N. Store this mean value (rounding off
numbers after the decimal point) in the register specified by D.
z While the N value is derived from the content of the register, if the N value is not between 2 and 256, then the
N range error "ERR" will be set to 1, and do not execute the operation.
z At left, the example program gets the mean value of the

3 successive 16-bit registers starting from R0, and stores
the results into the 16-bit register R10
25P.MEAN
X0
EN
S :
10
N :
D :
S
(N3)
ERR
R0
123
R1
R2
788
1239788
3
X01
D
R10
306 Rouding off the remainder
306
7-4

FUN 26 D P
SQRT
Ladder symbol
Operation control
EN
S : Source register to be taken square root
26DP.SQRT
S :
ERR
S value error
Operand
S
WX
WY
WM
WS
WS0
WM0
WY0
WX0
WX240 WY240 WM1896 WS984
D : Register for storing result

(square root value)
S, D may combine with V, Z, P0~P9 to serve
indirect address application
D :
Range
FUN 26 D P
SQRT
SQUARE ROOT
TMR
CTR
T0
T255
C0
C255
HR
IR
OR
SR
ROR
DR
D0
R3840 R3904 R3968 R5000
R0
16/32-bit
R3839 R3903 R3967 R4167 R8071 D4095
XR
V, Z
P0~P9
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, take the square root (rounding off
numbers after the decimal point) of the data specified by the S field, and store the result into the register
specified by D.
z While the S value is derived from the content of the register, if the value is negative, then the S value error
flag "ERR" will be set to 1, and do not execute the operation.
26DP.SQRT
X0
EN
ERR
S :
z The instruction at left calculates the square root of the

constant 2147483647, and stores the result in R0.
2147483647
D :
2147483647
X01
D
R1 R0
46340
R1
R0
2147483647 = 46340.95
Rounding off
7-5

FUN 27 D P
NEG
NEGATION
(Take the negative value)
FUN 27 D P
NEG
D : Register to be negated
D may combine with V, Z, P0~P9 to serve indirect address
application
Range
WY
WM
WS
TMR CTR
HR
OR
SR
ROR
DR
WY0
WM0
WS0
T0
C0
R0
R3904 R3968 R5000
D0
WY240 WM1896 WS984 T255 C255 R3839 R3967 R4167 R8071 D4095
Operand
D
XR
V, Z
P0~P9
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, negate (ie. calculate 2's complement)
the value of the content of the register specified by D, and store it back in the original D register.
z If the value of the content of D is negative, then the negation operation will make it positive.
X0
EN
27P
NEG R
R0
z The instruction at left negates the value of the R0

register, and stores it back to R0.
12345
)3039H
X01
D
R0
12345
7-6
)CFC7H

FUN 28 D P
ABS
ABSOLUTE
(Take the absolute value)
FUN 28 D P
ABS
D : Register to be taken absolute value

application
Range
Operand
D
WY
WM
WS
WY0
WM0
WS0
WY240 WM1896 WS984
TMR CTR
T0
T255
HR
OR
SR
ROR
DR
C0
R0
R3904 R3968 R5000
D0
C255 R3839 R3967 R4167 R8071 D4095
XR
V, Z
P0~P9
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, calculate the absolute value of the
content of the register specified by D, and write it back into the original D register.
X0
EN
28DP
ABS R
R1 R0
z The instruction at left calculates the absolute value of

the R0 register, and stores it back in R0.
12345
)CFC7H
X01
D
R1 R0
12345
7-7
)3039H

FUN 29 D P
EXT
FUN 29 D P
EXT
SIGN EXTENSION
D : Register to be taken sign extension

application
Range
Operand
D
WY
WM
WS
WY0
WM0
WS0
WY240 WM1896 WS984
TMR CTR
HR
OR
SR
ROR
DR
T0
C0
R0
R3904 R3968 R5000
D0
T255 C255 R3839 R3967 R4167 R8071 D4095
XR
V, Z
P0~P9
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, this instruction will sign extension the
16 bits numerical value specified by D to 32-bit value and store it into the 32-bit register comprised by the two
successive words, D + 1 and D. (Both values are the same, only it was originally formated as a 16 bits
numerical value, and was then extended to be formated as a 32 bits numerical value.)
z This instruction extent the numerical value of a 16-bit register into an equivalent numerical value in a 32-bit
register (for example 33FFH converts to 000033FFH), Its main function is for numerical operations
(+,-,*,/,CMP......) which can take the 16 bits or 32 bits numerical values as operand. Before operation all the
operand should be adjusted to the same length for proper operation.
X0
EN
29P
EXT R
z The instruction at left takes a 16 bits numerical value R0,

and extends it to an equivalent value in 32 bits, then
stores it into a 32 bits register (DR0=R1R0) comprised
R0 and R1.
R1
Ignore the value of R1 before
extension
R1 R0
B15
R0
B0
1 1 0 0 1 1 1 1 1 1 0 0 0 1 1 1
-12345
X01
B31
D
R1 R0
R1
B16 B15
R0
B0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 0 1 1 1
-12345
Fill B15 value into B31-B16, (if B15 is 0, then B31-B16 are all 0)
Before extension16 bits R0=
CFC7H=-12345
After extension32 bitsR1R0=FFFFCFC7H=-12345
7-8
The two numerical values are actually the same.

FUN 30
PID

(Brief description)
FUN 30
PID
Ts : PID Operation time interval

SR : Starting register of process control
parameter table comprised by 8 consecutive
registers.
OR : PID output register
PR : Starting register of the process parameter
table comprised by 7 consecutive registers.
Range
Operand
Ts
SR
OR
PR
WR
HR
ROR
DR
WR : Starting register of working variable for PID
R0
R5000
D0
R3839 R8071 D4095
*
*
*
*
internal operation. It requires 7 registers and

cant be re-used in other part of the ladder
13000
program.
z PID function according to the current value of process variable (PV) derived from the external analog signal
and the setting value (SP) of process performs the calculation, which base on the PID formula. The result of
calculation is the control output for the controlled process, which can feed directly to the AO module or other
output interface or leaved for further process. The usage of PID control for process if properly can achieve a
fast and smooth result of PV tracking toward SP change or be immune to the disturbance of process.
z The PID formula in digital form:
n
Mn =
[(D4005/Pb)3En]+
[(D4005/Pb)TiTsEn] - [(D4005/Pb)Td(PVnPVn-1)/Ts] + Bias

0
Mn
: Control output at time n
Pb
: Proportional band ( range : 2~5000, unit 0.1%. Kc (gain) =1000/ Pb )
Ti
: Intergal time constant ( range : 0~9999 corresponds to 0.00~99.99 Repeats/Minute )
Td
: Differential time constant ( range : 0~9999 corresponds to 0.00~99.99 Minutes )
PVn
: Process value at time n
PV n-1
: Process value at time n
En
:Error at time n =set value ( SP) process value at time n (PVn)
Ts
: Interval time of PID calculation ( range: 1~3000, unit : 0.01s )
Bias
: Control output offset ( range: 0~16380 )
z For detail description of this function, please refer chapter 18.
7-9

FUN31 P
CRC16
CRC16 CALCULATION
CRC16
FUN31 P
CRC16
MD0, Not including higher byte of registers to be

calculated the CRC16
1, Including higher byte of registers to be calculated
the CRC16
SStarting address of CRC16 calculation
NLength of CRC16 calculation (In Byte)
Range
rand
MD
S
N
D
ROR
DR
R0
R5000
D0
R3839 R8071 D4095
Ope-
HR
0~1
DThe destination register to store the calculation of

CRC16,
Register D stores the Upper Byte of CRC16
Register D1 stores the Lower Byte of CRC16
S, N, D may associate with V, Z, P0~P9 index register to
1~256
When execution control "EN"=1 or "EN" P instructionchanges from 01, it will start the CRC16
calculation from the lower byte of S and by the length of N, the result of calculation will be stored into register
D and D+1.
The output indication "D=0" will be ON if the value of calculation is 0.
It will not execute the calculation and the output indication "ERR" will be ON if the length is invalid.
When communicating with the intelligent peripheral in binary data format, the CRC16 error detection is used
very often; the well known Modbus RTU communication protocol uses this method for error detection of
message frame.
CRC16 is the check value of a Cyclical Redundancy Check calculation performed on the message contents.
Perform the CRC16 calculation on the received message data and error check value, the result of the
calculation value must be 0, it means no error within this message frame.
M0
EN
08P.MOV
DescriptionWhen M0 changes from 01, it will execute the
S :
D0
CRC16 calculation starting from lower byte of R0, the length is
D :
assigned by D0, and then stores the CRC value into register
R0+V and R0+V+1.
31P.CRC16
EN
MD:
S :
R0
N :
D0
D :
R0V
D=0
It is supposed D0=10, the registers R10 and R11 will store the
CRC16 value.
ERR
S
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
High Byte
Low Byte
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Byte-0
Byte-1
Byte-2
Byte-3
Byte-4
Byte-5
Byte-6
Byte-7
Byte-8
Byte-9
R10
R11
7-10
High Byte
Low Byte
00
00
CRC-Hi
CRC-Lo

FUN32
ADCNV
CONVERTING THE RAW VALUE OF 420MA ANALOG INPUT

ADCNV
FUN32
ADCNV
Pl0, the polarity setting of analog input module is at unipolar

position
1, the polarity setting of analog input module is at bipolar
position
SStarting address of source registers
NQuantity of conversion (In Word)
DStarting address of destination registers
Range
Operand
Pl
S
N
D
HR
IR
ROR
DR
R0
R3839
R3840
R3903
R5000
R8071
D0
D4095
S, N, D may associate with V, Z, P0~P9 index register to serve

the indirect addressing application.
0~1
1~64
When the analog input is 420mA, the analog input module is one of the solution to get this kind of signal,
but the input span of the analog input module is 020mA (Setting at 10V, Unipolar), however there will exist
the offset of the raw reading value;
this instruction is applied to eliminate the offset and convert the raw
reading value into the range of 04095(12-bit) or 016383(14-bit), it is more convenient for following
operation.
When execution control "EN"=1, it will execute the conversion starting from S, length by N, and then store
the results into the D registers.
This instruction will not act if invalid length of N.
When the inputF/T=0, it assigns the 12-bit analog input module;
whileF/T=1, it assigns the 14-bit
analog input module.

Example
32.ADSNV
M0
P1 :
S :
F/T N :
D :
EN
0
R3840
6
R500
DescriptionWhen M0 is ON, it will perform 6 points of conversion starting from R3840, where the offset of 4
20mA raw reading value will be eliminated, and the corresponding value 04095 will be stored into
R500R505.
S
R3840
R3841
R3842
R3843
R3844
R3845
D
1229
409
2047
2048
2048
2048
7 - 11
R500
R501
R502
R503
R504
R505
0
2047
4095
0
0
0
(4 mA)
(12 mA)
(20 mA)
(0 mA)
(0 mA)
(0 mA)

FUN 35 D P
XOR
FUN 35 D P
XOR
EXCLUSIVE OR
Sa : Source data a for exclusive or operation

Sb :Source data b for exclusive or operation
D : Register storing XOR results
Sa, Sb, D may combine with V, Z, P0~P9 to
serve indirect address application
Range
WX
Operand
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
Sa
Sb
WY
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
16/32-bit
V, Z
+/WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095 number P0~P9
When operation control "EN" = 1 or "EN" ( P instruction) changes from 0 to 1, will perform the logical
XOR (exclusive or) operation of data Sa and Sb. The operation of this function is to compare the
corresponding bits of Sa and Sb (B0~B15 or B0~B31), and if bits at the same position have different status,
then set the corresponding bit within D as 1, otherwise as 0.
After the operation, if all the bits in D are all 0, then set the 0 flag "D = 0" to 1.
35P.XOR
X0
EN
Sa : R
Sb :
D :
Sa
Sb
R0
R1
D=0
z The instruction at left makes a logical XOR operation

using the R0 and R1 registers, and stores the result
in R2.
1 0 1 1 1 0 1 1 0 1 1 0 1 1 0 1
1 1 1 0 1 1 1 0 1 0 1 0 0 1 1 0
X01
D
R2
0 1 0 1 0 1 0 1 1 1 0 0 1 0 1 1
7-12

FUN 36 D P
XNR
FUN 36 D P
XNR
EXCLUSIVE NOR
Sa : Data a for XNR operation

Sb : Data b for XNR operation
D : Register storing XNR results
Sa, Sb, D may combine with V, Z, P0~P9 to serve
Range
Operand
WX
Sa
Sb
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
V, Z
16/32-bit
number
P0~P9
When operation control "EN" = 1 or "EN" ( P instruction) changes from 0 to 1, will perform the logical
XNR (inclusive or) operation of data Sa and Sb. The operation of this function is to compare the
corresponding bits of Sa and Sb (B0~B15 or B1~B31), and if the bit has the same value, then set the
corresponding bit within D as 1. If not then set it to 0.
After the operation, if the bits in D are all 0, then set the 0 flag "D=0" to 1.
36P.XNR
X0
EN
Sa : R
Sb :
D :
Sa
Sb
R0
R1
D=0
z The instruction at left makes a logical XNR operation

of the R0 and R1 registers, and the results are stored
in the R2 register.
1 0 1 1 1 0 1 1 0 1 1 0 1 1 0 1
1 1 1 0 1 1 1 0 1 0 1 0 0 1 1 0
X01
D
R2
1 0 1 0 1 0 1 0 0 0 1 1 0 1 0 0
7-13

FUN 37 D P
ZNCMP
FUN 37 D P
ZNCMP
ZONE COMPARE
Ladder symbol
Operation control
EN
37DP.ZNCMP
S :
INZ
Inside zone
Su :
S>U
Higher than upper limit
S<L
Lower than lower limit
ERR
Limit value erroe
SL :
WX
Range
Operand
S : Register for zone comparison
WY
WM
SU : The upper limit value
WS
TMR CTR
HR
SL : The lower limit value
IR
S, SU, SL may combine with V, Z,

P0~P9 to serve indirect address
application
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0 16/32-bit
+/
WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095 number
XR
V, Z
P0~P9
SU
SL
When operation control "EN" = 1 or "EN" ( P instruction) changes from 0 to 1, compares S with upper
limit SU and lower limit SL. If S is between the upper limit and the lower limit (SLSSU), then set the
inside zone flag "INZ" to 1. If the value of S is greater than the upper limit SU, then set the higher than
upper limit flag "S>U" to 1. If the value of S is smaller then the lower limit SL, then set the lower than lower
limit flag "S<L" as 1.
The upper limit SU should be greater than the lower limit SL. If SU<SL, then the limit value error flag "ERR"
will set to 1, and this instruction will not carry out.
37P.ZNCMP
X0
EN
SU : R
SL :
S :
Y0
INZ
z The instruction at left compares the value of R0 with the

upper and lower limit zones formed by R1 and R2. If the
values of R0~R2 are as shown in the diagram at bottom
S>U
S<L
left, then the result can then be obtained as at the right

of this diagram.
z If want to get the status of out side the zone, then OUT
ERR
NOT Y0 may be used, or an OR operation between the

two outputs S>U and S<L may be carried out, and move
the result to Y0.
S
SU
SL
R0
R1
200
300
R2
100
Upper limit value
X01
Lower limit value
Before-execution
7-14
Y0
1
Results of execution

FUN 40 D P
BITRD
FUN 40 D P
BITRD
BIT READ
S : Source data to be read

N : The bit number of the S data to be read out.
S, N may combine with V, Z, P0~P9 to serve
indirect address application.
Range
Operand
WX
WY
WM
WS
TMR
WX0
WY0
WM0
WS0
T0
WX240 WY240 WM1896 WS984 T255
CTR
HR
IR
OR
SR
ROR
DR
XR
C0
R0 R3840 R3904 R3968 R5000 D0
V, Z
16/32-bit
+/- number
C255 R3839 R3903 R3967 R4167 R8071 D4095
P0~P9
031
When read control "EN" = 1 or "EN" ( P instruction) changes from 0 to 1, take the Nth bit of the S data
out , and put it to the output bit "OTB".
When read control "EN" = 0 or "EN" ( P instruction) is not change from 0 to 1, The output OTB can be
selected to keep at the last state( if M1919=0 ) or set to zero ( if M1919=1 ).
When the operand is 16 bits, the effective range for N is 0~15. For 32 bits operand ( D instruction) it is
0~31. N beyond this range will set the N value error flag "ERR" to 1, and do not carry out this instruction.
40P.BITRD
X0
EN
S : WX
Y0
OTB
ERR
N : 7
z The instruction at left reads the 7th bit (X7) status from
WX0 (X0~X15) and output to Y0. The results are as
follows:
X15
S
WX0
X7
X0
1 1 0 0 1 1 1 0 1 0 0 1 1 0 0 1
X01
N7
Y0
7-15

FUN 41 D P
BITWR
FUN 41 D P
BITWR
BIT WRITE
Ladder symbol
Write control
EN
D : Register for bit write
41DP.BITWR
D :
ERR
N : The bit number of the D register to be

written.
N value error
D, N may combine with V, Z , P0~P9 to serve

N :
Write bit
Range
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
V, Z
0
0
D0
R3840 R3904 R3968 R5000
R0
C0
T0
WS0
WM0
WY0
WX0
or
31 P0~P9
Operand
D
N
INB
When write control "EN" = 1 or "EN" ( P instruction) changes from 0 to 1, will write the write bit (INB) into
the Nth bit of register D.
When the operand is 16 bits, the effective range of N is 0~15. For 32 bits ( D instruction) operand it is 0~31.
N beyond this range, will set the N value error flag "ERR" to 1, and do not carry out this instruction.
41P.BITWR
X0
EN
D : R
INB
N : 3
X1
ERR
z The instruction at left writes the status of the write bit

INB into B3 of R0. Assuming
X1 = 1, the result will be as follows:
X1
N3
D
R0
X01
1
B3
B15
Bits other than B3 remain unchanged
7-16
B0

FUN 42 D P
BITMV
Move control
EN
Ladder symbol
S : Source data to be moved
42DP.BITMV
Ns : Assign Ns bit within S as source bit
ERR
N value error
D : Destination register to be moved
Ns :
Nd : Assign Nd bit within D as target bit
S, Ns, D, Nd may combine with V, Z, P0~P9 to

serve indirect address application.
Nd :
Range
WX
WY
WM
WS
TMR CTR
WX0
WY0
WM0
WS0
WX240 WY240 WM1896 WS984
Operand
FUN 42 D P
BITMV
BIT MOVE
HR
IR
OR
SR
ROR
DR
T0
C0
R0
R3840 R3904 R3968 R5000
D0
16/32-bit
+/- number
T255 C255 R3839 R3903 R3967 R4167 R8071 D4095
XR
V, Z
P0~P9
Ns
031
D
Nd
031
z When move control "EN" = 1 or "EN" ( P instruction) changes from 0 to 1, will move the bit status specified
by Ns within S into the bit specified by Nd within D.
z When the operand is 16 bits, the effective range of N is 0~15. For 32 bits ( D instruction) operand the
effective range is 0~31. N beyond this range will set the N value error flag "ERR" to 1, and do not carry out
this instruction.
42P.BITMV
X0
EN
S : WX
z The instruction at left moves the status of B11 (X11)

0
ERR
within S into the B7 position within D. Except bit B7,
Ns : 11
other bits within D does not change.
D : R
Nd : 7
X15
S
WX0
X11
1
X0
Ns11
X01
Nd7
R0
1
B7
B15
7-17
B0

FUN 43 D P
NBMV
FUN 43 D P
NBMV
NIBBLE MOVE

Ns: Assign Ns nibble within S as source nibble
Nd: Assign Nd nibble within D as target nibble
Range
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000
WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071
Operand
S
Ns
D
Nd
DR
XR
D0
D4095
16/32-bit
+/number
V, Z
07
07
P0~P9
z When move control "EN" = 1 or "EN" ( P instruction)has a transition from 0 to 1, will move the Nsth nibble
from within S to the nibble specified by Nd within D. (A nibble is comprised by 4 bits. Starting from the lowest
bit of the register, B0, each successive 4 bits form a nibble, so B0~B3 form nibble 0, B4~B7 form nibble 1,
etc...)
z When the operand is 16 bits, the effective range of Ns or Nd is 0~3. For 32 bits ( D instruction) operand the
range is 0~7. Beyond this range, will set the N value error flag "ERR" to 1, and do not carry out this
instruction.
43P.NBMV
X0
EN
S : R
z The instruction at left moves the third nibble NB2

(B8~B11) within S to the first nibble NB1 (B4~B7) within
D. Other nibbles within D remain unchanged.
ERR
Ns : 2
D : R
Nd : 1
B15
S
B0
R0
1 1 0 1
NB3
NB2
NB1
NB0
Ns2
X01
Nd1
NB3
D
NB2
R1
NB1
NB0
1 1 0 1
B15
B0
7-18

FUN 44 D P
BYMV
FUN 44 D P
BYMV
BYTE MOVE

Ns : Assign Ns byte within S as source byte
Nd : Assign Nd byte within D as target byte
Range
WX
WY
WM
WS
TMR
T0
WS0
WM0
WY0
WX0
WX240 WY240 WM1896 WS984 T255
Operand
S
Ns
D
Nd
CTR
HR
IR
OR
SR
ROR
DR
R0 R3840 R3904 R3968 R5000 D0

C0
16/32-bit
+/- number
C255 R3839 R3903 R3967 R4167 R8071 D4095
03
03
XR
V, Z
P0~P9
z When move control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, move Nsth byte within S
to Ndth byte position within D. (A byte is comprised of 8 bits. Starting from the lowest bit of the register, B0,
each successive eight bits form a byte, so B0~B7 form byte 0, B8~B15 form byte 1, etc...)
z When the operand is 16 bits, the effective range of Ns or Nd is 0~1. For 32 bits ( D instruction) operand, the
range is 0~3. Beyond this range, will set the N value error flag "ERR" to 1, and do not carry out this
instruction.
44DP.BYMV
X0
S : R
EN
Ns : 2
D : R
ERR
z The instruction at left moves the third byte (B16~B23)

within S (32 bits register composed of R1R0), to the
second byte within D (32 bits register composed of
R3R2). Other bytes within D remain unchanged.
Nd : 1
B15
S
B0
R1 R0
1 0 1 1 1 0 1 1
Byte3
Byte2
Byte1
Ns2
Byte0
X01
Nd1
Byte3
D
Byte2
R3 R2
Byte1
Byte0
1 0 1 1 1 0 1 1
B31
B0
7-19

FUN 45 D P
XCHG
FUN 45 D P
XCHG
EXCHANGE
Da : Register a to be exchanged
Db : Register b to be exchanged
Da, Db may combine with V, Z, P0~P9 to serve indirect
address application.
Range
Operand
WY
WM
WS
TMR CTR
HR
OR
SR
ROR
DR
XR
WY0
WM0
WS0
T0
C0
R0 R3904 R3968 R5000 D0
V, Z
WY240 WM1896 WS984 T255 C255 R3839 R3967 R4167 R8071 D4095 P0~P9
Da
Db
z When exchange control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will exchanges the
contents of register Da and register Db in 16 bits or 32 bits ( D instruction) format.
45P.XCHG
X0
EN
z The instruction at left exchanges the contents of the
Da : R
Db : R
Da
Db
R0
R1
16-bit R0 and R1 registers.
B15
B0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
X01
B15
B0
Da
R0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Db
R1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
7-20

FUN 46 P
SWAP
FUN 46 P
SWAP
BYTE SWAP
D : Register for byte data swap

application.
Range
WY
WM
WS
TMR CTR
HR
OR
SR
ROR
DR
XR
WY0
WM0
WS0
T0
C0
R0
R3904 R3968 R5000
D0
V, Z
WY240 WM1896 WS984 T255 C255 R3839 R3967 R4167 R8071 D4095 P0~P9
Operand
D
z When swap control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, swap the data of the low
byte, Byte 0 (B0~B7), and the high byte, Byte 1 (B8~B15), in the 16 bits register specified by D.
B15
B8 B7
Byte 1high
X0
46P
EN SWAP R
B0
Byte 0low
z The instruction at left swaps the data of the low byte

0
(B0~B7) and the high byte (B8~B15) in R0. The results

are as follows:
Byte1
Byte0
|
R0
0 0 1 1 0 0 1 1 1 1 1 1 0 0 0 0
B15
B8 B7
B0
X01
B15
D
R0
B0
1 1 1 1 0 0 0 0 0 0 1 1 0 0 1 1
7-21

FUN 47 P
UNIT
FUN 47 P
UNIT
NIBBLE UNITE
S : Starting source register to be united

N : Number of nibbles to be united
D : Registers storing united data
Range
Operand
S
N
D
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
XR
V, Z
P0~P9
z When unite control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, take out the lowest
nibbles NB0, of N successive registers starting from S, and fill them into NB0, NB1, .....NBn-1 of D in
ascending order. Nibbles not yet filled in D (when N is odd) are filled with 0. (A nibble is comprised by 4 bits.
Starting from the lowest bit in the register, B0, each successive four bits form a nibble, so B0~B3 form nibble
0, B4~B7 form nibble 1, etc...).
z This instruction only provides WORD (16 bits) operand. Because of this, there are usually only 4 nibbles can
be involved. Therefore the effective range of N is 1~4. Beyond this range, will set the N value error flag
"ERR" to 1, and do not carry out this instruction.
X0
EN
47P.UNIT
0
S : R
z The instruction at left takes out NB0 from 3 registers, R0,

R1 and R2, and fills them into NB0~NB2 within WY0
ERR
register.
N : 3
D : WY
N3
NB3 NB2 NB1 NB0
D W Y 0 0000 0100 0010 0001
Y15
Y0
Set the not united NB as 0
B15 B12 B11 B8 B7
N3
S
S1
S2
R0
R1
R2
NB3
NB2
B4 B3
B0
0001
0010
0100
NB1
NB0
X01
7-22

FUN 48 P
DIST
FUN 48 P
DIST
NIBBLE DISTRIBUTE
Ladder symbol
Distribution control
Range
Operand
S
N
D
EN
WX
S : Source data to be distributed
48P.DIST
S :
ERR
N : Number of nibbles to be distributed
N value error
N :
D : Starting register storing distribution data
D :
S, N, D may combine with V, Z, P0~P9 to

WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
16-bit
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
+/
WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095 number
1~4
XR
V, Z
P0~P9
z When distribution control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will take N
successive nibbles starting from the lowest nibble NB0 within S, and distribute them in ascending order into
the 0 nibbles of N registers starting from D. The nibbles other than NB0 in each of the registers within D are
all set to zero. (A nibble is comprised by 4 bits. Starting from the lowest bit in a register, B0, each successive
4 bits form a nibble, so B0~B3 form nibble 0, B4~B7 form nibble 1, etc...)
z This instruction only provides WORD (16 bits) operand. Therefore there are usually only 4 nibbles can be
involved, so the effective value of N is 1~4. Beyond this range, will set the N value error flag "ERR" to 1, and
do not carry out this instruction.
X0
EN
48P.DIST
S : WY 0
z The instruction at left writes NB0~NB2 from the WX0
ERR
register into the NB0 of the 3 consecutive registers
N : 3
D : R
R0~R2.
0
N=3
X15
S
X11
NB3
X0
NB2
NB1
NB0
B15
WX0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1
NB3
NB2
NB1
NB0
X01
7-23
B0
R0
0 0 0 0 0000 0000 0001
D+1
R1
0 0 0 0 0000 0000 0010
D+2
R2
0 0 0 0 0000 0000 0100

NB1NB3 are all set a "0 "

FUN49 P
BUNIT
FUN49 P
BUNIT
BYTE UNITE
S Starting address of source register to be united

N Number of bytes to be united
D Registers to store the united data
Range
Operand
S
N
D
HR
ROR
DR
R0
R3839
R5000
R8071
D0
D4095
1~256
z When execution control "EN"=1 or "EN" P instructionchanges from 01, it will perform the byte
combination starting from S, length by N, and then store the results into D registers.
z This instruction will not act if invalid range of length.
z When communicating with intelligent peripheral in binary data format, this instruction may be applied to do
byte combination for following word data processing.
Example
49P.BUNIT
S : R 1500
M2
EN
N : R
999
D : R 2500
DescriptionWhen M2 changes from 01, it will perform the byte combination starting from R1500, the length is
assigned by R999, and then store the results into registers starting from R2500.
It is supposed R999=10, the results of combination will store into R2500R2504.
S
R1500
R1501
R1502
R1503
R1504
R1505
R1506
R1507
R1508
R1509
High Byte
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Dont care
Low Byte
Byte-0
Byte-1
Byte-2
Byte-3
Byte-4
Byte-5
Byte-6
Byte-7
Byte-8
Byte-9
R2500
R2501
R2502
R2503
R2504
7-24
High Byte
Byte-0
Byte-2
Byte-4
Byte-6
Byte-8
D
Low Byte
Byte-1
Byte-3
Byte-5
Byte-7
Byte-9

FUN50 P
BDIST
FUN50 P
BDIST
BYTE DISTRIBUTE
Ladder symbol
Execution control
EN
S Starting address of source register to be distributed
50P.BDIST
S :
N Number of bytes to be distributed

D Registers to store the distributed data
N :
D :
Range
Operand
HR
ROR
DR
R0
R3839
R5000
R8071
D0
D4095
S
N
D
1~256
z When execution control "EN" =1 or "EN" P instructionchanges from 01, it will perform the byte
distribution starting from S, length by N, and then store the results into D registers.
z This instruction will not act if invalid range of length.
z When communicating with intelligent peripheral in binary data format, this instruction may be applied to do
byte distribution for data transmission.
Example
M2
50P.BDIST
S : R 1000
EN
N : R
999
D : R 1500
DescriptionWhen M2 changes from 01, it will perform the byte distribution starting from R1000, the length is
assigned by R999, and then store the results into registers starting from R1500.
It is supposed R999=9, the results of distribution will store into R1500R1508.
S
R1000
R1001
R1002
R1003
R1004
High Byte
Byte-0
Byte-2
Byte-4
Byte-6
Byte-8
D
Low Byte
Byte-1
Byte-3
Byte-5
Byte-7
Dont care
R1500
R1501
R1502
R1503
R1504
R1505
R1506
R1507
R1508
7-25
High Byte
00
00
00
00
00
00
00
00
00
Low Byte
Byte-0
Byte-1
Byte-2
Byte-3
Byte-4
Byte-5
Byte-6
Byte-7
Byte-8

FUN 51 D P
SHFL
FUN 51 D P
SHFL
SHIFT LEFT
D : Register to be shifted
N : Number of bits to be shifted
N, D may combine with V, Z, P0~P9 to serve
Range
WX
Operand
D
N
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
1
1
or
32
XR
V, Z
P0~P9
When shift control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will shift the data of the D
register towards the left by N successive bits (in ascending order). After the lowest bit B0 has been shifted
left, its position will be replaced by shift-in bit INB, while the status of shift-out bits B15 or B31 ( D instruction)
will appear at shift-out bit "OTB".
If the operand is 16 bits, the effective range of N is 1~16. For 32 bits ( D instruction) operand, it is 1~32.
Beyond this range, will set the N value error flag "ERR" to 1, and do not carry out this instruction.
51P.SHFL
X0
EN
D :R
Y0
0
OTB
z The instruction at left shifts the data in register R0

towards the left by 4 successive bits. The results are
shown below.
N : 4
ERR
INB
Y0
B15
R0
B0
0 0 1 1 0 0 1 0 1 1 1 1 0 0 0 0
*
INB
X01
Y0
B15
R0
B0
INB
0 0 1 0 1 1 1 1 0 0 0 0 1 1 1 1
7-26

FUN 52 D P
SHFR
FUN 52 D P
SHFR
SHIFT RIGHT
D : Register to be shifted
N : Number of bits to be shifted
D, N may combine with V, Z, P0~P9 to serve
Range
Operand
WX
WY
D
N
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
1
1
V, Z
or
32 P0~P9
When shift control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will shift the data of D
register towards the right by N successive bits (in descending order). After the highest bits, B15 or B31 ( D
instruction) have been shifted right, their positions will be replaced by the shift-in bit INB, while shift-out bit
B0 will appear at shift-out bit "OTB".
z The instruction at left shifts the data in R0 register
52P.SHFR
X0
EN
D :R
Y0
towards the right by 15 successive bits. The
OTB
results are shown below.
N : 15
INB
ERR
B15
INB
0
R0
B0
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Y0
X01
INB
B15
R0
B0
Y0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
7-27

FUN 53 D P
ROTL
FUN 53 D P
ROTL
ROTATE LEFT
D : Register to be rotated
N : Number of bits to be rotated
Range
Operand
WX
D
N
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000 D0
1
1
or
32
XR
V, Z
P0~P9
When rotate control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will rotate the data of D
register towards the left by N successive bits (in ascending order, i.e. in a 16-bit instruction, B0B1, B1
B2, .... , B14B15, B15B0. In a 32-bit instruction, B0B1, B1B2, .... , B30B31, B31B0). At the
same time, the status of the rotated out bits B15 or B31 ( D instruction) will appear at rotate-out bit "OTB".
z The instruction at left rotates data from the R0

53P.ROTL
X0
EN
D :R
register towards the left 9 successive bits. The
Y0
results are shown below.
OTB
N : 9
ERR
R0
B0
1 1 1 1 0 0 0 0 1 0 1 0 1 0 1 0
*
Y0
X01
B15
R0
B0
0 1 0 1 0 1 0 1 1 1 1 0 0 0 0 1
*
1 Y0
7-28

FUN 54 D P
ROTR
FUN 54 D P
ROTR
ROTATE RIGHT
D : Register to be rotated
N : Number of bits to be rotated
Range
WX
Operand
D
N
WY
WM
WS
TMR CTR
WX0
WY0
WM0
WS0
T0
WX240 WY240 WM1896 WS984 T255
HR
IR
OR
SR
ROR
DR
C0
R0 R3840 R3904 R3968 R5000 D0
1
1
or
C255 R3839 R3903 R3967 R4167 R8071 D4095 16
32
XR
V, Z
P0~P9
When rotate control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will rotate the bit data of
D register towards the right by N successive bits (in descending order, i.e. in a 16-bit instruction, B15B14,
B14B13, .... , B1B0, B0B15. In a 32-bit instruction, B31B30, B30B29, .... , B1B0, B0B31). At
the same time, the status of the rotated out B0 bits will appear at the rotate-out bit "OTB".
If the operand is 16 bit, the effective range of N is 1~16. For 32 bits ( D instruction) operand, it is 1~32.
z The instruction at left rotates data from R0 register

54P.ROTR
X0
EN
D :R
towards the right 8 successive bits. The results are
Y0
OTB
shown below.
N : 8
ERR
B15
R0
B0
1 1 1 1 0 0 0 0 1 0 1 0 1 0 1 0
*
X01
Y0
B15
R0
B0
1 0 1 0 1 0 1 0 1 1 1 1 0 0 0 0
*
Y0 1
*
7-29

FUN55 D P
B G
FUN55 D P
B G
S Starting of source
D Starting address of destination
SD operand can combine V, Z, P0~P9 for
index addressing.
Range
WX
Operand
S
WY
WM
WS
TMR CTR
WX0
WY0
WM0
WS0
T0
WX240 WY240 WM1896 WS984 T255
HR
IR
OR
SR
ROR
DR
C0
R0 R3840 R3904 R3968 R5000 D0
0~FFFFH
0~FFFFFFFFH
C255 R3839 R3903 R3967 R4167 R8071 D4095
XR
V, Z
P0~P9
When operation control "EN"=1 or "EN"( P instruction) changes from 01, it will perform the code
conversion; where S is the source (Binary code), and D is the destination (Gray code) for storing the result.
The conversion method shown as below
Example 1: When M0 changes from 01, it will perform the 16-bit code conversion.
55P.B
M0
EN
S :
R0
D :
R100
Converting the 16-bit Binary-code in R0 into

Gray-code, and then storing the result into R100.
R0 1001010101010011B R100 1101111111111010B
7-30

FUN55 D P
B G
FUN55 D P
B G
Example 2: When M0 =1, it will perform the 32-bit code conversion.

55DP.B
M0
EN
S :
R0
D :
R100
Converting the 32-bit Binary-code in DR0 into

Gray-code, and then storing the result into DR100.
DR0 00110111001001000010111100010100B DR100 00101100101101100011100010011110B
7-31

FUN56 D P
G B
Ladder symbol
Operation control
56DP.G
S :
EN
Range
WX
D Starting address of destination

S D operand can combine V, Z, P0~P9 for index
addressing.
WY
S Starting of source
WM
WS
TMR CTR
WX0
WY0
WM0
WS0
T0
WX240 WY240 WM1896 WS984 T255
Operand
FUN56 D P
G B
HR
IR
OR
SR
ROR
DR
XR
C0
R0 R3840 R3904 R3968 R5000 D0
0~FFFFH
0~FFFFFFFFH
C255 R3839 R3903 R3967 R4167 R8071 D4095
V, Z
P0~P9
When operation control "EN"=1 or "EN"( P instruction) changes from 01, it will perform the code
conversion; where S is the source (Gray code), and D is the destination (Binary code) for storing the
result.
The conversion method shown as below :
1
R
XO
R
XO
R
XO
1
XO
0
R
XO
R
XO
0
R
XO
1
XO
1
R
XO
1
R
XO
R
XO
R
XO
1
XO
0
R
XO
R
XO
Example 1: When M0 changes from 01, it will perform the 16-bit code conversion.
56P.G
M0
EN
S :
D0
D :
D100
Converting the 16-bit Gray-code in D0 into Binary-code,

and then storing the result into D100.
D0 1001010101010011B D100 1110011001100010B
7-32

FUN56 D P
G B
FUN56 D P
G B
Example 2: When M0 =1, it will perform the 32-bit code conversion.

56DP.G
M0
EN
S :
D0
D :
D100
Converting the 32-bit Gray-code in DD0 into Binary-code,

and then storing the result into DD100.
DD0 00110111001001000010111100010100B DD100 00100101110001111100101000011000B
7-33

FUN 57 P
DECOD
FUN 57 P
DECOD
DECODE
S : Source data register to be decoded

(16 bits)
NS : Starting bits to be decoded within S
NL : Length of decoded value (1~8 bits)
D : Starting register storing decoded results
(2~256 points = 1~16 words).
S, NS, NL, D may combine with V, Z, P0~P9
to serve indirect address application.
WX
Range
S
NS
NL
D
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
D0
R3840 R3904 R3968 R5000
R0
C0
T0
WS0
WM0
WY0
WX0
V, Z
16-bit
+/- number
P0~P9
Operand
WY
015
18
This instruction, will set a single bit among the total of 2 L discrete points (D) to 1 and the others bit are set to
0. The bit number to be set to 1 is specified by the value comprised by BNSBNS+NL1 of Swhich is called
the decode value, BNS is the starting bit of the decode value, and BNS+NL1 is the end value.
When decode control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will take out the value
BNSBNS+NL1 from S. And with this value to locate the bit position and set D accordingly, and set all the
other bit to zero.
This instruction only provides 16 bits operand, which means S only has B0~B15. Therefore the effective
range of Ns is 0~15, and the NL length of the decode value is limited to 1~8 bits. Therefore the width of the
decoded result D is 218 points = 2~256 points = 1~16 words (if 16 points are not sufficient, 1 word is still
occupied). If the value of NS or NL is beyond the above range, will set the range-error flag "ERR" to 1, and do
not carry out this instruction.
If the end bit value exceeds the B15 of S, then will extend toward B0 of S + 1. However if this occurs then
S+1 cant exceed the range of specific type of operand (ie. If S is of D type register then S+1 cant be D+1). If
violate this, then this instruction only takes out the bits from starting bit BNs to its highest limit as the decode
value.
X0
EN
57P.DECOD
0
S : WX
ERR
z The instruction at left takes out the data of five

successive bits from X3 to X7 within the WX0
Ns : 3
register and decodes it. The results are then stored
NL : 5
D : R
in the 32-bit register starting at R2.
X15
X7
X3
X0
S 0 0 1 1 0 0 0 0 0 1 0 0 1 1 1 0
Length of decode value NL=5,so bit value is formed by X7~X3 (equal 9)
X01
R3
D
R2
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
B31
B9
B0
Because NL=5,the width of D is 25= 32 points = 2 words. That is, D is formed by R3R2, and the decoded value is
01001=9, therefore B9 (the 10th point) within D is set to 1, and all other points are 0.
7-34

FUN 58 P
ENCOD
FUN 58 P
ENCOD
ENCODE
S : Starting register to be encoded
NS : Bit position within S as the encoding start

point
NL : Number of encoding discrete points (2~256)
D : Number of register storing encoding results
(1 word)
S, NS, NL, D may combine with V, Z, P0~P9 to
Range
WY
WM
WS
TMR CTR
WX0
WY0
WM0
WS0
WX240 WY240 WM1896 WS984
Operand
S
NS
NL
D
WX
HR
IR
OR
SR
ROR
DR
T0
C0
R0
R3840 R3904 R3968 R5000
D0
T255 C255 R3839 R3903 R3967 R4167 R8071 D4095
XR
16-bit
+/number
V, Z
P0~P9
015
2256
When encode control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will starting from the
points specified by Ns within S, take out towards the left (high position direction) NL number of successive bits
BNSBNS+NL1 (BNS is called the encoding start point, and its relative bit number is b0;BNS+NL1 is called
the encoding end point, and its relative bit number is BNL-1). From left to right do higher priority (when H/L=1)
encoding or from right to left do lower priority (when H/L=0) encoding (i.e. seek the first bit with the value of 1,
and the relative bit number of this point will be stored into the low byte (B0~B7) of encoded resultant register
D, and the high byte of D will be filled with 0.
bNL1
bH
bL
BNSNL1
b0 Relative bit number

BNS
B15
B1 B0
Direction of extension 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1
High
Total NL discrete points
High priority search direction

D
00000000
Low
Low priority search direction
H or L
As shown in the diagram above, for high priority encoding, the bit first to find is bH (with a value of 12), and for
low priority encoding, the bit first to find bL (with a value of 4). Among the NL discrete points there must be at
least one bit with value of 1. If all bits are 0, will not to carry out this instruction, and the all zero flag "D=0" will
set to 1.
Because S is a 16-bit register, Ns can be 0~15, and is used to assign a point of B0~B15 within S as the
encoding start point (b0). The value of NL can be 2~256, and it is used to identify the encoding end point, i.e. it
assigns NL successive single points starting from the start point (b0) towards the left (high position direction)
as the encoding zone (i.e. b0bNL1). If the value of Ns or NL exceeds the above value, then do not carry out
this instruction, and set the range-error flag "ERR" as 1.
7-35

FUN 58 P
ENCOD
FUN 58 P
ENCOD
ENCODE
If the encoding end point (bNL1) beyond the B15 of S, then continue extending towards S+1, S+2, but it must
not exceed the range of specific type of operand. If it goes beyond this, then this instruction can only take the
discrete points between b0 and the highest limit into account for encoding.
z The instruction at left is a high priority encode example.

X0
EN
58P.ENCOD
0
S : R
When X0 goes from 0 to 1, will take out toward left 36

successive bits starting from B9 (b0) specified by Ns
D=0
within S, and perform high priority encoding (because
Ns : 9
H/L
H/L = 1). That is, starting from b35 (encoding end point),
ERR
NL : 36
D : WY
move right to find the first bit with the value of 1. The
resultant value of this example is b26, so the value of D

is 001AH=26, as shown in the diagram below.
S
B15
(b0)
B9
D
B0
R0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R1
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R2
0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0
B47
B44
B32
b35
b26
X01
Y15
WY0
0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0
High byte always
fill with "0"
The first bit with the value of 1

for high priority encoding
7-36
Y0
26
encode value

FUN 59 P
7SG
FUN 59 P
7SG
S : Source data to be converted

N : The nibble number within S for conversion
D : Register storing 7-segment result
Range
Operand
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
16-bit
+/number
V, Z
P0~P9
03
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095
WX
WX0
WY0
WM0
WX240 WY240 WM1896
When conversion control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will convert N+1
number of nibbles (A nibble is comprised by 4 successive bits, so B0~B3 of S form nibble 0, B4~B7 form
nibble 1, etc...) within S to 7-segment code, and store the code into a low byte of D (High bytes does not
change). The 7 segment within D are put in sequence, with "a" segment placed at B6, "b" segment at
B5, .... ,"g" segment at B0. B7 is not used and is fixed as 0.
Because this instruction is limited to 16 bits, and S only has 4 nibbles (NB0~NB3), the effective range of N
is 0~3. Beyond this range, will set the N value flag error "ERR" to 1, and does not carry out this instruction.
Care should be taken on total nibbles to be converted is N+1. N=0 means one digit to convert, N=1 means
two digits to convert etc
7-37

FUN 59 P
7SG
FUN 59 P
7SG
Example 1When M1 OFFON, convert hexadecimal to 7-Segment.

M1
EN
59P. 7SG
S : R0
Figure left shown the conversion of first digit (nibble)

of R0 to 7-segment and store in low byte of R100, the
ERR
high byte of R100 remain unchanged.
N : 0
D : R100
Original R1000000H
R00001H
R1000030H1
Example 2When M1 ON, convert the hexadecimal to 7-Segment.

M1
R00056H
59. 7SG
EN S : R0
Instruction at left will convert the first and the second

ERR
digit of R0 to 7-segment and store in R100.
N : 1
The low byte of R100 stores first digit.
D : R100
The high byte of R100 stores second digit.
R1005B5FH56
Example 3When M1 ON, converting hexadecimal to 7-Segment.

Instruction at left will convert the first, second and third
digit of R0 to 7-segment and store in R100 and R101.
M1
59. 7SG
EN S : R0
ERR
N : 2
The low byte of R101 stores third digit.
D : R100
The high byte of R101 remain unchanged.
Original R101=0000H
R0=0A48H
R100=337FH48
R101=0077HA
Example 4When M1 ON, convert hexadecimal to 7-Segment.

M1
59. 7SG
EN S : R0
N : 3
D : R100
Instruction at left will convert 1~4 digit of R0 to

ERR
7-segment and store in R100 and R101.

The low byte of R101 stores third digit.
th
The high byte of R101 stores 4 digit.
R0=2790H
R100=7B7EH90
R101=6D72H27
7-38

FUN 59 P
7SG
FUN 59 P
7SG
Nibble data of S
Hexadecimal
number
Binary
number
Low byte of D
7-segment
display format
B7
z
B6
a
B5
b
B4
c
B3
d
B2
e
B1
f
B0
g
0000
0001
0010
0011
0100
B6
a
B1
0101
0110
B5
B0
g
B2
B3
B4
B7
P
0111
1000
1001
1010
1011
1100
1101
1110
1111
7-segment display pattern table
7-39
Display
pattern

FUN 60 P
ASC
FUN 60 P
ASC
ASCII CONVERSION
Ladder symbol
Conversion control
EN
60P.
S :
ASC
S : Alphanumeric to be converted into ASCII code

D : Starting register storing ASCII results
D :
Range
Operand
WY
WM
WY0
WM0
WY240 WM1896
WS
TMR
CTR
HR
OR
SR
ROR
DR
WS0
WS984
T0
T255
C0
C255
R0
R3839
R3904
R3967
R3968
R4167
R5000
R8071
D0
D4095
112
alphanumeric
Alphanumeric
When conversion control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will convert
alphabets and numbers stored in S (S has a maximum of 12 alphanumeric characters) into ASCII and
store it into registers starting from D. Each 2 alphanumeric characters occupy one 16-bit register.
The application of this instruction, most often, stores alphanumeric information within a program, and waits
until certain conditions occur, then converts this alphanumeric information into ASCII and conveys it to
external display devices which can accept ASCII code.
z The instruction at left converts the 6 alphabets

-ABCDEF into ASCII then stores it into 3 successive
X0
EN
60P. ASC
S : ABCDEF
registers starting from R0.

ERR
D : R0
Alphabet
X01
ABCDEF
7-40
High Byte
Low Byte
R0
42B
41A
R1
44D
43C
R2
46F
45E

FUN 61 P
SEC
FUN 61 P
SEC
S : Starting calendar data register to be

converted
D : Starting register storing results
Range
WX
Operand
S
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
R0 R3840 R3904 R3968 R5000 D0

C0
T0
WS0
WM0
WY0
WX0
When conversion control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will convert the hour:
minute: second data of S~S+2 into an equivalent value in seconds and store it into the 32-bit register formed
by combining D and D+1. If the result = 0, then set the "D = 0" flag as 1.
Among the WSZ-controller instructions, the hour: minute: second time related instructions (FUN61 and 62)
use 3 words of register to store the time data, as shown in the diagram below. The first word is the second
register, the second word is the minute register, and finally the third word is the hour register, and in the 16
bits of each register, only B14~B0 are used to represent the time value. While bit B15 is used to express
whether the time values are positive or negative. When B15 is 0, it represents a positive time value, and
when B15 is 1 it represents a negative time value. The B14~B0 time value is represented in binary, and
when the time value is negative, B14~B0 is represented with the 2's complement. The number of seconds
that results from this operation is the result of summation of seconds from the three registers representing
hours: minutes: seconds.
B15
S (sec)
S1 (min)
S2 (hr)
B14
32768 sec32767 sec
32768 min32767 min
32768 hr32767 hr
B0
D
The sec. value.
D1
B31 B30
B16
B31 is used to represent the positive or
negative nature of the sec. value
The B15 of each registers is used to represent the sign of each time value
z
B15B0
Besides FUN61 or 62 instructions which treat hour: minute: second registers as an integral data, other
instructions treat it as individual registers.
The example program at below converts the hour: minute: second data formed by R20~R22 into their
equivalent value in seconds then stored in the 32-bit register formed by R50~R51. The results are shown
below.
X0
EN
61P. SEC
20
S : R
D : R
S
D=0
R20
R21
R22
0E11H
FD2FH
03F3H
3601 sec
-721 min
1011 hr
X01
50
7-41
R50
R51
EE45H
0036H
3599941 sec

FUN 62 P
HMS
FUN 62 P
HMS
SECONDHOURMINUTESECOND
S :Starting register of second to be converted

D :Starting register storing result of
conversion (hour : minute : second)
Range
WX
Operand
S
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
K
-117968399
117964799
When conversion control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will convert the
second data from the S~S+1 32-bit register into the equivalent hour : minute : second time value and store it
in the three successive registers D~D+2. All the data in this instruction is represented in binary. (if there is a
negative value it is represented using the 2's complement.)
B15
S
S1
B0
B16
B0
59 sec59 sec
59 min59 min
32768 hr32767 hr
D (sec)
D1 (min)
D2 (hr)
Second
B31
B15
The bit B31 of the second
The bits B15 of each register are used as
register is used as the sign
the sign bit of the hour: minute: second
bit of the second value.
value.
As shown in the diagram above, after convert to hour : minute : second value, the minute : second value can
only be in the range of -59 to 59, and the hour number can be in the range of -32768 to 32767 hours.
Because of this, the maximum limit of D is -32768 hours, -59 minutes, -59 seconds to 32767 hours, 59
minutes, 59 seconds, the corresponding second value of S which is in the range of -117968399 to
117964799 seconds. If the S value exceeds this range, this instruction cannot be carried out, and will set the
over range flag "OVR" to 1. If S = 0 then result is 0 flag "D = 0" will be set to 1.
The program in the diagram below is an example of this instruction. Please note that the content of the
registers are denoted by hexadecimal, and on the right is its equivalent value in decimal notation.
X0
EN
62P. HMS
0
S : R
D=0
D : R
OVR
10
R0
R1
5D17H
0060H
6315287 sec
X01
R10
R11
R12
7-42
002FH
000EH
06DAH
47 sec
14 min
1754 hr

FUN 63 P
HEX
FUN 63 P
HEX
S : Starting source register.

N : Number of ASCII codes to be converted to
hexadecimal values.
D : The starting register that stores the result

(hexadecimal value).
S, N, D, can associate with V, Z, P0~P9 to do the
indirect addressing application.
Range
Operand
WX
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
C0
R0
R3840 R3904 R3968 R5000
D0
C255 R3839 R3903 R3967 R4167 R8071 D4095
WY
WX0
WY0
WM0
WS0
T0
WX240 WY240 WM1896 WS984 T255
K
16-bit
+number
XR
V, Z
P0~P9
1511
When conversion control EN =1 or EN ( P instruction) changes from 01, it will convert the N
successive hexadecimal ASCII character(0~9,A~F) convey by 16 bits registers (Low Byte is effective)
into hexadecimal value, and store the result into the register starting with D. Every 4 ASCII code is stored in
one register. The nibbles of register, which does not involve in the conversion of ASCII code will remain
unchanged.
The conversion will not be performed when N is 0 or greater than 511.
When there is ASCII error (neither 30H39H nor 41H46H), the output ERR is ON.
The main purpose of this instruction is to convert the hexadecimal ASCII character (0~9,A~F), which is
received by communication port1 or communication port2 from the external ASCII peripherals, to the
hexadecimal values that the CPU can process directly.
7-43

FUN 63 P
HEX
FUN 63 P
HEX
Example 1When M1 from OFFON, ASCII code converted to hexadecimal value.

63P. HEX
S : R0
M1
EN
Converts the ASCII code of R0 into hexadecimal

value and store to nibble0 (nibble1~nibble3 remain
N : 1
unchanged) of R100.
D : R100
Originally R1000000H
R00039H9
R1000009H
Example 2When M1 is ON, ASCII code converted to hexadecimal value.

M1
EN
63. HEX
S : R0
Converts the ASCII code of R0 and R1 into

hexadecimal value and store to low byte (high byte
N : 2
remain unchanged) of R100.
D : R100
R00039H9
R10041HA
R100009AH

M1
EN
63. HEX
S : R0
Converts the ASCII code of R0 and R1 into

hexadecimal value and store result into R100 (nibble
N : 3
3 remain unchanged).
D : R100
R00039H 9
R10041H A
R20045H E
R10009AEH

M1
EN
63. HEX
S : R0
Converts the ASCII code of R0~R5 into hexadecimal

value and store it to R100~R101.
N : 6
D : R100
R00031H1
R10032H2
R1010000H
R20033H3
R30034H4
R40035H5
R1003456H
R50036H6
R1010012H
7-44

FUN 64 P
ASCII
FUN 64 P
ASCII
S : Starting source register

N : Number of hexadecimal digit to be converted to
ASCII code
D : The starting register storing result.
S, N, D, can associate with V, Z, P0~P9 to do the
Range
Operand
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
16-bit
+ number
XR
V, Z
P0~P9
1~511
When conversion control EN =1 or EN ( P instruction) changes from 01, will convert the N
successive nibbles of hexadecimal value in registers start from S into ASCII code, and store the result to
low byte (high byte remain unchanged) of the registers which start from D.
z
z
The conversion will not be performed when the value of N is 0 or greater than 511.
The main purpose of this instruction is to convert the numerical value data, which controller has processed,
to ASCII code and transmit to ASCII peripherals by communication port1 or communication port 2.
7-45

FUN 64 P
ASCII
FUN 64 P
ASCII
Example 1When M1 changes from OFFON, it converts hexadecimal value to ASCII code.
M1
EN
64P. ASCII
S : R0
Converts the Nibble 0 of R0 to ASCII code and stores

it into R100 (High byte does not change).
N : 1
D : R100
R00009H
R1000039H9
Example 2When M1 is ON, it converts hexadecimal value to ASCII code.

M1
EN
64. SCII
S : R0
Converts the NB0NB1 of R0 to ASCII code and

stores it into R100 R101 (high bytes remain
N : 2
unchanged).
D : R100
R0009AH
R1000039H9
R1010041HA

M1
EN
64. SCII
S : R0
Converts the NB0NB2 of R0 to ASCII code and

stores it into R100R102.
N : 3
D : R100
R00123H
R1000031H1
R1010032H2
R1020033H3

M1
EN
64. SCII
S : R0
Converts the NB0NB5 of R0R1 to ASCII code

and stores it into R100R105.
N : 6
D : R100
R03456H
R10012H
R1000031H1
R1010032H2
R1020033H3
R1030034H4
R1040035H5
R1050036H6
7-46

END
PROGRAM END
END
No operand
When end control "EN" = 1, this instruction is activated. Upon executing the END instruction and "EN" = 1, the
program flow will immediately returns to the starting point (0000M) to restart the next scan i.e. all the
programs after the END instruction will not be executed. When "EN" = 0, this instruction is ignored, and
programs after the END instruction will continue to be executed as the END instruction is not exist.
This instruction may be placed more than one point within a program, and its input (end control "EN") controls
the end point of program execution. It is especially useful for debugging and for testing.
Its not necessary to put any END instructions in the main program, CPU will automatic restart from start point
when reach the end of main program.
0000M
Program 1
Program 1
Program execution
X0=1
X0
EN
END
X1
EN
Program 3
7-47
X0
Program 2
Program 2
X0=0
X1=1
X0=X1=0
ORG
END
END
ORG
END
X1
Program 3

FUN 65
LBL
FUN 65
LBL
LABEL
S : Alphanumeric, 1~6 characters
z This instruction is used to make a tag on certain address within a program, to provide a target address for
execution of JUMP, CALL instruction and interrupt service. It also can be used for document purpose to
improve the readability and interpretability of the program.
z This instruction serves only as the program address marking to provide the control of procedure flow or for
remark. The instruction itself will not perform any actions; whether the program contains this instruction or not,
the result of program execution will not be influenced by this instruction.
z The label name can be formed by any 16 alphanumeric characters and cant be duplicate in the same
program. The following label names are reserved for interrupt function usage. These reserved words, cant
be used for normal program labels.
Reserved words
Description
X0+IX15+IINT0INT15
labels for external input (X0X15) interrupt

service routine.
X0IX15IINT0-INT15-
HSC0IHSC7I
labels for high speed counter HSC0HSC7

interrupt service routine.
1MSI1MS, 2MSI2MS, 3MSI3MS,

4MSI4MS, 5MSI5MS, 10MSI10MS,
50MSI50MS, 100MSI100MS
Labels for 8 kinds of internal timer interrupt

service routine.
HSTAIATMRI
Label for High speed fixed timer interrupt

service routine.
PSO0IPSO3I
Labels for the pulse output

finished interrupt service routine.
command
Only the interrupt service routine can use the label names listed on above table, if mistaken on using the
reserved label on the normal subroutine can cause the CPU fail or unpredictable operation.
The label of following diagram illustration served only as program remarks (it is not treated as a label for call
or jump target). For the application of labeling in jump control, please refer to JMP instruction for explanation.
As to the labeling serves as subroutine names, please refer to CALL instruction for details.
65
LBL
PGM1
Program 1
65
LBL
PGM2
Program 2
7-48

FUN 66 P
JMP
FUN 66 P
JMP
JUMP
LBL : The program label to be jumped
z When jump control EN=1 or EN ( P instruction) changes from 01, controller will jump to the location
behind the marked label and continuous to execute the program.
z This instruction is especially suit for the applications where some part of the program will be executed only
under certain condition. This can shorter the scan time while not executes the whole program.
z This instruction allows jump backward (i.e. the address of LBL is comes before the address of JMP
instruction). However, care should be taken if the jump action cause the scan time exceed the limit set by the
watchdog timer, the WDT interrupt will be occurred and stop executing.
z The jump instruction allows only for jumping among main program or jumping among subroutine area, it cant
jump across main/subroutine area.
X0
66
EN JMP
In the left diagram, when X0=1, the program will jump

directly to the LBL position named PATHB and
PATHB
continuing to execute program B. Therefore it will

skip the program A and none of the instructions of
Program A
65
LBL
program A will be executed.
The status of registers
and the coils associated with program A will keep
PATHB
unchanged (as if there is no program section A).

Program B
7-49

FUN 67 P
CALL
FUN 67 P
CALL
CALL
LBL : The subroutine label name to be called.
When call control EN=1 or EN ( P instruction) changes from 01, controller will call (perform) the
subroutine bear the same label name as the one being called. When execute the subroutine, the program
will execute continuous as normal program does but when the program encounter the RTS instruction then
the flow of the program will return back to the address immediately after the CALL instruction.
All the subroutines must end with one return from
65
LBL
subroutine instruction RTS instruction; otherwise it
SUB1
will cause executing error or CPU shut down.

Program 1
Nevertheless, an RTS instruction can be shared by

subroutines
(so
called
as
multiple
entering
subroutines; even though the entry points are
SUB1
66
JMP
different, they have a same returning path) as
65
LBL
illustrated in the right diagram subroutine SUB13.

When main program called a subroutine, the
the most (include the interrupt routine).
65
LBL
SUB2
CALL SUB1
2X
3X
4X
5X
LBL SUB1
LBL SUB2
LBL SUB3
LBL SUB4
CALL SUB2
CALL SUB3
CALL SUB4
RTS
RTS
RTS
Main program area
SUB3
Program 3
SUB3
1X
SUB2
Program 2
subroutine also can call the other subroutines (so

called the nested subroutines) for up to 5 levels at
SUB3
68
RTS
RTS
Subroutine area
Interrupt service programs HSC0IHSC7I, PSO0IPSO3I, X0+IX15+I / INT0INT15, X0-IX15-I /

INT0-INT15-, HSTAI / ATMRI, 1MS / 1MS, 2MSI / 2MS, 3MSI / 3MS, 4MSI / 4MS, 5MSI / 5MS, 10MSI /
10MS, 50MSI / 50MS, 100MSI / 100MS are also a kind of subroutine.
It is also placed in sub program
area. However, the calling of interrupt service program is triggered off by the signaling of hardware to
make the CPU perform the corresponding interrupt service program (which we called as the calling of the
interrupt service program). The interrupt service program can also call subroutine or interrupted by other
interrupts with higher priority. Since it is also a subroutine (which occupied one level), it can only call or
interrupted by 4 levels of subroutine or interrupt service program. Please refer to RTI instruction for
explanation.
7-50

FUN 68
RTS
FUN 68
RTS
This instruction is used to represent the end of a subroutine. Therefore it can only appear within the
subroutine area. Its input side has no control signal, so there is no way to serially connect any contacts.
This instruction is self sustain, and is directly connected to the power line.
When controller encounter this instruction, it means that the execution of a subroutine is finished. Therefore
it will return to the address immediately after the CALL instruction, which were previously executed and will
continue to execute the program.
If this instruction encounters any of the three flow control instructions MC, SKP, or JMP, then this instruction
may not be executed (it will be regarded as not exist). If the above instructions are used in the subroutine
and causing the subroutine not to execute the RTS instruction, then controller will halt the operation and set
the M1933 ( flow error flag) to 1. Therefore, no matter what the flow is going, it must always ensure that any
subroutine must be able to execute a matched RTS instruction.
For the usage of the RTS instruction please refer to instructions for the CALL instruction.
7-51

FUN 69
RTI
FUN 69
RTI
The function of this instruction is similar to RTS. Nevertheless, RTS is used to end the execution of sub
program, and RTI is used to end the execution of interrupt service program. Please refer to the explanation
of RTS instruction.
A RTI instruction can be shared by more than one interrupt service program. The usage is the same as the
sharing of an RTS by many subroutines. Please refer to the explanation of CALL instruction.
The difference between interrupts and call is that the sub program name (LBL) of a call is defined by user,
and the label name and its call instruction are included in the main program or other sub program.
Therefore, when controller performs the CALL instruction and the input EN=1 or EN (P instruction)
changes from 01, the controller will call (execute) this sub program.
For the execution of interrupt
service program, it is directly used with hardware signals to interrupt CPU to pause the other less important
works, and then to perform the interrupt service program corresponding to the hardware signal (we call it
the calling of interrupt service program). In comparing to the call instruction that need to be scanned to
execute, the interrupt is a more real time in response to the event of the outside world. In addition, the
interrupt service program cannot be called by label name; therefore we preserve the special reserved
words label name to correspond to the various interrupts offered by controller (check FUN65 explanation
for details). For example, the reserved word X0+I is assigned to the interrupt occurred at input point X0; as
long as the sub program contains the label of X0+I, when input point X0 interrupt is occurred (X0:), the
controller will pause the other lower priority program and jump to the subroutine address which labeled as
X0+I to execute the program immediately.
z
If there is a interrupt occurred while CPU is handling the higher priority (such as hardware high speed
counter interrupt) or same priority interrupt program (please refer to Chapter 10 for priority levels), the
controller will not execute the interrupt program for this interrupt until all the higher priority programs were
finished.
If the RTI instruction cannot be reached and performed in the interrupt service routine, may cause a serious
CPU shut down. Consequently, no matter how you control the flow of program, it must be assured that the
RTI instruction will be executed in any interrupt service program.
For the detailed explanation and example for the usage of interrupts, please refer to Chapter 10 for
explanation.
7-52

FUN 70
FOR
FUN 70
FOR
FOR
N : Number of times of loop execution
Range WX
Operand
N
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
1
This instruction has no input control, is connected directly to the power line, and cannot be in series with
any conditions.
The programs within the FOR and NEXT instructions form a program loop (the start of the loop program is
the next instruction after FOR, and the last is the instruction before NEXT). When controller executes the
FOR instruction, it first records the N value after that instruction (loop execution number), then for N times
successively execution from start to last of the programs in the loop. Then it jumps out of the loop, and
continues executes the instruction immediately after the NEXT instruction.
The loop can have a nested structure, i.e. the loop includes other loops, like an onion. 1 loop is called a
level, and there can be a maximum of 5 levels. The FOR and NEXT instructions must be used in pairs. The
first FOR instruction and the last NEXT instruction are the outermost (first) level of a nested loop. The
second FOR instruction and the second last NEXT instruction are the second level, the last FOR instruction
and the first NEXT instruction form the loop's innermost level.
70
FOR
In the example in the diagram at left, loop c will be

executed 4 x3 x2 = 24 times, loop d will be executed 3
x2 = 6 times, and loop e will be executed 2 times.
70
FOR
70
FOR
If there is a FOR instruction and no corresponding NEXT

instruction, or the FOR and NEXT instructions in the
nested loop have not been used in pairs, or the sequence
of FOR and NEXT has been misplaced, then a syntax
error will be generated and this program may not be
executed.
1
71
NEXT
71
NEXT
71
NEXT
In the loop, the JMP instruction may be used to jump out

of the loop. However, care must be taken that once the
loop has been entered (and executed to the FOR
instruction), no matter how the program flow jumps, it
must be able to reach the NEXT instruction before
reaching the END instruction or the bottom of the
program. Otherwise WSZ-controller will halt the operation
and show an error message.
The effective range of N is 1~16383 times. Beyond this
range WSZ-controller will treat it as 1. Care should be
taken , if the amount of N is too large and the loop
program is too big, a WDT may occur.
7-53

FUN 71
NEXT
LOOP END
FUN 71
NEXT
This instruction and the FOR instruction together form a program loop. The instruction itself has no input
control, is connected directly to the power line, and cannot be in series with any conditions.
When controller has not yet entered the loop (has not yet executed to the FOR instruction, or has executed
but then jumped out), but the NEXT instruction is reached, then controller will not take any action, just as if
this instruction did not exist.
For the usage of this instruction please refer to the explanations for the FOR instruction on the preceding
page.
7-54

FUN 74 P
IMDIO
FUN 74 P
IMDIO
IMMEDIATE I/O
D : Starting number of I/O points to be refreshed

N : Number of I/O points to be refreshed
Range
Operand
D
N
X
Xn of
Main
Unit.
Y
Yn of
Main
Unit.
K
1
36
For normal controller scan cycle, the CPU gets the entire input signals before the program is executed, and
then perform the executing of program based on the fresh input signals. After finished the program
execution the CPU will update all the output signals according to the result of program execution. Only after
the complete scan has been finished will all the output results be transferred all at once to the output. Thus
for the input event to output responses, there will be a delay of at least 1 scan time (maximum of 2 scan
time). With this instruction, the input signals or output signals specified by this instruction can be
immediately refresh to get the faster input to output response without the limitation imposed by the scan
method.
When refresh control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, then the status of N
input points or output points (D~D+N-1) will be refreshed.
The I/O points for WSZ-controller's immediate I/O are only limited to I/O points on the main unit. The table
below shows permissible I/O numbers for 24, 32, 40 and 60 point main units:
Main-unit type
24
points
32
points
40
points
60
points
Input signals
X0X13
X0X19
X0X23
X0X35
Output signals
Y0Y9
Y0Y11
Y0Y15
Y0Y23
Permissible
numbers
If the intended refresh I/O signals of this instruction is beyond the range of I/O points specified on above
table then controller will be unable to operate and the M1931 error flag will be set to 1. (For example, if in a
program, D=X11, N=10, which means X11 to X20 are to be immediately retrieved. Supposing the main unit
is WSZ-32MCT2, then its biggest input point is X19, and clearly X20 has already exceeded the main unit's
input point number so under such case M1931 error flag will be set to 1).
With this instruction, controller can immediately refresh input/output signals. However, the delay of the
hardware or the software filter impose on the I/O signals still exist. Please pay attention on this.
7-55

FUN 76 D
TKEY
FUN 76 D
TKEY
DECIMAL- KEY INPUT
IN : Key input point

D : register storing key-in numerals
KL: starting coil to reflect the input status
Range
Operand
IN
D
KL
X
X0
X240
Y0
M0
S0
Y240 M1896 S984
WY
WM
WS
TMR CTR
WY0
WM0
WS0
T0
WY240 WM1896 WS984 T255
HR
OR
SR
ROR
DR
XR
C0
R0 R3904 R3968 R5000 D0
V, Z
C255 R3839 R3967 R4167 R8071 D4095 P0~P9
This instruction has designated 10 input points IN~IN+9 (IN0~IN9) to one decimal number entry (IN->0,
IN+1->1). According to the key-in sequence (ON) of these input points, it is possible to enter 4 or 8
decimal numbers into the registers specified by D.
When input control "EN" = 1, this instruction will monitor the

10 input points starting from IN and put the corresponding
number into D register while the key were depressed. It will
wait until the input point has released, then monitor the next
"ON" input point, and shift in the new number into D register
(high digit is older than low digit ) . For the 16-bit operand, D
register can store up to 4 digits, and for the 32-bit operand 8
digits may be stored. When the key numbers fulfill the D
register, new key-in number will kick out the oldest key
number of the D register. The key-in status of the 10 input
points starting from IN will be recorded on the 10
corresponding coil starting from KL. These coils will set to 1
while the corresponding key is depressed and remain
unchanged even if the corresponding key is released. If
other key is depressed, it will return to zero. As long as any
input point is depressed (ON), then the key-in flag KPR will
set to 1. Only one of IN0~IN9 key can be depressed at the
same time. If more than one is pressed, then the first one is
the only one taken. Below is a schematic diagram of the
function with 16-bit operand.
Key-in
IN0 ~ IN9
BCD Code
Forced out
1000S 100S 10S
1S
BIN(0~9999)
When input control "EN" = 0, this instruction will not be executed. KPR output and KL coil status will be 0.
However, the numerical values of D register will remain unchanged.
76.TKEY
X20
EN
Y0
IN :
D :
KL : M
KPR
The instruction at left represents the input point X0 with

the number "0", X1 is represented by 1, ... , M0 records
the action of X0, M1 records the action of X1 ... , and the
input numerical values are stored in the R0 register.
7-56

FUN 76 D
TKEY
FUN 76 D
TKEY
DECIMAL- KEY INPUT
The following diagram is the input wiring schematic for this example:
X0
X1
X2
X3
X4
X5
X6
X7
X8
X9
side
FBS-PLC input
WSZ-controller
input
inside
If the X0~X3 key-in sequence follows the
cdefghi
sequence in the following diagram. At step
and i the X20 is 0, so there was no generated key, only steps defgh are effective. Because
the register can only hold 4 key numbers, the first key of these 5 steps was kick out. The key strokes 3302
of the steps efgh are entered in the R0 register.
X20
5
X0
2
X1
X2
X3
M0
M1
M2
M3
Y0
R0
0000
0000
0001
0001
0013
0013
0133
0133
7-57
1330
1330
3302
3302

FUN 77 D
HKEY
FUN 77 D
HKEY
HEX-KEY INPUT
IN : Starting of digital input for key scan

OT: Starting of digital output for multiplexing
key scan (4 points)
D : Register to store key-in numbers
KL : Starting relay for key status
WR: Working register, it can't repeat in use
Range
Operand
IN
OT
D
KL
WR
WY
WM
WS
TMR CTR
HR
OR
SR
ROR
DR
XR
X0
Y0
M0
S0
WY0
WM0
WS0
T0
C0
R0 R3904 R3968 R5000 D0
V, Z
X240 Y240 M1896 S984 WY240 WM1896 WS984 T255 C255 R3839 R3967 R4167 R8071 D4095 P0~P9
The numeric (0~9) key function of this instruction is similar as for the TKEY instruction. The hardware
connection for TKEY and HKEY is different. For TKEY instruction each key have one input point to connect,
while HKEY use 4 input points and 4 output points to form a 4x4 multiplex 16 keys input. 44 means that
there can be 16 input keys, so in addition to the 10 numeric keys, the other 6 keys can be used as function
keys (just like the usual discrete input). The actions of the numeric keys and the function keys are
independent and have no effect on each other.
When execution control "EN" = 1, this instruction will scan the numeric keys and function keys in the matrix
formed by the 4 input points starting from IN and the 4 output points starting from OT. For the function of the
numeric keys and "NKP" output please refer to the TKEY instruction. The function keys maintain the key-in
status of the A~F keys in the last 6 relays specified by KL (the first 10 store the key-in status of the numeric
keys). If any one of the A~F keys is depressed, FKP (FO1) will set to 1. The OT output points for this
instruction must be transistor outputs.
The biggest number for a 16-bit operand is 4 digits (9999), and for 32-bit operand is 8 digits (99999999).
However, there are only 6 function keys (A~F), no matter whether it is a 16-bit or 32-bit operand.
77D.HKEY
X10
EN
M10
IN :
X0
OT :
Y0
D :
R0
M0
KL :
WR :
Function
Keys
NKP
M11
FKP
Numeric
Keys
D0
The instruction in the diagram above

uses X0~X3 and Y0~Y3 to form a
multiplex key input. It can input numeric
values of 8 digits and stores the results
in R1R0. The input status of the function
keys is stored in M10(A)~M15(F).
24V
-
S/S
X1
X2
X3
PLC (transistor
output)
Controller
(transistor
output)
7-58
X0
Y0
Y1
Y2
Y3

FUN 78 D
DSW
IN : Starting of input for thumb wheel switch

OT : Starting of output for multiplexing scan
(4 points)
D : Register to store readout value
WR: Working register, it can't repeat in use
(WR & WR+1 for 16-bit operation;
WR, WR+1 & WR+2 for 32-bit
operation).
Ladder symbol
Input control
FUN 78 D
DSW
78D.DSW
IN :
EN
DN
Readout completed
ERR
Reading error
OT :
D :
WR :
Range
WY
WM
WS
WS0
WM0
WY0
Y0
X0
X240 Y240 WY240 WM1896 WS984
Operand
IN
OT
D
WR
TMR
CTR
T0
T255
C0
C255
HR
OR
SR
ROR
DR
XR
V, Z
D0
R3904 R3968 R5000
R0
R3839 R3967 R4167 R8071 D4095 P0~P9
*
*
When input control "EN" = 1, this instruction will readout one digit data from the 4 input points starting from
IN (IN0~IN3). It takes 4 scans to read out a group of 4-digit BCD values (0000~9999) and store them into D
register. With a 32-bit operand, each scan can get 2 digits of data by reading the additional digit from
IN4-IN7 and store it in the D+1 register. Each bit of OT0~OT3 will sequentially set to 1 and get the digit data
respectively into 100(ones), 101(tens), 102(hundreds), and 103(thousands). As long as EN is 1, controller will
scan and read out in continuous cycles. When each complete cycle is finished (i.e. the 4 digit readout of
100~103 is completed), the readout completed flag "DN" is set to 1. However, it is only kept for one scan. If
any digital readout value is not within the range of 0~9 (BCD), then reading error "ERR" will be set to 1 and
the value of that group of digits will be set to 0000.
The output points must be transistor outputs.

78.DSW
X10
EN
In this example, when X10 is 1, then the numeric value of the

thumb wheel switch (5678 in this example) will be read out
and stored into the R0 register.
M10
IN :
X0
OT :
Y0
D :
R0
WR :
D0
DN
The bits (8,4,2,1) with same digit should be connect together

and series with a diode (as shown in diagram below).
M11
ERR
With 32-bit operand a set of similar thumb wheel switch may

be added to X4~X7 (Y0~Y3 are shared with another group).
10 3 (5)
10 2 (6)
10 1 (7)
10 0 (8)
BCD thumb
wheel swith
8
S/S
X0
X1
X3
first group input
Y1
Y2
X4
X5
X6
X7
second group input

(only effective in
32-bit operand)
Y0
X2
24V
C
Y3
PLC
Controller
7-59

FUN 79 D
7SGDL
Ladder symbol
79D.7SGDL
S :
EN
Execution control
S
Output complete
DN
N : Specify signal output and polarity of latch.

WR : Working register, it can't repeat in use
N :
S may combine with V, Z, P0~P9 to serve

WR :
Operand
S
OT
N
Y
Y0
Y240
WX
: Register storing the data (BCD) to be

displayed
OT : Starting number of scanning output
OT :
Range
FUN 79 D
7SGDL
7-SEGMENT OUTPUT WITH LATCH
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
16-bit
number
XR
V, Z
P0~P9
03
z When input control "EN" = 1, the 4 nibbles of the S register, from digit 0 to digit 3, are sequentially sent out to
the 4 output points, OT0~OT3. While output the digit data, the latch signal of that digit (OT4 corresponds to
digit 0, OT5 corresponds to digit 1, etc...) at the same time is also sent out so that the digital value will be
loaded and latched into the 7-segment display respectively.
z When in D (32-bit) instruction, nibbles 0~3 from the S register, and nibbles 0~3 from the S+1 register are
transferred separately to OT0~OT3 and OT8~OT11. Because they are transferred at the same time, they can
use the same latch signal. 16-bit instructions do not use OT8~OT11.
z As long as "EN" remains 1, controller will execute the transfer cyclically. After each transfer of a complete
group of numerical values (nibbles 0~3 or 0~7), the output completed flag "DN" will set to 1. However, it will
only be kept for 1 scan.
79D.7SGDL
X0
EN
z In this example, when X0=1, the 4 nibbles of R0

will be transferred to the first group 7-segment
display in the diagram below. The 4 nibbles of R1
will be transferred to the second group 7-segment
display.
M10
S :
R0
OT :
Y0
N :
WR :
D0
DN
second group
first group
8
4
2
1
VCC
COM
10
1
Y0
8
4
2
1
2
Y1
4
Y2
10
10
8
Y3
VCC
COM
10
0
10
1
2
10
10
10 10 1
Y6
Y7
Y4
Y8
Y5
10
10
8
4
2
Y9 Y10 Y11
NPN
C o n t rPLC
o l l etransistor
r t r a n s ioutput
stor output
7-60
10

FUN 79 D
7SGDL
FUN 79 D
7SGDL
7-SEGMENT OUTPUT WITH LATCH
z WSZ transistor output has both a negative logic transistor output (NPN transistor - when the output status is ON,
the terminal voltage of the transistor output is low), and a positive logic transistor output (PNP - when the output
status is ON, the terminal voltage of the transistor output is high). Their structure is as follows:
WSZ positive logic output (PNP transistor)
WSZ negative logic output (NPN transistor)

+24V
+24V
Yn
When Yn is
"ON", this output
voltage is low
Yn
0V
+24V
Yn
+24V
When Yn is "ON",
Yn's terminal
voltage is high
Yn
0V
0V
z The data inputs (8,4,2,1) and latch signals of the 7-segment displays on the shelf for positive and negative logic
are all available. For example, for numerical value "8", the positive logic input should be 1000, and the negative
logic input 0111. Similarly, when the latch signal is 0, the positive logic latch permits the display numerical values
to enter through the latch (i.e. be loaded). When the latch signal is 1, the numerical values in the latch are
latched (maintained), and with negative logic they are not lached. The following diagram of a CD-4511
7-segment display IC is an example of a positive logic numerical value input with latch.
CD4511
Numberical value input
R
(1)A
(2)B
(4)C
(8)D
4-bit
4bit
latch
BCD to
LED
Drive
7-segment
n
LT BI
(10 ) LE
Latch sing 1
a
b
c
d
e
f
g
a
f
b
c
VCC
z The controller output and the 7-segment display input polarity can be positive and negative logic. Therefore, the
polarities between output and input must be coordinated to get the correct result. This instruction uses N to
specify the polarity relation between the controller transistor output, and the 7-segment display. The table below
shows all the possibility.
Numerical value input (8~1)
Same
Different
Latch signal (100-103)
Value of N
Same
Different
Same
Different
z In the diagram above, CD4511 is used as an example. If use NPN output, the data input polarity is different to
controller, and its latch input polarity is the same as controller, so N value should chosen as 2.
7-61

FUN 80
MUXI
FUN 80
MUXI
MULTIPLEX INPUT
IN : Multiplex input point number

OT : Multiplex output point number
(must be transistor output point)
N : Multiplex input lines (2~8)
D : Register for storing results
X
Range
Operand
IN
OT
N
D
X0
X240
WY
WM
WS
Y0
WY0
WM0
WS0
Y240 WY240 WM1896 WS984
TMR CTR
T0
T255
HR
OR
SR
ROR
DR
C0
R0
R3904 R3968 R5000
D0
C255 R3839 R3967 R4167 R8071 D4095
XR
V, Z
P0~P0
This instruction uses the multiplex method to read out N lines of input status from 8 consecutive input points
(IN0~IN7) starting from the input point specified by IN. With this method we can obtain 8N input status, but
only need to use 8 input points and N output points.
The multiplex scanning method goes through N output points starting from the OT output point. Each scan one
of the N bits will set to 1 and the corresponding line will be selected. OT0 responsible for first line, while OT1
responsible for second line, etc. Until it read all the N lines the 8N status that has been read out is then stored
into the register starting at D, and the execution completed flag "DN" is set as 1 (but is only kept for one
scanning period).
With every scan, this instruction retrieves a line for 8 inputs status, so N lines require N scan cycles before
they can be completed.
80.MUXI
X0
EN
X24
OT :
Y16
N :
D :
WR :
M10
IN :
This example retrieves 4 lines8 points of input,

32 points status in all. They are stored into the
DN
32-bit register of DWM0 (M0~M31).
WM0
D0
Fourth line
S/S
X24
M24
M25
M26
M27
M28
M29
M30
M31
M16
M17
M18
M19
M20
M21
M22
M23
Second line
M8
M9
M10
M11
M12
M13
M14
M15
First line
M0
M1
M2
M3
M4
M5
M6
M7
X25
X26
X27
X28
X29
X30
X31
Y21
Y22
Y23
PLC NPN
transistor
Controller
NPN
transistoroutput
output
24V
C
Y16
Y17
Y18
Y19
Y20
7-62
Third line

FUN 81 D
PLSO
FUN 81 D
PLSO
PULSE OUTPUT
Ladder symbol
Output control
EN
81D.PLSO
MD :
Fr
Pause control
PAU
OUT
Output go
DN
Output completed
ERR
Error
PC :
UY:or CK
Up/Down direction
U/D
Or DIR
Range
Operand
MD
Fr
PC
UYCK
DYDR
HO
DY:or DR
HO :
WX
WY
WM
WS
TMR CTR
HR
MD : Output mode selection

Fr : Pulse frequency
PC : Output pulse count
UY : Up pulse output point (MD=0).
DY : Down pulse output point (MD=0).
HO : Cumulative output pulse register.
(Can be not assigned).
CK : Pulse output point (MD=1).
DR : Up/Down output point (MD=1).
DIR: 1- up; 0- down.
OR
SR
ROR
DR
Yn of WX0
WY0
WM0
WS0
T0
R3904 R3968 R5000
D0
C0
R0
16/32-bit
Main
+/- number
Unit WX240 WY240 WM1896 WS984 T255 C255 R3839 R3967 R4167 R8071 D4095
01
82000
z When MD=0, this instruction performs the pulse output control as following:
z Whenever the output control EN changes from 01, it first performs the reset action, which is to clear the
output flag OUT and DN as well as the pulse out register HO to be 0. It gets the pulse frequency and
output pulse count values, and reads status of up and down direction U/D, so as to determine the direction
to be upward or downward. As the reset finished, this instruction will check the input status of pause output
PAU. No action will be taken if the pause output is 1 (output pause). If the PAU is 0, it will start to output
the ON/OFF pulse with 50% duty at the frequency Fr to the UY(U/D=1) or DY(U/D=0) point. It will increment
the value of HO register each time when a pulse is output, and will stop the output when HO registers pulse
count is equal to or greater than the cumulative pulse count of PC register and set the output complete flag
DN to 1. During the time when output pulse is transmitting the output transmitting flag OUT will be set to 1,
otherwise it will be 0.
z Once it starts to transmit pulse, the output control EN should kept to 1. If it is changed to 0, it will stop the
pulse sending (output point become OFF) and the flag OUT changes back to 0, but the other status or data
will keep unchanged. However, when its EN changes again from 0 to 1, it will lead to a reset action and
treat as a new start; the entire procedure will be restarted again.
z If you want to pause the pulse output and not to restart the entire procedure, the pause output PAU input
can be used to pause it. When PAU =1, this instruction will pause the pulse transmitting (output point is
OFF, flag OUT change back to 0 and the other status or data keeps unchanged). As it waits until the
PAU changes back from 1 to 0, this instruction will return to the status before it is paused and continues the
pulse transmitting output.
z During the pulse transmission, this instruction will keep monitoring the value of pulse frequency Fr and output
pulse count PC. Therefore, as long as the pulse output is not finished, it may allow the changing of the pulse
frequency and pulse count. However, the up/down direction U/D status will be got only once when it takes
the reset action (EN changes from 01), and will keep the status until the pulse output completed or
another reset occur. That is to say, except that at the very moment of reset, the change of U/D does not
influence the operation of this instruction.
z The main purpose of this instruction is to drive the stepping motor with the UY (upward) and DY (downward)
two directional pulses control, so as to help you control the forward or reverse rotating of stepping motor.
Nevertheless, if you need only single direction revolving, you can assign just one of the UY or DY (which will
save one output point), and leaving the other output blank. In such case, the instruction will ignore the
up/down input status of U/D, and the output pulse will send to the output point you assigned.
7-63

FUN 81 D
PLSO
FUN 81 D
PLSO
PULSE OUTPUT
z When MD=1, the pulse output will reflect on the control output DIR (pulse direction. DIR=1, up; DIR=0, down)
and CK (pulse output).
z This instruction can only be used once, and UY (CK) and DY (DR) must be transistor output point on the
controller main unit.
z The effective range of output pulse count PC for 16 bits operand is 032767. For the 32 bits operand(D
instruction), it is 02147483647. If the PC value = 0, it is treated as infinite pulse count, and this instruction
will transmit pulses without end with HO value and DN flag set at 0 all the time. The effective range of pulse
frequency (Fr) is 82000. If the value PC or Fr exceeds the range, this instruction will not be carried out and
the error flag ERR will set to 1.
z In this example, the program controls the stepping motor
81D.PLSO
X0
EN
X1
PAU
X2
U/D
M0
MD : 0
Fr :
PC :
UY :
DY :
DN
Y
Y
0
1
ERR
HO :
100Hz first, and then makes it turn reverse for 40 pulses
M1
the speed of 50Hz. Make sure that the up/down direction,

frequency Fr and the pulse count PC must be set before
the reset take action (EN changes from 01).
Turn forward
100Hz going 80 steps
Reset
enable
re-start
Output enable X0
Pause
to drive forward for 80 pulses (steps) at the speed of
OUT
Turn reverse
50Hz going 40 steps
Stop
(finished)
Reset Start
Stop
(finished)
Pause
X1
Direction X2
Reverse
Recerse
Forward
76
77
78
79 80
Up-pulse Y0
2
40
Down-pulse Y1
Under output M0
Output done M1
Frequency R0 100
Pulse to output R1
Output pulse count R5
50
40
80
75 76
77
78 79
7-64
80
39
40

FUN 82
PWM
FUN 82
PWM
To : Pulse ON width
(0~32767ms)
Tp : Pulse period
(1~32676ms)
OT: Pulse output point
Range
Operand
To
Tp
OT
WX
WY
WM
WS
Yn
WX0
WY0
WM0
WS0
of main
unit WX240 WY240 WM1896 WS984
TMR CTR
HR
IR
OR
SR
ROR
DR
T0
R3840 R3904 R3968 R5000
D0
0
C0
R0
T255 C255 R3839 R3903 R3967 R4167 R8071 D4095 32767
When execution control "EN" = 1, will send the pulse to output point OT with the "ON" state for To ms and
period as Tp. OT must be a transistor output point on the main unit. When "EN" is 0, the output point will be
OFF.
To
Tp
The units for Tp and To are ms, resolution is 1 ms. The minimum value for To is 0 (under such case the
output point OT will always be OFF), and its maximum value is the same as Tp (under such case the output
point OT will always be on). If To > Tp there will be an error, this instruction will not be carried out, and the
error flag "ERR" will set to 1.
This instruction can only be used once.
7-65

FUN 83
SPD
FUN 83
SPD
SPEED DETECTION
Ladder symbol
Detection control
EN
83.SPD
S :
S : Pulse input point for speed detection

OVF
TI : Sampling duration
Overflow
(units in ms)
TI :
D : Register storing results
D :
Range X
Operand
S
TI
D
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
X0
WX0
WY0
WM0
WS0
T0
D0
1
C0
R0 R3840 R3904 R3968 R5000
X7 WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095 32767
z This instruction uses the interrupt feature of the 8 high speed input points (X0~X7) on the WSZ main unit to
detect the frequency of the input signal. Within a specific sampling time (TI), it will calculate the input pulse
count for S input point, and indirectly find the revolution speed of rotating devices (such as motors).
z While use this instruction to detect the rotating speed of devices, The application should design to generate
more pulse per revolution in order to get better result, but the sum of input frequency of all detected signals
should under 5KHz, otherwise the WDT may occur.
z The D register for storing results uses 3 successive 16-bit registers starting from D (D0~D2). Besides D0
which is used to store counting results, D1 and D2 are used to store current counting values and sampling
duration.
z When detection control "EN" = 1, it starts to calculate the pulse count for the S input point, which can be
shown in D1 register. Meanwhile the sampling timer (D2) is switched on and keeps counting until the value of
D2 is reach to the sampling period (TI). The final counted value is stored into the D0 register, and then a new
counting cycle is started again. The sampling counting will go on repeating until "EN" = 0.
z Because D0 only has 16 bits, so the maximum count is 32767. If the sampling period is too long or the input
pulse is too fast then the counted value may exceed 32767, under that case the overflow flag will set to 1, and
the counting action will stop.
z Because the sampling period TI is already known and if every revolution of attached rotating device produces
"n" pulses, then the following equation can be used to get the revolution.
speed : N =
(D0) 60
103
(rpm)
n TI
X20
83.SPD
X20
EN
S :
TI :
D :
1000
R
0
OVF
X0
1000
z In the above example, if every revolution of the rotating

device produces 20 pulses (n = 20), and the R0 value is
200, then the revolution per minute speed "N" is as
follows.
R2
0
1000mS
R1a
R1
R0
7-66
1000mS
R1b
R1c
0
a
( 200 ) 60
follows : N =
10 3 = 200 rpm
60 1000
1000mS
R1a
R1b
R1c

FUN89/FUN89D (T1S)
FUN88/FUN88D (T.1S)
FUN87/FUN87D (T.01S)
FUN89/FUN89D (T1S)
FUN88/FUN88D (T.1S)
CUMULATIVE TIMER
CV : Register storing elapse time

(current value)
PV : Preset value of timer
Range
Operand
CV
PV
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
032767
or
z The operation for this instruction is the same as that for the basic timer (T0~T255), except that the basic
timer only has a "timing control" input - when its input is 1 it starts timing, and when input is 0 it get clear.
Every time the input changes, it starts timing again and is unable to accumulate. Timing with this instruction
is only permissible when enable control "EN" = 1. With this instruction, when timing control "TIM" is 1, it is
the same as a basic timer, but when "TIM" is 0, it does not clear, but keeps the current value. If the timer
needs to clear, then change enable control "EN" to 0. When timing control "TIM" is once again to be 1, it will
continue to accumulate from the previous value when the timer last paused. In addition, this instruction also
has two outputs, "Time up TUP" (when time up it is 1, usually it is 0) and "Time not up" (usually it is 1, when
time is up it is 0). Users can utilize input and output combinations to produce timers with various different
functions. For example:
z On delay energizing timer:
z This timer's output (Y0 in this example) is
89.T1S
X0
TIM
EN
CV : R
PV :
normally not energized. When this timer's
Y0
0
10
input control (X0 in this example) is activated
TUP
(ON), only after delay by 10 sec will output

Y0 become energized (ON).
NUP
z On delay de-energizing timer:
z The output Y0 of this timer is usually

energized. When this timer's input control X0
89.T1S
X0
TIM
EN
CV : R
PV :
0
10
is on, only after delay by 10 sec will the
TUP
output become de-energized (OFF).
Y0
NUP
7-67

FUN89/FUN89D (T1S)
FUN88/FUN88D (T.1S)
FUN89/FUN89D (T1S)
FUN88/FUN88D (T.1S)
CUMULATIVE TIMER
z Off delay energizing timer:
z This timer's output Y0 is usually

de-energized. When this timer's input control
89.T1S
X0
TIM
EN
Y0
CV : R
PV :
0
10
X0 is off, only after delay by 10 sec will
TUP
output Y0 become energized (ON).
NUP
z Off delay de-energizing timer:
z This timer's output Y0 is usually energized.

When this timer's timing control X0 is off,
89.T1S
X0
TIM
EN
CV : R
PV :
0
10
only after delay by 10 sec will output Y0
TUP
become de-energized (OFF).
Y0
NUP
z The diagram below shows the relation on input and output for the above 4 kinds of timers.
"OFF" (X0 released)
"ON" (X0 pressed down)

ON
X0
OFF
OFF
10S
ON delay energizing
ON delay de-energizing
ON
OFF
OFF
ON
10S
ON
OFF
OFF delay energizing
10S
ON
ON
OFF
ON
OFF delay de-enrgizing
OFF
10S
OFF
7-68

FUN 90 P
WDT
WATCHDOG TIMER
FUN 90 P
WDT
N : The watchdog time. The range of N is 5~120, unit

in 10ms (i.e. 50ms~1.2 sec) .
When execution control "EN" = 1 or "EN" ( P instruction) transition from 0 to 1, will set the watchdog time
to Nx10ms. If the scan time exceeds this preset time, controller will shut down and not execute the
application program.
The WDT feature is designed mainly as a safety consideration from the system view for the application. For
example, if the CPU of controller is suddenly damaged, and there is no way to execute the program or
refresh I/O, then after the WDT time expired, the WDT will automatically switch off all the I/Os, so as to
ensure safety. In certain applications, if the scan time is too long, it may cause safety problems or problems
of non-conformance with control requirements. This instruction can used to establish the limitation of the scan
time that you require.
Once the WDT time has been set it will always be kept, and there is no need to set it again on each scan.
Therefore, in practice this instruction should use the P instruction.
Default WDT time is 0.25 sec.
For the operation principles of WDT please refer to the RSWDT (FUN 91) instruction.
7-69

FUN 91 P
RSWDT
FUN 91 P
RSWDT
Ladder symbol
Execution control
EN
91P.
RSWDT
This instruction has no operand.
z When execution control "EN" = 1 or "EN" ( P instruction), the WDT timer will be reset (i.e. WDT will start
timing again from 0).
z The functions of WDT have already been described in FUN90 (WDT instruction).
The operation principles of watch dog timer are as follows:
The watchdog timer is normally implemented by a hardware one-shot timer (it can not be software,
otherwise if CPU fails, the timer becomes ineffective, and safeguards are quite impossible). "One-shot"
means that after triggered the timer once, the timing value will immediately be reset to 0 and timing will
restart. If WDT has begun timing, and never triggered it again, then the WDT timing value will continue
accumulating until it reach the preset value of N, at that time WDT will be activated, and controller will be
shut down. If trigger the WDT once every time before the WDT time N has been reached, then WDT will
never be activated. Controller can use this feature to ensure the safety of the system. Each time when
controller enters into system housekeeping after finished the program scanning and I/O refresh, it will
usually trigger WDT once, so if the system functions normally and scan time does not exceed WDT time
then WDT is never activated. However, if CPU is damaged and unable to trigger WDT, or the scan time is
too long, then there will not be enough time to trigger WDT within the period N, WDT will be activated and
will shut off controller.
z In some applications, when you set the WDT time (FUN90) to desire, the scan time of your program in certain
situations may temporarily exceed the preset time of WDT. This situation can be anticipated and allowed for,
and you naturally do not wish controller to shut down for this reason. You can use this instruction to trigger
WDT once and avoid the activation of WDT. This is the main purpose of this instruction.
7-70

FUN 92 P
HSCTR
HARDWARE HIGH SPEED COUNTER CURRENT VALUE (CV) ACCESS
FUN 92 P
HSCTR
CN : Hardware high speed counter number

0:
1:
2:
3:
4:
z
HSC0 or HST0
HSC1 or HST1
HSC2 or HST2
HSC3 or HST3
HSTA
The HSC0HSC3 counters of WSZ are 4 sets of 32-bit high speed counter with the variety counting modes
such as up/down pulse, pulse-direction, AB-phase. All the 4 high speed counters are built in the ASIC
hardware and could perform count, compare, and send interrupt independently without the intervention of the
CPU. In contrast to the software high speed counters HSC4HSC7, which employ interrupt method to
request for CPU processing, hence if there are many counting signals or the counting frequency is high, the
controller performance (scanning speed) will be degraded dramatically. Since the current values CV of HSC0
HSC3 are built in the internal hardware circuits of ASIC, the user control program (ladder diagram) cannot
retrieve them directly from ASIC. Therefore, it must employ this instruction to get the CV value from hardware
HSC and put it into the register which control program can access. The following is the arrangement of CV,
PV in ASIC and their corresponding CV, PV registers of controller for HSC0~HSC3.
HSC0
HSC1
HSC2
HSC3
HSTA
Controller register
DR4096
CV register H
L
DR4098
PV register H
L
DR4100
CV register H
L
DR4102
PV register H
L
DR4104
CV register H
L
DR4106
PV register H
L
DR4108
CV register H
L
DR4110
PV register H
L
DR4152
CV register H
L
R4154
PV register
ASIC
CV
PV
HSC0
CV
PV
HSC1
CV
PV
HSC2
CV
PV
HSC3
CV
PV
HSTA
When access control EN =1 or EN ( P instruction) changes from 01, will gets the CV value of HSC
designated by CN from ASIC and puts into the HSC corresponding CV register (i.e. the CV of HSC0 will be
read and put into DR4096 or the CV of HSC1 will be read and put into DR4100).
Although the PV within ASIC has a corresponding PV register in CPU, but it is not necessary to access it
(actually it cant be) for that the PV value within ASIC comes from the PV register in CPU.
HSTA is a timer, which use 0.1ms as its time base. The content of CV represents elapse time counting at
0.1ms tick.
For detailed applications, please refer to Chapter 10 WSZ-Controller High-Speed Counter and Timer.
7-71

FUN 93 P
HSCTW
HARDWARE HIGH SPEED COUNTER CURRENT VALUE AND PRESET

VALUE WRITING
FUN 93 P
HSCTW
S : The source data for writing
Ladder symbol
93DP.HSCTW
Write control
EN
CN : Hardware high speed counter to be written

0: HSC0 or HST0
1: HSC1 or HST1
CN :
D
2: HSC2 or HST2
3: HSC3 or HST3
4: HSTA
D : Write target (0 represents CV, 1 represents PV)
Please refer first to FUN92 for the relation between the CV or PV value of HSC0HSC3 and HSTA within
ASIC and their corresponding CV and PV registers in CPU.
When write control EN=1 or EN ( P instruction) changes from 01, it writes the content of CV or PV
register of high speed counter designed by CN of CPU, to the corresponding CV or PV of HSC within ASIC.
It is quit often to set the PV value for most application program. When the count value reaches the preset
value, the counter will send out interrupt signal immediately. By way of the interrupt service program, you can
implement different kinds of precision counting or positioning control.
When there is an interrupt of power supply for WSZ-controller, the values of current value registers CV of
HSC0HSC3 within ASIC will be read out and wrote into the HSC0HSC3 CV registers (with power
retentive function) of CPU automatically. When power comes up, these CV values will be restored to ASIC.
However, if your application demands that when power is on, the values should be cleared to 0 or begin
counting from a certain value, then you have to use this instruction to write in the CV value for HSC in ASIC.
When a non-zero value is written into the PV register of HSTA, it will cause the HSTAI interrupt subroutine to
be executed for every PV x 0.1ms.
For detailed applications, please refer Chapter 10 WSZ-Controller High-Speed Counter and Timer.
93D.HSCTW
M0
EN
S :
CN :
D :
M0
0
HSC0
CV
92
EN HSCTR HSC0
z When M0 is 0, it reads out the current counting value.

z
When M1 changes from 01, it moves DR500 to

DR4098, and writes the preset value into ASIC
hardware through FUN93.
Whenever the current value equals to the DR500,

The HSC0I interrupt sub program will be executed.
93D.HSCTW
M1
EN
As the program in the left diagram, when M0 changes

from 01, it clears the current value of HSC0 to 0,
and writes into ASIC hardware through FUN93.
S :
R500
CN :
D :
HSC0
PV
7-72

FUN 94
ASCWR
FUN 94
ASCWR
ASCII WRITE
Ladder symbol
Output control
EN
Pause control
PAU
Abort output
ABT
94D.ASCWR
MD :
S
Pt
ACT
Acting
ERR
Error
MD: Output mode

=0, output to communication port1.
others, reserved for future usage.
S : Starting register of file data.
Output completed
DN
Range HR
Operand
MD
S
Pt
ROR
Pt : Starting working register for this instruction

instance. It taken up 8 registers and cant
be reused in other part of program.
DR
R0 R5000 D0
0
R3839 R8071 D4095 1
z When MD=0 and output control EN changes from 01, it transmits the ASCII data which starting from S
to the communication port 1 (Port1), until reach end of file.
z S file data can be edited with the programming software WinProladder (please refer to the explanation of
chapter 14 The Application of ASCII file output function). If necessary the user can also edit the ASCII file
directly by change the value of data registers. However, the edited data must be follow the ASCII file format
(the details described in chapter 14), otherwise, this instruction will halt the transmission and set the error flag
ERR to 1. If the entire file is correctly and successfully transmitted, then the output is completed and DN
is set to 1.
z The control input of this instruction is of positive edge triggered. Once EN changes from 01 then this
instruction starts the execution, until finished the transmission of the entire file then the execution is completed.
During the transmission, the action flag ACT will be kept at 1 all the time. Only when output pause, error, or
abort occurs, will it change back to 0.
z This instruction can be repeatedly used, but only one will be executed (transmit data) at any certain time. It is
the obligation of user to make sure the right execution sequence.
z While this instruction is in execution, if the pause PAU is 1, this instruction will pause the transmission of file
data. It will resume transmission when the pause PAU backs to 0.
z While this instruction is in execution, if the abort ABT is 1, this instruction will abandon the transmission of
file data, and then it is able to take next instruction for execution.
z For detail applications, please refer to chapter 14 The Application of ASCII file output function.
7-73

FUN 94
ASCWR
ASCII WRITE
z Interface signals:
M1927: This signal is control by CPU, it is applied in ASCWR MD:0
: ON, it represents that the RTS (connect to the CTS of controller) of the printer is False.
I.e. the printer is not ready or abnormal.
: OFF, it represents that the RTS of the Printer is True; Printer is ready.
Note: Using the M1927 associates with timer can detect if the printer is abnormal or not.
R4158: The setting of communication parameters
7-74
FUN 94
ASCWR

FUN 95
RAMP
FUN 95
RAMP
RAMP FUNCTION FOR D/A OUTPUT
Tn : Timer for ramp function

PV : Preset value of ramp timer (the unit is 0.01 sec)
or the increment value of every 0.01 sec
SL : Lower limit value
(ramp floor value).
SU : Upper limit value
(ramp ceiling value).
D : Register storing current ramping value.
D+1 : Working register
SU, SL could be positive or negative value when incorporate
with AO module application.
Range
Operand
Tn
PV
SL
SU
D
WX
WY
WM
WS
WS0
WM0
WY0
WX0
WX240 WY240 WM1896 WS984
TMR
CTR
T0
T255
D0
R3840 R3904 R3968 R5000
R0
C0
16-bit
+/- number
C255 R3839 R3903 R3967 R4167 R8071 D4095
HR
IR
OR
SR
ROR
DR
Description
z
Tn must be a 0.01 sec time base timer and never used in other part of program.
PV is the preset value of ramp timer. Its unit is 10ms (0.01 sec).
When input control EN changes from 01, it first reset the timer Tn to 0.
When U/D=1 it will load the value of SL to register D. And when M1974 = 0 it will be increased by SUSL /
PV every 0.01 sec or when M1974 = 1 it will increase by PV every 0.01 sec. When the D value reaches the
SU value the output ASU =1.
When U/D=0 it will load the value of SU to register D. When M1974 = 0 it will be decreased by SUSL / PV
every 0.01 sec or when M1974 = 1 it will be decreased by PV every 0.01 sec. When the D value reaches the
SL value the output ASL =1.
The ramping direction(U/D) is determined at the time when input control EN changes from 01. After the
output D start to ramp, the change of U/D is no effect.
If it is required to pause the ramping action, it must let the input control PAU = 1; when PAU=0, and the
ramping action is not completed, it will continue to complete the ramping action.
The value of SU must be larger than SL, otherwise the ramp function will not be performed, and the output
ERR will set to 1.
This instruction use the register D to store the output ramping value; if the application use the D/A module to
send the speed command, then speed command can be derived from the RAMP function to get a more
smooth movement.
In addition to use register D to store the ramping value, this instruction also used the register D+1 to act as
internal working register; therefore the other part of program can not use the register D+1.
7-75

FUN 95
RAMP
FUN 95
RAMP
RAMP FUNCTION FOR D/A OUTPUT
Program example
95.RAMP
M0
EN
Tn : T20
M100
ERR
PV : R100
M1
M101
PAU
SL : R101
ASL
U/D
SU : R102
D : R103
ASU
M2
Move the ramping value to AO output register

R3904.
M102
8.MOV
M0
EN
S : R103
D : R3904
T20: Ramp timer (timer with 0.01 sec time base)

R100: preset value of ramp timer (the unit is 0.01 sec, 100 for a second).
R101: Lower limit value.
R102: Upper limit value.
R103: Register storing current ramp value.
R104: Working register
z
If M1974=0, When input control M0 changes from 01, it first reset the timer T20 to 0. If M2=1, it will load the
R101 (lower limit) value into the R103, and it will increase the output with fixed value (R102-R101 / R100) for
every 0.01 second and stores it to register R103. When the T20 timer going up to the preset value R100, the
output value equals to R102, and the output M102 will set to 1. If M2=0, will load the R102 (upper limit) value
into the R103, and it will decrease the output amount with fixed ratio (R102-R101 / R100) for every 0.01
second and store it to register R103. The T20 timer going up to the preset value R100, the output value
equals to R101, and the output M101 will set to 1.
M1=1, pause the ramping action.
z The value of R102 must be greater than R101, otherwise the ramp action will not be performed, and the
output M100 will set to 1.
SU
SL
t
PV
PV
7-76
Table Instructions
Fun No.
Functionality
Fun No.
Functionality
100
Register to table data move
107
Table fill
101
Table to register data move
108
Table shift
102
Table to table data move
109
Table rotate
103
Block table move
110
Queue
104
Block table swap
111
Stack
105
Register to table search
112
Block compare
106
Table to table compare
113
Data Sort
A table consists of 2 or more consecutive registers (16 or 32 bits). The number of registers that comprise the
table is called the table length (L). The operation object of the table instructions always takes the register as
unit (i.e. 16 or 32 bits data).
The operation of table instructions are used mostly for data processing such as move, copy, compare, search
etc, between tables and registers, or between tables. These instructions are convenient for application.
Among the table instructions, most instructions use a pointer to specify which register within a table will be
the target of operation. The pointer for both 16 and 32-bit table instructions will always be a 16-bit register.
The effective range of the pointer is 0 to L-1, which corresponds to registers T0 to TL-1 (a total of L registers).
The table shown below is a schematic diagram for 16-bit and 32-bit tables.
Among the table operations, shift left/right, rotate left/right operations include a movement direction. The
direction toward the higher register is called left, while the direction toward the lower register is called right, as
shown in the diagram below.
Pointer Pr
B15 B0
T
(right)
B15
B0
(right)
T0
R0
T1
R1
T2
R2
T3
R3
T4
R4
Pointer Pr
(left)
16-bit table
B0
R1
R3
R5
R7
R9
TL1
R 2L1
RL-1
B31
T0
T1
T2
T3
T4
TL1
B0
Table length
Table length
B15
R0
R2
R4
R6
R8
R 2L2 (left)
32-bit table
7-77
(right)

FUN100 D P
RT
Ladder symbol
100P.R
Rs : Source data can be constant or register.
Td : Source register for destination table
RS :
Move control EN
END Move to end
Td :
Pointer increment INC
L :
Rs, Td can associate with V, Z, P0~P9 index
Pointer clear CLR
register as indirect addressing.
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
Operand
Rs
Td
L
Pr
WX
: Length of destination table
Pr : Pointer register
ERR Pointer error
Pr :
Range
FUN100 D P
RT
*
*
*
XR
16/32-bit
V, Z
+/number P0~P9
2~2048
When move control "EN" = 1 or "EN" ( P instruction) transition from 0 to 1, the contents of the source register
Rs will be written onto the register Tdpr indicated by the pointer Pr within the destination table Td (length is L).
Before executing, this instruction will first check the pointer clear "CLR" input signal. If "CLR" is 1, it will first
clear the pointer Pr, and then carry out the move operation. After the move has been completed, it will then
check the Pr value. If the Pr value has already reached L-1 (point to the last register in the table) then it will only
set the move-to-end flag "END" to 1, and finish execution of this instruction. If the Pr value is less than L-1, then
it must again check the pointer increment "INC" input signal. If "INC" is 1, then Pr value will be also increased.
Besides, pointer clear "CLR" is able to operate independently, without being influenced by other input.
The effective range of the pointer is 0 to L-1. Beyond this range, the pointer error "ERR" will be set to 1, and
this instruction will not be performed.
100P.R
X1
EN
INC
z The example at left at the very beginning pointer Pr = 4,
RS : R
Td : R
10
L :
Pr : R
the entire content of table Td is 0, and the Rs value is
END
8888. The diagram below shows the operation results

when X1 have the transition of 01 twice.
ERR
z Because INC is 1, Pr will increase by 1 each time the
50
instruction is executed.
CLR
Pr
4
R0
Rs
8888
Td
0000
0000
0000
0000
0000
0000
0000
0000
Before
Pr
5
R50
Pr
6
R50
Td
0000
0000
0000
0000
8888
0000
0000
0000
R10
R11
R12
R13
R14
R15
R16
R17
Td
0000
0000
0000
0000
8888
8888
0000
0000
R10
R11
R12
R13
R14
R15
R16
R17
R50
R10(T0)
R11(T1)
R12(T2)
R13(T3)
R14(T4)
R15(T5)
R16(T6)
R17(T7)
X01
(First)
First time result
7-78
X01
(Second)
Second time result

FUN101 D P
TR
FUN101 D P
TR

Ladder symbol
Ts : Source table starting register
101P.T
L : Length of source table
TS :
Move control EN
END Move to end
ERR Pointer error
Ts, Rd may combine with V, Z, P0~P9 to
Rd : Destination register
L :
Pr :
Rd :
Pointer clear CLR
Range
Operand
Ts
L
Pr
Rd
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
*
*
*
*
*
XR
16/32bit
+/number
V, Z
P0~P9
2~2048
When move control "EN" = 1 or "EN" ( P instruction) transition from 0 to 1, the value of the register Tspr
specified by pointer Pr within source table Ts (length is L) will be written into the destination register Rd. Before
executing, this instruction will first check the input signal of pointer clear "CLR". If "CLR" is 1, it will first clear Pr
and then carry out the move operation. After completing the move operation, it will then check the value of Pr. If
the Pr value has already reached L-1 (point to the last register in the table), then it sets the move-to-end flag to
1, and finishes executing of this instruction. If Pr is less than L-1, it check the status of "INC". If "INC" is 1, then
it will increase Pr and finish the execution of this instruction. Besides, pointer clear "CLR" can execute
independently and is not influenced by other inputs.
The effective range of the pointer is 0 to L-1. Beyond this range the pointer error "ERR" will be set to 1 and this
instruction will not be carried out.
101P.T
X0
z In the example at left, at the very beginning Pr = 7 and Ts
EN
0
TS : R
L :
9
END
INC
Pr : R
Rd : R
ERR
19
and Rd are as shown at left in the diagram below. When X0

have a transition from 01 twice, the results are shown at
right in the diagram below.
z At the second time execution, the pointer has already
20
reached to the end so there will be no increment.
CLR
R0(T0)
R1(T1)
R2(T2)
R3(T3)
R4(T4)
R5(T5)
R6(T6)
R7(T7)
R8(T8)
Ts
1111
2222
3333
4444
5555
6666
7777
8888
9999
Pr
7
Pr
8
R19
Rd
0 0 0 0 R20
X01
(first)
END
0
Rd
8 8 8 8 R20
END
0
Before execution
First time execution
7-79
Pr
8
R19
X01
(second)
R19
Rd
9 9 9 9 R20
END
1
Second time execution

FUN102 D P
TT
FUN102 D P
TT
TABLE TO TABLE MOVE

Ladder symbol
102P.T
TS :
Move control EN
Ts : Starting number of source table register

Td : Starting number of destination table
register
L : Table (Ts and Td) length
Ts, Td may combine with V, Z, P0~P9 to
T
END Move to end
Td :
L :
ERR Pointer error
Pr :
Pointer clear CLR
Range
Operand
Ts
Td
L
Pr
WX
WY
WM
WX0
WY0
WM0
WX240 WY240 WM1896
WS
TMR
CTR
WS0
WS984
T0
T255
C0
R0
R3840 R3904 R3968 R5000
D0
C255 R3839 R3903 R3967 R4167 R8071 D4095
HR
IR
OR
SR
ROR
*
*
*
DR
XR
2048
V, Z
P0~P9
When move control "EN" = 1 or "EN" ( P instruction) have a transition from 0 to 1, the register Tspr pointed
by pointer Pr within the source table will be moved to a register Tdpr, which also pointed by the pointer Pr in the
destination table. Before execution, it will first check the input signal of pointer clear "CLR". If "CLR" is 1, it will
first clear Pr to 0 and then do the move (in this case Ts0Td0). After the move action has been completed it
will then check the value of pointer Pr. If the Pr value has already reached L-1 (point to the last register on the
table), then it will set the move-to-end flag "END" to 1 and finish executing of this instruction. If the Pr value is
less than L-1, it will check the status of "INC". If "INC" is 1, then the Pr value will be increased by 1 before
execution. Besides, pointer clear "CLR" can execute independently, and will not be influenced by other input.
The effective range of the pointer is 0 to L-1. Beyond this range, the pointer error flag "ERR" will be set to 1,
and this instruction will not be carried out.
102P.T
X0
EN
INC
z The diagram at left below is the status before execution.
TS : R
Td : R
10
L :
10
Pr : R
When X0 from 01, the content of R5 in Ts table will copy to
END
R15 and pointer R20 will be increased by 1.
ERR
20
CLR
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R20
Ts
1111
1111
1111
1111
1111
1111
1111
1111
1111
1111
Pr
5
R20
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
Td
0000
0000
0000
0000
8888
0000
0000
0000
0000
0000
Before execution
X01
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
Pr
6
Td
0000
0000
0000
0000
8888
1111
0000
0000
0000
0000
result
7-80

FUN103 D P
BT_M
FUN103 D P
BT_M
BLOCK TABLE MOVE
Ts :Starting register for source table

Td : Starting register for destination table
L: Lengths of source and destination tables
Ts, Td may combine with V, Z, P0~P9 to serve indirect
WX
Range
Operand
Ts
Td
L
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
2
V, Z
WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095 256 P0~P9
*
*
In this instruction the source table and destination table are the same length. When this instruction was
executed all the data in the Ts table is completely copied to Td. No pointer is involved in this instruction.
When move control "EN" = 1 or "EN" ( P instruction) have a transition from 0 to 1, all the data from source
table Ts (length L) is copied to the destination table Td, which is the same length.
One table is completely copied every time this instruction is executed, so if the table length is long, it will be
very time consuming. In practice, P modifier should be used to avoid time waste caused by each scan
repeating the same movement action.
z The diagram at left below is the status before execution. When
103P.BT_M
X0
EN
TS : R
Td : R
10
L :
X0 from 01, the content of R0~R9 in Ts table will copy to

R10~R19.
10
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Ts
0000
1111
2222
3333
4444
5555
6666
7777
8888
9999
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
Td
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
X01
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
Td
0000
1111
2222
3333
4444
5555
6666
7777
8888
9999
Execute
result
Before executed
7-81

FUN104 D P
T_SWP
FUN104 D P
T_SWP
BLOCK TABLE SWAP

Ladder symbol
Move control
EN
104DP.T_SWP
Ta : Starting register of Table a
Ta :
Tb : Starting register of Table b
Tb :
Ts, Tb may combine with V, Z, P0~P9 to serve
L :
WY
Range
WM
WS
WY0
WM0
WS0
WY240 WM1896 WS984
Operand
Ta
Tb
L
: Lengths of Table a and b
TMR
CTR
T0
T255
C0
C255
HR
OR
SR
ROR
DR
R0
R3904 R3968 R5000
D0
R3839 R3967 R4167 R8071 D4095
*
*
*
*
*
XR
256
V, Z
P0~P9
This instruction swaps the contents of Tables a and b, so the table must be the same length, and the registers
in the table must of write able. Since a complete swap is done with each time the instruction is executed, no
pointer is needed.
When move control "EN" = 1 or "EN" ( P instruction) have a transition from 0 to 1, the contents of Table a
and Table b will be completely swapped.
This instruction will swap all the registers specified in L each time the instruction is executed, so if the table
length is big, it will be very time consuming, therefore P instruction should be used.
z The diagram at left below is the status before execution.
X0
EN
104P.T_SWP
When X0 from 01, the contents of R0~R9 in Ts table will
TS : R
swap with R10~R19.
Td : R
10
L :
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
10
Ta
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
Tb
1111
1111
1111
1111
1111
1111
1111
1111
1111
1111
X01
Before executed
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Ta
1111
1111
1111
1111
1111
1111
1111
1111
1111
1111
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
Tb
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
After executed
7-82

FUN105 D P
R-T_S
FUN105 D P
R-T_S
Rs : Data to search, It can be a constant

or a register
Ts : Starting register of table being
searched
L : Label length
Pr : Pointer of table
Rs, Ts may combine with V, Z, P0~P9 to
WX
Range
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
16/32-bit
+/- number
Operand
Rs
Ts
L
Pr
*
*
V, Z
P0~P9
2~256
z When search control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will search from the first
register of Table Ts (when "FHD" = 1 or Pr value has reached L-1), or from the next register (Tspr + 1) pointed
by the pointer within the table ("FHD" = 0, while Pr value is less than L-1) to find the first data different with
Rs(when D/S = 1) or find the first data the same with Rs (when D/S = 0). If it find a data match the condition it
will immediately stop the search action, and the pointer Pr will point to that data and found objective flag "FND"
will set to 1. When the searching has searched to the last register of the table, the execution of the instruction
will stop, whether it was found or not. In that case the search-to-end flag "END" will be set to 1 and the Pr value
will stop at L-1. When this instruction next time is executed, Pr will automatically return to the head of the table
(Pr = 0) before the search begin.
z The effective range of Pr is 0 to L-1. If the value exceeds this range then the pointer error flag "ERR" will
change to 1, and this instruction will not be carried out.
105P.R-T_S
X0
RS :
EN
5555
TS : R
FHD
L :
Pr : R
FND
0
10
END
20
D/S
R20
ERR
Pr
2
Rs
5555
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
z The instruction at left is searching the table for a register with the
value 5555 (because D/S = 0, it is searching for same value).
Before execution, the pointer point to R2, but the starting point of
the search is Pr + 1 (i.e. it starts from R3). After X0 has transition
from 01 3 times, the results of each search may be obtained
as shown in the diagram below.
Ts
5555
0000
5555
2222
3333
4444
5555
6666
7777
8888
Pr
6
FND
END
R20
END
R20
Pr
9
FND
dX01
(Second)
END
R20
Pr
0
FND
eX01
(Third)
cX01
(First)
Start
point
Before execution
After execution
7-83

FUN106 D P
T-T_C
FUN106 D P
T-T_C
Ta : Starting register of Table a

Tb : Starting register of Table b
L : Lengths of Table
Pr : Pointer
Ta, Tb may combine with V, Z, P0~P9 to
Range WX
Operand
Ta
Tb
L
Pr
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
*
*
XR
256
V, Z
P0~P9
z When comparison control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, then starting from the
first register in the tables Ta and Tb (when "FHD" = 1 or Pr value has reached L-1) or starting from the next
pair of registers (Tapr+1 and Tbpr+1) pointed by Pr ("FHD" = 0, while Pr is less than L-1), this instruction will
search for pairs of registers with different values (when "D/S" = 1) or the same value (when "D/S" = 0). When
search found (either different or the same), it will immediately stop the search and the pointer Pr will point to
the register pairs met the search criteria. The found flag "FND" will be set to 1. When it has searched to the last
register of the table, the instruction will stop executing. Whether it found or not. The compare-to-end flag "END"
will be set to 1, and the pointer value will stop at L-1. When this instruction is executed next time, Pr will
automatically return to the head of the table to begin the search.
z The effective range of Pr is 0 to L-1. As this will affect the result of the search, the Pr value should not changed
by other programs during the operation. If the Pr value not in the effective range, the pointer error flag "ERR"
will be set to 1, and this instruction will not be carried out.
106P.T-T_C
X0
EN
FHD
Ta : R
Tb : R
L :
Pr : R
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
10
FND
END
10
ERR
D/S
R10
0
11
Pr
1
Ta
0000
1111
2222
3333
4444
5555
6666
7777
8888
9999
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
z The instruction at left starts from the register next to the register
pointed by the pointer (because "FHD" is 0) to search for register
pairs with different data (because "D/S" is 1) within the 2 tables.
At the very beginning, Pr points to Ta1 and Tb1. There are 3
different pairs of data at the position 1, 3, 6 of the table.
However, it does not compare from the beginning, and this
instruction will start searching from position 3 downwards. After
X0 has changed 3 times from 0 to 1, the results are shown in the
diagram below.
Tb
0000
0000
2222
1234
4444
5555
0000
7777
8888
9999
R10
Pr
3
F
1
E
0
dX01
(Second)
R10
Pr
6
F
1
E
0
eX01
(Third)
R10
Pr
9
F
0
E
1
cX01
(First)
Start
point
Before execution
After execution
7-84

FUN107 D P
T_FIL
Fill control
EN
Ladder symbol
Rs : Source data to fill, can be a constant or a register
107DP.T_FIL
Rs :
Td : Starting register of destination table
Td :
Rs, Td may combine with V, Z, P0~P9 to serve indirect

Range
Operand
Ts
Td
L
FUN107 D P
T_FIL
TABLE FILL
WX
L :Table length
TMR
CTR
WX0
WY0
WM0
WS0
T0
WX240 WY240 WM1896 WS984 T255
C0
C255
WY
WM
WS
HR
IR
OR
SR
ROR
DR
XR
16/32-bit V, Z
R0
R3840 R3904 R3968 R5000
D0
+/
R3839 R3903 R3967 R4167 R8071 D4095 number P0~P9
*
*
2~256
z When fill control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, the Rs data will be filled into all
the registers of the table Td.
z This instruction is mainly used for clearing the table (fill 0) or unifying the table (filling in the same values). It
should be used with the P instruction.
107P.T_FIL
X0
EN
TS :
Td : R
L :
Rs
5555
z The instruction at left will fill 5555 into the whole table
Td. The results are as shown in the diagram below.
5555
0
10
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Td
1547
2314
7725
0013
5247
1925
6744
5319
9788
2796
Before execution
X01
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Td
5555
5555
5555
5555
5555
5555
5555
5555
5555
5555
After execution
7-85

FUN108 D P
T_SHF
FUN108 D P
T_SHF
TABLE SHIFT
IW : Data to fill the room after shift operation, can be a

constant or a register
Ts : Source table
Td : Destination table storing shift results
L
: Lengths of tables Ts and Td
OW : Register to accept the shifted out data

Range WX
Operand
IW
Ts
Td
L
OW
WY
WM
WS
TMR CTR
WX0
WY0
WM0
WS0
T0
WX240 WY240 WM1896 WS984 T255
HR
IR
OR
SR
ROR
DR
XR
C0
R0
R3840 R3904 R3968 R5000
D0 16/32-bit V, Z
+/
C255 R3839 R3903 R3967 R4167 R8071 D4095 number P0~P0
*
*
*
2~256
z When shift control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, all the data from table Ts will
be taken out and shifted one position to the left (when "L/R" = 1) or to the right (when "L/R" = 0). The room
created by the shift operation will be filled by IW and the results will be written into table Td. The data shifted
out will be written into OW.
108P.T_SHF
X0
EN
IW :
TS :
L/R
Td :
X1
R
R
R
L :
10
0
0
10
OW : R
z In the program at left, Ts and Td is the same table.

Therefore, the table shifts itself and then writes back to
itself (the table must be writ able). It first perform a shift left
operation (let X1 = 1, and X0 go from 01) then perform a
shift to right operation (let X1 = 0, and makes X0 go from 0
1). The results are shown at right in the diagram below.
11
(Shift left)
Ts(Td)
(Shift left)
R10 1 2 3 4
Dotted line
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
0000
1111
2222
3333
4444
5555
6666
7777
8888
9999
R11
OW
(Shift left)
is the path for shift right
Td(Ts)
1234
0000
1111
2222
3333
4444
5555
6666
7777
8888
OW
R11
9999
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
cFirst time
Before execution
7-86
(Shift right)
Td(Ts)
0000
1111
2222
3333
4444
5555
6666
7777
8888
1234
OW
R11
1234
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
dSecond time

FUN109 D P
T_ROT
FUN109 D P
T_ROT
TABLE ROTATE
Ts : Source table for rotate

Td : Destination table storing results of rotation
L : Lengths of table
address application
Range WX
Operand
Ts
Td
L
WY
WM
WS
WX0
WY0
WM0
WS0
WX240 WY240 WM1896 WS984
TMR
CTR
T0
T255
C0
R0 R3840 R3904 R3968 R5000 D0
C255 R3839 R3903 R3967 R4167 R8071 D4095
HR
IR
OR
SR
ROR
*
*
DR
XR
256
VZ
P0~P9
z When rotation control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, the data from the table of
Ts will be rotated 1 position to the left (when "L/R" = 1)or 1 position to the right (when "L/R" = 0). The results of
the rotation will then be written onto table Td.
109P.T_ROT
X0
EN
TS : R
Td : R
L/R
L :
X1
0
0
10
Rotate left
z In the program at left, Ts and Td is the same table. The

table after rotation will write back to itself. It first perform
one left rotation (let X1 = 1, and X0 go from 01), and
then performs one right rotation (let X1 = 0, and X0 go
from 01). The results are shown at right in the diagram
below.
Rotate right
(Rotate left)
Ts(Td)
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
0 0 0 0 (right)
1111
2222
3333
4444
5555
6666
7777
8888
9 9 9 9 (left)
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Td(Ts)
9999
0000
1111
2222
3333
4444
5555
6666
7777
8888
cFirst time
Before execution
7-87
(Rotate right)
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Td(Ts)
0000
1111
2222
3333
4444
5555
6666
7777
8888
9999
dSecond time

FUN110 D P
QUEUE
FUN110 D P
QUEUE
QUEUE
IW : Data pushed into queue, can be a constant

or a register
QU : Starting register of queue
L
: Size of queue
OW : Register accepting data popped out
from queue
QU may combine with V, Z, P0~P9 to serve
Range
Operand
IW
QU
L
Pr
OW
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
XR
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
V, Z
16/32-bit
+/- number
P0~P9
*
*
*
*
*
*
2~256
z Queue is also a kind of table. It is different from ordinary table in that its queue register numbers go from 1 to L
and not from 0 to L-1. In other words QU1~QUL respectively correspond to pointers Pr = 1 to L, and Pr = 0 is
used to show that the queue is empty.
z Queue is a first in first out (FIFO) device, i.e. - the data that first pushed into the queue will be the first to pop
out from the queue. A queue is comprised of L consecutive 16 or 32 bits registers ( D instruction) starting from
the QU register, as in the diagram below:
Pr
4
IW
g5555
QU1
QU2
QU3
push(I/O=1)
QU4
1.IW always push into QU5
2.Pr1Pr
QU1
QU
f4444
e3333 Push
d2222 down
c1111
OW
Pop out(I/O=0)
2. QUpr OW
c gis the sequence number of

operation
QUL
3. Pr1Pr
z When execution control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, the status of in/out
control "I/O" determines whether the IW data will be pushed into the queue (when "I/O" = 1) or be popped out
and transferred to OW (when "I/O" = 0). As shown in the diagram above, the IW data will always be pushed
into the first (QU1) register of the queue. After it has been pushed in, Pr will immediately be increased by 1, so
that the pointer can always point to the first data that was pushed into the queue. When it is popped out, the
data pointed by Pr will be transferred directly to OW. Pr will be reduced by 1, so that it still point to the first data
remained in the queue.
7-88

FUN110 D P
QUEUE
FUN110 D P
QUEUE
QUEUE
z If no data has yet been pushed into the queue or the pushed in data has already been popped out (Pr = 0),
then the queue empty flag will be set to 1. In this case, even if there is further popping out action, this
instruction will not be executed. If data is only pushed in and not popped out, or pushed in is more than that
popped out, then the queue finally becomes full (pointer Pr indicates the QUL position), and the queue full flag
is changed to 1. In this case, if there is more pushing in action, this instruction will not execute. The pointer for
this instruction is used during access of the queue, to indicate the data that was pushed in the earliest. Other
programs should not be allowed to change it, or else an operation error will be created. If there is a specific
application, which requires the setting of a Pr value, then its permissible range is 0 to L (0 means empty, and 1
to L respectively correspond to QU1 to QUL). Beyond this range, the pointer error flag "ERR" will be set as 1,
110P.QUEUE
X0
EN
X1
I/O
IW : R
0
QU : R
2
L :
10
R
OW : R
20
Pr :
EPT
FUL
z The program at left assumes the queue content is the

same with the queue at preceding page. It will first
perform queue push operation, and then perform pop
out action. The results are shown below. Under any
circumstance, Pr always point to the first (oldest) data
that was remained in queue.
ERR
Pr
5
QU1
QU2
QU3
QU4
QU5
QU6
QU7
QU8
QU9
QU10
QU
5555
4444
3333
2222
1111
Pr
4
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
QU1
QU2
QU3
QU4
QU5
QU6
QU7
QU8
QU9
QU10
OW
R20
OW unchanged
After push in (X1=1, X0 from 01)
QU
5555
4444
3333
2222
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
OW
1 1 1 1 R20
After pop off (X1=0, X0 from 01)
7-89

FUN111 D P
STACK
FUN111 D P
STACK
STACK
IW : Data pushed into stack, can be a constant

or a register.
ST : Starting register of stack
L
: Size of stack
OW : Register accepting data popped out from
stack.
ST may combine with V, Z, P0~P9 to serve
Range
Operand
IW
ST
L
Pr
OW
WX
WY
WM
WS
WX0
WY0
WM0
WS0
WX240 WY240 WM1896 WS984
TMR
CTR
T0
T255
C0
C255
HR
IR
OR
SR
ROR
DR
XR
16/32-bit
R0
R3840 R3904 R3968 R5000
D0
V, Z
+/
R3839 R3903 R3967 R4167 R8071 D4095 number P0~P9
*
*
*
*
*
*
*
2~256
z Like queue, stack is also a kind of table. The nature of its pointer is exactly the same as with queue, i.e. Pr = 1
to L, which corresponds to ST1 to STL, and when Pr = 0 the stack is empty.
z Stack is the opposite of queue, being a last in first out (LIFO) device. This means that the data that was most
recently pushed into the stack will be the first to be popped out of the stack. The stack is comprised of L
consecutive 16 or 32-bit ( D instruction) registers starting from ST, as shown in the following diagram:
Pr
4
cg is the sequence
number of operation
ST1
ST2
ST3
ST4
ST5
IW
g5555
push(I/O=1)
ST
c1111
d2222
e3333
f4444
push
1.Pr1Pr
2.IWSTpr
Bottom of stack
OW
pop(I/O=0)
1.STprOW
2.Pr1Pr
STL
z When execution control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, the status of in/out
control "I/O" determines whether the IW data will be pushed into the stack (when "I/O" = 1), or the data pointed
by Pr within the stack (the data most recently pushed into the stack) will be moved out and transferred to OW
(when "I/O" = 0). Note that the data pushed in is stacking, so before pushed in, Pr will increased by 1 to point
to the top of the stack then the data will be pushed in. When it is popped out, the data pointed by pointer Pr
(the most recently pushed in data) will be transferred to OW. After then Pr will be decreased by 1. Under any
circumstances, the pointer Pr will always point to the data that was pushed into the stack most recently.
7-90

FUN111 D P
STACK
FUN111 D P
STACK
STACK
z When no data has yet been pushed into the stack or the pushed in data has already been popped out (Pr = 0),
the stack empty flag "EPT" will set to 1. In this case any further pop up actions, will be ignored. If more data is
pushed than popped out, sooner or latter the stack will be full (pointer Pr points to STL position), and the stack
full flag "FUL" will set to 1. In this case any further push actions, will be ignored. As with queue, the stack
pointer in normal case should not be changed by other instructions. If there is a special application which
requires to set the Pr value, then its effective range is 0 to L (0 means empty, 1 to L respectively correspond to
ST1 to STL). Beyond this range, the pointer error flag "ERR" will set to 1, and the instruction will not be carried
out.
111P.STACK
X0
EN
X1
I/O
IW :
ST :
L :
R
R
Pr :
OW : R
20
10
Pr
5
ST1
ST2
ST3
ST4
ST5
ST6
ST7
ST8
ST9
ST10
0
2
ST
1111
2222
3333
4444
5555
EPT
FUL
ERR
z The program at left assumes that the initial content of the

stack is just as in the diagram of a stack on the
preceding page. The operation illustrated in this example
is to push a data and than pop it from stack. The results
are shown below. Under any circumstances, Pr always
point to the data that was most recently pushed into the
stack.
Pr
4
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
ST1
ST2
ST3
ST4
ST5
ST6
ST7
ST8
ST9
ST10
OW
R20
OW unchanged
After push(X1=1, X0 from 01)
QU
1111
2222
3333
4444
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
OW
5 5 5 5 R20
After pop up(X1=0, X0 from 01)
7-91

FUN112 D P
BKCMP
Ladder symbol
Rs : Data for compare, can be a constant or a

register.
112DP.BKCMP
Comparison control
Operand
Rs
Ts
L
D
Rs :
EN
Range
FUN112 D P
BKCMP
BLOCK COMPAREDRUM
ERR
Limit error
Ts :
Ts : Starting register block storing upper and

lower limit
L : Number of pairs of upper and lower limits
D : Starting relay storing results of

comparison
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
16/32-bit
Y0
M0
S0
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000
D0
+/
Y255 M999 S999 WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095 number
1~256
z When comparison control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, comparisons will be
perform one by one between the contents of Rs and the upper and lower limits form by L pairs of 16 or 32-bit
( D modifier) registers starting from the Ts register (starting from T0 each adjoining 2 register units form a pair
of upper and lower limits). If the value of Rs falls within the range of the pair, then the bit within the comparison
results relay D which corresponds to that pair will be set to 1. Otherwise it will be set as 0 until comparison of
all the L pairs of upper and lower limits is completed.
z When M1975=0, if there is any pair where the upper limit value is less than the lower limit value, then the limit
error flag "ERR" will be set to 1, and the comparison output for that pair will be 0.
z When M1975=1, there is no restriction on the relation of upper limit and lower limit, this can apply for 360rotary
electronic drum switch application.
Upper limit
Lower limit
TS1
TS0
TS3
TS2
L1
TS2L1
TS2L2
Compare
Compared
value
Result
D0
D1
Rs
DL1
z Actually this instruction is a drum switch, which can be used in interrupt program and when incorporate with
immediate I/O instruction (IMDIO) can achieve an accurate electronic drum.
X0
EN
112.BKCMP
RS : C
0
Ts : R
10
4
L :
D : Y
X1
CK
C
PV :
C0
CLR
0
360
ERR
z In this program, C0 represents the rotation angle (Rs) of

a drum shaft. The block compare instruction performs a
comparison between Rs and the 4 pairs (L = 4) of upper
and lower limits, R10,R11, R12,R13, R14,R15 and
R16,R17. The comparison results can be obtained from
the four drum output points Y5 to Y8.
z The input point X1 is a rotation angle detector mounted
on the drum shaft. With each one degree rotation of the
drum shaft angle, X1 produces a pulse. When the drum
shaft rotates a full cycle, X1 produces 360 pulses.
7-92

FUN112 D P
BKCMP
FUN112 D P
BKCMP
BLOCK COMPAREDRUM
z The program in the diagram above coordinates a rotary encoder or other rotating angle detection device
(directly connect to a rotating mechanism), which can form a mechanical device equivalent to the mechanical
structure of an actual drum (see mechanism shown within dotted line in diagram below). While the upper and
lower limits are being adjusted, you can change at will the range of the activated angle of the drum. This
cannot be done with the traditional drum mechanism.
Equivalent mechanical drum emulated by above program
Rotary encoder
Rotary encoder
200
200
Rotating
Rotating
mechanism
mechanism
180
180
180
180
140
140
220
220
80
80
90
90
80
80
60
60
320
320
40
40
00
Limit swsw
Limit
X1
X1
Y8
140
40
Y5
180
80
Y6
Y7
Y6
Y6
Y5
60
Y7
C0
0
200
80
Y8
40
80
120
160
7-93
200
240
280
320
360

FUN113 D P
SORT
FUN113 D P
SORT
DATA SORTING
Ladder symbol
S : Starting register of source registers to sort
113DP.SORT
Sort control
Ascending/
Descending
direction
S :
EN
D : Starting register of destination registers to store the
Length Error
data after sorted
D :
L : Total register for sorting
L :
S, D operand can combine with V, Z, P0~P9 for index
A/D
Range
ERR
addressing while word operation.

WX
WY
WM
WS
TMR
CTR
HR
IR
OR
SR
ROR
DR
XR
R5000
R8070
D0
D4094
256
V, Z
Ope- rand
WX0
WY0
WM0
WS0
T0
WX224 WX224 WM1880 WS968 T254
S
D
L
C0
R0
R3840 R3904 R3968
C198,
C200
R3838 R3902 R3966 R4166
C255
P0~P9
When sort control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, will sort the registers with
ascending order (if A/D = 1) or descending order (if A/D = 0) and put the sorted result to the registers starting
by D register.
The valid data length of sort operation is between 2 and 127, other length will set the ERR to 1 and the sort
operation will not perform.
113DP.SORT
X0
EN
A/D
S : R
D : R
0
10
L :
10
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
The example at left sorts the table comprised of R0~R9

and stores the sorted data to the table locate at
R10~R19.
S
1547
2314
7725
0013
5247
1925
6744
5319
9788
2796
X01
Before
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
After
7-94
D
0013
1547
1925
2314
2796
5247
5319
6744
7725
9788

FUN114 P
Z-WR
FUN114 P
Z-WR
ZONE WRITE
D : Starting address of being set or reset

N : Quantity of being set or reset, 1~511
D, N operand can combine V, Z, P0~P9 for index
addressing while word operation.
Range
Operand
D
N
WY
WM
WS
TMR CTR
Y0
M0
S0 WY0
WM0
WS0
T0
Y255 M1911 S99 WY240 WM1896 WS984 T255
C0
C255
HR
OR
SR
ROR
DR
R0
R3904 R3968 R5000
D0
R3839 R3967 R4167 R8071 D4095
XR
V, Z
P0P9
1-511
When operation control "EN"=1 or "EN" P instructionchanges from 01, it will perform the write
operation according to the input status of write selection, the specified area of registers or bits will all be reset
to 0 ("1/0"=0) or set to 1("1/0"=1).
114.Z-WR
X0
EN
I/O
D :
R0
N :
10
ERR
Above example, registers R0~R9 will be reset to 0 while X0=1.
114.Z-WR
X0
EN
I/O
D :
M5
N :
ERR
Above example, bits M5~M11 will be reset to 0 while X0=1.
7-95
Matrix Instructions
Fun No.
Functionality
Fun No.
Functionality
120
Matrix AND
126
Matrix Bit Read
121
Matrix OR
127
Matrix Bit Write
122
Matrix XOR
128
Matrix Bit Shift
123
Matrix XNOR
129
Matrix Bit Rotate
124
Matrix Inverse
130
Matrix Bit Count
125
Matrix Compare
A matrix is comprised of 2 or more consecutive 16-bit registers. The number of registers comprising the
matrix is called the matrix length (L). One matrix altogether has L16 bits (points), and the basic unit of the
object for each operation is bit.
The matrix instructions treats the 16L matrix bits as a set of series points (denoted by M0 to M16L-1).
Whether the matrix is formed by register or not, the operation object is the bit not numerical value.
Matrix instructions are used mostly for discrete status processing such as moving, copying, comparing,
searching, etc, of single point to multipoint (matrix), or multipoint-to-multipoint. These instructions are
convenient, important for application.
Among the matrix instructions, most instruction need to use a 16-bit register as a pointer to points a specific
point within the matrix. This register is known as the matrix pointer (Pr). Its effective range is 0 to 16L-1,
which corresponds respectively to the bits M0 to M16L-1 within the matrix.
Among the matrix operations, there are shift left/right, rotate left/right operations. We define the movement
toward higher bit is left direction, while the movement toward lower bit is right direction, as shown in the
diagram below.
Pr
40
Width is 16 bit
M15
M40
Pr=40, point
to M40,
R0
R1
R2
R3
R4
y
y
y
y
y
y
y
y
y
y
y
y
M0
(right)
length
L
y
y
y
y
RL1
M16L1(left)
7-96

FUN120 P
MAND
FUN120 P
MAND
MATRIX AND
Ma : Starting register of source matrix a

Mb : Starting register of source matrix b
Md : Starting register of destination matrix
L : Length of matrix (Ma, Mb and Md)
Ma, Mb, Md may combine with V, Z, P0~P9 to serve
WX
Range
Operand
Ma
Mb
Md
L
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
R0 R3840 R3904 R3968 R5000 D0

C0
C255 R3839 R3903 R3967 R4167 R8071 D4095
T0
WS0
WM0
WY0
WX0
WX240 WY240 WM1896 WS984 T255
When operation control "EN" = 1 or "EN" ( P instruction) has a
*
*
XR
256
V, Z
P0~P9
Ma
Mb
Md
transition from 0 to 1, this instruction will perform a logic AND (only

if 2 bits are 1 will the result be 1, otherwise it will be 0)operation
between two source matrixes with a length of L, Ma and Mb. The
result will then be stored in the destination matrix Md, which is also
the same length (the AND operation is done by bits with the same
bit numbers). For example, if Ma0 = 0, Mb0 = 1, then Md0 = 0; if
Ma1 = 1, Mb1 = 1, then Md1 = 1; etc, right up until AND reaches
Ma16L-1 and Mb16L-1.
AND
In the program at left, when X0 goes from 01, then
z
X0
EN
Ma15
0
1
0
0
1
0
1
0
0
1
Ma79
matrix Ma, comprised by R0 to R4, and matrix Mb,
Ma : R
Mb : R
0
10
comprised by R10 to R14, will do an AND operation. The
Md : R 20
L :
5
R20 to R24. The result is shown at right in the diagram
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
0
1
0
1
results will be stored back in matrix Md, comprised by

below.
Ma0
Ma
R0
R1
R2
R3
R4
120P.MAND
Mb15
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
Ma64
1
0
0
0
1
1
0
0
0
1
Mb0
Mb
R10
R11
R12
R13
R14
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
Mb79
Mb64
Before execution
Md15
1
1
1
0
1
0
0
0
0
1
0
0
0
0
1
Md0
Md
R20
R21
R22
R23
R24
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
Md79
Md64
After execution
7-97
0
0
1
0
1

FUN121 P
MOR
FUN121 P
MOR
MATRIX OR

L
: Length of matrix (Ma, Mb and Md)

Range WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
R0 R3840 R3904 R3968 R5000 D0

C0
T0
WS0
WM0
WY0
WX0
Operand
Ma
Mb
Md
L
*
*

transition from 0 to 1, this instruction will perform a logic OR(If any
2 of the bits are 1, then the result will be 1, and only if both are 0
will the result be 0) operation between 2 source matrixes with a
length of L, Ma and Mb. The result will then be stored in the
destination matrix Md, which is also the same length (the OR
operation is done by bits with the same bit numbers). For example,
if Ma0 = 0, Mb0 = 1, then Md0 = 1; if Ma1 = 0, Mb1 = 0, then Md1 =
0; etc, right up until OR reaches Ma16L-1 and Mb16L-1.
XR
256
V, Z
P0~P9
Ma
Mb
Md
OR
Ma : R
Mb : R
EN
In the program at left, when X0 goes from 01, then matrix

Ma, comprised by R0 to R4, and matrix Mb, comprised by
R10 to R14, will do an OR operation. The results will then
be stored into the destination matrix Md, comprised by R10
to R14. In this example, Mb and Md is the same matrix, so
after operation the source matrix Mb will replaced by the
new value. The result is shown at right in the diagram
below.
121P.MOR
X0
0
10
Md : R 10
L :
5
Ma15
Ma
R0
R1
R2
R3
R4
0
1
0
0
1
0
1
0
0
1
Ma79
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
Ma0
0
0
1
0
1
0
0
1
0
1
Ma64
Mb15
1
0
0
0
1
1
0
0
0
1
Mb0
Mb
R10
R11
R12
R13
R14
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
Mb79
Mb64
Before execution
Md15
1
1
1
0
1
1
1
0
0
1
1
1
0
0
1
Md0
Md
R20
R21
R22
R23
R24
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
Md79
Md64
After execution
7-98
1
1
1
0
1

FUN122 P
MXOR
FUN122 P
MXOR
MATRIX EXCLUSIVE ORXOR
Ma: Starting register of source matrix a

Mb: Starting register of source matrix b
Md: Starting register of destination matrix
L : Length of matrix (Ma, Mb and Md)
WX
Range
WY
WM
WS
TMR CTR
Operand
Ma
Mb
Md
L
HR
IR
OR
SR
ROR
DR
D0
R3840 R3904 R3968 R5000
R0
C0
C255 R3839 R3903 R3967 R4167 R8071 D4095
T0
WS0
WM0
WY0
WX0
WX240 WY240 WM1896 WS984 T255
*
*

transition from 0 to 1, this instruction will performs a logic XOR (if
the 2 bits are different, then the result will be 1, otherwise it will be
0) between 2 source matrixes with a length of L, Ma and Mb. The
result will then be stored back into the destination matrix Md, which
also has a length of L. For example the XOR operation is done by
bits with the same bit numbers - for example, if Ma0 = 0, Mb0 = 1,
then Md0 = 1; if Ma1 = 1, Mb1 = 1, then Md1 = 0; etc, right up until
XOR reaches Ma16L-1 and Mb16L-1.
XR
256
V, Z
P0~P9
Ma
Mb
Md
XOR
Ma : R
Mb : R
EN
In the program at left, when X0 goes from 01, will

perform a XOR operation between matrix Ma, comprised
by R0 to R4, and matrix Mb, comprised by R10 to R14.
The results will then be stored in destination matrix Md,
comprised by R20 to R24. The results are shown at right
in the diagram below.
122P.MXOR
X0
0
10
Md : R 20
L :
5
Ma15
Ma
R0
R1
R2
R3
R4
0
1
0
0
1
0
1
0
0
1
Ma79
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
Ma0
0
0
1
0
1
0
0
1
0
1
Ma64
Mb15
R10
R11
R12
R13
R14
1
0
0
0
1
1
0
0
0
1
Mb0
Mb
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
Mb79
Mb64
Before execution
Md15
R20
R21
R22
R23
R24
1
1
0
0
0
1
1
0
0
0
Md0
Md
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
Md79
Md64
After execution
7-99
1
1
0
0
0

FUN123 P
MXNR
FUN123 P
MXNR
MATRIX EXCLUSIVE NORXNR

L
: Length of matrix (Ma, Mb and Md)

WX
Range
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
R0 R3840 R3904 R3968 R5000 D0

C0
T0
WS0
WM0
WY0
WX0
Operand
Ma
Mb
Md
L
*
*

transition from 0 to 1, will perform a logic XNR operation (if the 2
bits are the same, then the result will be 1, otherwise it will be
0)between 2 source matrixes with a length of L, Ma and Mb. The
results will then be stored into the destination matrix Md, which
also has the same length (the XNR operation is done by bits with
the same bit numbers). For example, if Ma0 = 0, Mb0 = 1, then Md0
= 0; Ma1 = 0, Mb1 = 0, then Md1 = 1; etc, right up until XNR
reaches Ma16L-1 and Mb16L-1.
XR
256
V, Z
P0~P9
Ma
Mb
Md
XNR
123P.MXNR
X0
Ma : R
Mb : R
EN
0
10
Md : R 10
L :
5
Ma15
Ma
R0
R1
R2
R3
R4
0
1
0
0
1
0
1
0
0
1
Ma79
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
0
1
0
1
Ma
Mb15
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
Ma64
In the program at left, when X0 goes from 0 to 1, then

matrix Ma which is comprised by R0 to R4, and matrix Mb
which is comprised by R10 to R14 will do an XNR
operation. The results will be stored into the destination
matrix Md which is comprised by R10 to R14. In this
example, Mb and Md is the same matrix, so after operation
the source matrix Mb will replaced by the new value. The
result is shown at right in the diagram below.
R10
R11
R12
R13
R14
1
0
0
0
1
1
0
0
0
1
Mb0
Mb
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
0
0
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
Mb79
Mb64
Before execution
Md15
R20
R21
R22
R23
R24
0
0
1
1
1
0
0
1
1
1
Md0
Md
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
0
0
1
1
1
Md79
Md64
After execution
7-100
0
0
1
1
1

FUN124 P
MINV
Operation control
Range
Operand
Ms
Md
L
FUN124 P
MINV
MATRIX INVERSE
EN
WX
Ladder symbol
Ms : Starting register of source matrix
124P.MINV
Ms :
Md : Starting register of destination
Md :
Ma, Md may combine with V, Z, P0~P9 to serve indirect
WY
WM
WM0
WY0
WX0
WX240 WY240 WM1896
: Length of matrix (Ms and Md)
WS
TMR
CTR
WS0
WS984
T0
T255
R0 R3840 R3904 R3968 R5000 D0

C0
C255 R3839 R3903 R3967 R4167 R8071 D4095
HR
IR
OR
SR
ROR
DR
*
*
XR
256
V, Z
Ms

transition from 0 to 1, source register Ms, which has a length of L,
will be completely inverted (all the bits with a value of 1 will change
to 0, and all those with a value of 0 will change to 1). The results
will then be stored into destination matrix Md.
P0~P9
Md
Inverse
Ms
124P.MINV
X0
EN
Ma : R
0
Md : R
0
L :
5
Ms15
0
1
0
0
1
0
1
0
0
1
Ms0
Ms
R0
R1
R2
R3
R4
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
0
1
0
1
In the program at left, when X0 goes from 01, the

matrix comprised by R0 to R4 will be inverted, and then
store back into itself (because in this example Ms and
Md are the same matrix). The results obtained are
shown at right in the diagram below.
Md15
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
Ms79
Ms64
Before execution
1
0
1
1
0
1
0
1
1
0
Md0
Md
R0
R1
R2
R3
R4
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
Md79
Md64
After execution
7-101
1
1
0
1
0

FUN125 P
MCMP
FUN125 P
MCMP
MATRIX COMPARE
Ladder symbol
125P.MCMP
Ma :
Comparison control
EN
Compare from head
FHD
Ma : Starting register of matrix a

Mb : Starting register of matrix b
L : Length of matrix (Ma, Mb)
FND
Found objective
END
Compare to end
ERR
Pointer error
Mb :
Different/Same option
Pr
D/S
WX
Range
WY
WM
WS
WX0
WY0
WM0
WS0
WX240 WY240 WM1896 WS984
Operand
Ma
Mb
L
Pr
TMR
CTR
T0
T255
C0
C255
HR
Ma, Mb may combine with V, Z, P0~P9 to
IR
OR
SR
ROR
DR
R0
R3840 R3904 R3968 R5000
D0
R3839 R3903 R3967 R4167 R8071 D4095
*
*
XR
256
V, Z
P0~P9
z When comparison control "EN" = 1 or "EN" ( P instruction) has a

transition from 0 to 1, then beginning from the top pair of bits (Ma0
Pr
and Mb0) within the 2 matrixes Ma and Mb (when "FHD" = 1 or Pr
value is equal to 16L-1), or beginning from the next pair of bits (Mapr
Ma
Mb
+ 1 and Mbpr + 1) pointed by pointer Pr (when "FHD" = 0 and Pr
value is less than L-1), this instruction will compare and search for
pairs of bits with different value (when D/S = 1) or the same value
(when D/S = 0). Once match found, pointer Pr will point to the bit
number in the matrix met the search condition. The found objective
L
Mapr : Mbpr
flag "FND" will be set to 1. When it has searched to the final pair of
bits in the matrix (Ma16L-1, Mb16L-1), this execution of the instruction
will finish, no matter it has found or not. If this happen then The
compare-to-end flag "END" will be set as 1, and the Pr value will set
to 16L-1 and the next time that this instruction is executed, Pr will
automatically return to the starting point of the matrix (Pr = 0) to begin
the comparison search.
z The range for the pointer value is 0 to 16L-1. The Pr value should not be changed by other instructions, as this will
affect the result of search. If the Pr value exceeds its range, then the pointer error flag "ERR" will be set to 1, and
this instruction will not be carried out.
125P.MCMP
X0
Ma : R
Mb : R
EN
FHD
L :
END
Pr : R
20
ERR
D/S
Pr
4
Ma15
R0
R1
R2
R3
R4
1
0
1
1
1
1
0
1
1
1
Ma79
Ma
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
In the program at left, the "FHD" input is 0, so starting from a

position 1 greater than the pointer value at that time (marked
by *), the instruction will do a search for bits with different
status (because D/S = 1). When X0 has a transition from 0
1 three times, the results are shown at right in the diagram
below.
FND
0
10
1
0
0
1
1
Ma0
*
1
0
1
1
1
1
0
1
1
1
0
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
Ma64
R20
Mb15
R10
R11
R12
R13
R14
1
0
1
1
1
1
0
1
1
1
Mb
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
Mb0
*
1
0
1
1
1
Mb79
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
0
0
1
1
1
1
0
1
1
1
1
0
1
1
1
Mb64
Before execution
c R20
Pr
39
FND
END
d R20
Pr
79
FND
END
e R20
Pr
2
FND
END
Execution result
7-102

FUN126 P
MBRD
FUN126 P
MBRD
MATRIX BIT READ
Ms : Starting register of matrix

L
: Matrix length
Ms may combine with V, Z, P0~P9 to serve
WX
Range
Operand
Ms
L
Pr
WM
WS
TMR CTR
HR
IR
When readout control "EN" = 1 or "EN" ( P instruction) has a

transition from 0 to 1, the status of the bit Mspr pointed by
pointer Pr within matrix Ms will be read out and appear at the
output bit "OTB". Before the readout, this instruction will first
check the input -pointer clear "CLR". If "CLR" is 1, then the Pr
value will be cleared to 0 first before the readout action is carried
out. After the readout is completed, If the Pr value has already
reached 16L-1 (the final bit), then the read-to-end flag "END" will
be set to 1. If Pr is less than 16L-1, then the status of pointer
increment "INC" will be checked. If "INC" is 1, then Pr will be
increased by 1. Besides this, pointer clear "CLR" can execute
independently, and is not affected by other input.
WY
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
*
*
XR
256
V, Z
P0~P9
Pr
Ms
Mspr
OTB
The effective range of the pointer is 0 to 16L-1. Beyond this range the pointer error flag "ERR" will be set to 1,
z
126P.MBRD
X0
EN
Ms : R
0
L :
5
OTB
INC
Pr : R
END
20
ERR
CLR
Ms15
R0
R1
R2
R3
R4
0
0
0
0
1
0
0
0
0
0
Ms0
Ms
0
0
0
1
1
0
0
1
1
0
Ms79 Ms77
0
1
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
0
1
0
0
0
1
1
0
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
0
1
0
1
0
0
0
0
1
0
1
1
1
1
1
1
0
In the program at left, INC = 1, so every time there is

one readout the pointer will be increased by 1. With this
way each bit in Ms may be read out successively, as
shown at left in the diagram below. When X0 goes 3
times from 01, the results are shown at right in the
diagram below .
Pr
R20
77
END
R20
Pr
78
OTB
0
END
R20
Pr
79
OTB
OTB
END
R20
Pr
79
OTB
Ms64
Before execution
Execution result
7-103

FUN127 P
MBWR
FUN127 P
MBWR
MATRIX BIT WRITE
Md : Starting register of matrix

L : Matrix length
Md may combine with V, Z, P0~P9 to serve
Range WY
WM
WS
TMR CTR
WY0
WM0
WS0
T0
WY240 WM1896 WS984 T255
Operand
Md
L
Pr
HR
OR
SR
ROR
DR
C0
R0 R3904 R3968 R5000 D0
C255 R3839 R3967 R4167 R8071 D4095
*
*
XR
256
V, Z
P0~P9
Pr
z
When write control "EN" = 1 or "EN" ( P instruction) has a

transition from 0 to 1, the status of the write-in bit "INB" will be
written into the bit Mdpr pointed by pointer Pr within matrix Md.
Before the write-in takes place, the status of pointer clear "CLR"
will be checked. If "CLR" is 1, then Pr will be cleared to 0 before
the write-in action. After the write-in action has been completed,
the Pr value will be checked again. If the Pr value has already
reached 16L-1 (last bit), then the write-to-end flag will be set to
1. If the Pr value is less than 16L-1 and "INC" is 1, then the
pointer will increased by 1. Besides this, pointer clear "CLR" can
execute independently, and is not affected by other input.
Ms
Mspr
OTB
The effective range of Pr is 0 to 16L-1. Beyond this range, the pointer error flag "ERR" will be set to 1, and
this instruction will not be carried out.
z
127P.MBWR
X0
EN
X1
INB
Ms : R
0
5
L :
END
Pr : R
ERR
20
INC
CLR
Pr
78
X1
R20
Md15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Md0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Md15
X0=1
Md79
Pr
79
R20
Md
R0
R1
R2
R3
R4
In the program at left, pointer will be increased each time

execution (because "INC" is 1). As shown in the diagram
below, when X0 has a transition from 01, the status of
INB (X1) will be written into the Mdpr (Md78) position, and
pointer Pr will increased by 1 (changing to 79). In this
case, although Pr is pointing to the end, it has not yet
been written into Md79, so "END" flag is still 0. Only the
next attempt to write to Md79 will set END to 1.
0
0
0
0
0
0
0
0
0
1
0
Md0
Md
R0
R1
R2
R3
R4
EN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Md64
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Md64
After execution
7-104
0
0
0
0
0
Md79
Before execution
0
0
0
0
0

FUN128 P
MBSHF
FUN128 P
MBSHF
MATRIX BIT SHIFT

Md : Starting register of destination
matrix
L : Length of matrix (Ms and Md)
Ms, Md may combine with V, Z, P0~P9
to serve indirect address application.
WX
Range
Operand
Ms
Md
L
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
When shift control "EN" = 1 or "EN" ( P instruction) has a

transition from 0 to 1, source matrix Ms will be retrieved
and completely shifted one position to the left (when L/R =
1) or one position to the right (when L/R = 0). The space
caused by the shift (with a left shift it will be M0, and with a
right shift it will be M16L-1), is replaced by the status of fill-in
bit "INB". The status of the bits popped out (with a left shift
it will be M16L-1, and with a right shift it will be M0) will
appear at the output bit "OTB". Then the results of this
shifted matrix will be filled into the destination matrix Md.
*
*
XR
256
V, Z
P0~P9
INB
Ms
Md
L
Shift
left
1 bit
OTB
The program as below is an example where Ms and Md

are the same matrix. When X0 goes from 01, Ms will be
completely retrieved and moved to the left (because L/R =
1) by 1 bit. It will then be stored back to Md, and the results
are shown at right in the diagram below.
OTB
Ms
Md
128P.MBSHF
X0
Ms : R
Md : R
EN
X0
INB
L :
OTB
0
0
INB
Ms15
0
1
1
0
1
Ms0
Ms
0
1
1
0
0
0
1
1
0
1
Shift
right
1 bit
L/R
R0
R1
R2
R3
R4
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
0
0
1
Md15
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
X0=1
Ms79
R0
R1
R2
R3
R4
0
1
1
0
1
0
1
1
0
1
Md0
Md
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
Ms64
0
1
0
0
1
0
1
0
0
1
1
0
1
1
0
Md64
After execution
7-105
0
1
0
0
1
Md79
Before execution
0
1
0
0
1

FUN129 P
MBROT
FUN129 P
MBROT
MATRIX BIT ROTATE

L
: Length of matrix (Ms and Md)
Ms, Md may combine with V, Z, P0~P9 to

Range WX
Operand
Ms
Md
L
WY
WM
WS
TMR CTR
WX0
WY0
WM0
WS0
T0
WX240 WY240 WM1896 WS984 T255
HR
IR
OR
SR
ROR
DR
C0
R0 R3840 R3904 R3968 R5000 D0
C255 R3839 R3903 R3967 R4167 R8071 D4095
*
*
L/R=1
When rotate control "EN" = 1 or "EN" ( P instruction)

has a transition from 0 to 1, matrix Ms will be
completely retrieved and rotated by one bit towards
the left (when L/R = 1) or to the right (when L/R = 0).
The space created by the rotation (with a left rotation it
will be M0, and with a right rotation it will be M16L-1) will
be replaced by the status of the rotated-out bit (with a
left rotation it will be M16L-1, and with a right rotation it
will be M0). The rotated-out bit will not only be used to
fill the above-mentioned space, it will also be
transferred to rotated-out bit "OTB".
XR
256
V, Z
P0~P9
Ms
Md
L
Rotate
left
1 bit
OTB
L/R=0
OTB
Ms
Md
L
Shift
right
1 bit
129P.MBROT
X0
EN
Ms : R
Md : R
L/R
L :
0
5
Ms15
0
1
1
0
1
0
1
1
0
1
Ms0
Ms
R0
R1
R2
R3
R4
OTB
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
0
0
1
In the program at left, Ms and Md are the same matrix.

When X0 goes from 0 1, then the whole of Ms is
retrieved and rotated right (because L/R = 0) by 1 bit. It is
then stored back into Ms itself (because in this example
Ms and Md are the same matrix). The results are shown
at right in the diagram below.
Md15
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
X0=1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
0
0
1
0
1
0
0
1
Ms79
1
0
0
1
0
Md0
Md
R0
R1
R2
R3
R4
Ms64
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
Md64
After execution
7-106
0
1
0
0
1
Md79
Before execution
0
1
0
0
1
OTB

FUN130 P
MBCNT
FUN130 P
MBCNT
Ms : Starting register of matrix

L : Matrix length
D : Register storing count results
Ms may combine with V, Z, P0~P9 to serve
WX
Range
Operand
Ms
L
D
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
WX0
WY0
WM0
WS0
T0
C0
R0
R3840 R3904 R3968 R5000
D0
*
*
XR
256
V, Z
P0~P9
When count control "EN" = 1 or "EN" ( P instruction) has a transition from 0 to 1, then among the 16L bits
of the Ms matrix, this instruction will count the total amount of bits with a status of 1 (when input "1/0" = 1)
or the total amount of bits with a status of 0 (when input "1/0" = 0). The results of the counting will be stored
into the register specified by D. If the value of these amounts is 0, then the Result-is-0 flag "D = 0" will be set
to 1.
EN
Ms : R
0
L :
5
1/0
D : R
X1
Ms15
R0
0
R1
R2
R3
R4
0
0
1
0
0
D=0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
The program at left sets X1 first as 0 (to count bits with

status of 0) and then as 1 (to count bits with status of 1)
and let the signal X0 has a transition from 01 for both
case, the execution results are shown at right in the
diagram below .
Ms0
Ms
0
0
1
0
0
130P.MBCNT
X0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
X0=1
R20
64
D
R20
16
X1=0
X1=1
Count of 0 bit
Count of 1 bit
Ms79
Ms64
Source matrix
7-107

FUN 139
H S PWM
FUN 139
H S PWM
PW : PWM output ( 0 = Y0, 1 = Y2, 2 = Y4, 3 = Y6 )

OP : Output polarity ; 0 = Normal
1 = Inverse of output
RS : Resolution ; 0 = 1/100 (1%)
1 = 1/1000 (0.1%)
Pn : Setting of output frequency( 0~255 )
OR : Setting register of output pulse width ( 0~100 or
0~1000)
WR : Working register
Range
WX
WY
WM
WS TMR CTR
HR
IR
OR
SR
ROR
DR
Yn of WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
main
unit WX240 WY240 WM1896 WS984 T255 C255 R3839 R3903 R3967 R4167 R8071 D4095
Operand
Pw
Op
Rs
Pn
OR
WR
03
01
01
0255
01000
Description
z
The setting of resolution (RS) must be same between output0 (Y0) and output1 (Y2) also the setting of output
frequency (Pn). It means both output0 and output1 have the same output frequency and the same output
resolution, only the pulse width can be different. Same principle for output2 (Y4) and output3 (Y6).
When operation control EN = 1, the specified digital output will perform the PWM output, the expression for
output frequency as shown bellow:
1. f pwm =
184320
(Pn + 1)
2. fpwm =
18432
while Rs(Resolution)=1/1000
(Pn + 1)
while Rs(Resolution)=1/100
Example 1 : If Pn ( Setting of output frequency ) = 50, Rs = 0( 1/100 ), then
f pwm =
184320
=3614.1173.6KHz
( 50 + 1)
T(Period)=
1
fpwm
277s
For Rs = 1/100, if OR( Setting of output pulse width ) = 1, then T02.7s ; if OR( Setting of output pulse width ) =
50, then To140s .
.Output waveform :
(1). Pn ( Output frequency ) = 50, Rs = 0 ( 1/100 ), OR ( Output pulse width ) = 1 :
7-108

FUN 139
H S PWM
FUN 139
H S PWM
s
To 2.7usec
s
Tp 277usec
(2) .Pn ( Output frequency ) = 50, Rs = 0 ( 1/100 ), OR ( Output pulse width ) = 50 :
s
Example 2 : If Pn ( Setting of output frequency ) = 200, Rs = 1( 1/1000 ), then
f pwm =
18432
9 1 . 7 H z
( 200 + 1)
T(Period)=
1
fpwm
1 0 . 9 m s
For Rs = 1/1000, if OR( Setting of output pulse width ) = 10, then T0109s; if OR( Setting of output pulse width )
= 800, then To8.72ms
.Output waveform :
(1). Pn ( Output frequency ) = 200, Rs = 1 ( 1/1000 ), OR ( Output pulse width ) = 10 :
s
ms
(2) .Pn ( Output frequency ) = 200, Rs = 1 ( 1/1000 ), OR ( Output pulse width ) = 800 :
ms
ms
7-109

FUN140
HSPSO

(Brief description on function)
FUN140
HSPSO
Ps : The Pulse Output (03) selection

0:Y0 & Y1
1:Y2 & Y3
2:Y4 & Y5
3:Y6 & Y7
SR : Positioning program starting register.
WR : Starting working register of instruction operation,
total 7 registers, can not used in any other part of
program.
Range
Operand
Ps
SR
WR
HR
DR
ROR
R0
D0
R5000
R3839 D4095 R8071
K
2
256
03
Command descriptions
z The NC positioning program of HSPSO (FUN140) instruction is a program written and edited with text. The
executing unit of program is divided by step (which includes output frequency, traveling distance, and
transferring conditions). For one FUN140 instruction, can program 250 steps of positioning points at the most.
Each step of positioning program requires 9 registers. For detailed application, please refer to chapter 13 the
NC positioning control of WSZ-controller.
z The benefits of storing the positioning program in the register is that, while in application which use the HMI
(human machine interface) as the operation console can save the positioning programs to HMI. Whenever
the change of the positioning programs is requested, the download of positioning program can be simply
done by a series of write register commands.
z The NC positioning of this instruction doesnt provide the linear interpolation function.
z When execution control EN=1, if Ps03 is not controlled by other FUN140 instruction (the status of
Ps0=M1992, Ps1=M1993, Ps2=M1994, and Ps3=M1995 is ON respectively), it will start to execute from the
next step of positioning point (when goes to the last step, it will be restarted from the first step); if Ps03 are
controlled by other FUN140 instruction (the status of Ps0=M1992, Ps1=M1993, Ps2=M1994, and
Ps3=M1995 are OFF), this instruction will wait and acquires the control right of output point immediately right
after other FUN140 release the output.
z When execution control input EN =0, it stops the pulse output immediately.
z When output pause PAU =1 and execution control was 1, it will pause the pulse output. When output
pause PAU =0 and execution control is still 1, it will continue the unfinished pulse output.
z When output abort ABT=1, it will halt and stop pulse output immediately. (When the execution control
input EN becomes 1 next time, it will restart from the first step of positioning point to execute.)
z While send the output pulse, the output indication ACT is ON.
z When there is an execution error, the output indication ERR will be ON. (The error code is stored in the
error code register.)
z When the execution of each step of positioning program is completed, the output indication DN will be ON.
*** The working mode of Pulse Output must be configured (without setting, Y0Y7 will be treated as normal
output) to any one of following modes, before the HSPSO instruction can be worked.
U/D Mode: Y0 (Y2, Y4, Y6), as up pulse.
Y1 (Y3, Y5, Y7), as down pulse.
P/R Mode: Y0 (Y2, Y4, Y6), as the pulse out.
Y1 (Y3, Y5, Y7), as the direction.
A/B Mode: Y0 (Y2, Y4, Y6), as A phase pulse.
Y1 (Y3, Y5, Y7), as B phase pulse.
hThe output polarity for Pulse Output can select to be Normally ON or Normally OFF.
hThe working mode of Pulse Output can be configured by WINPROLADDER in Output Setup setting page.
7 - 11 0

FUN141
MPARA

FUN141
MPARA
Ps : The pulse output (03) selection

SR : Starting register for parameter table; it has 18
parameters totally, and occupy 24 registers.
Range
Operand
Ps
SR
HR
DR
ROR
R0
D0
R5000
R3839 D4095 R8071
K
2
256
03
Operation descriptions
hIt is not necessary to use this instruction. if the system default for parameter values is matching what user
demanded, then this instruction is not needed. However, if it needs to change the parameter value
dynamically, this instruction is required.
hThis instruction incorporates with FUN140 for positioning control purpose.
hWhether the execution control input EN = 0 or 1, this instruction will be performed.
hWhen there are any errors in parameter value, the output indication ERR will be ON.
(The error code is
stored in the error code register.)

hFor detailed functional description and usage, please refer to chapter 13 The NC positioning control of
WSZ-controller for explanation.
7 - 111

FUN142 P
PSOFF
STOP THE HSPSO PULSE OUTPUT

FUN142 P
PSOFF
Ps : 03
Enforce the Pulse Output PSOn (n= Ps) to stop.
z
When execution control EN =1 or EN ( P instruction) changes from 01, this instruction will enforce
the assigned number set of HSPSO (High Speed Pulse Output) to stop pulse output.
While in the application for mechanical original point reset, as soon as reach the original point can use this
instruction to stop the pulse output immediately, so as to make the original point stop at the same position
every time when performing mechanical original point resetting.
For detailed functional description and usage, please refer to chapter 13 The NC positioning control of
7 - 11 2

FUN143 P
PSCNV

(mm, Deg, Inch, PS)
Ladder symbol
Ps : 03; it converts the number of the pulse position to be

the mm (Deg, Inch, PS) that has same unit as the set
value, so as to make current position displayed.
143P.PSCNV
Execution control
EN
Ps :
D
FUN143 P
PSCNV
D : Register that stores the current position after

conversion. It uses 2 registers, e.g. if D = D10, which
means D10 is Low Word and D11 is High Word.
Range
Operand
Ps
D
HR
DR
D0
R0
R3839 D4095
ROR
R5000
R8071
256
0 3
z
When execution control En =1 or EN( P instruction) changes from 01, this instruction will convert
the assigned current pulse position (PS) to be the mm (or Deg, Inch, or PS) that has same unit as the set
value, so as to make current position displaying.
Only when the FUN140 instruction is executed, then it can get the correct conversion value by executing
this instruction.
For detailed functional description and usage, please refer to chapter 13 The NC positioning control of
7 - 11 3
FUN145 P
EN
FUN145 P
EN
Ladder symbol
Enable control
EN
145P.
EN
LBL : External input or peripheral label name that to be
LBL
enabled.
z When enable control EN =1 or EN ( P instruction) changes from 01, it allows the external input or
peripheral interrupt action which is assigned by LBL.
z The enabled interrupt label name is as follows.
LBL name
HSTAI
HSC0I
HSC1I
HSC2I
HSC3I
X0+I
X0I
X1+I
X1I
X2+I
X2I
X3+I
X3I
Description
HSTA High speed
counter interrupt
HSC0 High speed
counter interrupt
HSC1 High speed
counter interrupt
HSC2 High speed
counter interrupt
HSC3 High speed
counter interrupt
X0 positive edge
interrupt
X0 negative edge
interrupt
X1 positive edge
interrupt
X1 negative edge
interrupt
X2 positive edge
interrupt
X2 negative edge
interrupt
X3 positive edge
interrupt
X3 negative edge
interrupt
LBL name
X4+I
X4I
X5+I
X5I
X6+I
X6I
X7+I
X7I
X8+I
X8I
X9+I
X9I
Description
X4 positive edge
interrupt
X4 negative edge
interrupt
X5 positive edge
interrupt
X5 negative edge
interrupt
X6 positive edge
interrupt
X6 negative edge
interrupt
X7 positive edge
interrupt
X7 negative edge
interrupt
X8 positive edge
interrupt
X8 negative edge
interrupt
X9 positive edge
interrupt
X9 negative edge
interrupt
LBL name
X10+I
X10I
X11+I
X11I
X12+I
X12I
X13+I
X13I
X14+I
X14I
X15+I
X15I
Description
X10 positive edge
interrupt
X10 negative edge
interrupt
X11 positive edge
interrupt
X11 negative edge
interrupt
X12 positive edge
interrupt
X12 negative edge
interrupt
X13 positive edge
interrupt
X13 negative edge
interrupt
X14 positive edge
interrupt
X14 negative edge
interrupt
X15 positive edge
interrupt
X15 negative edge
interrupt
z In practical application, some interrupt signals should not be allowed to work at sometimes, however, it should
be allowed to work at some other times. Employing FUN146 (DIS) and FUN145 (EN) instructions could
attain the above mentioned demand.
Program example
M0
EN
145.P
EN
X0+I
z When M0 changes from 01, it allows X0 to send

interrupt when X0 changes from 01. CPU can rapidly
process the interrupt service program of X0+I.
7 - 11 4
FUN146 P
DIS
FUN146 P
DIS
Ladder symbol
Disable control
EN
LBL : Interrupt label intended to disable or peripheral name to
146P.
DIS
LBL
be disabled.
z When prohibit control EN =1 or EN ( P instruction) changes from 01, it disable the interrupt or
peripheral operation designated by LBL.
z The interrupt label name is as follows:
LBL name
HSTAI
HSC0I
HSC1I
HSC2I
HSC3I
X0+I
X0I
X1+I
X1I
X2+I
X2I
X3+I
X3I
Description
HSTA High speed
counter interrupt
HSC0 High speed
counter interrupt
HSC1 High speed
counter interrupt
HSC2 High speed
counter interrupt
HSC3 High speed
counter interrupt
X0 positive edge
interrupt
X0 negative edge
interrupt
X1 positive edge
interrupt
X1 negative edge
interrupt
X2 positive edge
interrupt
X2 negative edge
interrupt
X3 positive edge
interrupt
X3 negative edge
interrupt
LBL name
X4+I
X4I
X5+I
X5I
X6+I
X6I
X7+I
X7I
X8+I
X8I
X9+I
X9I
Description
X4 positive edge
interrupt
X4 negative edge
interrupt
X5 positive edge
interrupt
X5 negative edge
interrupt
X6 positive edge
interrupt
X6 negative edge
interrupt
X7 positive edge
interrupt
X7 negative edge
interrupt
X8 positive edge
interrupt
X8 negative edge
interrupt
X9 positive edge
interrupt
X9 negative edge
interrupt
LBL name
X10+I
X10I
X11+I
X11I
X12+I
X12I
X13+I
X13I
X14+I
X14I
X15+I
X15I
Description
X10 positive edge
interrupt
X10 negative edge
interrupt
X11 positive edge
interrupt
X11 negative edge
interrupt
X12 positive edge
interrupt
X12 negative edge
interrupt
X13 positive edge
interrupt
X13 negative edge
interrupt
X14 positive edge
interrupt
X14 negative edge
interrupt
X15 positive edge
interrupt
X15 negative edge
interrupt
z In practical application, some interrupt signals should not be allowed to work at certain situation. To achieve
this, this instruction may be used to disable the interrupt signal.
Program example
M0
EN
146.P
DIS
X2+I
z When M0 changes from 01, it prohibits X2 from

sending interrupt when X2 changes from 01.
7 - 11 5

FUN150
M-BUS

WHICH MAKES CONTROLLER AS THE MODBUS MASTER THROUGH PORT
1~2
FUN150
M-BUS
Pt 1~2, specify the communication port being acted

as the Modbus master
SRStarting register of communication program
WR : Starting register for instruction operation. It controls 8
registers, the other programs can not repeat in using.
Range
Operand
Pt
SR
WR
HR
ROR
DR
R0 R5000 D0
R3839 R8071 D4095
12
Description
1.
FUN150 (M-BUS) instruction makes controller act as Modbus master through Port 12, thus it is very easy to
communicate with the intelligent peripheral with Modbus protocol.
2.
The master controller may connect with 247 slave stations through the RS-485 interface.
3.
Only the master controller needs to use M-BUS instruction.
4.
It employs the program coding method or table filling method to plan for the data flow controls; i.e. from which
one of the slave station to get which type of data and save them to the master controller, or from the master
controller to write which type of data to the assigned slave station. It needs only seven registries to make
definition; every seven registers define one packet of data transaction.
5.
When execution control ENchanges from 0 to 1 and input Abort ABT is 0, and if Port 1/2 hasnt been
controlled by other communication instructions [i.e. M1960 (Port1) / M1962 (Port2) / = 1], this instruction will
control the Port 1/2 immediately and set the M1960/M1962 to be 0 (which means it is being occupied), then
going on a packet of data transaction immediately. If Port 1/2 has been controlled (M1960/M1962 = 0), then
this instruction will enter into the standby status until the controlling communication instruction completes its
transaction or abort its operation to release the control right (M1960/M1962 =1), and then this instruction will
become enactive, set M1960/M1962 to be 0, and going on the data transaction immediately.
6.
While in transaction processing, if operation control ABT becomes 1, this instruction will abort this
transaction immediately and release the control right (M1960/M1962 = 1). Next time, when this instruction
takes over the transmission right again, it will restart from the first packet of data transaction.
7.
WhileA/R=0Modbus RTU protocolA/R=1Modbus ASCII protocol
8.
While it is in the data transaction, the output indication ACT will be ON.
9.
If there is error occurred when it finishes a packet of data transaction, the output indication DN & ERR will
be ON.
10. If there is no error occurred when it finishes a packet of data transaction, the output indication DN will be
ON.
7 - 11 6

FUN 151
CLINK

(WHICH MAKES CONTROLLER ACT AS THE MASTER STATION IN CPU LINK
NETWORK THROUGH PORT 1~2)
FUN 151
CLINK
Ladder symbol
Execution control
EN
151P.CLINK
Pt :
Pt : Assign the port, 12

MD : Communication mode, MD0~MD3
ACT
SR : Starting register of communication table
MD :
Pause
PAU
SR :
(see example for its explanation)
ERR
WR : Starting register for instruction operation (see

example for its explanation). It controls 8 registers,
the other programs can not repeat in using.
WR :
Abort
ABT
DN
Range
Operand
Pt
MD
SR
WR
HR
ROR
DR
R0 R5000 D0
R3839 R8071 D4095
12
03
Description
This instruction provides 4 instruction modes MD0MD3. Of which, three instruction modes MD0MD2, are
regular link network, and the MD3 is the high speed link network. The following are the function description of
respective modes. For the details, please refer to section 12.1.2 for explanation.
hMD0 : Master station mode for WSZ CPU LINK.
MD0 instruction will become master station of WSZ CPU LINK network. The master station
controller will base on the communication program stored in data registers in which the target
station, data type, data length, etc, were specified to read or write slave station via Original
Communication Protocol command. With this approach up to 254 controller stations can share the
data each other.
hMD1 : Active ASCII data transmission mode.
With this mode, the FUN151 instruction will parse the communication program stored in data
registers and base on the parsing result send the data from port2 to ASCII peripherals (such as
computer, PLC, inverter, moving sign, etc, this kind of device can command by ASCII message).
The operation can set to be (1) transmit only, which ignores the response from peripherals, (2)
transmit and then to receive the response from peripherals. When operate with mode (2) then the
user must base on the communication protocol of peripheral to parsing and prepare the response
message by writing the ladder instructions.
hMD2 : Passive ASCII data receiving mode.
With this mode, the FUN151 will first wait to receive ASCII messages sent by external ASCII
peripherals (such as computer, PLC, card reader, bar code reader, electronic weight, etc. this kind
of device can send ASCII message). Upon receiving the message, the user can base on the
communication protocol of peripheral to parsing and react accordingly. The operation can set to (1)
receive only without responding, or (2) receive then responding. For operation mode (2) the user
can use the table driver method to write a communication program and after received a message
this instruction can base on this communication program automatically reply the message to
peripheral.
hMD3 : Master station mode of WSZ high speed CPU LINK.
The most distinguished difference between this mode and MD0 is that the communication
response of MD3 is much faster than MD0. With The introduction of MD3 mode CPU LINK, The
WSZ controller can easily to implement the application of distributed control and real time data
monitoring.
7 - 11 7

FUN160 D P
RWFR
FUN160 D P
RWFR
READ/WRITE FILE REGISTER
Sa: Starting address of data register

Sb: Starting address of file register
Pr : Record pointer register
L : Quantity of register to form a record, 1~511
Sa operand can combine V, Z, P0~P9 for index
addressing.
Range
Operand
Sa
Sb
Pr
L
WX
WY
WM
WS
TMR CTR
HR
IR
OR
SR
ROR
DR
*
*
XR
FR
F0
P0P9 F8191
WX0
WY0
WM0
WS0
T0
C0
R0 R3840 R3904 R3968 R5000 D0
V, Z
1~511
Description
When operation control "EN"=1 or "EN"( P instruction) changes from 01,it will perform the read ("R/W"=1)
or write ("R/W"=0) file register operation. While reading, the content of data registers starting from Sa will be
overwritten by the content of file registers addressed by the base file register Sb and record pointer Pr; while
writing, the content of file registers addressed by the base file register Sb and record pointer Pr will be
overwritten by the content of data registers starting from Sa; L is the operation quantity or record size. The
access of file register adopts the concept of RECORD data structure to implement. For example, Sa=R0,
Sb=F0, L=10, the read/write details shown as below.
Sb
F0 ~ F9
(L=10)
Sa
F10 ~ F19
R0 ~ R9
F20 ~ F29
(L=10)
(L=10)
(L=10)
F30 ~ F39
(L=10)
7 - 11 8
Pr = 0
Pr = 1
Pr = 2
Pr = 3

FUN160 D P
READ/WRITE FILE REGISTER
RW F R
FUN160 D P
RW F R
For ladder program application, only this instruction can access the file registers.
The record pointer will be increased by 1 after execution while pointer control input "INC"=1.
This instruction will not be executed and error indicator ERR" will be 1 while incorrect record size (L=0 or >
511) or the operation out of the file register's range (F0F8191).
160.RWFR
M0
M10
When M0 changes from 01, if D0 =2, the contents

of file registers F200~F249 will be overwritten by the
EN
Sa :
R0
F100
R/W
Sb :
Pr :
D0
50.
L :
50
Pointer will be increased by 1 after operation.
ERR
content of data registers R0~R49. the record length is
INC
160.RWFR
M0
M10
When M0 changes from 01, if D0 = 1, the content of

data registers R0~R49 will be overwritten by the file
EN
Sa :
R0
Sb :
Pr :
F100
R/W
D0
The record pointer will be increased by 1 after
L :
50
operation.
ERR
registers F150~F199.
INC
7 - 11 9

FUN200 D P
IF
CONVERSION OF INTEGER TO FLOATING POINT NUMBER
FUN200 D P
IF
S : Starting register of Integer to be converted

D : Starting register to store the result of conversion
S, D may combine with V, Z, P0~P9 to
serve indirect addressing.
Range
Operand
S
D
HR
ROR
DR
R0
R5000 D0
R3839 R8071 D4095
XR
16/32
bits
V, Z
Integer P0P9
Description
z
The format of floating point number of WSZ-controller follows the IEEE-754 standard.
integer data from S register into D~D+1 32-bit register( floating point number data).
If the value exceeds the valid range of destination, this instruction is not carried out, and the range-error flag
ERR is set as 1 and the D register will be intact.
X0
EN
200P.I
S :
R0
D :
D0
R0 = 200 ( 0000000011001000)
Integer To Floating
DD0 = 43480000H
R0 :
0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
I F
DD0 :
0 1 0 0 0 0 1 1 0 1 0 0 1 0 0 0 0
000
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 b15
b14 ~ b1
b0
s e e e e e e e e m m m m m m m m
7-120
mmm m

FUN201 D P
F I
FUN201 D P
F I
S : Starting register of floating point number to be

converted
D : Starting register to store the result of conversion
S, D may combine with V, Z, P0~P9 to
Range
Operand
S
D
HR
ROR
DR
XR
16-bit
V, Z
R0
R5000
D0
OR
R3839 R8071 D4095 32-bit
P0P9
Description
z
floating point data from S~S+1 32 bits register into D register( integer data ).
If the value exceeds the valid range of destination, then do not carry out this instruction, and set the
range-error flag ERR as 1 and the D register will be intact.
X2
EN
201P.F
S :
R20
D :
D10
DR20 = 123.45
ERR
Normalize
Floating To Integer
D10 = 007BH
7-121
42F6E666H

FUN202 P
FADD

Ladder symbol
Addition control
EN
202P.FADD
Sa :
FUN202 P
FADD
Sa: Augend
ERR
Sb: Addend
Ranger Error (FO0)
Sb :
of the addition
D :
HR
Range
Operand
Sa
Sb
D
ROR
DR
R0 R5000
D0
R3839 R8071 D4095
XR
Floating
point
V, Z
number P0P9
Description
z
Performs the addition of the data specified at Sa and Sb and writes the results to a specified register D when
the add control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If the result exceed the range that the
38
floating point number can be expressed( 3 . 4 * 1 0 ) then the error flag FO0 will be set to 1 and the D
register will be intact.
X0
202P.FADD
Sa :
R0
Sb :
R10
D :
R20
ERR
7-122

FUN 203 P
FSUB
FUN 203 P
FSUB
Sa: Minuend
Sb: Subtrahend
of the subtraction
Range
Operand
Sa
Sb
D
HR
ROR
DR
XR
Floating
R0 R5000
D0
V, Z
point
R3839 R8071 D4095 number P0P9
Description
z
Performs the subtraction of the data specified at Sa and Sb and writes the results to a specified register D
when the subtract control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If the result exceed the range
38
that the floating point number can be expressed( 3 . 4 * 1 0 ) then the error flag FO0 will be set to 1 and
the D register will be intact.
203P.FSUB
X0
EN
Sa :
R0
Sb :
R4
D :
R10
ERR
DR0
200
Floating Point Number :
DR0
43480000H
DR4
500
DR4
43FA0000H
DR10
C3960000H
7-123

FUN 204 P
FMUL
FUN 204 P
FMUL
Ladder symbol
Multiplication control
EN
204P.FMUL
Sa :
Sa: Multiplicand
ERR
Ranger Error (FO0)
Sb: Multiplier
Sb :
D :
of the multiplication
Range
Operand
Sa
Sb
D
HR
ROR
DR
XR
Floating
R0 R5000
D0
V, Z
point
R3839 R8071 D4095 number P0P9
Description
z
Performs the multiplication of the data specified at Sa and Sb and writes the results to a specified register D
when the multiplication control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If the result exceed the
38
range that the floating point number can be expressed( 3 . 4 * 1 0 ) then the error flag FO0 will be set to 1
and the D register will be intact.
204P.FMUL
M10
EN
Sa :
R10
Sb :
R12
D :
R14
ERR
DR10 1 2 3 . 4 5
DR10
42F6E666H
DR12 6 7 8 . 5 4
DR12
4429A28FH
DR14
47A39AE2H
7-124

FUN 205 P
FDIV
FUN 205 P
FDIV
Sa: Dividend
Sb: Divisor
of the division
Range
Operand
Sa
Sb
D
HR
ROR
DR
XR
Floating
R0 R5000
D0
V, Z
point
R3839 R8071 D4095 number P0P9
Description
z
Performs the division of the data specified at Sa and Sb and writes the result to the registers specified by
register D when the division control input "EN" =1 or "EN" ( P instruction) from 0 to 1. If the result exceed
38
the range that the floating point number can be expressed( 3 . 4 * 1 0 ) then the error flag FO0 will be set
to 1 and the D register will be intact.
205P.FDIV
X5
EN
Sa :
R0
Sb :
R2
D :
R4
ERR
7-125

FUN 206 P
FCMP
FUN 206 P
FCMP
Sa: The register to be compared

Sb: The register to be compared
Sa, Sb may combine with V, Z, P0~P9 to serve
indirect addressing.
Range
Operand
Sa
Sb
HR
ROR
DR
XR
Floating
R0
R5000
D0
V, Z
point
R3839 R8071 D4095 number P0P9
Description
z
Compares the data of Sa and Sb when the compare control input "EN" =1 or "EN" ( P instruction) from 0
to 1. If the data of Sa is equal to Sb, then set FO0 to 1. If the data of Sa>Sb, then set FO1 to 1. If the data
of Sa<Sb, then set FO2 to 1. If the data of Sa < Sb, then set the FO2 to 1.
206P.FCMP
X0
EN
Sa :
R0
a=b
Sb :
R2
a>b
Y0
a<b
DR0
200.1
DR0
4348199AH
DR2
200.2
DR2
43483333H
From the above example, we first assume the data of DR0 is 200.1 and DR2 is 200.2, and then compare the
data by executing the CMP instruction. The FO0 and FO1 are set to 0 and FO2 (a<b) is set to 1 since a<b.
If you want to have the compound results, such as, , < > etc., please send =, < and > results to relay
first and then combine the result from the relays.
7-126

FUN 207 P
FZCP

Ladder Symbol
Compare control
EN
FUN 207 P
FZCP
S : Register for zone comparison
207P.FZCP
S :
INZ
Inside zone
Su :
S>U
Higher than upper limit
S<L
Lower than lower limit
ERR
Limit value erroe
SU: The upper limit value
SL :
Range
Operand
S
Su
SL
HR
ROR
DR
R0 R5000
D0
R3839 R8071 D4095
SL: The lower limit value

S, SU, SL may combine with V, Z, P0~P9 to
XR
Floating
point
V, Z
number P0P9
Description
z
When compare control "EN" = 1 or "EN" ( P instruction) changes from 0 to 1, compares S with upper limit
SU and lower limit SL. If S is between the upper limit and the lower limit (SLSSU), then set the inside
zone flag "INZ" to 1. If the value of S is greater than the upper limit SU, then set the higher than upper limit
flag "S>U" to 1. If the value of S is smaller then the lower limit SL, then set the lower than lower limit flag
"S<L" as 1.
The upper limit SU should be greater than the lower limit SL. If SU<SL, then the limit value error flag "ERR"
will set to 1, and this instruction will not carry out.
z The instruction at left compares the value of

207P.FZCP
X0
EN
DR10 with the upper and lower limit zones
Y0
S :
R10
INZ
formed by DR12 and DR14. If the values of
Su :
R12
S>U
DR10~DR14 are as shown in the diagram at
SL :
R14
S<L
bottom left, then the result can then be

obtained as at the right of this diagram.
ERR
z If want to get the status of out side the zone,

then OUT NOT Y0 may be used, or an OR
operation between the two outputs S>U and
S<L may be carried out, and move the result
to Y0.
7-127

FUN 207 P
FZCP
FUN 207 P
FZCP
S DR10 2 0 0 0 . 2
Floating Point Number : DR10
44FA0666H
Su DR12 3 0 0 0 . 3
453B84CDH
( Upper limit value )
SL DR14 1 0 0 0 . 1
447A0666H
( Lower limit value )
Before-execution
X01 FLOATING ZONE COMPARE Y0 =
Results of execution
7-128
Advance Function Instruction

FUN 208 P
FSQR
FUN 208 P
FSQR
S : Source register to be taken square root

(square root value)
Range
Operand
S
D
HR
ROR
DR
XR
Floating
R0
R5000
D0
V, Z
point
R3839 R8071 D4095 number P0P9
Description
z The format of floating point number of WSZ-controller follows the IEEE-754 standard.
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, take the square root of the data
specified by the S value or S~S+1 register, and store the result into the register specified by D~D+1.
z If the value of S is negative, then the error flag "ERR" will be set to 1, and do not execute the operation.
208P.FSQR
X0
EN
S :
D :
S :
2520.04 ERR
D0
2520.04
X0 = 1
D :
D1 D0
50.2
2 5 2 0 . 0 4 = 50.2
7-129
4248
CCCD
D1
D0

FUN 209 P
FSIN
Operation control
EN
Ladder symbol
209P.FSIN
S :
FUN 209 P
FSIN
S : Source register to be taken SIN
ERR
S range error

(SIN value)
D :
Range
Operand
S
D
HR
ROR
DR
XR
Integer
R0
R5000
D0
V, Z
16-Bit
R3839 R8071 D4095 number P0P9
Description
z
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, take the SIN value of the angle data
specified by the S register and store the result into the register D~D+1 in floating point number format. The
valid range of the angle is from 18000 to +18000, unit in 0.01 degree.
z If the S value is not within the valid range, then the S value error flag "ERR" will be set to 1, and do not
execute the operation.
209P.FSIN
X0
EN
S :
3000
D :
R100
ERR
z At left, the example program gets the SIN value of 30,

and stores the results the register DR100.
7-130

FUN 210 P
FCOS
Operation control
EN
Ladder symbol
210P.FCOS
S :
FUN 210 P
FCOS
S : Source register to be taken COS
ERR
S range error

(COS value)
D :
Range
Operand
S
D
HR
ROR
DR
R0
R5000
D0
R3839 R8071 D4095
XR
Integer
16-Bit
V, Z
number P0P9
Description
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, take the COS value of the angle data
210P.FCOS
X0
EN
S :
R0
D :
R200
z At left, the example program gets the COS value of 60,

ERR
and stores the results the register DR200.
7-131

FUN 211 P
FTAN
Operation control
EN
Ladder symbol
211P.FTAN
S :
FUN 211 P
FTAN
S : Source register to be taken TAN
ERR
S range error

(TAN value)
D :
Range
HR
ROR
DR
R0
R5000
D0
R3839 R8071 D4095
Operand
S
D
XR
Integer
16-Bit
V, Z
number P0P9
Description
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, take the TAN value of the angle data
211P.FTAN
M0
EN
S :
R0
D :
D50
z At left, the example program gets the TAN value of 45,

ERR
and stores the results the register DD50.
7-132

FUN 212 P
FNEG
FUN 212 P
FNEG
D : Register to be changed sign

D may combine with V, Z, P0~P9 to serve indirect
Range
Operand
D
HR
ROR
DR
R0
R5000
D0
R3839 R8071 D4095
XR
Integer
16-Bit
V, Z
number P0P9
Description
z
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, the sign of the floating point number
register specified by D will be toogled.
X0
EN
212P.
FNEG
R0
z The instruction at left negates the value of the

DR0 register, and stores it back to DR0.
7-133

FUN 213 P
FABS
FUN 213 P
FABS
D : Register to be taken absolute value

D may combine with V, Z, P0~P9 to serve indirect
Range
HR
ROR
DR
XR
Integer
R0
R5000
D0
V, Z
16-Bit
R3839 R8071 D4095 number P0P9
Operand
D
Description
z
z When operation control "EN" = 1 or "EN" ( P instruction) from 0 to 1, calculate the absolute value of the
floating point number register specified by D, and write it back into the original D register.
X0
EN
213P.
FABS
z The instruction at left calculates the absolute
R0
value of the DR0 register, and stores it back in

DR0.
7-134
Chapter 8
Step Instruction Description
Structured programming design is a major trend in software design. The benefits are high readability, easy
maintenance, convenient updating and high quality and reliability. The control application which is consisted of many
sequential tasks, and designed by conventional ladder program design methodology usually makes others hard to
maintain. Therefore, it is necessary to combine the current widely used ladder diagrams with the sequential controls
made especially for machine working flow. With help from step instructions, the design work will become more efficient,
time saving and controlled. This kind of design method that combines process control and ladder diagram together is
called the step ladder language.
The basic unit of step ladder diagram is a step. A step is equivalent to a movement (stop) in the machine operation
where each movement has an output. The complete machine or the overall sequential control process is the combination
of steps in serial or parallel. Its step-by-step sequential execution procedure allows others to be able to understand the
machine operations thoroughly, so that design, operation, and maintenance will become more effective and simpler.
8.1 The Operation Principle of Step Ladder Diagram

Example
Description
1. STP Sxxx
is the symbol representing a step
Sxxx that can be one of S0 S999. When
M1924
Y0
executing the step (status ON), the ladder diagram
STPI
S0
STP S0
on the right will be executed and the previous step

and output will become OFF.
X1
X2
Y1
X3
Y2
STP S21
STP S20
Hence, as soon as ON, the initial step S0 is

entered (S0 ON) while the other steps are kept
Y3
inactive, i.e. Y1Y5 are all OFF. This means
STP S22
M1924 ONS0 ONY0 ON and Y0 will remain

ON until one of the contacts X1 or X2 is ON.
X5
X4
Y4
3. Assume that X2 is ON first; the path to S21 will
STP S23
X6
2. M1924 is on for a scan time after program start.
X10
then be executed.
S21 ON
Y2 ON
X2 ON
S0 OFF
Y0 OFF
Y2 will remain ON until X5 is ON.
Y5
4. Assume that X5 is ON, the process will move

forward to step S23.
S23 ON
Y4 ON
i.e. X5 ON
S21 OFF
Y2 OFF
Y4 and Y5 will remain ON until X6 is ON.
If X10 is ON, then Y5 will be ON.
5. Assume that X6 is ON, the process will move
forward to S0.
i.e. X6 ON
S0 ON
Y0 ON
S23 OFF
Y4Y5 OFF
Then, a control process cycle is completed and the
next control process cycle is entered.
8-1
8.2 Basic Formation of Step Ladder Diagram

c Single path
z Step S20 alone moves to step S21 through X0.
z X0 can be changed to other serial or parallel
STP S20
combination of contacts.
X0
STP S21
d Selective divergence/convergence
z Step S20 selects an only one path which divergent
STP S20
condition first met. E.g. X2 is ON first, then only the path
Selective divergence
X0
X1
X2
STP S21
STP S22
STP S23
of step S23 will be executed.

z A divergence may have up to 8 paths maximum.
z X1, X2, .., X22 can all be replaced by the serial or
parallel combination of other contacts.
STP S30
X20
STP S31
X21
STP S32
X22
Selective convergence
STP S40
e Simultaneous divergence/convergence
STP S20
X0
z After X0 is ON, step S20 will simultaneously execute all
Simultaneous divergence
paths below it, i.e. all S21, S22, S23, and so on, are in
action.
z All divergent paths at a convergent point will be executed
STP S21
STP S22
STP S23
to the last step (e.g. S30, S31 and S32). When X1 is ON,
they can then transfer to S40 for execution.
z The number of divergent paths must be the same as the
STP S30
X1
STP S31
number of convergent paths. The maximum number of
STP S32
divergence/convergence path is 8.
Simultaneous convergence
STP S40
8-2
f Jump
a. The same step loop
z There are 3 paths below step S20 as shown on the left.
Assume that X2 is ON, then the process can jump directly
STP S20
3-divergence
X0
X1
STP S21
STP S22
X3
X4
to step S23 to execute without going through the process

of selective convergence.
X2
z The execution of simultaneous divergent paths can not be
S23
skipped.
2-convergence
STP S23
b. Different step loop
M1924
X10
STP S0
STPI
S0
STP S7
STPI
S7
X4
X0
X11
S30
STP S20
X12
S21
STP S30
X2
X1
STP S21
STP S31
X3
X3
gClosed Loop and Single Cycle

a. Closed Loop
z The initial step S1 is ON, endless cycle will be continued
M1924
afterwards.
STP S1
STPI
S1
S1
X0
STP S20
STP S21
X1
STP S22
X2
8-3
S20
S21
S22
b. Single Cycle
z When step S20 is ON, if X2 is also ON, then RST S21
X0
M1924
instruction will let S21 OFF which will stop the whole step
process.
STP S0
STPI
X1
STP S20
X2
RST S21
STP S21
c. Mixed Process
M1924
STP S0
STPI
X0
X1
X2
STP S20
STP S21
STP S24
X3
X4
X7
STP S25
X5
STP S22
RST S25
STP S23
X6
h Combined Application
A branch can have up to 8 branch loops
The maximum number of downward horizontal branch loops of an initial step is 16
8-4
16
8.3 Introduction of Step Instructions: STP, FROM, TO and STPEND
STPI
Sx
: S0SxS7 (Displayed in WinProladder)
This instruction is the initial step instruction from where the step control of each machine process can be derived. Up to 8
initial steps can be used in the WSZ series, i.e. a controller can make up to 8 process controls simultaneously. Each step
process can operate independently or generate results for the reference of other processes.
Example 1 Go to the initial step S0 after each start (ON)
WinProladder
M1924
M1924
TO S0
STP S0
STPI
S0
STP S0
S0
STPI
Example 2 Each time the device is start to run or the manual button is pressed or the device is malfunction, then the
device automatically enters the initial step S0 to standby.
WinProladder
M1924
X0
M0
M1924
TO S0
X0
STP S0
S0
STPI
M0
STP S0
STPI
DescriptionX0: Manual Button, M0: Abnormal Contact.
8-5
Standby
Process
Program
STP Sxxx : S20SxxxS999Displayed in WinProladder

This instruction is a step instruction, each step in a process represents a step of sequence. If the status of step is
ON then the step is active and will execute the ladder program associate to the step.
Example
WinProladder
M1924
M1924
TO S0
Y0
Y0
STP S0
S0
STPI
STP S0
S0
STPI
X10
STP S20
X11
X1
Y1
X2
Y2
X10
STP S20
TO S20
X1
Y1
X2
Y2
X11
TO S0
STPEND
Description1. When ON, the initial step S0 is ON and Y0 is ON.

2. When transfer condition X10 is ON (in actual application, the transferring condition may be formed by
the serial or parallel combination of the contacts X, Y, M, T and C), the step S20 is activated. The
system will automatically turn S0 OFF in the current scan cycle and Y0 will be reset automatically to
OFF.
i.e. X10 ON
S20 ON
S0 OFF
X1 ON
Y1 ON
X2 ON
Y2 ON
Y0 OFF
3. When the transfer condition X11 is ON, the step S0 is ON, Y0 is ON and S20, Y1 and Y2 will turn OFF
at the same time.
i.e. X11 ON
S0
ON
S20 OFF
Y0 ON
Y1 OFF
Y2 OFF
8-6
FROM
Sxxx
: S0SxxxS999Displayed in WinProladder
The instruction describes the source step of the transfer, i.e. moving from step Sxxx to the next step in coordination
with transfer condition.
Example
WinProladder
M1924
TO S0
M1924
Y0
X0
STP S0
STPI
S0
X1
STP S0
STPI
Y1
X2
Y2
X3
Y0
X0
X1
Y3
STP S20
STP S21
STP S22
X2
X5
X4
X6
X3
TO S20
TO S21
TO S22
S0
Y1
X7
STP S20
Y4
Y2
STP S23
STP S21
X4
X8
TO S0
Y3
STP S22
FROM S20
FROM S22
X5
X7
TO S23
X6
Y4
STP S23
X8
STPEND
8-7
TO S0
Description: 1. When ON, the initial step S0 is ON. If X0 is ON, then Y0 will be ON.
2. When S0 is ON: a. if X1 is ON, then step S20 will be ON and Y1 will be ON.
b. if X2 is ON, then step S21 will be ON and Y2 will be ON.
c. if X3 is ON, then step S22 will be ON and Y3 will be ON.
d. if X1, X2 and X3 are all ON simultaneous, then step S20 will have the priority to be
ON first and either S21 or S22 will not be ON.
e. if X2 and X3 are ON at the same time, then step S21 will have the priority to be
ON first and S22 will not be ON.
3. When S20 is ON, if X5 and X7 are ON at the same time, then step S23 will be ON, Y4 will be ON and
S20 and Y1 will be OFF.
4. When S21 is ON, if X4 is ON, then step S0 will be ON and S21 and Y2 will be OFF.
5. When S22 is ON, if X6 and X7 are ON at the same time, then step S23 will be ON, Y4 will be ON and
S22 and Y3 will be OFF.
6. When S23 is ON, if X8 is ON, then step S0 will be ON and S23 and Y4 will be OFF.
8-8
TO
Sxxx
: S0SxxxS999Displayed in WinProladder
This instruction describes the step to be transferred to.
Example
WinProladder
M1924
TO S0
M1924
X0
Y0
STP S0
STPI
S0
STP S0
STPI
S0
X1
X1
Y1
STP S20
Y0
X0
Y2
TO S20
TO S21
STP S21
Y1
X2
Y3
STP S22
STP S20
Y2
STP S21
X2
TO S22
X3
X4
Y4
STP S23
Y3
STP S22
X3
FROM S20
X5
TO S23
FROM S22
STP S23
Y4
X4
X5
TO S0
STPEND
Description: 1. When ON, the initial step S0 is ON. If X0 is ON, then Y0 will be ON.
2. When S0 is ON: if X1 is ON, then steps S20 and S21 will be ON simultaneously and Y1 and Y2 will
also be ON.
3. When S21 is ON: if X2 is ON, then step S22 will be ON, Y3 will be ON and S21 and Y2 will be OFF.
4. When S20 and S22 are ON at the same time and the transferring condition X3 is ON, then step S23
will be ON (if X4 is ON, then Y4 will be ON) and S20 and S22 will automatically turn OFF and Y1 and
Y3 will also turn OFF.
5. When S23 is ON: if X5 is ON, then the process will transfer back to the initial step, i.e. So will be ON
and S23 and Y4 will be OFF.
8-9
STPEND :Displayed in WinProladder

This instruction represents the end of a process. It is necessary to include this instruction so all processes can be
operated correctly.
A controller can have up to 8 step processes (S0S7) and is able to control them simultaneously. Therefore, up to
8 STPEND instructions can be obtained.
Example
WinProladder
M1924
M1924
STP S0
STPI
S0
STP S0
STPI
S0
STPEND
STPEND
M1924
M1924
STP S1
STPI
S1
STPEND
TO S0
TO S1
STP S1
STPI
S1
STPEND
M1924
TO S7
M1924
STP S7
STPI
S7
STPEND
STP S7
STPI
S7
STPEND
Description When ON, the 8 step processes will be active simultaneously.
8-10
8.4 Notes for Writing a Step Ladder Diagram

Notes
In actual applications, the ladder diagram can be used together with the step ladder.
There are 8 steps, S0S7, that can be used as the starting point and are called the initial steps.
When controller starts operating, it is necessary to activate the initial step. The M1924 (the first scan ON signal)
provided by the system may be used to activate the initial step.
Except the initial step, the start of any other steps must be driven by other step.
It is necessary to have an initial step and the final STPEND instruction in a step ladder diagram to complete a step
process program.
There are 980 steps, S20S999, available that can be used freely. However, used numbers cannot be repeated.
S500S999 are retentive(The range can be modified by users), can be used if it is required to continue the machine
process after power is off.
Basically a step must consists of three parts which are control output, transition conditions and transition targets.
MC and SKP instructions cannot be used in a step program and the sub-programs. Its recommended that JMP
instruction should be avoided as much as possible.
If the output point is required to stay ON after the step is divergent to other step, it is necessary to use the SET
instruction to control the output point and use RST instruction to clear the output point to OFF.
Looking down from an initial step, the maximum number of horizontal paths is 16. However, a step is only allowed to
have up to 8 branch paths.
When M1918=0default, if a PULSE type function instruction is used in master control loop (FUN 0) or a step
program, it is necessary to connect a TU instruction before the function instruction. For example,
S20
STP S20
C0
PV :
When M1918=1, the TU instruction is not required, e.g.:
STP S20
C0
PV :
8 - 11
Example 1
WinProladder
M1924
M1924
Y0
X0
STP S0
STPI
S0
STP S0
STPI
S0
X1
X2
TO S0
X1
Y1
X4
X3
STP S20
S0
X5
Y0
X0
Y2
X2
X3
STP S21
X4
X6
TO S20
TO S0
TO S21
X7
X11
Y1
Y3
STP S20
STP S22
Y2
STP S21
X8
FROM S20
FROM S21
STP S22
X5
X7
TO S22
X6
Y3
X11
X8
TO S0
STPEND
Description
1. Input the condition to initial step S0

2. Input the S0 and the divergent conditions of S20, S0 and S21
3. Input the S20
4. Input the S21
5. Input the convergence of S20 and S21
6. Input the S22
8-12
Example 2
WinProladder
M1924
TO S0
M1924
Y0
X0
STP S0
STPI
S0
STP S0
STPI
S0
X1 X2
X1
X2
Y0
X0
Y1
X3
STP S20
STP S22
X4
X6
Y2
X3
Y3
TO S20
TO S22
Y1
STP S20
X4
STP S21
TO S21
X5
Y2
STP S21
X7
X11
Y3
Y4
STP S22
STP S23
X8
FROM S21
FROM S22
STP S23
X5 X7
TO S23
X6
Y4
X11
X8
TO S0
STPEND
Description

2. Input the S0 and the divergent condition of S20 and S22
3. Input the S20
4. Input the S21
5. Input the S22
6. Input the convergence of S21 and S22
7. Input the S23
8 - 13
Example 3
WinProladder
M1924
M1924
TO S0
Y0
Y0
STP S0
STPI
S0
STP S0
STPI
S0
X1
X1
X4
Y1
STP S20
STP S24
X2
X6
TO S24
Y1
STP S20
X2
Y3
Y2
STP S21
X4
Y5
TO S20
TO S21
STP S22
TO S22
X3
Y4
Y2
STP S21
STP S23
Y3
X5
STP S22
X7
FROM S21
X3
TO S23
FROM S22
Y4
STP S23
Y5
STP S24
X5 X7
FROM S23
FROM S24
X6
STPEND
Description

2. Input the S0 and the divergences of S20 and S24
3. Input the S20
4. Input the S20 and the divergences of S21 and S22
5. Input the S21
6. Input the S22
7. Input the convergences of S21 and S22
8. Input the S23
9. Input the S24
10. Input the convergences of S23 and S24
8-14
TO S0
8.5 Application Examples

Example 1
Grasp an object from tank A and put it in Tank B

X0 : Start
X4 : Right Limit
LS
X1 : Left Limit
LS
Y0 : Move Left
Leadscrew
Motor
Y1 : Move Right
Y2 : Lift Up
Y3 : Stretch Down
X2 : Upper Limit
X3 : Lower Limit
Arm
Claw (Y4)
Tank A
Tank B
M1924
Return to the origin (claw released
at the left limit and the upper limit)
STP S0
STPI
S0
X0
Start
STP S20
X3
Arm stretches downward

Lower Limit
Stop stretching downward
Claw grasps (after 1S)
STP S21
T0
1S Delaly
Arm lifts up
STP S22
X2
Upper Limit
Stop lifting up
Move arm to the right
STP S23
X4
Right Limit
Stop moving to the right
Arm stretches downwards
STP S24
X3
Lower Limit
Stop stretching downwards
Release claw (after 1S)
STP S25
T1
1S Delay
Arm lifts up
STP S26
X2
Upper Limit
Stop lift up
Move arm to the left
STP S27
X1
1s delay to ensure the object is firmly grasped

1S
before being lifted up
Left Limit
8 - 15
1s delay to ensure the object has been

1S
completely released before lifting the arm up
WinProladder
M1924
TO S0
Y4
Release claw
STP S0
STPI
S0
X1
Y0
X2
Y2
X0
TO S20
Y3
STP S20
X3
STP S21
TO S21
EN SET Y4
EN T0 100
T0
Return to the left limit

Return to the upper limit
Turn the switch ON before moving to S20
Stretch arm downward
Move to S21 after stretching to the lower
limit
Claw grasps (since the SET instruction is
used, Y4 should remain ON after departing
from STP S21)
Divergent into S22 after 1S
TO S22
Y2
Divergent into S23 after reaching the upper
STP S22
X2
limit
TO S23
Y1
STP S23
X4
Move arm to the right

Divergent into S24 after moving to the right
limit
TO S24
Y3
STP S24
Stretch the arm downward

Divergent into S25 after stretching to the
lower limit
X3
STP S25
Lift the arm up
TO S25
EN RST Y4
EN T1 100
T1
TO S26
Y2
STP S26
Release claw
Delay for 1S
Transfer into S26 after 1S
Lift the arm up
Divergent into S27 after reaching the upper
limit
X2
TO S27
Y0
STP S27
X1
Move the arm to the left

Divergent into S0 after moving to the left
limit (a complete cycle)
TO S0
STPEND
8-16
Example 2
Liquid Stirring Process
Dried
material
Empty Limit
Switch
X1
Liquid
Value 1 Y5
No Liquid Limit
Switch
X2
Value Y7
CH0 : R3840
Weighing
Value 1 Y6
Clear
CleanWater
Water
Value Y9
Stirring Unit
Value 4 Y10
Finished Product
Outlet
Y8
Electromagnetic Switch
Stirring
Motor
X4
Overload Switch
Input Points: Empty limit switch X1

No liquid limit switch X2
Empty limit switch X3
Over-load switch X4
Warning clear button X5
Start button X6
Water washing button X7
Warning Indicators: Empty dried material Y1

Insufficient liquid Y2
Empty stirring unit Y3
Motor over-load Y4
Output Points: Dried material inlet valve Y5

Dried material inlet valve Y6
Liquid inlet valve Y7
Motor start electromagnetic valve Y8
Clean water inlet valve Y9
Finished product outlet valve Y10
Weighing Output: CH0R3840
M1918=0
8 - 17
WinProladder
M1924
STP S0
STPI
TO S0
X1
SET Y1
X2
SET Y2
X3
Warning indicators
SET Y3
X4
SET Y4
X5
RST Y1
RST Y2
RST Y3
Reset warning
RST Y4
X6 Y1 Y2 Y3 Y4
X7 Y3 Y4
TO S20
TO S24
Y5
Production start
Water washing start
STP S20
M0
17CMP
Sa : R3840
M1
Sb : R0
M0
M1
TO S21
Input weighing
Status after weighing
TO S22
Y6
STP S21
EN T0 500
Divergent into S21 and S22

Input material to stirring
unit
Y7
STP S22
EN T1 800
T0 T1
FROM S21
TO S23
FROM S22
Y8
STP S23
Add liquid to stirring unit

Complete dried material
and liquid input, transfer
the status to S23
EN T2 4500
X4
Y4
T3
EN T3 500
Y9
T4
EN T4 1500
Y10
STP S24
T2
FROM S23
FROM S24
STP S25
Stirring timer
Wash stirring unit

Input clean water
Drain water out
TO S25
T4
Y10
X3
S25
X3
15DP
+1
Output finished product

R10
and accumulate the cycle
TO S0
STPEND
8-18
Example 3
Pedestrian Crossing Lights
Y0
Y0(Red)
(Red)
Y1
Y1(Amber)
(Amber)
Y2 (Green)
Y3
Y3(Red)
(Red)
Y2 (Green)
Y4
Y4(Green)
(Green)
X1
X1
Y4
Y4
(Green)
(Green)
X0
X0
Input Points:
Pedestrian Push Button X0
Output Points:
Pedestrian Push Button X1
Road Red Light Y0

Road Amber light Y1
Road Green Light Y2
Pedestrian Crossing Red Light Y3
Pedestrian Crossing Green Light Y4
8 - 19
M1918=0
Pedestrian Crossing Lights Control Process Diagram
M1924
Y2
STP S0
S0
STPI
Road Green Light
Y3
Pedestrian Crossing Light
X0
X1
Pedestrian Push Button
Y3
Y2
STP S20
T0
Road Green Light
Y1
STP S21
T1
STP S22
T2
T0 3000
Road Amber Light
Y0
T1
500
Road Red Light
T2
STP S30
Pedestrian Crossing
Green Light
T3
T3 2000
STP S32
T4
T4
500
Y4
STP S31
Pedestrian Crossing
Red Light
Y4
STP S33
100
Pedestrian Crossing
Green Light BLink
S33
C1
PV : 6
T5
C1
C1
T5
T5
S32
Y3
STP S34
100
Pedestrian Crossing
Red Light
RST C1
T6
T6
8-20
100
Pedestrian Crossing Lights Control Program

WinProladder
M1924
TO S0
Y2
STP S0
STPI
S0
Y3
X0
X1
TO S20
TO S30
Y2
STP S20
EN T0 3000
T0
TO S21
Y1
STP S21
EN T1
T1
500
TO S22
Y0
STP S22
EN T2
500
Y3
STP S30
T2
TO S31
Y4
STP S31
EN T3 2000
T3
TO S32
EN T4
STP S32
T4
100
TO S33
Y4
STP S33
S33
C1
PV : 6
EN T5
C1 T5
C1 T5
100
TO S32
TO S34
Y3
STP S34
RST C1
EN T6
T6
FROM S22
100
TO S0
FROM S34
STPEND
8 - 21
8.6 Syntax Check Error Codes for Step Instruction

The error codes for the usage of step instruction are as follows:
E51 : TO(S0-S7) must begin with ORG instruction.

E52 : TO(S20-S999) can't begin with ORG instruction.
E53 : TO instruction without matched FROM instruction.
E54 : To instruction must comes after TO, AND, OR, ANDLD or ORLD instruction.
E56 : The instructions before FROM must be AND, OR, ANDLD or ORLD
E57 : The instruction after FROM can't be a coil or a function
E58 : Coil or function must before FROM while in STEP network.
E59 : More than 8 TO# at same network.
E60 : More than 8 FROM# at same network.
E61 : TO(S0-S7) must locate at first row of the network.
E62 : A contact occupies the location for TO instruction.
E72 : Duplicated TO Sxx instruction.
E73 : Duplicated STP sxx instruction.
E74 : Duplicated FROM sxx instruction.
E76 : STP(S0~S7) without a matched STPEND or STPEND without a matched STP(S0~S7).
E78 : TO(S20~S999), STP (S20~S999) or FROM instructions comes before or without STP(S0~S19).
E79 : STP Sxx or FROM Sxx instructions comes before or without TO Sxx.
E80 : FROM Sxx instruction comes before or without STP Sxx.
E81 : The max. level of branches must <=16.
E82 : The max. no. of branches with same level must <=16.
E83 : Not place the step instruction with TO->STP->FROM sequence.
E84 : The definition of STP# sequence not follow the TO# sequence.
E85 : Convergence do not match the corresponding divergence.
E86 : Illegal usage of STP or FROM before convergent with TO instruction.
E87 : STP# or FROM# comes before corresponding TO#.
E88 : During this branch, STP# or FROM# comes before the corresponding TO#.
E89 : FROM# comes before corresponding TO# or STP#.
E90 : Invalid To# usage in the simultaneous branch.
E91 : Flow control function can not be used in the step ladder region.
8-22
Preface, Contents
WSZ-Controller Interrupt Function
WSZ-Series
Controller
Users Manual - II
WSZ-Controller High-Speed Counter

and Timer
10
Communication of WSZ-Controller
11
The Applications of WSZ

Communication Link
12
The NC Positioning Control of

WSZ-Controller
13
Application of ASCII Output Function
14
Real Time Clock ( RTC )
15
WSZ-6AD Analog Input Module
16
WSZ-2DA Analog Output Module
17
General Purpose PID Control
18
WSZ-PACK Operation Instruction
Advanced Application
Appendix 1
WSZ-Controller Users Manual II

CONTENTS
Chapter 9 : WSZ-Controller Interrupt Function
9.1
The Principle and the Structure of Interrupt Function ...................................................9-1
9.2
Structure and Application of Interrupt Service Routine ...............................................9-2
9.3
Interrupt Source, Label and Priority for WSZ-Controller .............................................9-3
9.4
How to Use Interrupt of WSZ-Controller .......................................................................9-5
9.5
Interrupt Configuration .....................................................................................................9-5
9.5.1
Interrupt Configuration through the Operation of WinProladder ......................................9-6
9.5.2
Internal Time Base Interrupt Configuration by R4162 ....................................................9-7
9.6
Examples of Interrupt Routine ........................................................................................9-7
9.7
Capture Input and Digital Filter .........................................................................................9-9
Chapter 10 : WSZ-Controller High-Speed Counter and Timer

10.1
WSZ-Controller High-Speed Counter ............................................................................10-1
10.1.1 Counting Modes of WSZ-Controller High-Speed Counter ........................................ 10-1
10.2
System Architecture of WSZ-Controller High-Speed Counter ...................................10-2
10.2.1
The Up/Down Pulse Input Mode of High-Speed Counter (MD0,MD1) ..................... 10-4
10.2.2
Pulse/Direction Input Mode of High-Speed Counter (MD2, MD3) ........................... 10-6
10.2.3
AB Phase Input Mode of High-Speed Counter (MD4,MD5,MD6,MD7) ...................... 10-7
10.3
Procedure for WSZ-Controller High-Speed Counter Application ..............................10-10
10.4
HSC/HST Configuration...................................................................................................10-10
10.5
Examples for Application of High-Speed Counter .......................................................10-13
10.6
WSZ-Controller High-Speed Timer ................................................................................10-18
10.6.1 HSTA High-Speed Timer ...............................................................................................10-18

10.6.2 HST0HST3 High-Speed Delay Timer.........................................................................10-21
10.6.3
Examples for Application of High-Speed Timer HSTA ..................................................10-22
10.6.4
Examples for Application of High-Speed Timer HST0HST3 ......................................10-26
Chapter 11 : Communication of WSZ-Controller

11.1
Functions and Applications of WSZ-Controller Communication Ports .....................11-1
11.1.1 Communication Port 0 : RS232 Interface .....................................................................11-2

11.1.2 Communication Port 12 : RS232 or RS485 Interface ................................................11-2
11.2
How to Use WSZ-Controller Communication Functions ............................................11-3
11.3
Hardware Wiring Notifications for RS485 Interface .....................................................11-3
11.4
How to Use WSZ-Controller Communication Ports ....................................................11-8
11.4.1
Matching of Hardware Interfaces and Mechanisms .......................................................11-8
11.4.2
Selection and Setting of Communication Protocols .......................................................11-11
11.4.3
Settings for Communication Parameters .......................................................................11-12
11.4.4 Modem Interface Setting ................................................................................................11-17
11.5
Description and Application of Software Interface Types ..........................................11-17
11.5.1
Standard Interface..........................................................................................................11-17
11.5.2
Modem-Specific Interface ..............................................................................................11-17
11.5.3
Ladder Program Control Interface .................................................................................11-19
11.6
Communication Board (CB) ...........................................................................................11-20
11.7
Pin Assignments and Protocols .....................................................................................11-20
Chapter 12 : The Applications of WSZ Communication Link

12.1
Application for FUN151 Instruction ................................................................................12-2
12.1.1
Procedures for Usage ....................................................................................................12-2
12.1.2 Explanation of Respective Modes and Application Program for FUN151 ........................12-2
12.2
Application for FUN150 (Modbus) Instruction .............................................................12-34
12.2.1
Procedures for Usage ....................................................................................................12-34
12.2.2
Explanation Application Program for FUN150 .................................................................... 12-34
Chapter 13 : The NC Positioning Control of WSZ-Controller

13.1
The Methods of NC Positioning ......................................................................................13-1
13.2
Absolute Coordinate and Relative Coordinate .............................................................13-1
13.3
Procedures of Using WSZ-Controller Positioning Control..........................................13-2
13.4
Explanation for the Positioning Control Hardware of WSZ-Controller......................13-3
13.4.1
Structure of Output Circuit of HSPSO ............................................................................13-3
13.4.2 Hardware Wiring Layout for WSZ-Controller Positioning Control ..................................13-3
13.5
The Explanation for the Position Control Function of WSZ-Controller .....................13-5
13.5.1
Interface of Stepping Motor ............................................................................................13-6
13.5.2
Interface of Servo Motor ................................................................................................13-7
13.5.3 Working Diagram Illustration for Servo Motor ................................................................13-8
13.6
Explanation of Function for NC Position Control Instruction ......................................13-8
13.7
Machine Homing ...............................................................................................................13-29
Chapter 14 : Application of ASCII Output Function

14.1
Format of ASCII File Data ...............................................................................................14-1
14.2
Application Examples of ASCII File Output ..................................................................14-3
Chapter 15 : Real Time Clock (RTC)

15.1
Correspondence between RTC and the RTCR within Controller ..............................15-1
15.2
RTC Access Control and Setting ...................................................................................15-2
Chapter 16 : WSZ-6AD Analog Input Module

16.1
Specifications of WSZ-6AD .............................................................................................16-1
16.2
The Procedure of Using WSZ-6AD Module .................................................................16-2
16.3
Address Allocation of WSZ-Controller Analog Inputs .................................................16-2
16.4
WSZ-6AD Hardware Description ...................................................................................16-3
16.4.1 WSZ-6AD Hardware Jumper Setting ...........................................................................16-4
16.5
WSZ-6AD Input Circuit Diagram ....................................................................................16-7
16.6
WSZ-6AD Input Characteristics and Jumper Setting ..................................................16-7
16.7
Configuration of Analog Input .........................................................................................16-12
16.8
Tackling on the OFFSET Mode Input ............................................................................16-15
Chapter 17 : WSZ-2DA Analog Output Module

17.1
Specifications of WSZ-2DA .............................................................................................17-1
17.2
The Procedure of Using WSZ-2DA Analog Output Module .......................................17-2
17.3
Address Allocation of WSZ-Controller Analog Outputs ..............................................17-2
17.4
WSZ-2DA Hardware Description ...................................................................................17-3
17.4.1 WSZ-2DA Hardware Jumper Setting ...........................................................................17-4
17.5
WSZ-2DA Output Circuit Diagram .................................................................................17-6
17.6
WSZ-2DA Output Characteristics and Jumper Setting ..............................................17-7
Chapter 18 : General Purpose PID Control

18.1
Introduction of PID control ...............................................................................................18-1
18.2
How to Select the Controller .........................................................................................18-1
18.2.1
Proportional Controller .....................................................................................................18-2
18.2.2 Proportional + Integral Controller.....................................................................................18-2

18.2.3 Proportional + Integral + Derivative Controller ................................................................18-3
18.3
Explanation of the PID Instruction and Program Example .............................18-3
Appendix 1WSZ-PACK Operation Instruction

1.1
Write Program and Register Data to WSZ-PACK through WinProladder-1
1.2
Write Program and Register Data to WSZ-PACK through Special Register

Operation .............................................................................................................. -3
1.3
Assigning the Retrieval of Register Stored WSZ-PACK ................................ -5
1.4
Read and Write WSZ-PACK by Function Instruction ..................................... -6
Chapter 9
WSZ-Controller Interrupt Function
9.1 The Principle and the Structure of Interrupt Function

There are many jobs that WSZ-controller needs to carry out. For example, there are 20K words users program need to
be solved, 512 points of I/O status need to be captured or updated, 3 communication ports need to be serviced, and etc.
However, jobs can only be executed one at a time as there is merely one CPU available. Therefore, controller service one
job after another in sequence until all the jobs are executed once. Then, it will return to the first job to repeat the same
cycle. The time interval of each execution is called the scan time of controller. The CPU execution speed is extremely
fast in comparison with human response. As far as human feeling is concerned, controller almost completes all jobs at the
same time when controller can normally complete the foregoing huge workload within tens of milliseconds (ms). Hence, it
can meet the requirements of the most practical control cases.
In most application cases, the control method described above is very much sufficient. But for some applications
that require a high-speed response (such as positioning control), a delay in scan time will certainly mean an increase in
error. Under the circumstances, only applying the Interrupt function can achieve the precision requirement.
The so-called Interrupt means the interrupt request to the CPU during normal scan cycle when an immediate
response is required. After receiving such request, the CPU will promptly stop all scanning work to prioritize to perform
and complete the corresponding service work before return (the so-called Return from Interrupt or RTI) to where
interrupt occurred and resume the interrupted scanning work.
The service work needed to carry out while interrupt occurred is called Interrupt Service Routine, which is a
subroutine consisted by a series of ladder codes. It is placed in the subroutine area and begin with the LBL instruction
with reserved label name (please refer to Section 9.3). Since it is placed in the subroutine area, it will not be executed in a
normal controller scanning cycle (controller only constantly scans the main program area but not the subroutine area).
In normal case, the CPU can promptly execute the corresponding interrupt routine within hundreds of micro-seconds
when an interrupt occurred. When there are more than one interrupt occurred at the same time (e.g. WSZ has 42
interrupts source), only the interrupt with highest priority can be executed. All the other interrupt routines need to wait until
it became the highest priority among the pending interrupts. Consequently, a response delay of hundreds of
microseconds, or even few milliseconds, may be caused. Hence, in a multiple interrupt inputs structure, an interrupt
priority is given to each interrupt in accordance with its importance. In case another interrupt request is made when the
controller is carrying out the interrupt service routine for an interrupt request that has a higher priority than the new
interrupt request, the CPU will wait until the execution of the subroutine is completed before accepting the new interrupt
request. However, if the priority of the new interrupt request is higher than the one being executed, the CPU will stop the
running of the current interrupt service routine immediately to execute the interrupt service routine with a higher priority.
After completing the execution, the CPU will return to the previously interrupted service routine with a lower priority to
continue the incomplete work. This kind of interrupt in an interrupt execution is called the Nested Interrupt. WSZ can
have up to 5 levels of nested interrupts. The diagram below shows the examples of single interrupts and nested interrupt:
9-1
X8+interrupt
(Priorty:18)
HSC0 interrupt
(Priority:10)
Main
Program
Mian Program
Mian Program
Mian Program
X8+I Subroutine
Subroutine
X8+I
Subroutine
HSC0I Subroutine
First level
Second level
Nested Subroutine
can have up to 5
level
9.2 Structure and Application of Interrupt Service Routine

Although both Interrupt and Call are having subroutines, but the calling methods (to jump to subroutine for
execution) are different. When the CALL command [FUN67] is executed by Call in the main program, the CPU will
execute the subroutine with the label name designated by the CALL command. The CPU will return to the main program
after the RTS (Return from Subroutine) command is executed.
The calling of Interrupt is triggered by, instead of using software commands, the hardware interrupt signal to the
CPU. The CPU will identify the source of the interrupt and jump automatically to the Interrupt Service Routine with the
label name of the interrupt in the subroutine for execution. It will return to the main program after the RTI (Return from
Interrupt) command is executed. Therefore, there is no ladder code relevant to interrupt in the main program area.
Interrupt label
As mentioned before, interrupt service routine

must be placed in the sub program area. The
structure is shown as the diagram on the right where
a head, a tail and the main body of the service
routine are included. The head is the interrupt label
name of the interrupt (to be discussed in the next
section). The tail is the RTI command [FUN69], to
tell the CPU that the interrupt subroutine is ended
and it should jump to the place where were
interrupted, please refers to FUN69 (RTI) instruction.
In between the head and the tail is the main body
of the interrupt service routine used to tell the CPU
what control actions should be executed when
interrupt occurs.
(Head)
Main Content of
interrupt service
Routine
RTI
(Tail)
The power line for subroutine is indicated by

double lines to differentiate from the power line for
the main program (single line) for easy reading.
9-2
9.3 Interrupt Source, Label and Priority for WSZ-Controller

As described in the last section, every Interrupt Service Routine should have a unique Interrupt Label. There are
49 corresponding Interrupt Labels for interrupts, namely Interrupt Reserve Words, cab be used in the sub program
area of WSZ-controller. These labels are dedicated to the interrupt routines hence cannot use for normal subroutine or
jump target.
The Interrupt Label (Interrupt Reserve Words) are all suffix with an I letter. For examples, the interrupt label for
high-speed counter HSC0 should be HSC0I and the interrupt label for X0+ should be X0+I. The Interrupt Labels and
their priorities for the 49 WSZ-controller interrupt sources of WSZ-controller are shown as below.
The following table is the interrupt sources and their label names. To compatible with previous versions of
programming tool, besides HSC/HST, the label names in old versions are also enlisted (label name with parenthesis).
The new label names are prefer than old while in usage (HSTAI, 1MSI~100MSI, X0+I~X15-I are prior in using).
(The priority of interrupt is inversely proportional to the value of priority)

Interrupt
Source
Priority
High Speed
Timer
HSTAI (ATMRI)
Timing from HSTA toCV=PV
1MSI (1MS)
One interrupt every 1ms
2MSI (2MS)
3MSI (3MS)
4MSI (4MS)
5MSI (5MS)
10MSI (10MS)
50MSI (50MS)
100MSI (100MS)
10
HSC0I/HST0I
Counting/Timing from HSC0/HST0 to (CV=PV)
11
HSC1I/HST1I
12
HSC2I/HST2I
13
HSC3I/HST3I
14
PSO0I
Pulse output of PSO0 completed
15
PSO1I
16
PSO2I
17
PSO3I
Internal
Time Base
HSC
HST
PSO
Interrupt Label
Condition for Interrupt
9-3
Note
No interrupt when act as a
cyclic timer
One kind of time base

interrupt is allowed at a
time (please refer to
Section 9.5.2).
Therefore, the actual
number of interrupts is 42.
HSC0~HSC3 are labeled

as HSC0I~HSC3I when
configured as high speed
counter; and are labeled
as HST0I~HST3I for
high speed timer.
Interrupt
Source
Priority
Interrupt Label
18
X0+I (INT0)
19
X0I (INT0)
20
X1+I (INT1)
21
X1I (INT1)
22
X2+I (INT2)
23
X2I (INT2)
24
X3+I (INT3)
25
X3I (INT3)
26
X4+I (INT4)
27
X4I (INT4)
28
X5+I (INT5)
29
X5I (INT5)
30
X6+I (INT6)
31
X6I (INT6)
32
X7+I (INT7)
Hardware Input
33
X7I (INT7)
or Software
34
X8+I (INT8)
35
X8I (INT8)
36
X9+I (INT9)
37
X9I (INT9)
38
X10+I (INT10)
39
X10I (INT10)
40
X11+I (INT11)
41
X11I (INT11)
42
X12+I (INT12)
43
X12I (INT12)
44
X13+I (INT13)
45
X13I (INT13)
46
X14+I (INT14)
47
X14I (INT14)
48
X15+I (INT15)
49
X15I (INT15)
Interrupt from
External
High-Speed
Timer
Condition for Interrupt
Note
Interrupt when 01of X0

HSC4I
HSC7I
software high speed

counter HSC4
HSC7 which were
implemented by the
interrupt function can
be designated as any

9-4
control input of the
The counter input and
one input of X0
X15. Therefore, the
interrupt priority of the
software high speed
counter depends on
the input it utilized.
9.4 How to Use Interrupt of WSZ-Controller

The applications of interrupt in internal timing, external input, HSC/HST or PSO are similar. Since the applications
of HSC/HST and PSO have been described in other chapters/sections, only examples of internal timing and external input
will be described in this section.
Begin
Setup interrupt configuration
Writing interrupt service routine in

sub program area
--------------- Refer to section 9.5
--------------- Refer to section 9.6
End
9.5 Interrupt Configuration

In fact, interrupt configuration is simply to determine whether the application of a certain interrupt is to be used or not.
Interrupt configuration can be divided into configuration relevant to I/O or irrelevant to I/O two categories. HSTA,
HSC/HST, PSO and external interrupt are all relevant to I/O and should be performed by the configuration function of
programming tool. The programming tool will automatically enable the interrupt of the device once it is configured.
The configuration of internal time base interrupt (1MSI~100MSI), which is irrelevant to I/O, need not to be
configured. As long as the time base interrupt reserved words, which is placed in front of the interrupt service subroutine,
appears in the sub program area, it imply the interrupt has been planned. If more than one such interrupts appear, can
use low byte, B0~B7, of the special register R4162 to control the interrupt of 1MSI~100MSI to be executed or not.
9-5
9.5.1
Interrupt Configuration through the Operation of WinProladder
Click the item I/O Configuration which in Project Windows :

Project name
System Configuration
I/O Configuration
Select
Interrupt Setup
When Interrupt Setup windows appear, then you can choose the Interrupt which you want.
9-6
9.5.2
Internal Time Base Interrupt Configuration by R4162
When the internal time base interrupt reserved words (8 kinds, 1MSI~100MSI) appears in the sub program area, it
imply that the designated interrupt has been planned and can be masked by using the 8 bits of the low byte in the register
R4162 as shown in below:
R4162:
B7
B6
B5
B4
B3
B2
B1
B0
100MS
50MS
10MS
5MS
4MS
3MS
2MS
1MS
When bit status =0: Enable the time base interrupt (not masked)
When bit status =1: Disable the time base interrupt (masked)
z Among B0~B7, if more than one of the bits is 0, WSZ-controller will enable the one with the smallest time base and
disable the others. If the content of R4162 is 00H, then all time base interrupts will not be masked. However, if 1 MS
and 2MS~100MS time base interrupt subroutine are all appeared in subprogram area, only the 1MS time base
interrupt will be executed, and the others will not be executed.
z It is with great flexibility since the user can dynamically change the time base or pause or enable the interrupt by using
the ladder program to change the value of R4162 at any time in controller RUN.
z The default of R4162 is 0; it represents that 1MS~100MS time base interrupt are not been masked. As long as any
one of time base interrupt processing subroutine exists in the sub program area, it will be executed periodically.
z Since a considerable CPU time is required for execution of every interrupt, the smaller the interrupt time base, the
more interrupts required and the longer CPU time occupied. Therefore, application should be made only when
necessary to avoid degradation of CPU performance.
9.6 Examples of Interrupt Routine

Example 1
Precision position control by positioning switch .(Configure X0 as the positive edge interrupt input)
X0 : Position Sensor
X1 : Emergency Stop
Y1 : Power motor
9-7
Main program
M0 (start) changes from 01, the motor is ON.
M0 X0
SET
Y0
RST
Y0
X1
Subroutine
65
LBL
When the sensor, X0, detects the arriving of positioning

location, i.e. X0 change from 0 1, the hardware will
automatically execute the interrupt subroutine
X0+I
EN
RST
Y0
As motor Y0 changes to 0, it stops the motor immediately.

Output Y0 immediately to reduce delay caused by scan time
74.IMDI0
EN D :
N :
Y0
It must employ immediate input/output instruction in the

interrupt subroutine to meet the real time high speed
precision control requirement.
69
RTI
Example 2
1MS Internal Time base Interrupt
Main program
08.MOV
M0
EN S :
D :
R4162
When M0=1, 1MS timing interrupt is disabled

(1MS timing interrupt being masked)
08.MOV
M0
EN S :
D :
R4162
When M0=0, 1MS timing interrupt is enabled
Subroutine
65
LBL
After 1MS time base interrupt is started, the system will
1MSI
EN
15
(+1)
automatically execute the interrupt subroutine every 1MS

R0
OVF
R0 is used as the up counting cyclic timer for every 1MS

EN
69
RTI
16
(-1)
R1
UDF
time base
R1 is used as the down counting cyclic timer for every

1MS time base
9-8
9.7 Capture Input and Digital Filter

In many high-speed application, you can set interrupt input to prevent signal lose. Besides, you can set Captured
Input to capture the transient input signal less than one controller scan time. The method to set Capture Input is very
easy.
Click the item I/O Configuration which in Project Windows:
Project name
I/O Configuration
Select Input Setup
When Input Setup windows appear, then you can choose the Capture Input point which you want.
The WSZ-controller can support up to 36 points of captured input (X0~X35) depending on the main unit. The inputs
X0~X15 can be configured as the hardware interrupt input for fast response application, and the captured inputs are for
low frequency but short duration (less than 1 scan time) input signal.
9-9
Example_1
When the input is configured as the captured input and used for counting application, it is necessary that the input
signal period must be greater than 2 scan time for correct counting. For example the input frequency is 50Hz, then the
scan time of controller must be less than 10ms for counting without loss.
Controller
scan time
Input signal < PLC
scan time
PLC scan
scan time
time
Controller
PLC scan
timetime
Controller
scan
Example_2
The captured input can get the input signal which duration is less than 1 sacn time of controller.
Input signal < PLC
scan time
Controller
scan time
PLC scan
Controller
scan time
time
PLC scan
Controller
scantime
time
The WSZ-controller main unit supports the captured input function as mentioned above, except this, it also supplies
the digital filtering function for digital inputs X0~X35. There are 6 groups of digital inputs { (X0~X3)(X4~X7)(X8~X11)
(X12~X15)(X16~X23)(X24~X35) } for filtering setting.
There are 2 methods for digital filtering, one is the frequency domain, the other is the time domain. The filtering
setting for upper four groups of digital inputs (X0~X15) can be either frequency domain or time domain; while in frequency
domain, it supports the range of 14KHz1.8MHz in total 8 selections; while in time domain, it supports the range of 1~15
1ms or 1~150.1ms selections. The last two groups of digital inputs (X16~X35) only supports the time domain, and the
selections are 1~151ms.
By time domain, the duration of input signal must be greater than the filtering time, then the controller can get the
input signal; by frequency domain, the frequency of input signal must be less than the filtering frequency, then the
controller can get the input signal.
Example 1
When the filtering time is 2ms, if the ON or OFF duration is less than 2ms, it will lose the ON or OFF signal.
2ms will be filtered
2ms can be recognized
2ms will be filtered
9-10
2ms can be recognized
Example 2
When the filtering frequency is 28KHz, if the input frequency is greater than 28KHz, it will lose the input signal.
9 - 11
Chapter 10
WSZ-Controller High-Speed Counter and Timer
10.1 WSZ-Controller High-Speed Counter

The counting frequency of an ordinary controllers software counter can only reach tens of Hz (depending on the
scan time). If the frequency of input signal is higher than that, it is necessary to utilize high-speed counter (HSC),
otherwise loss count or even out of counting may occur. There are usually two types of HSC implemented for controller.
The hardware high-speed counter (HHSC) employed special hardware circuit and the software high-speed counter
(SHSC) which when counting signal changes state will interrupt CPU to perform the increment/decrement counting
operation. WSZ-controller provides up to 4 HHSCs (in SoC chips) and 4 SHSCs. All of them are all 32-bit high speed
counter.
10.1.1
Counting Modes of WSZ-Controller High-Speed Counter
As shown in the table below, each of the four WSZ-controller HHSCs and SHSCs provides 8 and 3, respectively,
kind of counting modes to choose from:
HHSC
SHSC
(HSC0HSC3)
(HSC4HSC7)
MD 1 U/D2
Counting Mode
Counting Waveform
Up Counting+1
Down Counting1
Up-down pulse
Pulse-direction
U
MD 0 U/D
MD 2 P/R
MD 3
U
D
P/R2
R
P
R
MD 4
A/B
AB phase
MD 5
A/B2
A
B
MD 6
A/B3
B
MD 7
A/B4
The up/down arrow (,) on the positive/negative edge in the waveform represents where counting (+1 or 1) occurs.
10-1
10.2 System Architecture of WSZ-Controller High-Speed Counter

The diagrams below are the system architecture for WSZ-controller HHSC and SHSC where each one of them has
multi-purpose input and counting functions. Some of the functions are built-in (such as CV register number, PV register
number, interrupt label and relay number for software MASK, CLEAR and direction selection) that user need not to assign
for configuration. However, some functions, with a * marked in the diagrams below, must use the programming tool to
configure the HSC (such as HSC application selection, counting mode, application of each function input, inverse polarity
and appointment of corresponding input point number Xn) etc. For detailed structure and operation of the 8 kind of
counting modes that assigned in configuration, please refer to section 10.2.1~10.2.3 for explanation.
Note: CV (Current Value); PV (Preset Value).
z Use FUN92 to read out current counting value

from SoC chip hardware counter to put it into
CPU internal CV register.
z Use FUN93 to write CV register content to SoC

chip. Resets and updates the CV of hardware
counter in SoC chip.
CV Register
(CPU Intermal Memory)
DR4096
DR4100
DR4104
DR4108
(HSC0)
(HSC1)
(HSC2)
(HSC3)
PV Register
(CPU Internal Memory)
DR4098
DR4102
DR4106
DR4110
FUN93
(HSCTW)
FUN92
(HSCTR)
FUN93
(HSCTW)
(SoC Chip)
*
(X0,X4,X8,X12)*
x1
x2
D,R,B
(X1,X5,X9,X13)*
x3
CV
x4
Register
Software direction selection

(HSC0) M1942 0:UP
1:DN
(HSC1) M1948 (MD2,3 ONLY)
(HSC2) M1978
(HSC3) M1981
(X2,X6,X10,X14)*
Controlling
input
Comparator
Counting
input
U,P,A
PV
Register
Mask control
(X3,X7,X11,X15)*
PV=CV
Clear control
EN(FUN145)/
DIS(FUN146)
Software Software
Mask Clear
TO CPU
Interruput
Interrupt Mask
(HSC0)
M1940
M1941
(HSC0)
HSC0I
(HSC1)
M1946
M1947
(HSC1)
HSC1I
(HSC2)
M1976
M1977
(HSC2)
HSC2I
(HSC3)
M1979
M1980
(HSC3)
HSC3I
System Architecture of HHSCHSC0HSC3
10-2
( CPU Internal Memory)

CV Register
(U,P,A)*
(X0~X15)*
(X0~X15)*
Software direction
(HSC4)
(HSC5)
(HSC6)
(HSC7)
(D,R,B)*
DR4112(HSC4)
or
DR4116(HSC5)
or
DR4120(HSC6)
or
DR4124(HSC7)
selection
M1983 0:UP
1:DN
M1985 (MD2 ONLY)
M1987
M1989
(X0~X15)*
Controlling
input
(X0~X15)*
Comparator
Counting
input
PV Register
*
DR4114(HSC4)
or
DR4118(HSC5)
or
DR4122(HSC6)
or
DR4126(HSC7)
(HSC4)
(HSC7)
Mask control
C
PV=CV
Clear control
EN(FUN145)/
DIS(FUN146)
Software Mask
Interrupt
Interrupt Mask
M1982
(HSC4)
HSC4I
(HSC5)
M1984
(HSC5)
HSC5I
(HSC6)
M1986
(HSC6)
HSC6I
(HSC7)
M1988
(HSC7)
HSC7I
(HSC4)
System Architecture of SHSCHSC4HSC7

z All control signals of HHSC and SHSC are default as Active High (i.e. Status =1 for active and 0 for non-active). In
order to cooperate with the sensors polarity, the HHSC counting inputs (U, D, P, R, A and B) and control inputs
(M and C) can be selected for polarity inverse.
z By default when the MASK control signal, M is 1, the HSC counting pulse will be masked without any counting
being performed and all HSC internal status (such as CV and PV) will remain unchanged. The HSC will function
normally only when M returns to 0. Some sensors have Enable outputs which function is on the contrary to
MASK. Counters will not count when Enable = 0 and can only start functioning when Enable = 1. Then, function of
inverse polarity input of MASK can be selected to cooperate with the sensors having Enable output.
z When the CLEAR control signal, C is 1, the HSC internal CV register will be cleared to 0 and no counting will be
performed. The HSC will start counting from 0 when C returns to 0. Ladder program can also directly clear the CV
register (DR4112, DR4116, DR4120, and DR4124), so as to clear the current counting value to 0.
z The four sets of WSZ-controller HHSC are located in the SoC chips where the CV or the PV registers the user
cant access directly. What the user can access are the CV registers (DR4096DR4110) located in the CPU
internal memory. Ideally, the contents of CV and PV registers in the chips should be updated simultaneously with
the CV and PV registers in the CPU internal memory. However, to keep the correspondence between the two
must be loaded or read by the CPU when they, in fact, belong to two different hardware circuits. It is necessary to
use FUN93 to load the CV and the PV registers inside the CPU to the respective CV and PV registers in the SoC
chip (to allow HHSC to start counting from this initial value. Then, FUN92 can be used to read back the counting
value of the HHSC CV register in the chips to the CV register in the CPU (i.e. the CV register in the CPU has the
bi-direction function). Since read can only be carried out when FUN92 is executed (so-called sampling reading),
it might result in difference between the HHSC CV value in the chips and the CV value in the CPU, the deviation
will getting greater especially when the counting frequency is high.
10-3
z When the counting frequency is not high or the demand for positioning precision is not so much, using FUN92 in
the main program to read the current counting value and then incorporate comparator instruction is adequate for a
simple counting positioning control.
z When the demand for positioning precision is higher, or in the multi-zone count setting control, it may use the
FUN92 to read the current counting value while in the time base interrupt routine and incorporate compare
instruction to perform more precise counting positioning control.
z As the demand for positioning precision is extremely high, it must use the preset interrupt function of hardware
counter. The preset value can load by FUN93 into the PV register of HHSC in the chipset. When CV value of
HHSC reaches this preset value, the hardware comparator in the HHSC will send interrupt to CPU at the very
moment CV=PV, and jump to interrupt subroutine to do real time control or processing.
z SHSC, on the other hand, uses the interrupt method to request an interrupt signal to the CPU when the counting
input is on the rising edge. Then, the CPU will determine whether it should decrease or increase the internal CV
register (since the CV register itself in the CPU is a SHSC CV register, no FUN92 or FUN93 is required). Each
time when CV is updated, if the CPU find that it is equal to the PV register value, the CPU will jump immediately to
the corresponding SHSC interrupt service routine for processing. Whenever there has a change in SHSC counting
or control input can cause the CPU to be interrupted. The higher the counting frequency, the more of CPU time
will be occupied. The CPU responding time will be considerably increased or even Watchdog time-out will be
caused to force the controller to stop operating. Therefore, it is preferred to use HHSC first; if it needs to use
SHSC, the sum of all WSZ-controller SHSC input frequencies should not exceed 8KHz.
z None of the special relay controls, such as software MASK, CLEAR and direction control, is real time. This means
that although MASK, CLEAR or direction change has been set during routine scanning, the signal will only be
transmitted to HSC when I/O updating is under way after the completion of routine scanning. Hence, it is not
suitable for the real time control in HSC operation (which should be mainly used for initial setting before HSC
operation). Should real time control be required, please use hardware to control input or apply the FUN145(EN),
FUN146(DIS), FUN92(HSCTR), and FUN93(HSCTW) etc. instructions for control.
z Every HSC is equipped with the functions, ENable(FUN145) and DISable(FUN146), when SHSC is disabled, it will
stop counting and without the interrupt function ; when HHSC is disabled, the counting still works but the interrupt
function being disabled.
10.2.1
The Up/Down Pulse Input Mode of High-Speed Counter (MD0, MD1)
The up/down pulse input of high-speed counter has up counting pulse input (U) and down counting pulse input (D)
that are independent to each other without any phase relationship. Each of them will +1 (U) or 1 (D) on the CV value
when the rising edge of the pulse input occurs (both positive and negative edge for MD1). This also applies when the
rising (or falling) edge of the U and D pulse occur simultaneously (it will offset with each other). Both of the two modes
have the built-in software MASK and CLEAR (CLEAR is not available for SHSC) control functions, when the control
function are not in use should keep the status (such as M1940 and M1941) as 0. Apart from the built-in software
MASK and CLEAR, the controls of hardware MASK and CLEAR can also be configured. The MASK control is first
performed by the OR operation of the hardware and software control, then the result is send to the HSC MASK control M,
and so does CLEAR. Taking HSC0 as an example, the function schematic diagrams for MD0 and MD1 configured
separately are shown as below.
10-4
HSC0
HSC0
Up pulse X0
Down pulse X1
PV
CV
x1
Down pulse X1
EN(FUN145)/
DIS(FUN146)
EN/DIS
Hardware mask X2
Hardware clear X3
Hardware clear X3
M1940 M1941
HSC0I
Interrupt
x2
Hardware mask X2
Software mask
PV
CV
EN(FUN145)/
DIS(FUN146)
EN/DIS
Up pulse X0
HSC0I
Interrupt
Software mask
Software clear
M1940 M1941
Software clear
MD1U/D2(HHSC Only)
MD0U/D
The Waveforms of the HSC, which is configured as up/down pulse input mode, and PV value is preset to 6:
X0(U)
X1(D)
M1940 or X2 (M)
M1941 or X3 (C)
PV=6
CV (x1)
MD0
HSC0I
HSC0 sends interrupt to CPU CPU receives and handles this interrupt
CV (x2)
MD1
HSC0I
HSC0 sends interrupt to CPU
10-5
10
11
12
10.2.2
Pulse/Direction Input Mode of High-Speed Counter (MD2, MD3)
The pulse-direction input mode high-speed counter only has one counting pulse input P (pulse).
It requires
another direction input R (Direction) to decide whether the CV value should +1 (R=0) or 1 (R=1) when the rising edge
(both rising and falling edges for MD3) of counting pulse arrives. The same applies to counting of MD2 and MD3 except
that MD2 only counts on the rising edge (+1 or 1) and MD3 counts on both rising and falling edges of PS pulse (twice the
counts of MD2). These two modes have built-in software MASK, software CLEAR (SHSC does not have clear). When
control function is not in use, it must keep the status (such as M1946 and M1947 in this example) to be 0. Apart from the
built-in software MASK and CLEAR, the controls of hardware MASK and CLEAR can also be configured. The MASK
control is first performed by the OR operation of the hardware and software control, then the result is send to the HSC
MASK control M, and so does CLEAR. The function schematic diagrams of HSC1 configured individually for MD2 and
MD3 are shown as below.
HSC1
HSC1
Pulse input X4
Direction selecrion X5
CV
PV
HSC1I
Interrupt
x1
Software direction
M1948
selection
EN/DIS
EN(FUN145)/
DIS(FUN146)
Pulse input X4
Direction selection X5
Hardware mask X6
Hardware clear X7
Hardware clear X7
M1946 M1947
Software mask
Software clear
CV
PV
HSC1I
Interrupt
x2
Software direction
M1948
selection
Hardware mask X6
Software mask
EN/DIS
M1946 M1947
EN(FUN145)/
DIS(FUN146)
Software clear
MD3P/R2HHSC Only
MD2P/R
Direction selection of MD2 and MD3 HHSC, for HSC or SHSC, can be come from the external inputs (such as X5 in
this example) or the special relay in CPU (such as M1948 in this example) to reduce the usage of external input points.
10-6
The diagram below is the waveform diagram for the relationship between counting and control of the two HSC. In
this example the PV value is to 6.
X4(P)
X5(R)
X6(M)
X7(C)
PV=6
CV (x1)
MD2
HSC1I
CPU receives and handles this interrupt
10
11
12
CV (x2)
MD3
HSC1I
10.2.3
AB Phase Input Mode of High-Speed Counter (MD4,MD5,MD6,MD7)
The AB phase high-speed counter is equipped with phase A and phase B pulse input with counting value +1 or 1,
depending on the phase relationship between the two, i.e. the related counting of the two phases. If phase A is ahead of
phase B, the CV value should be +1, else, the CV value should be 1. The counting of the four modes, MD4 (A/B), MD5
(A/B2), MD6 (A/B3) and MD7 (A/B4), of AB phase HSC are similar. Their differences are:
c MD4 (A/B)
: The rising edge of A is +1 when A is ahead of B and the falling edge of A is 1 when A is behind B.
d MD5 (A/B2) : The rising and falling edges of A are +1 when A is ahead of B, and 1 when A is behind B (twice the
counts of MD4).
e MD6 (A/B3) : The rising and falling edges of A and rising edge of B are +1 when A is ahead of B. The rising and
falling edges of A and the falling edge of B are 1 when A is behind B (three times the counts of
MD4).
10-7
f MD7 (A/B4) : The rising and falling edges of A and B are +1 when A is ahead of B and the rising and falling edges
of A and B are 1 when A is behind B (four times the counts of MD4).
MD4MD7 HSC modes other than MD0MD3 also have built-in software MASK, software CLEAR (SHSC does
not have clear). When control function is not in use, it must keep the status (such as M1946 and M1947 in this example)
to be 0. Apart from the built-in software MASK and CLEAR, the controls of hardware MASK and CLEAR can also be
configured. The MASK control is first performed by the OR operation of the hardware and software control, then the result
is send to the HSC MASK control M, and so does CLEAR.
The function schematic diagrams of HSC2 for the four
MD4~MD7 HSC modes are shown as below.
HSC2
HSC2
A phase pulse X8
B phase pulse X9
CV
PV
A phase pulse X8
x1
HSC2I
Interrupt
EN(FUN145)/
DIS(FUN146)
B
EN/DIS
B phase pulse X9
Hardware mask X0
Hardeare clear X11
B phase pulse X9
CV
PV
A phase pulse X8
HSC2I
Interrupt
B
EN/DIS
B phase pulse X9
CV
Hardware clear
PV
HSC2I
Interrupt
x4
B
EN/DIS
Hardware mask X10
Hardeare clear X11
Hardeare clear X11
M1976 M1977
EN(FUN145)/
DIS(FUN146)
Hardware mask X10
Software mask
M1976 M1977
HSC2
x3
EN(FUN145)/
DIS(FUN146)
MD5A/B2(HHSC Only)
HSC2
A
HSC2I
Interrupt
x2
Software mask
Hardware clear
MD4A/B
A phase pulse X8
PV
EN/DIS
Hardware mask X0
M1976 M1977
CV
Hardeare clear X11
Software mask
Software mask
Hardware clear
MD6A/B3(HHSC Only)
M1976 M1977
Hardware clear
MD7A/B4(HHSC Only)
10-8
EN(FUN145)/
DIS(FUN146)
The diagram below is the waveform diagram for the relationship between counting and control of the four HSC modes in
this example when the PV value is set as at -4.
Retraced point
p
s t u
v
qr
w
y
j k l m n
Rotary encoder
e f
g
Up counting
(A phase ahead B phase)
Down counting
(B phase ahead A phase)
X8(A)
X9(B)
X10(M)
X11(C)
CV(x1)
MD4
r
3
g
0
0
-1
PV=-4
-2
-3
-4
-5
HSC2I
CV(x2)

6
0
-1
-2
PV=-4
-3
MD5
HSC2I
-5
-6
-7
-8
-9
-10
15
12
9
6
MD7:CV(x4)
-4
12
9
MD6:CV(x3)
-1
12
-2
-3
-6
9
6
-9
-12
-15
0
-1
-3
-6
-9
-12
-20
10-9
10.3 Procedure for WSZ-Controller High-Speed Counter Application
Start
z Configure HSC counting mode and

1.Please refer to Section 10.2 for respective HSC counting modes and
principles.
respective input
-----------2.Please refer to Section 10.4 for setting examples.
(by WinProladder)
z Complete hardware wiring

according to the previous input
assignment
------------
1.Please refer to Digital Input Circuit in Chapter 6 Hardware Manual

for hardware wiring.
z Set HSC initial CV value and

interrupt PV value in the main
program
------------
1.If the HSC is HHSC, it is necessary to apply FUN93 to load it into the
HHSC CV and PV in the SoC chip.
2.Please refer to Section 10.5 for program examples.
z Write necessary handling

procedures to be taken during
interrupt and condition for next
interrupt in sub program area
1.Please refer to Section 9.1 for subroutine structure.

------------ 2.Please refer to Section 10.5 Actual Examples for program
examples.
z Start the operation
------------.Please refer to Section 10.5 for program examples and description.
End
10.4 HSC/HST Configuration

Project name
I/O Configuration
Select
Timer/Counter
When Timer/Counter window appear then you can choose the Timer or Counter which you want.
10-10
---Timer/Counter Configuration-- Counter Type : It can select Hardware Counter or Hardware Timer.
Counting Mode : It can select the Counting Mode( Example: U/DP/RA/B)
A-Phase : Select the up pulse input signal. If the Mode is P/R Counting Mode ,and this item will be PLS; If the
Mode is U/D Counting Mode ,and this item will be UP.

B-Phase : Select the down pulse input signal. If the Mode is P/R Counting Mode ,and this item will be DIR; If the
Mode is U/D Counting Mode ,and this item will be DN.

Mask[MSK] : It can select Mask input.
Clear[CLR] : It can select Clear input.
---HSC Polarityarea -- Mask signal : Determining Mask signal is positive or negative.

Clear signal : Determining Clear signal is positive or negative.
Counter signal : Determining Counter signal is positive or negative.
---HSCs Data Lengtharea --It can choose 32-bit Hardware Counter mode or 16-bit Timer + 16-bit Counter mode. 32-bit Hardware Counter mode
means using two register to record the Counting value. The 16-bit Timer + 16-bit Counter mode means using one register
to record Counting value and the other register will be cyclic Timer.
1 0 - 11
All preset or selectable input point numbers, software MASK, software CLEAR, direction selection and other related
numbers of HHSC and SHSC are summarized in the table below:
MC
Type
HHSC
Signal
Allowed
HSC0
HSC1
SHSC
HSC2
HSC3
HSC4
HSC5
HSC6
HSC7
CV Register
DR4096 DR4100 DR4104 DR4108
DR4112
DR4116
DR4120
DR4124
PV Register
DR4098 DR4102 DR4106 DR4110
DR4114
DR4118
DR4122
DR4126
U,P or
A
X0
X1/X4
D,R o r
B
X1
X5
X9
X13
X0X15* X0X15* X0X15* X0X15*
Mask
X2
X6
X10
X14
X0X15 X0X15 X0X15 X0X15
Clear
X3
X7
X11
X15
X0X15 X0X15 X0X15 X0X15
Software MASK
Relay
M1940
M1946
M1976
M1979
Software CLEAR
Relay
M1941
M1947
M1977
M1980
Software Direction
Selection(MD2,3
Only)
M1942
M1948
M1978
M1981
M1983
M1985
M1987
M1989
Interrupt Subroutine
Label
HSC0I
HSC1I
HSC2I
HSC3I
HSC4I
HSC5I
HSC6I
HSC7I
Counting
Input
Control
Input
X4/X5/X8 X5/X12
X0X15 X0X15 X0X15 X0X15
M1982
M1984
M1986
M1988
Clear the Current Value
* When SHSC works in MD2(P/R), direction chose by special relay M1983, M1985, M1987 and M1989.
z
When working in A-B Mode(HHSC as MD4MD7SHSC as MD4), whose A/B input must be used in pair, as X8 and
X9.(even number is A-Phase and odd number is B-Phase)
The input point of X0~X15 in the table above can only be assigned once (i.e. used as one function), which cant
repeat to be used.
WSZ-MCT2-ACs frequency can reach up to 200 KHz. ( single phase and AB phase)
The total input frequencies of SHSC cant be exceed 5 KHz; the higher the frequency, the more it occupy the system
(CPU) time, and the scanning duration will be extended abruptly.
10-12
10.5 Examples for Application of High-Speed Counter

Example 1
This example uses high-speed counter for equal-length cutting control.
Mechanism
HSC configuration
(Just set HSC0 to MD7 and complete the configuration)
10-13
Control program
Main Program
Use FUN 93 to write the contents of the current value
register into the CV register of HSC0 in the SoC chip
CN =0 indicates HSC0
D =0 indicates CV
93DP.HSCTW
X4
EN
S :
CN:
HSC0
D :
CV
Use FUN 92 to read the counting value of the HSC0 CV

register in the SoC chip (store into DR4096)
92
EN HSCTR HSC0
93DP.HSCTW
X4
EN
X4
S :
R0
CN:
HSC0
D :
PV
Store the counting of cutting length DR0 into DR4098 and

use FUN93 to store the value into the PV register of HSC0
in the SoC chip
CN =0 indicates HSC0
D =1 indicates PV
Y0
X2
Start the motor
Y0
Y1
.01S
T0
10
EN RST
Y1
EN
T0
TUP
Turn the cutter Y1 ON for 0.1 second
Subroutine
65
LBL
HSC0I
Y1
7 4 .IM D I0
EN
D :
Y1
N :
Sa :
U /S
automatically execute the interrupt subroutine labeled HSC0I

When counting is up, turn Y1 ON (to cut materials)
Output Y1 immediately to reduce the error caused by scan
1 1 D .(+ )
EN
When HSC0 CV=PV in the SoC chip, the hardware will
R 4098
Sb :
R0
D :
R 4098
D=0
CY
time
Calculate new cutting position and load HSC0 PV
BR
9 3 D .H S C T W
EN
S :
R 4098
CN:
HSC0
D :
PV
69
RTI
Description
1. The main program will initialize the HSC0 CV (CV=0) in advance and move the cropping length (DR0) to the HSC0 PV
before starts Y0 to turn on the motor for material conveying.
2. When CV reaches PV, the length of R0 is added to the PV before being reloaded into HSC0 PV.
3. When all materials are rolled out, the material shortage detector X2 will be ON and stop the motor.
10-14
Example 2
Example of high speed counting up action processed by Interrupt
Main Program
93DP.HSCTW
M100
EN
S :
CN:
HSC0
D :
CV
92
EN HSCTR HSC0
M100
M101
P
SET
EN
Y0
93DP.HSCTW
EN
S :
R0
CN:
HSC0
D :
PV
Employ FUN93 to write the content of current value register into the
CV of HSC0 in SoC chip (reset)
CN =0, represents HSC0
D
=0, represents CV
Employ FUN92 to read out the current counting value of HSC0
in SoC chip, and store it into the CV register (DR4096)
CN=0, represents HSC0
As M101 change from 01, start Y0 ON (begin to operate)
Employ FUN93 to write the content of preset register into HSC0 PV
in SoC chip, which serves as setting value of counting up interrupt

CN=0, represents HSC0
D =1, represents PV
Subroutine
65
LBL
Hardware high speed counter #0 interrupt label
HSC0I
Y0
When time up, it sets Y0 OFF (stop)
D :
Y0
N :
Let Y0 out immediately, so as to stop promptly

(otherwise Y0 will have a scan time output delay)
EN RST
74.IMDI0
EN
69
RTI
10-15
Example 3
Example of Immediate response of multi-zone high speed counting up by Interrupt Processing
Main program
X3
M 101
Employ FUN92 to read out the current value of HSC1 in SoC

chip, and store it into current value register DR4100
92
EN H SCTR HSC1
EN
P
RST
R 100
As M101 change from 01, clears the pointer register to 0
EN
P
RST
M 110
Clears the flag of the last zone to be OFF
93DP.HSCTW
EN
S :
R200
C N:
HSC1
D :
PV
Employ FUN93 to write preset register content into HSC1

PV in SoC chip, which serve as counting up setting value.
D
=1, represents PV
114P.Z-W R
EN
D :
Y8
1/0
N :
EN
P
SET
Y8
74P.IM DI0
EN
D :
Y8
N :
ERR
Clear Y8Y15 to be OFF
Set Y8 ON, it represents that it is at the zone 0 currently

Set Y8Y15 output t immediately
10-16
Subroutine
65
LBL
Label name for the X3 rising edge interrupt service

subroutine of X3+1
(it must assign X3 to be the rising edge interrupt input)
X3+I
93D.HSCTW
EN
S :
CN:
HSC1
D :
CV
When X3 changes from 01,employ FUN93 to write the

current register content to the HSC1 CV in SoC chip (reset).
CN = 1, represents HSC1
D = 1, represents CV
69
RTI
65
LBL
M110
M110
Labeled as HSC1I hardware high speed counter interrupt

service subroutine.
HSC1I
EN RST
Y15
66
EN JMP
110
Turn Y15 OFF when the last zone finished.
41.BITWR
EN
D :
WY8
INB
N :
R100
EN
15
(+1)
R100
ERR
Make the previous zone output OFF
OVF
Set the pointer point to the next zone
ERR
Set the output of next zone to be ON
41.BITWR
EN
D :
WY8
INB
N :
R100
101D.T
Ts :
L :
INC
Pr :
CLR Rd :
EN
R200
8
R100
R4102
93D.HSCTW
EN
65
LBL
S :
R4102
CN:
HSC1
D :
PV
ERR
Move the counting value of next zone (beginning from

DR200 pointer pointed register) to the preset register
DR4102
When its the last zone, the M110 is ON
Employ the FUN93 to write the preset value into the HSC1
PV in the SoC chip, which serves as counting up interrupt
setting point.
D
=1, represents PV
110
74.IMDI0
EN
M110
END
D :
Y8
N :
Y8Y15 output transmitting immediately
69
RTI
10-17
10.6 WSZ-Controller High-Speed Timer

The minimum timing unit (time base) of an ordinary controller can only reach 1ms, on which the deviation in scan
time should also be added. Therefore, it is necessary to apply high-speed timer (HST) if a more precise timing (e.g. using
timer to cooperate with HSC for frequency measurement) is required.
WSZ-controller is built in a high-speed timer (HSTA) with a time base of 16-bit/0.1ms and, as described previously,
four 32-bit high-speed counters (HSC0~HSC3) of HHSC that can work as the high speed timer (HST0~HST3) with a time
base of 32-bit/0.1ms for using. Thus, WSZ-controller can have up to five high-speed timers. As HSC and INT, all HST can
be enabled or disabled (default as enable) by the instructions EN (FUN145) and DIS (FUN146). HSTA and HST0~HST3
are respectively described as below.
The finest time base for most of the ordinary controller is 10ms. Though some controller may have HST with a time
base of 1ms. When deviations in the controller scan time is taken into consideration (e.g. if the scan time is 10ms when
the time base is 1ms, the total deviation still exceeds 10ms), the figure of 1ms becomes meaningless. Therefore, these
controllers cant be applied in high precision timing. WSZ-controller, having a time base of 0.1ms, has no deviation in
scan time for its time up is sent out by interrupt to provide a precision 100 times better than ordinary controllers timer
application and can be used for many applications demanding precision timing.
10.6.1
HSTA High-Speed Timer
HSTA is a 16-bit hardware timer built in the SoC chip. As HHSC, it must use the instruction FUN93 (HSCTW) to
load the PV to the HSTA PV in the chip, and with the instruction FUN92 (HSCTR) to read for CV. HSTA can be used as
a timer having two different functions. WSZ-controller will use it as a general 16-bit delay timer when PV 2 and as a
32-bit cyclic timer when PV=0.
10-18
A. HSTA 16-bit High-Speed Delay Timer
(Timely interrupt timer)
After HSTA starts timing, the delay timer will delay for a time of PVx0.1ms before sending an interrupt out. When
PV>0, HSTA served as a delay timer which is 16-bit and its PV value can be set as 0002H~FFFFH. i.e. the delay time
can be set as 0.2ms~6.5535 sec. Except that having a more precise time base and being able to send an interrupt out
immediately at time-up to provide a much higher timing precision, the applications of HSTA are the same as an ordinary
delay timer. The diagram below is the structure diagram for HSTA being used as a delay timer. Please refer to Section
10.6.3 Program Examples for detailed function and application.
CV Register
R4152
PV Register
(HSTA)
R4154
FUN92
(HSCTR)
FUN93
(HSCTW)
(SoC Chip)
16 bit
16 bits
16 bit
16 bits
CV
0.1mS time base

0.1ms
time base
Comparator
UP
z Apply FUN93 to write the

PV into preset register of
HSTA high speed timer in
SoC chip, which serves as
timely interrupt timer (for
every set point of timer it
perform once the timely
interrupt subroutine with
label name of HSTAI).
PV
EN/DIS
EN/DIS
EN(FUN145)/
DIS(FUN146)
PV=CV
Interrupt label
HSTAI
EN(FUN145)
DIS(FUN146)
Timing/Non-timing
PV 2
PV
CV
(R4152)
HSTAI
Td=0.1mS x PV
Td1
10-19
Non-timing
Td2
Td=Td1 + Td2
B. HSTA 32-bit High-Speed Cyclic Timer

The so-called Cyclic Timer is a timer that add 1 to its current value for every fixed interval and will persistently
carry out up counting cyclic timing. Its CV value will cycle around as 0, 1, 2, 2147483647, 2147483648,
2147483649, 4294967295, 0, 1, 2, (as the time base is 0.1ms, CV value x 0.1ms will be its accumulative time). In
fact, the cyclic timer is an up counting cyclic timing clock having a time base of 0.1ms that can operate endlessly and be
used to read any two events at the time when they occurred and to calculate the time interval between the occurrence of
the said two events. The Diagram B as shown below is the structure diagram for HSTA being used as a 32-bit cyclic timer.
As shown in diagram, when cyclic timer PV=0, it will not send out the interrupt. To obtain the timing value, it is necessary
to use FUN92 to access the CV value from the SoC chip and save it to the 32-bit CV register (DR4152) in the PLC. The
typical application of the cyclic timer is for more precision of turning speed (RPM) detection under the circumstances when
the change in turning speed (RPM) is huge or when it is extremely low.
Please refer to Example of Section 10.6.3 for
description.
z Employ FUN92 to read out the CV

of HSTA high speed counter in SoC
DR4152
chip and store it into CV register
(DR4152) so as to let the user know
FUN92
the value for time lapsed.
(HSCTR)
(HSTA)
R4154
FUN93
(HSCTW)
(SoC Chip)
16 bit
16 bit
16 bits
UP
z Employ FUN93 to write the PV=0 to

HSTA high speed timer set point
register to make it serve as 32-bit
cyclic timer.
16 bits
CV
PV
0.1mS Time base
0.1ms time base
EN(FUN145)/
DIS(FUN146)
EN/DIS
4294967295
2147483647 2147483648 2147483649
0.1mS
0.1ms
10-20
4294967295
10.6.2
HST0HST3 High-Speed Delay Timer
A. HST0~HST3 High-Speed Delay Timer
(Timely interrupt timer)
HHSC (HSC0~HSC3) can be configured as four 32-bit high-speed delay timers, HST0~HST3. They have the
same functions and time base as a 16-bit HSTA delay timer except that HST0~HST3 are 32-bit to plan HHSC as HST
only needs to select Hardware Timer in the Timer/Counter under WinProladder Configuration. Please refer to the
example (to configure HSC1 as HST1) in Section 10.4 HSC/HST Configuration. The diagram below is the function
structure diagram for HHSC being planned as a HST. Its applications are the same as that of a 16-bit HSTA. Please refer
to Section 10.6.4 Program Examples.
z Employ FUN92 to read out the current

timing value in SoC chip and store it into
the CV register of CPU. So as to let
user know the current timing value.
CV Register
(CPU Internal Memory)
DR4096
z It may also employ FUN93 to write the
DR4100
CV into the SoC chip so as to reset the
timing value.
DR4104
DR4108
FUN92
(HSCTR)
(HST0)
(HST1)
(HST2)
(HST3)
z Apply FUN93 to write

the PV into the SoC
PV Register
chip which is served as
(CPU Internal Memory) set point for timing up
interrupt.
DR4098
DR4102
DR4106
DR4110
FUN93
(HSCTW)
FUN93
(HSCTW)
(SoC Chip)
Comparator
UP
CV
0.1mStime
time
base
0.1ms
base
(HST0)
PV
(HST3)
EN/DIS
EN/DIS
EN(FUN145)/
DIS(FUN146)
TO CPU
Interrupt
Interrupt label
Interrupt
label
(HST0)
(HST1)
(HST2)
(HST3)
HST0I
HST1I
HST2I
HST3I
B. HST0~HST3 32-bit Cyclic Timer

According to demand, configured the HHSC(HSC0~HSC3) to be the 32-bit timers of HST0~HST3. For interval of
every 0.1ms, the current timing value register in SoC chip will be increased by 1. User may use FUN92 instruction to read
out the current timing value and store it into the CV registers (DR4096, DR4100, DR4104, and DR4108) of CPU.
Therefore the content of CV register of CPU become 0, 1, 2, , 7FFFFFFFH, 80000000H, ., FFFFFFFFH, 0,
1, etc. variation of values for 32-bit. With the timing calculation technique to count the interval between two events, it
can obtain infinite number of 0.1ms 32-bit timers.
10-21
10.6.3
Examples for Application of High-Speed Timer HSTA
Example 1
M1
HSTA Serve as 32-bit Cyclic Timer
93DP.HSCTW
EN S :
CN:
D :
M1
0
HSTA
Employ FUN93 to write the preset value into the HSTA PV in the SoC
chip
CN =4, represents HSTA
D =1, represents PV
PV
92
EN HSCTR HSTA
Employ FUN 92 to read out the current timing value of HSTA in SoC
chip and store it to DR4152
(DR4152 value change from 0,1,2, ,FFFFFFFF,0,1,2, cyclic
variation, the unit is 0.1mS)
Example 2 Application Example for Cyclic Timer

This example uses HSTA as a cyclic timer, cooperating with HSC0, to read the time interval for accumulation of 10
pulses and sending an interrupt out each time as 10 pulses are accumulated and, reciprocally, find out the required RPM
(the number of pulses is fixed when the time varies).
Mechanism
Controller
PLC
Motor
X0
HSC0
INT
FUN92
Light chopper
(Y0 motor driving)
(X1 starting switch) (1 pulse/revolution)
HSTA
HSC and HST Configuration
c As HSTA is built in, no configuration is required. Simply make PV =0 to make it as a 32-bit cyclic timer.
d To cooperate with the photo interrupter, set the HSC0 as an up counting counter having single input
(MD0, but use only U input).
All other settings (polarity of counting and control inputs) are preset (non-inverse) and should not be changed.
10-22
Main Program
M1924
Employ FUN93 to write current value 0 into the CV of HSC0 in

SoC chip (reset)
D
=0, represents CV
93D.HSCTW
EN
S :
CN:
HSC0
D :
CV
93D.HSCTW
EN
S :
10
CN:
HSC0
D :
PV
Write 10 into the preset register in SoC chip, which acts as

interrupt value for counting up;
FUN93 CN=0 indicates HSC0 and D=1 indicates PV
93D.HSCTW
EN
S :
CN:
HSTA
D :
PV
Write 0 into the preset register, and HSTA is configured as a

32-bit high-speed cyclic timer
FUN93 CN=4 indicates HSTA and D=1 indicates PV
92
EN HSCTR HSTA
M1924
08D.MOV
EN
S :
R4152
D :
R2
The initial value of HSTA CV register is stored to DR2
Y0
X1
M1
Read the current timing value
EN
66
JMP
12D.(-)
EN
U/S
Sa :
R2
Sb :
R4
D :
R6
D=0
CY
BR
14D.( )
EN
U/S
Sa : 6000000
Sb :
R6
D :
R100
D=0
currentCV - previousCV
10000S
6000000
r/min
Therefore rotating speed =
RPM
CV
N=10, T = CV 0.1mS =
R100=r/min
ERR
M1
65
LBL
Find interval for each HSC0 interrupt

N
RPM
Rotating speed = T 60 r/min
Clear the calculation flag of r/min
10-23
Subroutine
65
LBL
Each time when HSC0 accumulates 10 pulses, the

hardware will automatically run this interrupt subroutine
H SC 0I
92
EN H SC TR H STA
Read the HSTA CV
08D .M O V
EN
S :
R2
D :
R4
08D .M O V
EN
S :
R 4152
D :
R2
93D .H SCTW
EN
Reset the current value to 0
S :
CN:
H SC 0
D :
CV
M1
M1=ON, RPM calculating flag
69
R TI
X0
HSC0
CV value 8
10
10 1
10
10
10
HSC0I
PV value
10
10
CV value of HSTA
V value of HSTA
(0.1ms time base)
1ms time basc)
T =
10000
(1s)
15000
(1.5s)
10
10
200000
(20s)
DT = 0.5s
800000
(80s)
DT = 60s
N
r/min
x60 RPM=
T
=1200RPM
r/min
r/min
RPM=
10-24
r/min
RPM=
r/min
=10RPM
r/min
x60 RPM=
Example 3 HSTA Serve as Timely Interrupt Timer Program
Main Program
Set up the period of timely interrupt time. PV=5 represents
that it performs the interrupt service subroutine with the
label name of HSTAI every 0.5ms.
93DP.HSCTW
M0
EN
S :
CN:
HSTA
D :
PV
Employ FUN93 to write the preset value into HSTA PV in

SoC chip, which serve as time up for interrupt preset value.
D =1, represents PV
Subroutine
Interrupt service subroutine with the label name of HSTA.
65
LBL
HSTAI
92
EN HSCTR HSC0
Read the current value of hardware high speed counter HSC0

once every 0.5ms.
17D.CMP
EN
Sa :
R4096
Sb :
R0
To tell whether the current counting value is greater than or

equal to R0. if yes, then Y0 will be ON.
a=b
a>b
U/S
Y0
a<b
74.IMDI0
EN
D :
Y0
N :
Update output Y0 immediately, so as to reach the high speed

output reaction (otherwise there will be introduced a delay in
scan time).
69
RTI
10-25
10.6.4
Examples for Application of High-Speed Timer HST0~HST3
HSC and HST Configuration(Using WinProladder)

Project name
I/O Configuration
Select
Timer/Counter
When Timer/Counter windows appear, then you can choose the Hardware Timer in Counter Type item, then HHSC
(Hardware High Speed Counter) can configure to be HHT.(Hardware High speed Timer)
User dont have to configure the HSTA, because the HSTA is default. Only you want HHSC(Hardware High Speed
Counter) to be HHT(Hardware High speed Timer), and you have to configure it.
Example1 Application Example for Delay Timer

This example configures HSC0 as a HST0 delay timer. At the same time, by connecting the high-speed counter
HSC1 with a rotary motor of an automatic wood drilling machine and sending out an interrupt at a fixed period. Each time
interrupt occur will read the counting value of the counter. Then, by comparing the change in speed between the number
of the motors rotation when no loading is applied (operating without drilling) and that when the drill head is pressing down
(drilling), the change of the motors RPM can be calculated. It is understood that resistance will be less and motors RPM
will be faster when the drill head is normal (sharp) than when the drill head is blunt. When the drill head is broken, it works
like operating without drilling that no resistance exists and RPM is the fastest. Usually the difference in rotating speed
among the three conditions is not significant and which cannot be sampled and detected by an ordinary timer having a
10-26
more than tens of ms of deviation. However, applied with an HST having a time base of 0.1ms that incorporating
interrupt, the drill heads status (normal, blunt or broken) can be detected and, thus, warning can be given or operation
can be stopped in due time for drill head replacement.The time is fixed and the number of pulses varies
Mechanism
Controller
PLC
Motor
X4
HSC1
FUN92
(Y0 motor driving)

Light chopper
(X1 starting switch) (8 pulses/revolution)
HST0
INT
Main Program
M 1924
9 3 D .H S C T W
EN
S :
CN:
HSC1
D :
CV
Employ FUN93 to reset current value register in SoC chip.

FUN93 CN=1 indicates HSC1 and D=0 indicates CV.
9 3 D .H S C T W
EN
HST0 PV value is set as 50, i.e. one interrupt every 5ms

(500.1ms).
50
S :
CN:
HST0
D :
PV
9 3 D .H S C T W
EN
S :
CN:
HST0
D :
CV
Y0
X1
EN
T0
The initial value of HST0 CV register is 0.
.0 1 S
T0
500
TUP
Use FUN112 to compare the drill heads RPM speed after

starting the motor for 5 seconds.
R0: The number of HSC1 pulses obtained in every 5ms.
1 1 2 .B K C M P
EN
Rs :
R0
Ts :
R 100
D :
ERR
3
Y8
10-27
Subroutine
65
LBL
EN
The hardware will execute this subroutine once every 5ms.
HST0I
92
HSCTR
Read the current counting value of HSC1 and put it into

DR4100.
HSC1
1 2 D .(-)
EN
U /S
Sa :
R 4100
Sb :
R2
R0
D=0
CY
Find out the increment of HSC1 CV value in this 5ms interval

and store the value into DR0.
BR
0 8 D .M O V
EN
R 4100
S :
D
R2
1 1 D .(+ )
EN
U /S
Sa :
R 4098
Sb :
50
R 4098
D=0
Calculate the new HST0 PV
CY
BR
9 3 D .H S C T W
EN
S :
R 4098
CN:
HST0
PV
69
RTI
Description
Supposed that the drill heads normal RPM is 18000r/min and the photo interrupter will generate 8 pulses in one
revolution, then the frequency of the pin U of HSC1 is 18000/608=2400Hz, i.e. 12 pulses will be generated for
every 5ms. Therefore, HST0 can be used to send an interrupt and read the HSC1 CV value every 5ms to get
the RPM value.
10-28
X4
HSC1
CV value
11
12
HST0
HSC0
CV
CV value
13
23
25
35
100
50
HST0
PV value
24
37
46
47
48
200
150
150
100
50
36
200
HST0I
(0.1mS time base)

(0.1ms time base)
DT==5mS
5ms
DT
(50 x 0.1mS)
(50x0.1ms)
DT
ms
DT ==55mS
(50 x 0.1mS)
(50x0.1ms)
DT
ms
DT ==55mS
(50
x
0.1mS)
(50x0.1ms)
CV=12
(24 - 12)
CV=12
(36 - 24)
CV=12
(47 - 36)
HSC1
increased value
Upper Limit
Lower Limit
R101
R100
R103
R102
R105
R104
Y8
R0
(CV)
Y9
Setting different upper and lower
limits to category the RPM condition
Y10
Example2 Hardware High Speed Timer HST3 Serve as 32-bit Cyclic Timer
M 300
M 300
93DP.HSCTW
EN
S :
CN:
HST3
D :
CV
92
EN HSCTR HST3
As M300 change from 01,

clear the current value register to 0
Employ FUN 93 to write current value 0 into the HST3 CV
(reset) in SoC chip
CN =3, represents HST3
D =0, represents CV
Employ FUN92 to read out the current timing value of HST3
in SoC chip and store it into the current value register
DR4108
(DR4108 value cyclically changes from 0, 1, 2, ,
FFFFFFFF, 0, 1, 2, the unit is 0.1ms)
CN =3, represents HST3
10-29
Example3 Hardware High Speed Timer HST3 Serve as Periodic Interrupt Timer
Main Program
146P
EN
DIS
M1924
Turn on or M301 is ON, it prohibits the HST3 from sending

periodic interrupt.
HST3I
M301
As M300 change from 01, clear the current register to 0.
93DP.HSCTW
M300
EN
S :
CN:
HST3
D :
CV
Employ FUN93 to write current value 0 into the HST3 CV (reset)

in SoC chip.
CN =3, represents HST3; D=0, represents CV.
Set up periodic interrupt interval; PV=5 represent every 0.5ms
perform once the interrupt service subroutine with label name of
HST3I.
Employ FUN93 to write the preset value into the HST3 PV in SoC
chip, which serve as time up interrupt preset value.
CN=3 represents HST3; D=1 represents PV.
93DP.HSCTW
EN
EN
S :
CN:
HST3
D :
PV
145P
EN
HST3I
Enable the HST3 interrupt.
Subroutine
65
LBL
Hardware high speed Interrupt service subroutine with the label

name of HST3I.
HST3I
92
EN HSCTR HSC0
Read the current value of hardware high speed counter HSC0

once every 0.5ms.
1 1 2 .B K C M P
EN
Rs :
R 4096
Ts :
R 1000
D :
Y8
7 4 .IM D I0
EN
D :
Y8
N :
ERR
To tell which zone of the electronic drum does the current

counting value fall, and set the corresponding output point to
be ON.
Update output Y8Y15 immediately.
9 3 D .H S C T W
EN
S :
CN:
HST3
D :
CV
Employ FUN93 to reset current value register into the HST3

CV in SoC chip (reset).
CN=3 represents HST3; D=0, represents CV.
69
RTI
10-30
Chapter 11 Communication of WSZ-Controller

The WSZ-controller main unit has been built in the communication port 0 with RS232 interface. If additional
communication boards (CB) have been purchased, then it can increase to 2 communication interfaces. There are two
types of communication interfaces, RS232 and RS485, to choose from in CB. Among them, Port 0 is a permanent
interface for RS232 communications interface, which is controlled by the CPU of the controller. This includes starting
character, station no., command code, body, error check code, ending characters, etc. WinProladder and numerous HMI
and SCADA softwares are equipped with communication drivers complying with this original communication protocol,
therefore where the parameters on hardware interface and communications are consistent, communication connection
can be established by just connecting the communication Port with the Standard Interface. If the communication driver
with complying communication protocol is not available, the commonly used industrial Modbus RTU protocol can also be
used to establish a connection with WSZ-controller. The factory setting and the controller system initialization on Port 1 ~
Port 2 default to Modbus communication interface; though in order to meet the extensive application and requirements of
communication connection, Port 1 ~ Port 2 provides original communication interface, as well as providing easy
communication commands that support powerful functions to allow users to compile their required communication
application software through the Ladder diagram program, and easily achieve the aim of system integration and
distributed monitoring. Further detail will be explained in subsequent chapters.
11.1 Functions and Applications of WSZ-Controller Communication Ports

Besides the hardware interface distinction of RS232,RS485 among the 3 COM ports of WSZ-controller, there are also
3 software interface types in terms of software interfaces. The table below shows the software interface types that can be
configured on the 3 COM ports of WSZ-controller:
Available types
Communication Port
Port0
Software Interface
Standard Interface
Port1
Dedicated Modem
interface
Ladder diagram program

controlled interface
Interface type
configuration method
Notes
Port2
Port controlled by CPU using Modbus

RTU communication driver or original
standard communication driver. But
Port0 does not support Modbus RTU
communication protocol.
Port controlled by CPU using the
Modem driver and Modbus RTU
communication driver, or original
standard communication driver.
Port controlled by users (Ladder
diagram program )
Controller
Original communication protocol
Auto
configure configure
Register
Standard Interface : Port0 ~ Port2 can all be configured into this type of interface (Port0 can only be this type of interface
and only provides original communication driver). Under this interface type, the Port is controlled by
the standard communication driver of WSZ-controller (using original communication protocol or
Modbus RTU communication protocol), hence called standard interface. To communication with
the Standard Interface, the connection can only be established by complying with original
communication protocol or Modbus RTU communication protocol.
* Port0 doesnt support Modbus RTU communication protocol.
11 - 1
Dedicated Modem Interface : Only Port1 can select this interface type. Under this interface type, Port1 is controlled by
the built-in MODEM driver of WSZ-controller, in charge of telephone reception or dialing
tasks, and then hand the connection over to original communication driver after the
connection is established, subsequent operation is the same as the Standard interface
above.
Ladder diagram Program controlled interface : Port1 ~ Port2 can all select this interface type. Under this interface type,
the Port will be controlled by the users Ladder diagram program
instructions, such as FUN94, FUN150, FUN151, etc., hence users can
gain control of the Port through the Ladder program.
The following sections will detail the functions and applications of the 3 Ports on WSZ-controller under each of the 3
different software interfaces.
Port0 ~ Port2 communication parameter are default to :
Baud Rate: 9600 bps

Data Length: 7 Bits
Parity: Even
Stop Bit: 1 Bit
11.1.1
Communication Port 0 : RS232 Interface
Functional Specification
RS232 interface functional specification complies with the EIA RS232 standard, with 5 types of communication
speeds 9600, 19200, 38400, 57600 and 115200 configurable.
Basic Usage
The main purpose of Port0 is to provide a communication interface for program editing, so generally speaking it
would be in passive receiving mode.
Extended Usage
cBesides program editing, it can also connect to HMI, SCADA equipped with original communication driver.
dThrough
conversion of interface signal into RS485 signal, connections can be made with RS485 interface
peripherals, such as computers, WinProladder, HMI, SCADA, etc. or become a Slave of the WSZ CPU Link
network.
11.1.2
Communication Port 12 : RS232 or RS-485 Interface
Functional Specification
RS232 interface functional specification complies with the EIA RS232C standard, communication parameters are
adjustable up to highest communication rate of 921.6Kbps. Factory setting and system initialization communication
parameter is configured to the default communication parameter.
RS485 interface functional specification complies with EIA RS485 standard.
11 - 2
Basic Usage
There are 3 types of software interface are selectable as follows :
cStandard interface :
Connectable to peripherals with RS232 or RS485 interface, such as computer, WinProladder, HMI, SCADA, etc.
dPort1 dedicated modem interface :

It can actively or passively connect to remote computers or conduct auto information gathering, warning, anomaly
reporting or dial B.B. call for remote servicing via MODEM.
eLadder diagram Program controlled interface :

User can control Port1~Port2 through the ladder diagram instructions, such as FUN94 (ASCWR) command to take
control of Port1 and connect to printers with RS232 hardware interface for Chinese/English report printing; FUN151
(CLINK) command takes control of Port1~Port2 to establish connection with WSZ CPU Link or peripherals with
RS232 or RS485 interfaces; FUN150 (MBUS) command can turn Port1~Port2 into a master of Modbus RTU
communication protocol for connecting Slaves with this communication protocol.
fPort2 can provide WSZ high speed CPU Link function.

Extended Usage
Under Standard interface, act as the Slave for multi-drop WSZ RS485 or point to point RS232 CPU LINK network.
Under Ladder diagram program controlled interface types, Port1~Port2 has the following functions:
cUse MD0 mode of FUN151 (CLINK) instruction to act as the master for WSZ CPU Link network.
dUse MD1 mode of FUN151 (CLINK) instruction to actively connect to intelligent peripherals equipped with this
communication interface, such as other brands controller, servo driver, temperature controller, inverter, message
display, etc.
eUse MD2 mode of FUN151 (CLINK) instruction for connection to receive the intelligent peripherals equipped with
this communication interface, such as card readers, bar code readers, weighing scales, etc.
fPort2 can utilize MD3 mode of FUN151 (CLINK) instruction to act as the master for WSZ high speed CPU Link
network.
gUse
FUN150 (MBus) instruction to act as the Master for Modbus RTU communication protocol to connect to
peripherals with this communication protocol.
11.2 How to Use WSZ-Controller Communication Functions

Among Port0~Port2, only Port 2 provides real-time response function (real-time: data is processed immediately
when received or sent without being affected by scan time.) and communicates with binary code (two times ASCII code).
Other ports use ASCII code for communication in the standard mode and data will not be processed until the scan is
complete and housekeeping is active. Thus, there will have the service delay because of the scan time. Port2 should be
provided for each controller to share data with each other via WSZ high-speed CPU Link (i.e., the MD3 mode of FUN151
(CLINK) ) to meet the real time monitor requirements. Port0, Port1, should be used for intelligent peripherals, HMI,
SCADA, and other non-real-time control applications for data collection and monitoring.
11.3 Hardware Wiring Notifications for RS485 Interface

In the WSZ-controller communication interfaces, RS232 provides only point to point connection function while
RS485 provides connection for multiple stations. Its wiring distance should conform to the restriction specified in the EIA
standard.
The principle that connection distance should be as short as possible and the station should be far away from high
11 - 3
noise sources must be observed for hardware wiring. RS232 is for point to point connection with a shorter connection
distance and the standard cable sold in the market or provided by FUJI is applicable. However, for high-speed RS485
network, communication quality is affected and operation might be seriously interfered with if the problems, such as high
baud rate, long connection distance, high signal attenuation, multiple stations, bad grounding, high noise, terminating
impedance mapping, and topology, are not solved appropriately. Please read the notes of hardware wiring for RS485
network at the end of this section carefully.
Limits on the Number of Stations

Though the number of WSZ-controller stations can be set up to 254, 16 stations are the maximum for hardware
driving for RS485 interface.
11 - 4
Limit on Distance
The following diagram shows the relationship between the baud rate and transmission distance of RS485 standard
interface.
10K
1K
Transmission Distance
4K
feet
100
40
40
40
1M
100K
10M
Baud Rate (bps)
Cable
Use the shielded twisted pair cables for connection. Cable quality is an important factor to transmission signal. When
the baud rate is high, low quality twisted pair (e.g., PVC twisted pair cables) will cause extremely high signal attenuation
and considerably shorten the transmission distance. Its noise immunity is poorer. In a circumstance where the baud rate
and noise is high, and the distance is long, use high quality twisted pair cables (such as Belden 9841 polyethylene twisted
pair cables), Its dielectric loss can be 1000 times lesser than that of PVC twisted pair cable. But in a circumstance where
the baud rate and noise are low, PVC twisted pair cable is an acceptable and economical alternative.
Topology
Topology is a graph structure of transmission connection. The topology of RS485 must be in a Bus structure. All
cables must be connected from the first station to the second station, from the second station to the third station, to
the last station. As shown in the following diagrams, both star and ring connections are not allowed.
BUS connection
the shorter
the better
the shorter
the better
D D S
+ _ G
D D S
+ _ G
RS485
11 - 5
RS485
S
D D
+ _ G
RS485
FG Grounding
Though RS485 network can be connected with two cables, the connection is easily affected by noise. To improve
communication quality, the ground potential difference (common mode voltage) between two stations should not exceed
the max. allowable common mode voltage of the R485 transmission IC. 7V shall not be exceeded when WSZ-controller IC
is used; otherwise, RS485 may not operate normally.
D D S
+ _ G
D D S
+ _ G
Ecom
Place A
7V
Place B
EG
EG
No matter how the ground potential is, we recommend using a twisted pair cable covered with shielding. The SG of
each station is connected with the ground wire covered with shielding (similar to the above-mentioned topology) to clear
common mode voltage and provides the shortest circuit for signal transmission to improve the anti-noise capacity.
11 - 6
Terminating Impedance
Different transmission cables have different characteristic impedance (the characteristic impedance of a twisted pair
cable is approximately 120). When the signal is transmitted to the terminating resistor of a cable, reflection and waveform
distortion (either sinking or protruding) will be caused if the terminating impedance is different from its characteristic
impedance. This distortion is not obvious when the cable is short but it will be more serious with longer cables. Finally,
controllers cannot transmit correctly and a terminating resistor should be installed to solve this problem.
A 120
terminating resistor has been installed inside the WSZ-controller. When a terminating resistor is required to be added,
open the cover and toggle the DIP switch to the ON position (DIP switch is set to OFF position by the factory).
Terminating resistors can only be added to each controller on the utmost left and right ends of the Bus. All the DIP switches
between both end should be on the position OFF, or the driving power of RS485 may become insufficient. The diagram
below shows the setting and application of terminating resistors:
SW
ON
SW
D D S
+
1
adjust to "O FF"
D D S
+
ON
ON
SW
D D S
+
1
D D S
+
ON
(The end
of left
station)
(The end
of right
station)
SW
S houldopen
openthe
P LC
's cover,
adjust
to "Ofor
N " most
for m ost
P LC units.
Should
cover,
adjust
to ON
left left
andand
rightright
controller
units.
Strategies Against Noise

When wiring for RS485 network is implemented based on the described materials and rules or a 120 terminating
resistor is added, most noise situations are eliminated. However, if noise cannot be eliminated, it means that there are
strong noise sources near the RS485 network. Besides keeping cables far away from noise sources (e.g., electromagnetic
valves, inverters, servo drivers, or other power units), the most effective way to solve the problem is to use noise
suppression components. Refer to the description in Section 7.4 in the Hardware Manual for noise suppression of
electromagnetic valves, relays and other devices with inductive load. The diagram below shows the noise suppression
approaches for inverters, servo drivers, and other high-noise power units (i.e., add X capacitance or Y capacitance or X+Y
capacitance).
R
S
T
W
C
C
C
C
R
(Add X
capacitor)
(Add Y
capacitor)
C = 0.22f~0.47fAC630V
11 - 7
(Add X+Y
capacitor)
Caution
Hardware wiring for communication network and addition and removal of communication stations
should be implemented with controller disconnected. Dont work especially when controller is
running, or communication errors may occur to generate incorrect controller output.
11.4 How to Use WSZ-Controller Communication Ports

The requirements for communication are that (1) hardware interfaces and mechanisms, (2) communication
parameters and (3) software interfaces (i.e. the protocol) of the receiver/ sender must be consistent. The same are
applicable to controller. After the above three fundamentals are meet, controller will communicate with other controllers or
peripherals. The following will describe these three fundamentals.
11.4.1
Matching of Hardware Interfaces and Mechanisms
In order to meet the interface requirement of variety peripherals, the WSZ-controller provides RS232, RS485
communication interfaces for choice. When install, care should be taken if the hardware interface is of the same type.
Incorrect connection of different type of communication interface may cause the permanent hardware failure. Also please
make sure that the signals of mating connector are all match. For example, TXD must connect to RXD, RTS (if any) should
be connected to CTS. The interface of RS232 and RS485 are described at bellow.
Port0 RS232 Interface (built in)

The connector for port0 RS232 is a 4 pin Mini-DIN female connector. FUJI provides a dedicated connection cable
that has a 9 Pin D-sub female connector at one end for the PC or peripherals to connect controller port0 RS232. The wiring
diagrams of port0 RS232 connection cable are shown at below.
WSZ-232P0-9F-150 (Mini-DIN male
9 Pin D-sub female) :

Mini-DIN
(Controller Side)
Male
11 - 8
WSZ-232P0-9M-400 (Mini-DIN male
9 Pin D-sub male) :

Mini-DIN
(Controller Side)
Male
Model
Description
WSZ-232P0-9F-150
Dedicated for WSZ RS232 Port 0 to 9Pin D-sub female, 150cm long.
WSZ-232P0-9M-400
Dedicated for WSZ RS232 Port0 to 9Pin D-sub male, 400cm long.
WSZ 2 3 2
P0
150
(connector specification) (connection distance) unit/cm

F: Female
M: Male
WSZ-Series
product name
9: 9Pin D-sub
Port on the
controller
P0Port0 (RS232)
External
Interface
232RS232
Port1 RS232 interface (expandable)

RS232 communication of Port1 is available to use by installed the communication board (WSZ-CB25). This
communication board provides one standard RS232 9 Pin D-sub female connector. While application, the user can buy a
standard 9 pin RS232 cable directly from computer store or follow the example diagram at below to DIY the cable.
11 - 9
Signal Name
Pin
TXD
RXD
RTS
CTS
SG
DTR
DSR
MALE
FEMALE
Connector Type
9Pin
D-sub
port1, port2 usage only

9P D-sub female
9P D-sub male
WSZ controller Non-usage
9P D-sub male RS232 communication cable :
9P D-sub male RS232 communication cable :
If you make RS232 cables by yourself and the definition of each pin is not clear, use a multimeter for measurement to
determine TXD and RXD.
9 Pin connector: The pin 5 is SG;
Measure the pin 2 (red probe) and the pin 5 (black probe) with a multimeter. If it is approximately 9V, it
means that the pin 2 is the transmission pin; If it is approximately 0V, it means that the pin 2 is the
receiving pin.
Measure the pin 3 (red probe) and the pin 5 (black probe) by a multimeter. If it is approximately 9V, it
means that the pin 3 is the transmission pin; If it is approximately 0V, it means that the pin 3 is the
receiving pin.
11 - 1 0
Port2 RS485 interface (expandable)

RS232 communication of Port2 is available to use by installed the communication board (WSZ-CB25). This
communication board provides one standard RS485 3-pin European plug-able terminal block. The pin assignment of
connector(s) is show below.
+(D+)
(D )
G(SG)
11.4.2
Selection and Setting of Communication Protocols
Besides offering the original protocol by default, Port1~Port2 can be set to Modbus (Slave) protocol. The following
shows the setting steps in the WinProladder :
Click the protocol:
PLC
Setting
Protocol
a port can be set to Modbus RTU or original Protocol:
Besides, you also can set the communication protocol through special register.
R4047 : Upper Byte = 56H, configure the communication port for Modbus RTU protocol.
= Other values, Port12 dont support Modbus RTU protocol(The defaults are original protocol).
Lower Byte : Port assignment for Modbus RTU protocol.
11 - 11
Format as below :
Upper Byte
Lower Byte
b7
b6
b5
b4
b3
b2
b1
b0
56H
b0=0& b1=0, Port 1 acts as original protocol.
b0=0& b1=1, Port 1 acts as Modbus RTU protocol.
b0=1& b1=1, Port 1 acts as Modbus ASCII protocol.
b4b7, Reserved
* It allows to assign multiple ports for Modbus RTU protocol, where the corresponding bit must be 1.
For example :
R4047=5602H, Assign Port 1 as Modbus RTU protocol;
R4047=560AH, Assign both Port 1 and Port 2 as Modbus RTU protocol;
Refer to : The rule for address mapping between Modbus and original(Page12-43).
11.4.3
Settings for Communication Parameters
Communication parameters can be set up for each of the 3 WSZ-controller ports. Communication parameters of Port
0~Port 2 are set to the same parameters of Port 0 before shipment or after system initialization. (See the table below.)
Baud Rate
9600 bps
Data Bit
7 Bits
Parity Check
Even
Stop Bit
1 Bit
11 - 1 2
Default Communication Parameters
Port
Register
Setup
Default Value
Default Baud Rate
Other default Parameters
Port 0
R4050
5621H
9600 bps
7-bit Data, Even, 1-bit Stop
Port 1
R4146
5621H
9600 bps
Port 2
R4158
5621H
9600 bps
Port 2
(High-speed)
R4161
5665H
153600 bps
* When a port is set to Modbus RTU protocol, data bit is always 8-bit.
* Port 1~Port 2 also provides Baud Rate settings for user-defined (1125 bps~1152000 bps).
* Port 0 can be changed the baud rate only the other parameters are always 7-bit Data, Even, 1-bit Stop.
Also, Port 0 supports original communication protocol only.
11 - 1 3
Setup of Port0~Port2 Communication Parameters
56H
Communication Parameters
B15
B8 B7
B0
Even/Odd
Parity
0Even Parity
1Odd Parity
Data Bit
07 Bits
18 Bits
Parity Check
0None Parity
1With Parity
Stop Bit
01 Bit
12 Bits
*R4161 is only 8-bit.
B7 B6 B5 B4 B3 B2 B1 B0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Value
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Baud Rate
4800 bps
9600 bps
19200 bps
38400 bps
76800 bps
153600 bps
307200 bps
614400 bps
7200 bps
14400 bps
28800 bps
57600 bps
115200 bps
230400 bps
921600 bps
User-defined
Port 1~Port 2 provides Baud Rate settings for user-defined (1125 bps~1152000 bps)
11 - 1 4
*R4161(PORT2) the
high-speed baud rate
must be greater than
or equal 38400bps.
Formula
Baud Rate Div = (
Baud Rate = (
18432000
) -1
Baud_Rate
( 15 16383 )
18432000
)
Baud_Rate_ Div + 1
( 1125 bps 1152000 bps )
Port
Register Setup
Formula
Port 1
D4000
D4000 = (
18432000
) -1
Baud_Rate
Port 2
D4001
D4001 = (
18432000
) -1
Baud_Rate
Example 1
If you want to set Port 1 Baud Rate to 1200 bps, then R4146 = 56XFH :
D4000 = (
18432000
) - 1 = 15359
1200
Example 2
If you want to set Port 2 Baud Rate to 256000 bps, then R4158 = 56XFH :
D4001 = (
18432000
) - 1 = 71
25600
11 - 1 5
Without Station Number Checking for HMI or SCADA connecting

While controller communicating with WinProladder, it recognizes the original internal communication protocol.
While controller communicating with Human Machine Interface (HMI) or Supervising software (SCADA), it recognizes the
original external communication protocol.
Low byte of R4149 = 1, Port 0 without station number checking while original external communication protocol.
Low byte of R4155 = 1, Port 1 without station number checking while original external communication protocol.
High byte of R4155 = 1, Port 2 without station number checking while original external communication protocol.
Reply Delay Time Setting

As the controller received a packet of addressed message and passed the error check, it would reply the message after
the reply delay time period.
Low byte of R4040 : Port 0 reply delay time setting (Unit in ms).
High byte of R4040 : Port 1 reply delay time setting (Unit in ms).
Low byte of R4041 : Port 2 reply delay time setting (Unit in ms).
Transmission Delay Time Setting

While the communication port being used as the master of WSZ CPU LINK (FUN151) or Modbus RTU (FUN150)
multidrop's network, it allows the user to set the transmission delay time to slow down the expiration of message frame.
High byte of R4147 : Port 1 transmission delay time setting (Unit in 10ms)
High byte of R4159 : Port 2 transmission delay time setting (Unit in 10ms)
Receive Time-Out Span Setting

While the communication port being used as the master of WSZ CPU LINK (FUN151) or Modbus RTU (FUN150)
multidrop's network, it allows the user to set the receive time-out span to detect whether the slave station on line or not.
Low byte of R4147 : Port 1 receive time-out span setting (Unit in 10ms).
New Message Detection Time Interval Setting

1. While the communication port being used as the master or slave of Modbus RTU protocol, the system will give the
default time interval to identify each packet of receiving message, if the default works not well, the user can set this time
interval through the high byte setting of R4148 and let M1956 be 1, to avoid the overlap of different packet of message
frame.
When M1956=1 : High Byte of R4148 is used to set the new message detection time interval for Port 1Port 2 (Unit in
ms)
2. While the communication port being used to communicate with the intelligent peripherals through the FUN151
convenient instruction, if the communication protocol without the end of text to separate each packet of message frame,
11 - 1 6
it needs message detection time interval to identify the different packet. High byte of R4148 is used for this setting.
High Byte of R4148New message detection time interval setting for Port 1Port 2 (Unit in ms).
Without Station Number Checking for Original Internal Communication Protocol

While controller communicating with WinProladder, it recognizes the original internal communication protocol. The
quick way to communicate with the controller is to set the station number for WinProladder at 255, and connect with the
unsured station number of target.
If the station number 255 for WinProladder is connected with the controller, the controller will communicate with
WinProladder even thoughthe station number of controller is 1254.
Related Internal Relay
11.4.4
Port
Port Ready Indicator Relay
Finished Indicator Relay
Port1
M1960
M1961
Port2
M1962
M1963
Modem Interface Setting
High Byte of R4149 = 55H, Remote-Diagnosis/Remote-CPU-Link by way of Port 1 through Modem connection, it
supports user program controlled dial up function.
= AAH, Remote diagnosis by way of Port 1 through Modem connection, it supports Passive
receiving & Active dialing operation mode.
= Other values, without above function
11.5 Description and Application of Software Interface Types

11.5.1
Standard Interface
The port with the standard interface is controlled by controller CPU, and the communication transaction of the ports
is controlled by Original Communication Driver or Modbus Communication Driver. All accesses to the port must be
executed in the format of Original Communication Protocol or Modbus Communication Driver. WinProladder software
package, and many HMI and SCADA have communication drivers conforming to Original Communication Protocol, so
linkage is built immediate when the standard interface port is connected and the hardware interface and communication
parameters are consistent. When no such conforming communication driver is available, additional commands that
conform to the format of Original Communication Protocol or Modbus Communication Driver must be written for
controller communication.
11.5.2
Modem-Specific Interface
R4149 high byte = AAH means that Port 1 is set up to Modem-specific interface. Though CPU uses Original
Communication Protocol or Modbus Communication Driver to control the communication transaction of Port 1,
connection must be made via Modem. In other words, Port 1 is controlled by Modem Driver before communication starts,
no matter whether active dialup or passive reception connection is concerned, and no access is allowed to controller. The
11 - 1 7
Modem Driver is only used for Modem connection and transfers the control of Port 1 to Original Communication Protocol
when Modem is connected successfully, and Port 1 becomes the standard interface. This section discusses the operation
of Modem active dialup connection and passive reception connection.
With the Modem-specific interface, the controller allows Port 1 to dial up a remote Modem actively or receive
messages from a remote Modem passively depending on the setting of the internal phone number register
(R4140~R4145). When connection of both machines is successful, transmission or reception of data is executed via the
phone cable.
A. Passive Reception Mode

When no effective phone number is stored in the internal phone number register of the controller (see B below), it
will enter the passive reception mode and set up the Modem to the reception mode waiting for a remote Modem to dial up.
When both machines connect successfully and the inbound signal is correct, the host controller exits the reception mode
immediately and runs into connection state. The remote Modem can fully control and access the host controller. The host
controller checks the content of the phone number register only at the moment when the power of the host controlelr or
Modem is turned on (OFFON). Therefore, any change to R4140~R4145 (e.g. save or removal of a phone number) is
only effective when the power of the host controller or Modem is turned off and turned on again.
B. Active Dialup Mode

When an effective phone number is stored in the internal phone number register of the host controller, it enters the
active dialup mode at the moment when the power of the host controller and Modem is turned on. In this mode, Port 1 can
dialup a phone number in R4140~R4145 via Modem for connection to the remote Modem corresponding to this phone
number. When both machines connect successfully, the host controller exits the dialup mode and runs into connection
state. The remote Modem can fully control and access the host controller. If dialing fails, the host controller executes the
second dialing to a maximum of three redials (about 3 minutes). If the third redial fails, the host controller exits the active
dialup mode and enters the passive reception mode. It also sets up the Modem to the reception mode waiting for calls from
a remote Modem.
Only the phone number that is stored in the Modem phone number register in the following format will be identified as
effective by the host controller. The phone number must be written hex-decimally. Only 0~9 and E are meaningful in the
hexadecimal digits. A stands for dialing delay and is usually used for international calls or extensions of an automatic
switchboard. (a A is about 2 seconds). B stands for # (for B.B.Call), and C stands form *. Among the effective digits,
0~9 is used for phone numbers, while E stands for the end of a phone number. Since each register has 4 hexadecimal
digits, R4140~R4145 have 24 hexadecimal digits and maximum 23 digits, the end character E not counted, can be stored
in R4140~R4145. Phone numbers are stored in order from digit 0 of R4140 to digit 3 of R4145. For example, the phone
number 02-6237019 is stored in the following order:
Direction
R4145
Digit 3
R4144
R4143
R4142
R4141
9
R4140
3
Digit 3
End character
Digit 3
Digit 0
: Any value from 0 to F

2620H is stored in R4140, 1073H is stored in R4141,and XXE9H is stored in R4142. R4143~R4145 can be any value.
Please note that the last digit of the phone number must be followed by the end character E. The host controller will
11 - 1 8
ignore the number (any value from 0 to F) behind E. Only the value 0~C is acceptable before E. Any other values will be
regarded as ineffective.
If the telephone bill is paid by the service unit answering the call, no effect phone number should be stored in the
internal Modem phone number register of the host controller, so that it will enter the reception mode when turned on and
the service unit will then call the client. If the phone bill is paid by the client, at least one effect phone number must be
stored in the internal Modem phone number register of the host controller, so that it will enter the dialup mode at the
moment when the client turn on the power of the host controller and Modem. Since the phone number of the service unit
may change, the WinProladder package provides a phone number Write and Callback command. In this case, the client is
not able to call the service unit with the old phone number. To solve this problem, the client may turn on the Modem and
host controller. When the host controller fails converts to the reception mode after three failed dials (about 3 minutes), the
service unit calls the client and imports its new phone number in the Modem phone number register of clients host
controller and sends a callback command. When receiving the callback command, the host controller of the client enters
the dialup mode immediately and calls the service unit with the imported new number. This application requests the service
unit to call the client and pay the bill. However, the amount of the telephone bill is limited because it takes very short time
for implementation of the Write and Callback command.
When executing the Write and Callback command and connecting to the host of the client successfully,
WinProladder will take the old number back from the host controller for reference (and for future use when write-back of the
old number is required) before it writes the new number and executes callback. When the connection is not required any
more, WinProladder will give a shutdown command automatically for disconnection.
11.5.3
Ladder Program Control Interface
This type of interface can be set up for Port1~Port2. The ladder program that are used to control the ports are
FUN94 (ASCWR), FUN150 (M-BUS) and FUN151 (CLINK).
FUN94 (ASCWR) uses Port 1 as an output interface for ASCII files (transmission only) and sends messages to
printers, computers, and other devices that receive messages with ASCII code. The typical application of this command is
the connection to printers for Chinese/English reports. WinProladder provides the ASCII File Editor function. It converts
the data to be edited or printed to ASCII files and stores them in controller. Production reports, material request reports,
and other reports are generated with the help of various dynamic data input during the operation of controller. Refer to
ASCII File Output Applications for more information.
FUN150 (M-BUS) controls Port 1~Port 2 and uses them as masters on the Modbus network. The ports can connect
to Modbus peripherals (slaves) easily. Refer to the Convenient instruction for Modbus RTU Master below for more
information.
FUN151 (CLINK) controls Port 1~Port 2 and uses them for resource sharing among controllers or connection to
intelligent peripherals. FUN151 provides four operation modes.
11 - 1 9
11.6 Communication Board(CB)

The WSZ main unit has been built in the communication port 0, and it can increase the communication ports by
purchasing the optional communication board. The specification and appearance of communication board is as follows:
Model/Item
Specification
WSZ-CB25
1 RS232 COM Port (Port 1) + 1 x RS485 COM Port (Port 2), with TXRX indicators.
DB-9F
1 RS2321 RS485 COM Port

WSZ-CB25
+(D+)
5 SG
(D )
RTS(out) 8
CTS(in) 7
G(SG)
3 RxD(in)
2 TxD(out)
N
RS232
ON
RS-485
Pin assignment of the connector
11.7 Pin Assignments and Protocols

RS232 port pin assignments
Signal
Pins
Direction
RX
External Controller
TX
External Controller
GND
RS485 port pin assignments
11 - 2 0
Chapter 12
The Applications of WSZ Communication Link
As previously revealed in Chapter 11 that the WSZ-controller can support the "Ladder Program Control Interface"
communication function for the applications of multi-drop WSZ CPU Link network or connecting with the intelligent
peripherals through Port 1Port 2.
The connection of WSZ-controller is available through CLINK(FUN151), besides it supports Modbus communication
interface, too. Port1Port2 can be Modbus communication protocol master station by FUN150 to connect with the
Modbus slave peripherals.
The RS-232 interface is for point to point connection, the RS-485 interface is for long distance connection or
multi-drop communication network
The FUN151 (CLINK) instruction provides MD0 to MD3 four kinds of instruction mode, that the MD3 mode is
monopolized by Port 2 for WSZ High Speed CPU Link Network, the others are for Ordinary Communication Link. The
following list enlisted the description for the difference on various instruction modes for the CLINK instruction
Item
Category
FUN151
(CLINK)
High Speed LINK
38.4K bps
MD3
* Port 2 only
921.6K bps
Ordinary LINK
MD0MD2
* Port 1 P o r t 2
FUN150
(M-BUS)
Baud Rate
Modbus
Master
Data Bit
8-bit
Transmitting
code
Error detection
Command
processing speed
Binary code
CRC-16
Interrupt driven
ASCII code
Checksum
Normal scan
Binary code
CRC-16
4.8K bps
|
7-bit or 8-bit
921.6K bps
Adjustable
4.8K bps
|
8-bit
921.6K bps
Normal scan
ASCII code
12-1
LRC
12.1
Application for FUN151 Instruction
12.1. 1
Procedures for Usage

St a r t
Hardware wiring to connect the various

stations (controller, ASCII peripherals,
etc.)
Set up the station number of the linking

stations and make a consistent
communication parameters setting for
Station number can be set to any one between 1 to 254

without replication.
these stations.
Fill in the value to the communication

interface register (Rxxxx) of FUN151
(CLINK) if necessary; properly adjust
the Time-out timer to detect
communication error, transaction delay
to meet slow response device , etc.
For communication parameters, please refer to the

description of "Communication Related Setting".
Write FUN151 instruction to controller,

which serves as the master station or
performs communication sender/
receiver, and then fill the
communication program into the
register table assigned by operand SR.
FUN151 will then automatically send or
receive data according to the definition
of communication program. The user
can easily reach the various function
services of CLINK by accessing the
table-type communication program.
End
12.1 .2
Explanation of Respective Modes and Application Program for FUN151
This section will base on the four instruction modes (MD0 to MD3) of FUN151 (CLINK) instruction to explain their
usages, with respective practical application program examples.
12-2
WSZ-Controller LINK
FUN151P
CLINK
Convenient Instruction of FUN151: MD0

(Which makes controller act as the master station in CPU LINK network through Port
1~2)
FUN151P
CLINK
Pt : Assign the port, 1 2

MD : 0, serves as the master station of WSZ CPU Link
(employs original communication protocol)
SR : Starting register of communication program
example for its explanation). It controls 8
registers, the other programs can not repeat in
using.
Range
Operand
Pt
MD
SR
WR
HR
ROR
DR
R0
R5000
D0
R3839 R8071 D3999
1~2
0
Descriptions
1.
FUN151: MD 0, it makes controller act as the master of WSZ CPU Link Network through Port 1~ 2.
2.
3.
Only the master controller needs to use FUN151 instruction, the slave doesn't need.
4.
5.
When execution control ENchanges from 01 and both inputs PAU and ABT are 0, and if Port 1/2
hasnt been controlled by other communication instructions [i.e. M1960 (Port1) / M1962 (Port2) = 1], this
instruction will control the Port 1/2 immediately and set the M1960/M1962 to be 0 (which means it is being
occupied), then going on a packet of data transaction immediately. If Port 1/2 has been controlled
(M1960/M1962 = 0), then this instruction will enter into the standby status until the controlling communication
instruction completes its transaction or pause/abort its operation to release the control right (M1960/M1962
=1), and then this instruction will become enactive, set M1960/M1962 to be 0, and going on the data
transaction immediately.
6.
While in transaction processing, if operation control PAU becomes 1, this instruction will release the control
right (M1960/M1962 = 1) after this transaction. Next time, when this instruction takes over the transmission
right again, it will restart from the next packet of data transaction.
7.
transaction immediately and release the control right (M1960/M1962 = 1). Next time, when this instruction
8.
9.
be ON.
ON.
12-3
WSZ-PLC LINK
FUN151P
CLINK

(Which makes controller act as the master station in CPU LINK network through
Port 1~2
FUN151P
CLINK
Interface Signals
Dedicated Relays and Registers for corresponding port :
Comm. Port
Port 1
Port 2
1. Port Ready Indicator
M1960
M1962
2. Port Finished Indicator
M1961
M1963
3. Port Communication Parameters
R4146
R4158
4. TX Delay & RX Time-out Span
R4147
R4159
Signals
1. Port Ready Indicator: This signal is generated from CPU.

ON, it represents that port is free and ready.
OFF, it represents that port is busy, data transaction is going.
2. Port Finished Indicator : This signal is generated from CPU.

When the communication program completed the last packet of data transaction, this signal will be ON for
one scan time (for successive data transaction).
When the communication program completed the last packet of data transaction, this signal will be still
ON (for single packet of data transmission).
3. Port Communication Parameters :

The register is for communication parameters setting of corresponding port. (Please refer to the chapter of
communication parameters setting.)
4. TX Delay & RX Time-out Span :

The content of Low Byte defines the receive Time-out span of CLINK instruction; its unit is 0.01 seconds
(the default is 50, which means 0.5 seconds). The CLINK instruction employs receive Time-out span to judge
whether the slave station on line or not. When the master controller sent out the read/write command to the
slave station, the slave station didnt reply within this period means that there is abnormal event in
communication called Time-out. When there are multi-drop linking, properly adjust this value (greater than 1
scan time of the slave station with the longest scan time) to shorten the communication response time among
the active linking stations if there are many slave stations power off (The time-out cases will happen).
The content of High Byte defines the transmission delay time between two packets of data transaction for
CLINK instruction; its unit is 0.01 seconds (the default is 0).
12-4
WSZ-Controller LINK
FUN151P
CLINK

1~2)
FUN151P
CLINK
Program example(Automatic cycling transmission)
M 1 M 1960
1 5 1 P . C L IN K
EN
Pt :
MD:
PAU
M 100
ACT
M 101
R 5100
R110
SR:
WR:
M 102
DN
ABT
M 2 M 1962
ERR
1 5 1 P . C L IN K
EN
PAU
Pt :
M 103
ACT
MD:
SR:
WR:
R 5200
R120
M 104
ERR
M 105
DN
ABT
Explanation on program example

When there is communication error, gets and stores the error message, it would be helpful for error analysis or
logging.
M 1 01
E N
15D
(+ 1 )
R 110 0
O V F
08D .M O V
E N
M 1 04
E N
R 11 0
R 1 120
15D
(+ 1 )
R 110 2
O V F
08D .M O V
E N
R 12 0
R 1 122
12-5
WSZ-PLC LINK
FUN151P
CLINK

1~2)
FUN151P
CLINK
Editing Communication Table with WinProladder

Click the Link Table Item which in project windows:
Project name
Table Edit
Link Table
Click right button and select New Link Table
Table Type: MD0 must be selected Normal Link Table. ; MD3 must be selected High Speed Link Table.
Table Name: For modify or debug, you can give a convenient name.
Table Starting address: Enter the address which is the starting register of communication table to store
the data exchange list.
12-6
WSZ-Controller LINK
FUN151P
CLINK

1~2)
FUN151P
CLINK
To make it easy to edit, read, and maintain the communication program, we have extended following
related instructions under FUN150 and FUN151. The use method is that you put your cursor on FUN150
or FUN151, and press the hotkey Z. When Table Edit windows appear, then you can edit the
communication table.
12-7
WSZ-PLC LINK
FUN151P
CLINK

1~2)
FUN151P
CLINK
Explanation for operand SR

SR Starting register for communication program of CLINK instruction
SR+0
SR+1
Total transactions
Slave station No. which is about
to transact with
SR+2
Command code
SR+3
Data length of this transaction
SR+4
Data type of Master controller
SR+5
SR+6
SR+7
Starting reference of Master

controller
Data type of slave controller
Starting reference of Slave
controller
SR+8
Slave station No. which is about

to transact with
SR+9
Command Code
SR+10
Data length of this transaction
SR+11
Data type of Master controller
SR+12
Low Byte is valid; one transaction takes 7 registers to describe,

which means 7 registers define a packet of data transaction.
Low Byte is valid, 0254 (0 means that master controller

broadcasts the data to all slave controller, the slave controller
does not reply).
Low Byte is valid; =1, means reading data from slave controller;
=2, means writing data to slave controller.
Low Byte is valid; the range is 164.

Low Byte is valid, and its range is 0 to 13; it defines the data
type of master controller (see next page).
Word is valid; it defines the starting address of data (master).

Low Byte is valid, and its range is 0 to 13; it defines the data
type of slave controller (see next page).
Word is valid; it defines the starting address of data (slave).
Description of the 2nd packet of transaction.
Starting reference of Master

controller
SR+13
Data type of slave controller
SR+14
Starting reference of Slave
12-8
WSZ-Controller LINK
151P
CLINK
1~2)
FUN151P
CLINK
Master/Slave data type, code and reference number

Data code
Data type
Reference number
X (discrete input)
0255
Y (discrete output)
0255
M (internal relay M)
01911
S (step relay S)
0999
T (timer contact)
0255
C (counter contact)
0255
WX (word of discrete input ,16 bits)
0240, it must be the multiple of 8.
WY (word of discrete output ,16 bits)
WM (word of internal relay,16 bits)
W S (word of step relay,16 bits)
10
TR (timer register)
0255
11
CR (counter register)
0199
12
R (data register Rxxxx)
03839
13
D (data register Dxxxx)
04095
Note: The data type for master and slave must be consistent. i.e. if the master station is any value between 0 to
5, the slave station must also be any value between 0 to 5; if the master station is any value between 6 to
13, the slave station must also be any value between 6 to 13.
Explanation for the operand WR of FUN151:MD0

High Byte
WR+0
Result code
WR+1 Station number
Low Byte
Transaction
No.
Command
code
WR+2
For internal operation
WR+3
WR+4
WR+5
WR+6
WR+7
Result code:
Result code indicates the transaction result; 0= normal, other value

=abnormal.
Transaction No. indicates which one is in processing.
Station number, the slave station No. which is in transaction.
Command code
=40H, reading system status from slave controller.
=44H, reading successive discrete status from slave controller.
=45H, writing successive discrete status to slave controller.
=46H, reading successive registers from slave controller.
=47H, writing successive registers to slave controller.
WR+4s b0=1, Port has been occupied and this instruction is waiting
to acquire the transmission right for data transaction.
b4=1 , This instruction is not first time performing.
b12 , Output indication for ACT
b13 , Output indication for ERR.
b14 , Output indication for DN.
0, This transaction is successful.

2, Data length error (data length is 0 or greater than 64 in one transaction)
3, Command code error (command code is greater than 2)
4, Data type error (data type is greater than 13, please refer to data type code)
5, Reference number error (please refer to reference number)
6, Inconsistence in data type (e.g. master station is 05 while slave is 613)
A, No response from slave station (Time-out error) B, Communication error (received error data)
12-9
WSZ-PLC LINK
FUN151P
CLINK

1~2)
FUN151P
CLINK
For easy programming and trouble shooting, the WinProladder provides the table editing environment to edit
the communication table of FUN151 instruction; Key in the complete FUN151 instruction first and then move
the cursor to the position of it, depressing the "Z" key, now comes the table editing environment. The user can
create the new communication table or display the existed table under this friendly user interface operation.
Communication Table for FUN151:MD0

Sequence
Command
No.
0 ~ nnn
Read (=1)
Write (=2)
Slave
Describing the
station number of
slave controller
which is about to
transact with,
Station number=0,
the master
controller
broadcasts the
data to all slave
controllers and
slave controllers
will not reply,
Station
number=N,
it means the
station number of
the slave
controller which is
about to transact
with the master
controller;
Master Data
Slave Data
Describing the data

type & reference
number of this packet
of transaction for the
master controller.
Describing the data

type & reference
number of this packet
of transaction for the
slave controller.
X0 ~ X255
Y0 ~ Y255
M0 ~ M1911
S0 ~ S999
T0 ~ T255
C0 ~ C255
X0 ~ X255
Y0 ~ Y255
M0 ~ M1911
S0 ~ S999
T0 ~ T255
C0 ~ C255
WX0 ~ WX240
WY0 ~ WY240
WM0 ~ WM1896
WS0 ~ WS984
TR0 ~ TR255
CR0 ~ CR199
R0 ~ R3839
D0 ~ D4095
Length
Data length of
this transaction.
1 ~ 64
WX0 ~ WX240
WY0 ~ WY240
WM0 ~ WM1896
WS0 ~ WS984
TR0 ~ TR255
CR0 ~ CR199
R0 ~ R3839
D0 ~ D4095
N=1~ 254
When execution control M1/M2 = 1, and corresponding port is not occupied by other communication
instruction (M1960, M1962 = 1), CLINK instruction will start the data transaction.
The M1960, M1962 is OFF
during data transaction, and when the transaction is finished, the M1960, M1962 becomes ON. Employ the
OFFON change of M1960, M1962 (FUN151 execution control EN = 01 means starting) may
automatically starts for every packet of data transaction successively (when the last packet of transaction is
completed, it will automatically return to the first packet of transaction to obtain the automatic cycling
transmission).
Output Indicators : ACTONTransaction is in progress

ERRONError occurred (Refer to the result code)
DNONOne transaction finished
12-10
WSZ-Controller LINK
FUN151P
CLINK

1~2)
Waveform of Input and Output signals
M1960
M1962
M1936
M1938
ENU(start transmission)
ACT(data transmission)
DN(Non-error)
ERR(Error occur)
Note :
1. Only "DN" will be ON if one transaction finished without error.

2. "ERR" & "DN" will be ON at the same time if one transaction finished with error.
3. M1961/M1963 will be ON one scan time while the last packet of transaction finished.
1 2 - 11
FUN151P
CLINK
WSZ-PLC LINK
FUN151P
CLINK

(Which makes controller act as the communication sender through Port 1~2)
Pt
FUN151P
CLINK
: Assign the port 12
MD : 1, link with intelligent peripherals that equipped

with communication interface
SR : Starting register for data transmission table
example for explanation). It controls 8 registers,
the other programs cannot repeat in use.
Range
Operand
Pt
MD
SR
WR
HR
ROR
DR
R0
R5000
D0
R3839
R8071
D3999
1~2
1
Descriptions
1. FUN151:MD1, it makes controller act as the communication sender to link with the intelligent peripherals that
equipped with communication interface.
2. A master controller may connect to multi sets of peripherals that have identical communication protocol through
the RS-485 interface.
3. The communication protocol/format is written with LADDER program, which must be consistent with the linked
peripherals.
4. When execution control ENchanges from 01 and both inputs PAU and ABT are 0, and if Port 1/2
hasnt been controlled by other communication instructions [i.e. M1960 (Port1) , M1962 (Port2) = 1], this
instruction will control the Port 1/2 immediately and set the M1960, M1962 to be 0 (which means it is being
occupied), then going on a packet of data transaction immediately. If Port 1/2 has been controlled (M1960,
M1962 = 0), then this instruction will enter into the standby status until the controlling communication
instruction completes its transaction or pause/abort its operation to release the control right (M1960, M1962
=1), and then this instruction will become enactive, set M1960, M1962 to be 0, and going on the data
transaction immediately.
5. During transaction, if the PAU input becomes 1, this instruction will pause and release the control right (set
M1960, M1962 = 1) after it completed the transmission of the on-going data.
6. During transaction, if the ABT input becomes 1, this instruction will abort the transmission and release the
control right immediately (set M1960/M1962 = 1).
7. While transaction is going, the output indication ACT will be ON.
8. When a packet of data transaction is finished (transmission finished or "transmit then receive" completed), if
there is error occurred, the output indication DN & ERR will be ON.
9. When a packet of data transaction is finished (transmission finished or "transmit then receive" completed), if
there is no error occurred, the output indication DN will be ON.
12-12
WSZ-Controller LINK
FUN151P
CLINK

FUN151P
CLINK
Interface Signals
Comm Port
Port 1
Port 2
M1960
M1962
M1961
M1963
R4146
R4158
R4147
R4159
Signals
5. New Message Detection Time

Interval
R4148

2. Port Finished Indicator: This signal is generated from CPU.

ON, it means data transaction has been completed.
3. Port Communication Parameters:

The register is for communication parameters setting of corresponding port (please refer to the chapter
of communication parameters setting).
4. TX Delay & RX Time-out Span:

The content of Low Byte defines the receive Time-out span of CLINK instruction; its unit is 0.01 seconds
(the default is 50, which means 0.5 seconds).
The CLINK instruction employs receive Time-out span to judge whether the slave station on line or not.
When the master controller sent out the read/write command to the slave station, the slave station didnt
reply within this period means that there is abnormal event in communication called Time-out. When there
are multi-drop linking, properly adjust this value (greater than 1 scan time of the slave station with the longest
scan time) to shorten the communication response time among the active linking stations if there are many
slave stations power off (The time-out cases will happen).
The content of High Byte makes no sense at this mode.
5. New Message Detection Time Interval :

While the communication port being used as the master or slave of Modbus RTU protocol, the system
will give the default time interval to identify each packet of receiving message, if the default works not well,
the user can set this time interval through the high byte setting of R4148 and let M1956 be 1, to avoid the
overlap of different packet of message frame.
M1956=0, the system default is 316 bits time period for Port1Port2.
M1956=1, High Byte of R4148 is used to set the new message detection time interval for Port1Port2 (the
range is 1263, the unit is in 16-bit).
The actual time depends on the communication baud rate.
12-13
WSZ-PLC LINK
FUN151P
CLINK

FUN151P
CLINK
While the communication port is being used to communicate with the intelligent peripherals through the
FUN151 convenient instruction, If the communication protocol without the ending code to separate each
packet of message frame, it needs message detection time interval to identify the different packet. High byte
of R4148 is used for this setting.
Program example for loop back test

Controller station A sends data to controller station B (controller station B sends the received original
data back to the controller station A, loopback test), and checks whether the responding message of
controller station B is the same as its original data that had sent out; therefore, it can do simple test on
software and hardware of controller Port1 whether it is normal and error free.
12-14
WSZ-Controller LINK
FUN151P
CLINK

M1924
EN
RST
Clear the received data length to be 0

(For "transmit" only, this instruction is not required.)
R 108
08.MOV
EN
EN
08.MOV
S :
0203H
D
Set the starting code (02H) and ending code (03H) for
responding message in receiving (without starting and
ending codes, R1=0 can also receive regularly).
Packing data to be transmitted:
08.MOV
M0
Setting of the operation mode:

Set to be "transmit then receive" mode (R0=1).
1
R
EN
4
R
Set the transmitting data length (R2=N).
08.MOV
EN
EN
EN
Fill in data 2 (R4= ' O ' )
4FH
4
08.MOV
S :
4BH
Fill in data 1 (R3= ' STX ' )
Fill in the data that is to be transmitted:
08.MOV
S :
Fill in data 3 (R5= ' K ' )
08.MOV
EN
Fill in data 4 (R6= ' ETX ' )
3
R
EN
151P.CLINK
Pt :
1
MD :
1
ACT
( )
PAU
SR :
R0
ERR
( )
WR :
R100
DN
( )
M0
Y0
Y1
Y2
ABT
17.CMP
EN
U/S
Sa :
Sb :
M100
108
a=b
0
a>b
a<b
M100
EN
66
JMP
FUN151P
CLINK
( ) When selecting "transmit then receive" mode, it

employs the comparing instruction to judge whether
the responding message from the counter partner is
received; if it is received, then M100=OFF, and it will
process the received data.
(For " transmit" mode, this program is not required.)
12-15
WSZ-PLC LINK
FUN151P
CLINK

FUN151P
CLINK
The processing program for data received.

For details of the data received, please refer to the explanation of following page.
17.CMP
EN
U/S
M101
Sa :
108
Sb :
a=b
( ) Compare the received data length and transmitted

data length.
a>b
a<b
M101
SET
EN
When the length is inconsistent, it sets up the error

indication.
66
M101
JMP
EN
08.MOV
EN
Clear the pointer V to be 0.
70
FOR
2
17.CMP
EN
U/S
Sa :
Sb :
R 109V
3V
a=b
a>b
M101 Compare the consistency of all of the received data
( )
and transmitted data.

Compare the received data and transmitted data one
by one.
a<b
M101
EN
SET
When there is a data difference, set up the error

indication.
15
EN
(+1)
RST
R 108
71
NEXT
65
LBL
As the received data processed complete, clears the

EN
new data.
65
LBL
received data length to be 0, and gets ready to receive
12-16
WSZ-Controller LINK
FUN151P
CLINK

FUN151P
CLINK
Explanation for the operand SR of FUN151: MD1

SRStarting register of data transmission table
SR+0
SR+1
Transmit only or
Low byte is valid.
Transmit then Receive
0: transmit only, no response from the slave

1: transmit then receive the responding message.
Starting & Ending code
High byte : Describing the starting code of receiving
for receiving
Low byte : Describing the ending code of receiving
The maximum length of data to be transmitted is 511.
SR+2
Length of Transmission
SR+3
Data 1
Low byte is valid.
SR+4
Data 2
Low byte is valid.
SR+5
Data 3
Low byte is valid.
SR+6
Data 4
Low byte is valid.
Data N
Low byte is valid.
Note 1 :
2 :
When selecting the transmit-only mode, the Starting /Ending code of receiving is meaningless.
When it is in the "transmit then receive" mode, before the starting of transmission, it must first to
estimate the starting and ending code of responding message from communication partner and write
them into the receiving starting/ending code register (e.g. SR+1=0203H, 02H stands for starting code
and 03H for ending code), so as to ensure the correct message frame receiving. The communication
protocol with starting/ending code makes the identifying of every packet of messages easy, and the
communication program is simple and efficient.
3:
When it is in the "transmit then receive" mode, fills the high byte of starting/ending code register with 0
if no starting code in responding message; if no ending code in responding message, fills 0 to the low
byte of starting/ending code register. Adjusts the high byte of R4148 (message detection time interval)
to judge whether a packet of data has been received completely; the unit is 0.001 seconds (the default
is 0CH, 12ms).
The communication protocol without ending code depends on message detection time interval to tell
whether it has received completely a packet of data (the setting of message detection time interval
must be greater than the maximum response delay time between data bytes when communication
partner is replying), thus it may ensure the receiving of the whole packet to be complete. Generally
speaking, the data in transmitting is transmitted one byte after another continuously; therefore, if there
is pause (greater than message detection time interval), it means the packet of message is transmitted
completely.
12-17
WSZ-PLC LINK
FUN151P
CLINK

FUN151P
CLINK
WR+ 0
High Byte
Low Byte
Result code
WR+ 1
For internal operation use
WR+ 2
WR+ 3
WR+4
WR+5
WR+6
WR+7
WR+8 Total amount of data received
Result code =0, OK ; = other values, abnormal

Working registers for CLINK instruction
WR+4 : b0=1, Pending

b12=ACToutput indication
b13=ERRoutput indication
b14=DN output indication
The total amount of data byte being received (the register for received
data length; it includes the starting and ending code).
The first byte of data received (if there is the starting code, it is the
WR+9
Data 1
Data 2
The second byte of data received; High byte =0
Data 3
The third byte of data received; High byte =0
starting code); High byte =0
The N_th byte of data received (if there is the ending code, it is the
Data N
ending code); High byte =0
Result code: 0, transaction is successful.

2, Data length error (The value is 0, or the packet of transaction is greater than 511.)
A, No response from the slave
B, Communication abnormal (received error data)
Output Indicator :
ACT ONTransaction is in progress

ERR ONError occurred
DN
ONOne transaction finished
12-18
WSZ-Controller LINK
FUN151P
CLINK

(Which makes controller act as the communication receiver through Port 1~2)
Pt
FUN151P
CLINK
: Assign the port 12
MD : 2, controller waiting to receive the message

sent by intelligent peripherals
SR : Starting register for data transmission table
example for explanation). It controls 8
registers, the other programs cannot repeat in
use.
Range
Operand
Pt
MD
SR
WR
HR
ROR
DR
R0
R5000
D0
R3839
R8071
D3999
1~2
2
Descriptions
1. FUN151: MD2 instruction provides WSZ controller with ability to receive message sent by peripherals with
communication interface at any time.
2. The communication protocol is written with LADDER program, which must be consistent to the peripheral
device.
3. When execution control ENchanges from 01 and both inputs PAU and ABT are 0, and if Port 1/2
hasnt been controlled by other communication instructions [i.e. M1960 (Port1), M1962 (Port2) = 1], this
instruction will control the Port 1/2 immediately and set the M1960, M1962 to be 0 (which means it is being
occupied). If Port 1/2 has been controlled (M1960, M1962 = 0), then this instruction will enter into the standby
status until the controlling communication instruction completes its transaction or pause/abort its operation to
release the control right, and then this instruction will become enactive.
4. When the input PAU or ABT becomes 1, it gives up the receiving immediately (M1960, M1962 = 1).
5. While it is in the receiving state, the output indication ACT is ON.
6. When a packet of data transaction finished (receive finished or receive then transmit completed), if there is
error occurred, the output indication DN & ERR will be ON for one scan time.
7. When a packet of data transaction finished (receive finished or receive then transmit completed), if there is
no error occurred, the output indication DN will be ON for one scan time.
12-19
WSZ-PLC LINK
FUN151P
CLINK

FUN151P
CLINK
Interface Signals
Comm Port
Port 1
Port 2
M1960
M1962
M1961
M1963
R4146
R4158
R4147
R4159
Signals

Interval
R4148

2. Port Finished Indicator: This signal is generated from CPU.

ON, it means data transaction has been completed.
3. Port Communication Parameters:

The register is for communication parameters setting of corresponding port (please refer to the chapter
of communication parameters setting).

The Low Byte defines the Time-out span of FUN151:MD2 instruction; its unit is 0.01 seconds (the default
is 32H). When the controller received the message and must respond to it (receive then transmit mode), but
the LADDER program is unable to process and send out the responding message during this period of time,
the CPU will give up response this time and automatically restore back to receiving state. When FUN151:MD2
is set to be "receive only" mode, this value is meaningless.
The content of High Byte makes no sense at this mode.
5. New Message Detection Time Interval

While the communication port being used as the master or slave of Modbus RTU protocol, the system
will give the default time interval to identify each packet of receiving message, if the default works not well, the
user can set this time interval through the high byte setting of R4148 and let M1956 be 1, to avoid the overlap of
different packet of message frame.
12-20
WSZ-Controller LINK
FUN151P
CLINK

FUN151P
CLINK
FUN151 convenient instruction, if the communication protocol without the end of text to separate each
M1956=1, High Byte of R4148 is used to set the new message detection time interval for Port1Port2( the
Note 1: Once FUN151 : MD2 activated, it will stay in receiving state all the time; unless the input signal of PAU or
ABT becomes ON, then it will escape from receiving state and stop receiving and waiting
for next time it will be activated again.
2: When there is change on Starting/Ending code for receiving, it must make the input signal of PAU or ABT
become ON once, and re-activate the receive control EN from 01 to start message receiving.
12-21
WSZ-PLC LINK
FUN151P
CLINK

FUN151P
CLINK
Program example for loop back reply (This controller sends back the received data to the master, which had
sent out the data.)
M1924
EN
RST
R 108
EN
RST
EN
08.MOV
S :
Clear the received data length to be 0.
Clear the transmitted data length to be 0

(for ''receive' only, this program is not required).
Set up the operation mode:

Set receive then transmit mode.
EN
08.MOV
S :
0203H
D
M0
EN
151P.CLINK
Pt :
1
MD :
2
PAU
M2
Y0
SR :
R0
WR :
R100
ACT
( )
ERR
( )
Set up the starting code (02H) and ending code

(03H) (R1=0, it will receive regularly even without the
starting and ending code.)
Y1
ABT
DN
Y2
( )
Y2
EN
RST
EN
17.CMP
Sa : R
U/S
Sb :
108
When transmission complete, clear the transmitted data

length to be 0 (for "receive" only mode, this instruction is
M100
( )
not needed).
a=b
0
a>b
a<b
M100
EN
66
JMP
EN
103.BT_M
Ts : R 109
EN
108
08.MOV
S : R
108
EN
Td :
L
RST
While selecting "receive then transmit" mode, it employs

the comparing instruction to tell whether a new packet of
message is received; if it is, the M100=OFF and it will
process the received data.
Copy all of the received data to responding registers.

R108 is the length of received data.
R 108
After the received data processed, fills the received data

length to be the sending back data length to start the
responding transmission.
65
LBL
Clear the received data length to be 0

(ready to receive new data).
12-22
WSZ-Controller LINK
FUN151P
CLINK

FUN151P
CLINK
Explanation for the operand SR of FUN151: MD2

SR: Starting register of data reply table
Receive only or
SR+0
SR+1
Receive then Transmit
=0, "receive only" mode ; =1, "receive then transmit" mode
Starting/Ending code of
High Byte: Describing the starting code of receiving
receiving
Low Byte: Describing the ending code of receiving
Length of reply data
SR+4
Low Byte is valid,
Maximum of length is 511.

It will start to transmit the reply data as long as the length is not 0.
Reply data 1
Low Byte is valid.
Reply data 2
Low Byte is valid.
Reply data N
Low Byte is valid.
Note 1:
When selecting the "receive only" mode, CPU fills the received data into the receiving registers and set
the length after it has received a packet of message, and starts to receive the next packet of message
immediately.
2:
When selecting the "receive then transmit" mode, CPU fills the received data into the receiving registers
and set the length after it has received a packet of message; then it starts to wait for the reply data
length which is not zero to start transmitting reply data (therefore when select this mode, it must control
the reply data length to be zero before the reply data completely filled into the reply registers; when the
reply data fills into the reply registers finished, it may then set the length of reply data).
3:
It must fills the starting code and ending code into the starting/ending code register before the starting of
receiving (e.g. SR+1=0A0DH, 0AH stands for starting code and 0DH for ending code), so as to ensure
it to be free from receiving error.
The communication protocol with starting/ending code makes the identifying of every packet of
messages easy, and the communication program is simple and efficient.
4:
If the receiving message without starting code, fills the high byte of starting/ending code with 0; if the
receiving message without ending code, fills the low byte of starting/ending code with 0. Adjusting High
Byte of R4148 (new message detection time interval) to detect whether a packet of message has
been received completely, the unit is 0.001 seconds (default is 0CH, 12ms). The communication
protocol without ending code depends on new message detection time interval to tell whether it
has received completely for a packet of data (the setting of new message detection time interval
must be greater than the maximum delay time between data bytes to be received), thus it may ensure
the receiving of the whole packet to be completed. Generally speaking, the data in transmitting is
transmitted one byte after another continuously; therefore, if there is pause (greater than new
message detection time interval), it means that the packet of message is transmitted completely.
5:
When selecting "receive only" mode, if the receiving message has no ending code, the interval between
every packet of data sent by the sender must be greater than the receivers new message detection
time interval, otherwise the receiver wont be able to distinguish between each packet of data
correctly.
12-23
WSZ-PLC LINK
FUN151P
CLINK

FUN151P
CLINK

High Byte
Low Byte
WR+0 Result code
WR+1
WR+2
WR+3
WR+4
WR+5
WR+6
WR+7
WR+8 Total amount of data received

WR+9
Data 1
Data 2
Result code =0, OK ; = other values, abnormal.
Working registers for CLINK instruction
WR+4 :
b0=1, Pending
b12= ACT output indication
b13= ERR output indication
b14= DN output indication
The total amount of data byte being received (the register for received
data length; it includes the starting and ending code).
The first byte of data received (if there is the starting code, it is the
starting code); High byte =0.
The second byte of data received; High byte =0.
Data N
The N_th byte of data received (if there is the ending code, it is the
ending code); High byte =0.
Note : When CPU received a packet of message, it filled the data to receiving registers and set up the received
data length. Before the LADDER program starts to receive, you may clear the register of received data
length to be 0. It means that when the received data length is zero resulting from by comparing, it receives
a new packet of message. After the LADDER program gets the received data, it clears the received data
length register to be 0. Just compare to see the received data length register is not zero means the
receiving of a packet of new message, and so it may easily to process the receiving action.
Result code :
0, data transaction is successful.

2, the data length is error (the value is 0, or the transaction is greater than 511).
A, unable to reply message within Time-out span ("receive then transmit" mode).
B, communication abnormal (received error data)
Output indication :
ACT
ON : In receiving state
ERR ON : Error occurred in previous packet of transaction, it will be ON for a scan time
DN
ON : The previous packet of transaction completed without error, ON for a scan time.
12-24
WSZ-Controller LINK
FUN151P
CLINK

(Controller serve as the master of WSZ high speed CPU Link network through Port2)
FUN151P
CLINK
Pt: Only port 2 is valid.

MD: 3, serve as the master station of WSZ High
Speed CPU Link network.
SR: Starting register of communication program
Pt: Starting register for instruction operation (see
example for its explanation). It controls 8 registers,
the other programs can not repeat in using.
Range
Operand
Pt
MD
SR
WR
HR
ROR
DR
R0
R5000
D0
R3839
R8071
D3999
2
3
Descriptions
1. FUN151: MD3, it provides high speed data sharing between WSZ controller (data response time will not be
influenced by the scan time of controller).
2. A master controller can link with 254 slave controllers at the most to share data through the RS-485 interface.
3. FUN151: MD3 is required only by master controller, not by the slave controller.
4. The station number of master controller must be No.1, or it should be assigned by R4054 register if which is
not No.1 but needs to be as the master.
5. The setting of M1958 for slave controller must be ON (M1958 OFF is for non-high speed link), but its not
necessary for master controller.
6. In high speed linking, the maximum Baud Rate is 921.6K bps and minimum is 38.4K bps (adjustable); the data
bit is fixed at 8 Bits. Data is transmitted with binary code (which is twice time as fast as ASCII Code), and the
error checking is adopting CRC-16, which is more reliable than Checksum.
7. The principle of high speed linking data transmission is based upon the COMMON DATA MEMORY concept to
design; e.g. as the master controller sent out the content of R0 to R31, .the contents of R0R31 for all the
slave controllers will be the same as the masters; when slave controller No.2 sent out the contents of R32
R47, the R32R47 contents of master controller and other slave controllers will be the same as controller
station No.2s, etc.
8. When controller is in STOP mode, the Port 2 enters into the standard interface mode that it can connect to
WinProladder, HMI, or graphic supervisor (the communication parameter is set by R4158).
9.
It employs the program coding or table filling method to plan for data flow control; i.e. for what kind of data
being sent from which controller station to all the controller on line, it takes only 7 registers (5 of which is being
physically used, and 2 reserved) to define; every 7 registers define once communication transaction.
10. When execution control EN changes from 01 and both pause PAU and abort ABT are 0, this instruction
will control Port 2 and set M1962 to be 0 (being controlled) and processing the data transaction immediately,
suppose the Port 2 is not controlled by other communication instruction (M1962=1).
If Port 2 is being
controlled (M1962=0), this instruction will enter into wait state until the controlling instruction completes the
transmission or pause/abort the operation to release the control right (M1962=1); then it enacts from wait
12-25
WSZ-PLC LINK
FUN151P
CLINK
( Controller serve as the master of WSZ high speed CPU Link network through
Port2)
FUN151P
CLINK
state, engages in the transmitting transaction and sets M1962 to be 0.

11. When pause PAU or abort ABT of input is 1, it escapes from high speed data link immediately (M1962
ON).
12. Within the high speed linking, the output indication ACT is ON; Port 2 is occupied.
13. When there is error occurred while it is starting the high speed linking, the output indication ERR will be ON,
and the high speed linking will not be performed.
Interface signals
M1958 : While in the WSZ high speed data linking, slave controller must set M1958 ON (not necessary for
master controller). For non high speed data linking of controller, the slave controller must set M1958
OFF.
M1962 : The signal is generated from CPU.
ON represents the Port 2 is available.
OFF represents the Port 2 is occupied.
M1963 : The signal is generated from CPU.
When M1967 is ON (this signal is controlled by the user program) and after the last packet of
communication transaction is completed, the CPU sets M1962 and M1963 ON, and the high speed
data transmission will be stopped; it must control ABT (transmission abort) to be ON, and then restart
execution control EN to change from 01 before the high speed linking can restart.
When M1967 is OFF (this signal is controlled by the user program), the high speed data transmission
will automatically restart a new transmission from the first packet of communication transaction (M1962
and M1963 is keeping OFF state) after the last packet of communication transaction is completed.
M1967 : One-time or cycling control (controlled by the user program)
ON, one cycle, it will stop after the last packet of data transaction is performed completely.
OFF, successive cycles, it will restart from first packet of transaction when it has finished the last packet
of transaction.
R4054 : It assigns the controller station which is not No.1 to act as the master of high speed linking.
R4054
High byte
Low byte
55
Station number.
When the station number of the controller is not number 1, fills its station number (low byte of R4055
stores the station number) into the low byte of R4054 and writes to high byte of R4054 with 55H, and
then controls the execution control input EN from 01; even though the controller station which is
not no.1, it can still be the master station for high speed linking.
R4055 : When high byte of R4055 is not 55H, Low byte of R4055 shows the station number of controller.
When high byte of R4055 is 55H, Low byte of R4055 defines the station number of controller.
R4058 : Showing the station number of slave controller which is abnormal while high speed linking (0:
Represents normal; if many slave controller were abnormal in the mean time, it is possible to see only
one number; after the debugging of abnormal and clear R4058, and if the value of R4058 stays 0, it will
then network works normal). In communication transaction program or table, it must exist the case for
slave station to send data to other stations then can the master controller detect whether the slave
station is online without error; if in the communication transaction program or table, there is only the
master station sending data to slave stations, the master controller cant detect whether slave controller
12-26
WSZ-Controller LINK
FUN151P
CLINK
Port2)
FUN151P
CLINK
is on line without error. The user must employ programming skill to add abnormal detecting program
to the master controller and slave controller to do the error checking (as a matter of fact, the program
is very simple; just makes the controller, which is sending data, to create an ON OFF variation
signal. Once the receiving controller does not detect the ON OFF variation signal in a period of
time, it means that there is communication error).
R4059:
Error logging of abnormal slave controller while high speed linking.

High byte
Abnormal code
R4059
Low byte
Abnormal count
Low byte : Abnormal count summation

High byte : Abnormal code
OAH, No response from slave station
OBH, Error data
01H, Framing Error
02H, Over_Run Error
04H, Parity Error
08H, CRC error
Explanation for the checking method for abnormal communication is the same as that for R4058.
R4160 : Port 2 Rx/Tx Time-out setting (in high speed linking). The system will base on the setting of R4161
communication parameter to produce pertaining set point if high byte of R4160 is not 56H, the user
need not to set it. If high byte of R4160 is 56H, the low byte of R4160 is reserved for manual setting.
R4161 : Communication parameter setting register for Port 2 High Speed CPU Link.
Program example 1 (Controller No. 1 serves as the master of high speed data linking)
M100
M1963 M1967
Planning R5000R5199 to be ROR, the

communication program will be stored together
M0
EN
Pt :
MD:
M100
with LADDER program.
151P.CLINK
2
3
PAU SR: R5000

WR: R100
ABT
M1
ACT
When M1967 is ON, performs one cycle

transmission. It must start the abortion, then
M2
ERR
restart M0 before it can perform high speed data

link again.
DN
12-27
WSZ-PLC LINK
FUN151P
CLINK

Port2)
FUN151P
CLINK
Program example 2 (Controller which station number is not no.1 serves as the master of high speed data
linking.)
M0
18.AND
EN
Sa :
R4055
Sb :
00FFH
D :
R4054
D=0
Get controller station number and write it into

R4054.
19.OR
EN
M0
Sa :
R4055
Sb :
5500H
D :
R4054
Set the high byte for R4054 to be 55H
151P.CLINK
EN
Pt :
2
3
MD:
M1
D=0
M2
Planning R5000R5199 to be ROR, the
ACT
communication program will be stored together
M3
PAU SR: R5000

WR: R100
ABT
ERR
DN
with LADDER program.
When ABT is not controlled, M1 instruction needs

not to input.
Program example 3
The same machine sets or equipments (with same LADDER program) perform multi-station data collection
or distributed control through RS-485 high speed linking.
The principle for high speed data linking is based on COMMON DATA MEMORY concept to design; while
designing, it must devise a successive data block and evenly distributed to respective controllers to do data
exchange among controllers.
e.g.:
R1000R1031: The data block of controller No. 1 (through high speed linking, the other controllers
content of R1000R1031 become the same as that of controller No.1).
R1032R1063: The data block of controller No. 2 (through high speed linking, the other controllers
content of R1032R1063 become the same as that of controller No.2).
For example, get the production data (stored at R0R31) from each machine set, and collectively
gathering R1000R1639 (suppose there are 20 sets linking) stored in master controller through RS-485 high
speed data linking; it needs merely the master controller of high speed linking to connect to HMI or graphic
supervisor, then it can monitor and store, for follow up processing, the production data of respective machine
sets with real time effect.
Note : If it is simply for data collection and monitoring and no need to do real time control, employs the FUN151:
MD0 can easily and concisely accomplish the assignment; when requiring real time control or supervisoring,
it must employ FUN151: MD3 to accomplish a speedy, precisely controlling demand.
12-28
WSZ-Controller LINK
FUN151P
CLINK

Port2)
18.AND
EN
EN
Get controller station number and write it in pointer Z.
Sa :
R4055
Sb :
00FFH
D :
16
(-1)
D=0
UDF
Station number deducts 1.
D=0
R2000 = Length of data to be sent from each station (e.g. 32).

data length * (station number1):
13.(*)
EN
Sa : R 2000
Sb :
D :
D<0
103.BT_M
EN
Ts : R
FUN151P
CLINK
Directing to the apportioned data block of this station.
Move production data from respective stations to the

apportioned data block of respective stations, and
Td : R 1000Z
transmitting it to all other controllers on line through high
D : R 2000
speed data linking.
Explanation for operand SR of FUN151: MD3

SRStarting register for communication program of CLINK instruction
SR+0
Packets of data
transaction
SR+1
Station number to transmit
SR+2
Command code
SR+3
Length of this packet of

data
SR+4
Data type
SR+5
Data starting reference
SR+6
Reserved
SR+7
Reserved
SR+8
Station number to transmit
SR+9
04
Length of data
Data type
Reserved
Reserved
Low Byte is valid. A packet of transmission demands 7 registers to

describe; i.e. 7 registers define a packet of data.
Low Byte is valid. 1254

Low Byte is valid, it can only be 4 (high speed linking command).
Low Byte is valid. 132, defines the data length of one
transaction.
Low Byte is valid. 12R; 13D.

Word is valid. Defines starting number of working data.
Code for data type
12: R data register
03839
13: D data register
03999
Describing for the 2_nd packet of transaction
12-29
WSZ-PLC LINK
FUN151P
CLINK
Port2)
FUN151P
CLINK
Explanation for operand WR of FUN151:MD3

High Byte
WR+0
Low Byte
Result code
WR+1
WR+7
Result code:
0 : Correct format
2 : Data length error (Length is 0 or greater than 32.)
3 : Command code error (Command is not equal to 4.)
4 : Data type error (Data type is not 12 nor 13.)
5 : Data reference error
For easy programming and trouble shooting, the Winproladder provides the table editing environment to edit
Communication Table for FUN151:MD3

* Only Port 2 is valid for FUN151MD 3
Sequence
No.
0nnn
Command
High Speed
Link ( =4 )
Station No.
Data
Station number to The data will be

transmitted.
transmit the data
1254
R0R3839
D0D3999
12-30
All Station
The data
will be received.
R0R3839
D0D3999
Length
Data length of
this transaction
132
WSZ-Controller LINK
FUN151P
CLINK
FUN151P
CLINK
CPU Link by Way of Port 1 to Connect to Modem
Controller can connect to MODEM through communication port 1, and by way of telecommunication network to
link and share data with remote controller. Its application is as follows:
Perform automatic data collection from the remote end.

Automatically report for alarm and abnormal conditions.
Associate with current available graphic supervisoring software or HMI etc. standard products to constitute a
wide area network automatic monitoring system. It doesnt need to develop specific designing, so as to
reduce the development risk and time limit.
Hardware configuration, and setting :

Data
collection
controller
Data
collection
PLC
SCADA
or
MMI
HMI
or
WinProladder
Data
reply
controller
Data
reply
PLC
M
O
D
E
M
FBWSZ
S-PLC
controller
M
O
D
E
M
FBWSZ
S-PLC
controller
Data collecting controller:

Dont need to store phone number within the CPU.
High Byte of R4149 = 55H (MODEM function)
Data
reply
controller
Data
reply
PLC
Data reply controller:

High Byte of R4149 = 55H (MODEM function)
R4140R4145 sets the phone number for general data
collecting controller end (extension phone function
allowed). e.g. Phone number is 02-28082192, then
M
O
D
E
M
WSZ
WSZ-PLC
FB
S -PLC
controller
R4140=8220H, R4141=1280H, and R4142=0E29H.

If phone number is: 02-28082192 ext 100, then R4140=2A20H, R4141=2808H, R4142=A291H, R4143=AAAAH,
R4144=001AH, R4145=000EH.
Explanation: R4140R4145 is telephone number register for dialing;
E is the ending character of phone number; A is the dial delaying character (usually the dialing of extension
number or international long distance call can be reached by making use of dial delaying, the delayed time for
a delaying character is based on MODEM setting, which is about 2 second). B stands for # character (can
dial B. B. CALL), and C stands for * character.
It employs CLINK (FUN151:MD0) instruction to write data to the general data collecting controller or to read
data from general data collecting controller (refer to FUN151:MD0 Instruction user guide).
*** The maximum communication Baud Rate can reach 115200 bps (both of the communication ends must be
consistent in setting).
Let the communication parameters be 8-bit and Non-parity will be better for almost Modem.
12-31
WSZ-PLC LINK
FUN151P
CLINK
FUN151P
CLINK
The wiring of WSZ communication port1 and MODEM

WSZ controller DB-9
MODEM DB-25
PIN
PIN
PIN
PIN
PIN
3 RXD
2 TXD
8 RTS
7 CTS
5 SG
TXD
RXD
CTS
RTS
SG
DSR
PIN_3
PIN_2
PIN_4
PIN_5
PIN_7
PIN_6
DTR
PIN_20
MODEM dialing interface signal

M1959 : OFF, dialing by Tone ;
ON, dialing by Pulse
M1964 : OFFON, dial up ;
ONOFF, hang up
R4163 : The Low Byte of R4163 is used to control the application of X instruction while MODEM dialing.
=1, it does not detect dial tone nor busy tone while MODEM dialing.
=2, it detects only dial tone but does not detect busy tone while MODEM dialing.
=3, it dials directly without detecting dial tone, but will detect busy tone after MODEM dialing.
=4, it detects both dial tone and busy tone for MODEM dialing.
For other values, it works as 4; different country system needs to adjust the setting pertaining to the
country.
The High Byte of R4163 is used to set the ring count for auto answer mode of Modem.
M1964
LADDER
Hang up
Dial up
Hang up
Dial up
M1965
Connect
CPU
M1966
CPU
Connect
Disconnect
Disconnect
Note 1 : Of M1965 and M1966, there will be only one ON, not both to be ON at the same time.
2 : The waiting time for dial connection is 1 minute; if unable to connect, it will redial twice (totally 3 times).
If all of the dial connection tries failed, CPU will set M1966 to be ON (connection failed).
3 : When the quality of communication is not stable and easy to disconnect, you may employ the abnormal
detecting function of CLINK instruction to control M1964 redials for connection (delay time of redial must
be more than 10 seconds).
4 : When controller change from RUN to STOP, the CPU will automatically change MODEM to be receiving
state, which could accept the remote side dial connection.
5 : When controller is not in dialing or MODEM connection states, CPU will automatically change MODEM to
be receiving state, which could accept the remote side dial connection.
12-32
WSZ-Controller LINK
FUN151P
CLINK
FUN151P
CLINK
Program example
When M0 changes from 01, dials up.
M0
EN
PLS
C0
SET
M 1964
EN
PV :
EN
CLR
RST
Clear the transaction count.

CUP
C0
3
Hang up after transactions completed
M 1964
or connection failed.
M 1966
M 1960 M 1965
C0
1 5 1 P .C L IN K
EN
PAU
Pt :
MD:
SR:
W R:
R 5000
R 100
PLS
C0
C LR
PV :
M 101
ERR
M 102
DN
ABT
M 1961
M 100
ACT
CUP
3
12-33
Planning R5000R5199 to be ROR,

the communication program will be
stored together with LADDER
program.
Count after all transactions completed.
12.2
Application for FUN150 (Modbus) Instruction
12.2.1
Procedures for Usage

Sta r t
Hardware wiring to connect the various

stations (controller, ASCII peripherals, etc.)
Set up the station number of the linking

stations and make a consistent
communication parameters setting for these
stations.
Fill in the value to the communication

interface register (Rxxxx) of FUN150
(Modbus) if necessary; properly adjust the
Time-out timer to detect communication error,
transaction delay to meet slow response
device , etc.
Station number can be set to any one between 1 to 254

without replication.
For communication parameters, please refer to the

description of "Communication Related Setting".
Write FUN150 instruction to controller, which

serves as the master station or performs
communication sender/ receiver, and then
fill the communication program into the
register table assigned by operand SR.
FUN150 will then automatically send or
receive data according to the definition of
communication program. The user can
easily reach the various function services of
Modbus by accessing the table type of
communication program.
End
12.2.2
Explanation Application Program for FUN150
This section will instruction to explain FUN150 (Modbus) usages, with respective practical application program
examples.
12-34
WSZ-Controller LINK
FUN150P
M-BUS
Convenient Instruction for Modbus RTU Master

Which makes controller as the Modbus RTU master through Port 12
FUN150P
M-BUS
Pt 12 specify the communication port to work as the

Modbus RTU master.
SR Starting register of communication program
WR Starting register for instruction operation. It controls
8 registers, the other programs can not repeat in
using.
Range
Operand
Pt
SR
WR
HR
ROR
DR
R0
R5000
D0
R3839 R8071 D3999
12
Descriptions
1.
FUN150 (M-BUS) instruction makes controller act as Modbus RTU master through Port 12, thus it is very
easy to communicate with the intelligent peripheral with Modbus RTU protocol.
2.
3.
Only the master controller needs to use M-BUS instruction.
4.
5.
When execution control ENchanges from 01 and the input ABT is 0, and if Port 1/2 hasnt been
controlled by other communication instructions [i.e. M1960 (Port1), M1962 (Port2) = 1], this instruction will
control the Port 1/2 immediately and set the M1960, M1962 to be 0 (which means it is being occupied), then
going on a packet of data transaction immediately. If Port 1/2 has been controlled (M1960, M1962 = 0), then
this instruction will enter into the standby status until the controlling communication instruction completes its
transaction or abort its operation to release the control right (M1960, M1962 =1), and then this instruction will
become enactive, set M1960, M1962 to be 0, and going on the data transaction immediately.
6.
transaction immediately and release the control right (M1960, M1962 = 1). Next time, when this instruction
7.
WhileA/R=0, Modbus RTU protocolA/R=1, Modbus ASCII protocol.
8.
9.
be ON.
ON.
12-35
WSZ-Controller LINK
FUN150P
M-BUS

FUN150P
M-BUS
Interface Signals
Dedicated Relays and Registers for corresponding ports:
Comm Port
Port 1
Port 2
M1960
M1962
M1961
M1963
R4146
R4158
R4147
R4159
Signals

Interval
R4148
1. Port Ready Indicator This signal is generated from CPU.

2. Port Finished Indicator : This signal is generated from CPU.

When the communication program completed the last packet of data transaction, this signal will be ON for
one scan time (for successive data transaction).
When the communication program completed the last packet of data transaction, this signal will be still
ON (for single packet of data transmission).
3. Port Communication Parameters :

The register is for communication parameters setting of corresponding port (please refer to the chapter of
communication parameters setting).
4. TX Delay & RX Time-out Span :

The content of Low Byte defines the receive time-out span of M-BUS instruction; its unit is 0.01 seconds
(the default is 50, which means 0.5 seconds).
The M-BUS instruction employs receive time-out span to judge whether the slave station on line or not.
When the master controller sent out the read/write command to the slave station, the slave station didnt reply
within this period means that there is abnormal event in communication called Time-out. When there are
multi-drop linking, properly adjust this value (greater than 1 scan time of the slave station with the longest scan
time) to shorten the communication response time among the active linking stations if there are many slave
stations power off (The time-out cases will happen).
The content of High Byte defines the transmission delay time between two packets of data transaction for
M-BUS instruction; its unit is 0.01 seconds (the default is 0).
For point to point link, this value can be set as 0 to shorten the communication transaction time and
promote the communication efficiency. In the case of linking multi-drop and if the scan time of master
controller is far longer than any slave station, this value can also be set to 0 to shorten the communication
transaction time and promote the communication efficiency. When there are multi-drops linking and the scan
time of master controller is close to that of slave station's, it must properly adjust this value (greater than 1
scan time of the slave station with the longest scan time) to reach the best, error-free communication quality.
12-36
WSZ-Controller LINK
FUN150P
M-BUS

FUN150P
M-BUS
5. New Message Detection Time Interval:

While the communication port being used as the master or slave of Modbus RTU protocol, the system will
give the default time interval to identify each packet of receiving message, if the default works not well, the
user can set this time interval through the high byte setting of R4148 and let M1956 be 1, to avoid the overlap
of different packet of message frame.
FUN150 convenient instruction, if the communication protocol without the end of text to separate each
Program example (Automatic cycling transmission)
M 1 M 1960
1 5 0 P .M _ B U S
EN
A /R
Pt :
SR:
W R:
1
R 5000
D0
M 10
ACT
M 11
ERR
M 12
DN
ABT
Configure R5000R5399 as the read only

register (ROR) before programming, after
then, when storing program, the ladder
program will
automatically contains the
communication program .
M 11
0 8 D .M O V
EN
S :
D
When there is communication error, gets
D0
and stores the error message to D1000 &
D 1000
D1002 would be helpful for error analysis

M 2 M 1962
1 5 0 P .M _ B U S
EN
A /R
Pt :
SR:
W R:
2
R 5200
D20
M 20
ACT
M 21
ERR
M 22
DN
ABT
M 21
0 8 D .M O V
EN
S :
D
D 20
D 1002
12-37
or logging.
WSZ-Controller LINK
FUN150P
M-BUS

FUN150P
M-BUS

1. When execution control ENchanges from 01, and Port 1 is not occupied by other communication
instruction (M1960 ON), M-BUS instruction will start the data transaction. The M1960 is OFF during data
transaction, and when the transaction is finished, the M1960 becomes ON. Employ the OFFON change
of M1960 (M-BUS execution control EN = 01 means starting) may automatically starts for every packet of
data transaction successively (when the last packet of transaction is completed, it will automatically return to
the first packet of transaction to obtain the automatic cycling transmission).
2. When execution controlENchanges from 01, and Port 2 is not occupied by other communication
instruction (M1962 ON), M-BUS instruction will start the data transaction. The M1962 is OFF during data
transaction, and when the transaction is finished, the M1962 becomes ON. Employ the OFFON change
of M1962 (M-BUS execution control EN = 01 means starting) may automatically starts for every packet of
data transaction successively (when the last packet of transaction is completed, it will automatically return to
the first packet of transaction to obtain the automatic cycling transmission).
Editing Communication Table with WinProladder

Click the Modbus Master Item which in project windows:
Project name
Table Edit
Modbus Master
Click right button and select Add Modbus Master Table
12-38
WSZ-Controller LINK
FUN150P
M-BUS

Table Type: It will be fixed to Modbus Master Table .
Table Name: For modify or debug, you can give a convenient name.
Table Starting address: Enter the address which Starting register of communication Table.
12-39
FUN150P
M-BUS
WSZ-Controller LINK
FUN150P
M-BUS

FUN150P
M-BUS
Starting register for communication program of M-BUS instruction

SRStarting register for communication program of M-BUS instruction
SR+0
A5h
SR+1
07h
SR+2
50h
A550h, it means valid M-BUS program.
Total
Low ByteTotal number of transactions, one transaction needs 7
transactions
Slave station No. Which is

about to transact with
registers to describe.
Low Byte is valid, 0 247 (0 means that master controller

broadcasts the data to all slaves, the slaves do not reply).
Low Byte is valid ; =1, means "Read data from slave station"
SR+3
Command code
=2, means "Write multiple data to slave station".

=3, means "Write single data to slave station".
SR+4
SR+5
SR+6
SR+7
SR+8
SR+9
SR+10
SR+11
SR+12
SR+13
SR+14
SR+15
Data length of this

transaction
Data type of Master
controller
Starting reference of
Master controller
Data type of slave station
Slave station
Low Byte is valid; the range is 1125 (Reg.) or 1255 (Dis).

Low Byte is valid, and its range is 13 or 1213; it defines the
data type of master controller (see next page).
Word is valid; it defines the starting address of data (master).

Low Byte is valid, and its range is 0 or 4; it defines the data type
of slave station (see next page).
Word is valid; it defines the starting address of data (slave).
Slave station No. which is

about to transact with
Command code
Data length of this
transaction
Data type of Master
Description of the 2_nd packet of transaction
controller
Master controller
Data type of slave station
Slave station
SR+2+
n7
Reserved
N is the total number of transaction
12-40
WSZ-Controller LINK
FUN150P
M-BUS
z

Data code, type and reference number of Master station (WSZcontroller)
Data code
1
2
3
12
13
z
FUN150P
M-BUS
Data type
YOutput Relay
MInternal M Relay
SStep Relay
RData Register Rxxxx
DData register Dxxxx
Reference number
0255
01911
0999
03839
03999
Data code, type and reference number of Slave station (Modbus slave)
Data code
0
4
Data type
Discrete Output
Holding register
Reference number
165535
165535
Note: The data type for master and slave must be consistent.
i.e. if the master station is any value between 1 to
3, the slave station must be the value 0; if the master station is any value between 12 to 13, the slave
station must be the value 4.
WRStarting register for instruction operation of M-BUS (FUN150)

High Byte
WR+0
WR+1
Result code
Low Byte
Transaction
Result code indicates the transaction result; 0 means "Normal", other
No.
Transaction No. indicates which one is in processing (beginning from 0).
Station
Command
number
code
WR+2
For internal working use
WR+3
WR+4
WR+5
value means "Abnormal".
Station number: the slave station No. which is in transaction.

Command code =01H, reading coil status from slave station
=03H, reading holding registers from slave station
=05H, force single coil to slave station
=06H, preset single register to slave station
=0FH, force multiple coils to slave station
=10H, preset multiple registers to slave station
WR+4 B0=1, Port has been occupied and this instruction is waiting to
acquire the transmission right for data transaction.
WR+6
WR+7
B4=1, this instruction is not first time performing.

B12, output indication for ACT
B13, output indication for ERR
B14, output indication for DN
Result code : 0, Transaction is successful.

2, Data length error (For length is 0 or over limit.)
3, Command code error (Command code is 0 or greater than 3.)
4, Data type error
5, Reference number error
12-41
WSZ-Controller LINK
FUN150P
M-BUS
FUN150P
M-BUS

6, Inconsistence in data type (e.g. master station is 13 while slave is 1213.)

7, Port error (Not Port 12)
8, Invalid communication table
A, No response from slave station (Time-out error)
B, Communication error (Received error data or exception reply)
For easy programming and trouble shooting, the WinProladder provides the table editing environment to edit
M-BUS Communication Table

Sequence
No.
0 nnn
Command
Read (=1)
Write (=2)
Write single (=3)
Slave
Data of Master
The station number

of slave which is
about to transact
with
Station No.=0,
It means
broadcasting,
there will not
any response
from the slave,
Length
The data type
The data type
of Master for
of Slave for
this
this
While Register,
transaction
transaction
1125
Y0Y255
000001
While Discrete,
M0M1911
S0S999
Station No.=N,
It means the station
number of slave
which is about to
transact with;
Data of Slave
R0R3839
D0D3999
065535
Quantity of this
1255
400001
465535
N=1247
WinProladder provides the user friendly table edit for M-BUS Master
Sequence
No.
Command
Read
1 247
Write
0 247
Slave
Data of Master
Y0 Y255
M0 M1911
S0 S999
R0 R3839
D0 D3999
Y0 Y255
M0 M1911
S0 S999
R0 R3839
D0 D3999
Data of Slave
.
.
.
12-42
000001 065535
000001 065535
000001 065535
400001 465535
400001 465535
000001 065535
000001 065535
000001 065535
400001 465535
400001 465535
Data length
1 255
1 255
1 255
1 125
1 125
1 255
1 255
1 255
1 125
1 125
WSZ-Controller LINK
FUN150P
M-BUS
Modbus Communication Protocol (Slave) Data Address

Transfer Principle with WSZ Controller
FUN150P
M-BUS
WSZ-controller can use FUN150 to be Modbus protocol Master, besides it also can be Modbus communication
Slave by configuration(Port1Port2, but Port0 fixed to original standard communication protocol) then it can
connect with the intelligent peripheral.
Modbus Communication Protocol setting register(R4047) :

R4047 : Upper Byte
= 56H, configure the communication port for Modbus RTU (ASCII) protocol.
= Other values, Port12 dont support Modbus RTU (ASCII) protocol (The defaults are
original protocol).
Lower Byte : Port assignment for Modbus RTU (ASCII) protocol

Format as below :
Upper Byte
5H
Lower Byte
b7
b6
b5
b4
b3
b2
b1
b0

b4b7, Reserved
* It allows to assign multiple ports for Modbus RTU protocol, where the corresponding bit must be 1.
For example : R4047=5602H, Assign Port 1 as Modbus RTU protocol;
R4047=560AH, Assign both Port 1 and Port 2 as Modbus RTU protocol;
Modbus and WSZ Data Address Transfer Principle in the Table below :
Mapping Rule
Modbus
WSZ
5
Code
0XXXX
Discrete elements of Ynnn, Xnnn, Mnnnn, Snnn, Tnnn, Cnnn
4XXXX
Data Registers of Rnnnn, Dnnnn, Tnnn, Cnnn
6
Code
00XXXX
Discrete elements of Ynnn, Xnnn, Mnnnn, Snnn, Tnnn, Cnnn
40XXXX
Data Registers of Rnnnn, Dnnnn, Tnnn, Cnnn
12-43
WSZ-Controller LINK
FUN150P
M-BUS

Transfer Principle with WSZ controller
Available Range (5 Codes)

Modbus
WSZ
Description
00001 00256
Y0 Y255
Discrete Output
01001 01256
X0 X255
Discrete Input
02001 04002
M0 M2001
Discrete M Relay
06001 07000
S0 S999
Discrete S Relay
09001 09256
T0 T255
Status of T0T255
09501 09756
C0 C255
Status of C0C255
40001 44168
R0 R4167
Holding Register
45001 45999
R5000 R5998
Holding Register or ROR
46001 48999
D0 D2998
Data Register
49001 49256
T0 T255
Current Value of T0T255
49501 49700
C0 C199
Current Value of C0C199 (16-bit)
49701 49812
C200 C255
Available Range (6 Codes)

Modbus
WSZ
Description
000001 000256
Y0 Y255
Discrete Output
001001 001256
X0 X255
Discrete Input
002001 004002
M0 M2001
Discrete M Relay
006001 007000
S0 S999
Discrete S Relay
009001 009256
T0 T255
Status of T0T255
009501 009756
C0 C255
Status of C0C255
400001 404168
R0 R4167
Holding Register
405001 405999
R5000 R5998
Holding Register or ROR
406001 408999
D0 D2998
Data Register
409001 409256
T0 T255
Current Value of T0T255
409501 409700
C0 C199
409701 409812
C200 C255
12-44
FUN150P
M-BUS
WSZ-Controller LINK
FUN150P
M-BUS

Transfer Principle with WSZ Controller
Special Register and Relay Available Range
Modbus
WSZ
02001 03912
M0 M1911
03913 04002
M1912 M2001
Description
General purpose Internal Relay
Special Internal Relay
40001 43840
R0 R3839
General purpose Register
43841 43904
R3840 R3903
Analog or Numeric Input Register
43905 43968
R3904 R3967
Analog or Numeric Output Register
43969 44168
R3968 R4167
Special Register
12-45
FUN150P
M-BUS
Chapter 13
The NC Positioning Control of WSZ-Controller
People use ordinary motor to exercise positioning control in early stage; since the speed and precision demand
was not so high then, it was enough to fulfill the demand. As the increasing of mechanical operation speed for the
efficiency purpose, finished product quality standard, and precision demands are getting higher, the stopping position
control of motor is no more what the ordinary motor is capable to do. The best solution for this problem is to adopt NC
positioning controller which incorporate with stepping or servo motor to do the position control. In the past, the extremely
high cost limited the prevailing of its usage; however, the technology advance and cost decreasing, which made the
pricing affordable, had helped to increase the prevailing of usage gradually. To cope with this trend, the WSZ-controller
integrated into its internal SoC chip the special NC positioning controller that is available on the market, therefore makes it
free from the bothersome data transaction and linking procedure between controller and special NC positioning controller.
Furthermore, it greatly lowered the entire gadget cost hence provides the user the solution for a good bargain, high quality,
simple, and convenient integrated NC positioning control with controller.
13.1 The Methods of NC Positioning

The methods for controlling interface of controller and stepping or servo driver are as follows:
z Giving command by way of digital I/O: Easy to use but less dexterity in application.
z Giving command by way of analogue output: Better dexterity in controlling reaction but it is with a higher cost and
easy to be interfered by noise.
z Giving command by way of communication: There is no standard for communication protocol and it is confined in
communication reaction thus constitutes a bottleneck for application.
z Giving command by way of high speed pulse: The cost is low and is easy to precisely controlled.
Of these methods, controlling stepping or servo driver with high speed pulse is more frequently used method. The
main unit of controller contains multi-axis high speed pulse output and hardware high speed counter, and it can provide
easy using, designing for positioning program editing. Therefore it makes the related application even more convenient
and comfortable. Following two kinds are frequently used NC server system that constituted by controller associates with
servo drivers:
z Semi closed loop control
The controller is responsible for sending high speed pulse command to servo driver. The motion detector
installed on servo motor will forward the shift detection signal directly to server driver, and closed loop reaches
only to server driver and servo motor. The superior point is that the control is simple and the precision is
satisfactory (which is suitable for most of the applications). The defect is that it cant fully reflect the actual
shift amount after the transmission element; furthermore, the element being consumed, become aging, or has
defect will not be able to be compensated nor checked to verify.
z
Closed loop control

The controller is responsible for sending high speed pulse command to servo driver. In addition to that the shift
detection signal installed on servo motor which will be forwarded directly to servo driver, the attached shifting
detector installed after the transmission element can fully reflect the actual shift amount and forward it to the
high speed counter that controller contains. So as to make the control becomes more delicate, and help to
avoid the defect of above mentioned semi closed loop.
13.2 Absolute Coordinate and Relative Coordinate

The designation of moving distance can be assigned by absolute location (absolute coordinate positioning), or
assigned by relative distance (relative coordinate positioning). And the DRV instruction is used to drive motor.
While marking the moving distance with absolute coordinate,
if it is located at 100mm at the present, for moving to 300mm, the positioning instruction is : DRV ABS, ,300 , Ut
if it is located at 300mm at the present, for moving to 0mm, the positioning instruction is
: DRV ABS, , 0 , Ut.
While marking the moving distance with relative coordinate,
if it is located at 100mm at the present, for moving to 300mm, the positioning instruction is : DRV ADR, +, 200, Ut.
if it is located at 300mm at the present, for moving to 0mm, the positioning instruction is
: DRV ADR, , 300, Ut.
z Absolute coordinate labeling
13-1
Program coding for location of 300mm moving to 0mm:

DRV
ABS,
0,Ut
-100
100
200
300

DRV ABS, ,300,Ut
z Relative coordinate labeling
DRV ADR,,300,Ut
-100
100
200
300

DRV ADR,+,200,Ut
13.3 Procedures of Using WSZ-Controller Positioning Control
Start
Configure the high speed pulse output (HSPSO) function

under WinProladder configuration function. Switch the Y0Y7
For the wiring layout, please refer to section
output of WSZ-controller to HSPSO circuit in the SoC, and
-----determine the working mode of output pulse (U/D, PLS/DIR,
13.4.2.
A/B), and complete the hardware wiring layout between
controller and positioning driver.
Each axis of motor is controlled by one FUN140 (it can also by

more than one, but only one can be active at any time); then
Please refer to FUN140 and its extended
employs the FUN140 extended positioning instruction (SPD,
DRV, etc.) to coding for the needed positioning control ------ positioning instruction for the function and usage
program that will be saved into register block assigned by
explanation.
FUN140 SR operand. Once the FUN 140 input control started,
it can exercise the positioning controls.
If it needs to do close loop control, it can employ the

WSZ-controller hardware high speed counter to count the
feedback pulse (e.g. Encoder etc.) after transmission element
to achieve.
End
13-2
13.4 Explanation for the Positioning Control Hardware of WSZ-Controller
13.4.1
Structure of Output Circuit of HSPSO
According to different main unit, it provides different frequency of output pulse, it includes 200KHz (High speed )
/20KHz (Medium speed) of single ended transistor output model (WSZ-xxMCT2-AC).
High speed pulse output circuit share to use the Y0Y7 exterior output of WSZ-controller. While it is not yet using
the HSPSO function (havent configured the PSO function under configuration function), the Y0Y7 exterior output of
WSZ-controller is corresponding to the Y0Y7 status of internal output relay. When the HSPSO has been configured,
the Y0Y7 exterior output will switch directly to HSPSO output circuit within SoC, which has no relation with Y0Y7
relay inside controller.
The following is the detailed signals list for respective axis output of main unit and the selectable output modes:
Axis No.
Exterior output
PSO0
Output modes
U/D output
P/R output
A/B output
Single PLS output
Y0 , Y1
Y0=U , Y1=D
Y0=P , Y1=R
Y0=A , Y1=B
Y0=PLS
PSO1
Y2 , Y3
Y2=U , Y3=D
Y2=P , Y3=R
Y2=A , Y3=B
Y2=PLS
PSO2
Y4 , Y5
Y4=U , Y5=D
Y4=P , Y5=R
Y4=A , Y5=B
Y4=PLS
PSO3
Y6 , Y7
Y6=U , Y7=D
Y6=P , Y7=R
Y6=A , Y7=B
Y6=PLS
13.4.2
Hardware Wiring Layout for WSZ-Controller Positioning Control
Take the 0th axis (PSO0) of WSZ-XXMCT2-AC main unit for example, it is illustrated with diagrams as follows; the
others are the same.
A, WSZ-XXMCT2-AC single ended output
Driver (photocouple input)
WSZmain
main unit
unit
FBs
R
Y0
A+
*R
A-
A phase
(or U or PLS)
+
5~24VDC
Y1
External power
power supply
suppl
External
B+
*R
BC0
13-3
B phase
(or D or DIR)
Driver (OP input)

WSZmain
main unit
unit
FBs
Va
*R
Y0
A phase
(or U or PLS)
*R
+
5~24VDC
External power supply
Y1
C0
B phase
(or D or DIR)
13-4
Configuration of HSPSO with WinProladder

Click the I/O Configuration Item which in project windows :
Project name
I/O Configuration
Select Output Setup
When Output Setup windows appear, then you can configure the Output type :
13.5 The Explanation for the Position Control Function of WSZ-Controller

The position control function of WSZ-controller incorporates the dedicated NC positioning controller, which is
available in the market, into the controller. This makes the controller and NC controller be able to share the same data
block without the demand of complicated works like data exchange and synchronized controlling between these two
systems. And it can still use the usual NC positioning control instruction (e.g. SPD, DRV, etc.).
One main unit can control up to 4 axes of their position control, and can drive multi axis simultaneously. It provides
not only point to point positioning and speed control, but also the linear interpolation function. When the system is
applying for more than 4 axes, it can also employ CPU LINK function of WSZ-controller to attain control over more
positioning actions.
The NC position control instruction for WSZ-XXMCT2-AC main unit is used in the control of stepping motor with
lower speed. Of course we can also use WSZ-XXMCT2-AC main unit to drive servo motor, it can still work perfectly,
as long as its circuit structure (single ended) and frequency can match.
13-5
13.5.1
Interface of Stepping Motor
WSZ-XXMCT2-AC main unit
z Stepping motor is designed to receive input pulse to attain to the control of desired angle or distance, therefore the
turning angle and the input pulse count has a positive correlation ship, and the turning speed also depends on the
input pulse frequency.
N (r/min) = 60 f / n
n = 360 / s
Phase
Basic
pulse angle
N
f
n
s
: Revolving speed of motor (r/min)

: Pulse frequency (pulses/sec)
: Pulse counts for motor to turn for a revolution (pulses/ rev).
: Angle (deg)
FULL
Pulse angle
HALF
Pulse counts for

turning one revolution
Pulse angle
Pulse counts for

turning one revolution
0.36
0.36
1000
0.18
2000
0.72
0.72
500
0.36
1000
4 phase
0.90
0.90
400
0.45
800
2 phase
1.80
1.80
200
0.90
400
5 phase
13-6
13.5.2 Interface of Servo Motor

WSZ-XXMCT2-AC main unit
Except that the Y0Y7 of above diagram are for dedicated purpose, Y8Y11 and respective inputs can be
adjusted for using according to demand.
The left over travel, right over travel limit switches for safety detection also need to be connected to controller to
assure proper operation.
13-7
13.5.3
Working Diagram Illustration for Servo Motor
WSZ-XXMCT2-AC
main unit
The Encoder of servo motor feedback the shifting detection signal to servo driver. The driver gets the pulse
frequency, and pulse count of input signal (pulse command), as well as the frequency and pulse count of feedback
signal processed with internal error counter and frequency to voltage conversion circuit, and acquired the pulse and
turning speed deviations. Using these operations to control the servo motor, so as to obtain a high speed, precise
speed and positional closed-loop processing system.
The revolving speed of servo motor depends on the pulse frequency of input signal; the turning stroke of motor is
determined by pulse count.
Generally speaking, the final control error deviation of servo motor is 1 pulse.
13.6 Explanation of Function for NC Position Control Instruction

The NC position control of WSZ-controller has following four related instructions:
z FUN140 (HSPSO) high speed pulse output instruction, which includes following 8 extension positioning
instructions:
1. SPD
5. ACT
2. DRV
6. EXT
3. DRVC
7. GOTO
4. WAIT
8. MEND
Used for positioning program coding and

stored to SR operand area of FUN140.
z FUN141 (MPARA) positioning parameter setting instruction

z FUN142 (PSOFF) enforcing pulse output stop instruction
z FUN143 (PSCNV) converting the current pulse value to displaying value instruction
The following function explanations are for the above mentioned 4 instructions:
13-8
NC Positioning Control Instruction

.FUN 140
HSPSO
High Speed Pulse Output

(Including the extended positioning instruction)
FUN 140
HSPSO
Ps : The set number of Pulse Output (03)

0:Y0 & Y1
1:Y2 & Y3
2:Y4 & Y5
3:Y6 & Y7
SR: Starting register for positioning program
(example explanation)
WR: Starting register for instruction operation (example
explanation). It controls 7 registers, which the other
program cannot repeat in using.
Range
Operand
Ps
SR
WR
HR
DR
ROR
R0
D0
R5000
R3839 D3999 R8071
03
Instruction Explanation
1. The NC positioning program of FUN140 (HSPSO) instruction is a program written and edited with text
programming. We named every position point as a step (which includes output frequency, traveling distance,
and transfer conditions). For one FUN140, it can be arranged with 250 steps of positioning points at the most,
with every step of positioning point controlled by 9 registers.
2. The best benefit to store the positioning program into the registers is that in the case of association with HMI
(Human Machine Interface) to operate settings, it may save and reload the positioning program via HMI when
replacing the molds.
3. When execution control EN=1, if the other FUN140 instructions to control Ps0 3 are not active
(corresponding status of Ps0=M1992, Ps1=M1993, Ps2=M1994, and Ps3=M1995 will be ON), it will start to
execute from the next step of positioning point (when goes to the last step, it will be restarted from the first
step to perform); if Ps03 is controlled by other FUN140 instruction (corresponding status of Ps0=M1992,
Ps1=M1993, Ps2=M1994, and Ps3=M1995 would be OFF), this instruction will acquire the pulse output right
of positioning control once the controlling FUN140 has released the control right.
4. When execution control EN =0, it stops the pulse output immediately.
5. When output pause PAU =1 and execution control EN was 1 beforehand, it will pause the pulse output.
When output pause PAU =0 and execution control is still 1, it will continue the unfinished pulse output.
6. When output abort ABT=1, it stops pulse output immediately. (When the execution control EN becomes 1
next time, it will restart from the first step of positioning point to execute.)
7. While the pulse is in output transmitting, the output indication ACT is ON.
8. When there is execution error, the output indication ERR will be ON.
(The error code is stored in the error code register.)
9. When each step of positioning point is complete, the output indication DN will be ON.
13-9

FUN 140
HSPSO

FUN 140
HSPSO
*** The working mode of Pulse Output must be set (without setting, Y0Y7 will be treated as general output) to
be one of U/D, P/R, or A/B mode, thus the Pulse Output may have a regular output.
U/D Mode : Y0 (Y2, Y4, Y6), it sends out upward counting pulse.
Y1 (Y3, Y5, Y7), it sends out downward counting pulse.
P/R Mode : Y0 (Y2, Y4, Y6), it sends the pulse out.
Y1 (Y3, Y5, Y7), it sends out the directional signal;
ON=upward counting, OFF= downward counting.
A/B Mode : Y0 (Y2, Y4, Y6), it sends out the phase A pulse.
Y1 (Y3, Y5, Y7), it sends out the phase B pulse.
The output polarity for Pulse Output can select to be Normal ON or Normal OFF.
The interfaces for positioning control
M1991
M1992
M1993
M1994
M1995
ON : stop or pause FUN140, slow down and stop pulse output

OFF : stop or pause FUN140, stop pulse output immediately
ON : Ps0 Ready
OFF : Ps0 is in action.
ON : Ps1 Ready
ON : Ps2 Ready
ON : Ps3 Ready
M1996
ON : Ps0 has finished the last step.
M1997
M1998
M1999
M2000 : ON, multi axes acting simultaneously (At the same scan, when execution control EN= 1of FUN140
instructions which control Ps03, their pulses output will be sent at the same time without any time lag).
: OFF, as the FUN140 for Ps03 starts, corresponding axis pulse output will be sent immediately; since
the ladder program is executed in sequence, therefore even the FUN140 for Ps03 started at the same
scan, there must be some time lag between them.
Ps
No.
Ps0
Ps1
Ps2
Ps3
Current output
frequency
DR4080
DR4082
DR4084
DR4086
Current pulse
position
DR4088
DR4090
DR4092
DR4094
The remaining pulse

counts to be transmitted
DR4072
DR4074
DR4076
DR4078
Error code
R4060
R4061
R4062
R4063
R4056 : When the value of low byte=5AH, it can be dynamically changed for its output frequency during the
high speed pulse output transmitting at any time.
When the value of low byte is not 5AH, it can not be dynamically changed for its output frequency
during the high speed pulse output transmitting.
The default value of R4056 is 0.
13-10

FUN 140
HSPSO

FUN 140
HSPSO
R4064 : The step number (positioning point) which has been completed of Ps0.
z Format of positioning program:
SR: Starting register of registers block which reserved to store positioning program, explained as follows:
SR
SR+1
A55AH
Total steps
The effective positioning program; its starting register must be A55AH

1250
SR+2
SR+3
SR+4
SR+5
SR+6
SR+7
The first positioning point (step) of positioning program

(every step controlled by 9 registers).
SR+8
SR+9
SR+10
The Nth step of positioning program.
SR+N9+2
1 3 - 11

FUN 140
HSPSO

FUN 140
HSPSO
z Explanation for working register of instruction operation:

WR is the starting register.
WR+0
Being executed or stopped step
WR+1
Working flag
WR+2
Controlled by system
WR+3
WR+4
WR+5
WR+6
WR+0 : If this instruction is in execution, the content of this register represents the step (1N) being performed.
If this instruction is not in execution, the content of this register represents the step where it stopped at
present
When execution control EN =1, it will perform the next step, i.e. the current step plus 1 (if the current
step is at the last step, it will restart to perform from the first step).
Before starting the execution control EN =1, the user can renew the content of WR+0 to determine
starting from which step to perform (when the content of WR+0 =0, and execution control EN =1, it
represents that the execution starts from the first step).
WR+1 : B0B7, total steps
B8 = ON, output paused
B9 = ON, waiting for transfer condition
B10 = ON, endless output (the stroke operand of DRV command is set to be 0 )
B12 = ON, pulse output transmitting (the status of output indicator ACT)
B13 = ON, instruction execution error (the status of output indicator ERR)
B14 = ON, finished being executed step (the status of output indicator DN)
*** Once the FUN140 instruction has been started (the B12 of WR+1=ON) and if suspended by a shut down for
emergency or switchover from auto to manual mode while the pulse output has not yet completed, this
instruction will be negated at next execution. It must clear the WR+1 register to be 0 before restarts the
instruction next time, so as to make the instruction be initiated again; otherwise, the pulse output will not
appear.
*** Whether execution control EN =0 or 1, in case where the FUN140 instruction every scan, there wont have
the situation mentioned above.
*** When step which has been completed, the output indication DN will turn ON and keep such status if
suspending ; the user may turn OFF the status of DN by using the rising edge of output coil controlled by
"DN" to clear the content of WR+1 register to be 0.
13-12

FUN 140
HSPSO

Error indication
FUN 140
HSPSO
Error code
R4060Ps0
0 : Error free
R4061Ps1
1 : Parameter 0 error
R4062Ps2
R4063Ps3
6
Parameter 5 error
The possible error codes
for FUN141 execution
30 : Error of variable address for speed setting
31 : Error of setting value for speed setting
32 : Error of variable address for stroke setting
33 : Error of setting value for stroke setting
34 : Illegal positioning program
35 : Length error of total step
The possible error codes
36 : Over the maximum step
for FUN140 execution
37 : Limited frequency error

38 : Initiate/stop frequency error
39 : Over range of compensation value for movement
40 : Over range of moving stroke
41 : ABS positioning is not allowed within DRVC commands
Note : The content of error indication register will keep the latest error code. Making sure that no more error to
happen, you can clear the content of error indication register to be 0; as long as the content maintains at 0,
it represents that theres no error happened.
Editing Servo Program Table with WinProladder

Click the Servo Program Table Item which in project windows :
Project name
Table Edit
Servo Program Table
Click right button and select New Table
13-13

FUN 140
HSPSO

Table Type : It will be fixed to Servo Program Table .

Table Name : For modify or debug, you can give a convenient name.
Table Starting address : Enter the address which Starting register of Servo Program Table.
13-14
FUN 140
HSPSO

FUN 140
HSPSO
z

FUN 140
HSPSO
For easy programming and trouble shooting, the WinProladder provides the text editing environment to edit
the motion program(servo program table) for FUN140 execution; Key in the complete FUN140 instruction
first and then move the cursor to the position of it, pressing the hot key Z, then comes the text editing
environment. The user can create the new motion program or display the existed program under this
friendly user interface operation.
Extended positioning instructions are listed as follows:
Instruction
Operand
SPD
XXXXXX or
Rxxxx
or
Dxxxx
DRV
ADR + XXXXXXXXUt
ADR + XXXXXXXXPs
ADR XXXXXXXXUt
ADR XXXXXXXXPs
ADR XXXXXXXXUt
ADR XXXXXXXXUt
ADR XXXXXXXXPs
ADR XXXXXXXXPs
ADR + RxxxxUt
ADR + RxxxxPs
ADR RxxxxUt
ADR RxxxxPs
ADR RxxxxUt
ADR RxxxxPs
ADR + DxxxxUt
ADR + DxxxxPs
ADR DxxxxUt
ADR DxxxxPs
ADR DxxxxUt
ADR DxxxxPs
ABS XXXXXXXXUt
ABS XXXXXXXXUt
ABS XXXXXXXXPs
ABS XXXXXXXXPs
ABS RxxxxUt
ABS RxxxxPs
ABS DxxxxUt
ABS DxxxxPs
Explanation
y Moving speed in frequency or velocity (FUN141 Parameter_0=0
represents velocity; Parameter_0=1 or 2 for frequency; the
system default is frequency). The operand can be input directly
with constant or variable (Rxxxx, Dxxxx); when the operand is
variable, it needs 2 registers, e.g. D10 represents D10 (Low
Word) and D11 (High Word), which is the setting of frequency
or velocity.
y When selecting to use the velocity setting, the system will
automatically convert the velocity setting to corresponding
output frequency.
y Output frequency range: 1output frequency921600 Hz.
*** When the output frequency is 0, this instruction will wait until
the setting value isnt 0 to execute the positioning pulse
output.
y Moving stroke setting in Ps or mm, deg, inch
(When FUN141 Parameter_0=1, the setting stroke in Ut is Ps;
Parameter_0=0 or 2, the setting stroke in Ut is mm, deg, inch;
the system default for Ut is Ps).
y When 4_th operand of DRV is Ut (not Ps), according to
parameter setting of 1, 2, 3 of FUN141, the system will convert
the corresponding pulse count to output.
yThere are 4 operands to construct DRV instruction as follows:
1_st operand: coordinate selection.
ADR or ABS: ADR, relative distance movement
ABS, absolute position movement
2_nd operand:
revolving direction selection (Valid for ADR only).
'+' , forward or clockwise
'' , backward or counterclockwise
' ' ,direction is determined by the setting value
(positive value: forward; negative value: backward).
3_rd operand: moving stroke setting
It can directly input with constant or variable
XXXXXXXX:
(Rxxxx, Dxxxx); it needs 2 registers when
or
adopting the variable, e.g. R0 represents R0
XXXXXXXX
(Low Word) and R1 (High Word) as the
or Rxxxx
setting of moving stroke.
or Dxxxx
*** When the setting of moving stroke is 0 and 1_st operand is
ADR, it represents to revolve endless.
Stroke setting range: 99999999 stroke setting 99999999
4_th operand: resolution of stroke setting
Ut or Ps:for Ut, the resolution is one unit;
(it is determined by parameter 0, 3 of FUN141); for Ps, the
enforced resolution is one pulse.
13-15

FUN 140
HSPSO

Instruction
Operand
DRVC
ADR+XXXXXXXXUt
or
or
or
or
ABS Rxxxx
Ps
or
Dxxxx
FUN 140
HSPSO
Explanation
The usage of DRVC and the operand explanation is the same as
DRVs instruction.
*** DRVC is used to do successive speed changing control (8 speeds
at the most).
*** Of the successive speed changing control, only the first DRVC
instruction can use the absolute value coordinate for positioning.
*** The revolution direction of DRVC can only be decided by + or .
*** The revolution direction only determined by the first DRVC of
successive DRVC instructions; i.e. the successive speed
changing control can only be the same direction.
For example: successive 3 speed changing control
* Pulse frequency = 10KHz.
001 SPD
10000
DRVC ADR+20000Ut * Forward 20000 units.
GOTO NEXT
002 SPD
50000
* Pulse frequency =50 KHz
DRVC ADR+60000Ut * Forward 60000 units.
GOTO NEXT
003 SPD
3000
* Pulse frequency = 3KHz.
DRV ADR+5000Ut
* Forward 5000 units.
WAIT X0
* Wait until X0 ON to restart from
GOTO 1
the first step to execute.
Note: The number of DRVC instructions must be the number of
successive speeds deducted by 1, i.e. the successive speed
changing control must be ended with the DRV instruction.
y The above mentioned example is for successive 3 speeds changing
control, which used 2 DRVC instructions and the third must use DRV
instruction.
y Diagram illustration for the above mentioned example:
f
f2
50000
f1
10000
3000
f3
5000
60000
20000
Ut
Note: Comparison explanation between the relative coordinate positioning (ADR) and the absolute coordinate
positioning (ABS)
To move from position 30000 to 10000, the coding for programming is:
DRV ADR,,40000,Ut or DRV ABS, ,10000,Ut
-10000
10000
20000
30000
To move from position 10000 to 10000, the coding for programming is:
DRV ADR,+,20000,Ut or DRV ABS, ,10000,Ut
13-16
Ut

FUN 140
HSPSO
Instruction
WAIT

Operand
Time, XXXXX
or Rxxxx
or Dxxxx
or X0X255
or Y0Y255
or M0M1911
or S0S999
FUN 140
HSPSO
Explanation
y When pulse output is complete, performing the wait instruction for going
to the next step. There are 5 kinds of operands that explained as follows:
Time: The waiting time (the unit is 0.01 seconds), it can be directly input
with constant or variable (Rxxxx or Dxxxx); when it is time up,
performs the step that assigned by GOTO.
X0X255: Waiting until the input status is ON, it performs the step that
assigned by GOTO.
Y0Y255:Waiting until the output status is ON, it performs the step that
assigned by GOTO.
M0M1911: Waiting until the internal relay is ON, it performs the step that
assigned by GOTO.
S0S999: Waiting until the step relay is ON, it performs the step that
assigned by GOTO.
ACT
EXT
TimeXXXXX
or Rxxxx
or Dxxxx
X0X255
or Y0Y255
or M0M1911
or S0S999
GOTO
NEXT
or 1N
y After the time to output pulses described by operand of ACT, it performs

immediately the step that assigned by GOTO, i.e. after the pulse output for
a certain time, it performs the next step immediately. The action time (the
unit is 0.01 seconds) can be directly input with constant or variable (Rxxxx
or Dxxxx); when the action time is up, it performs the step assigned by
GOTO.
y External trigger instruction; when it is in pulse output (the number of pulses
sending is not complete yet), if the status of external trigger is ON, it will
perform the step assigned by GOTO immediately. If the status of external
trigger is still OFF when the pulse output has been complete, it is the same
as WAIT instruction; waiting the trigger signal ON, then perform the step
assigned by GOTO.
y When matching the transfer condition of WAIT, ACT, EXT instruction, by
using GOTO instruction to describe the step to be executed.
or Rxxxx
NEXT: It represents to perform the next step.
or Dxxxx
1N: To perform the described number of step.

Rxxxx: The step to be performed is stored in register Rxxxx.
Dxxxx: The step to be performed is stored in register Dxxxx.
MEND
The end of the positioning program.
13-17

FUN 140
HSPSO

FUN 140
HSPSO
The coding for positioning programming :

First,it must complete the FUN140 instruction before the editing of positioning program, and assigned in
FUN140 instruction the starting register of registers block to store positioning program. While editing the
positioning program, it will store the newly edited positioning program to the assigned registers block; for
every one positioning point (called as one step) edited, it is controlled by 9 registers.
If there are N
positioning points, it will be controlled by N 9 + 2 registers in total.

Note: The registers storing the positioning program can not be repeated in using.
Format and example for the positioning program 1:

001 SPD
5000
; Pulse frequency = 5KHz
DRV
ADR,+,10000,Ut
; Moving forward 10000 units
WAIT
Time, 100
; Wait for 1 second.
GOTO NEXT
002 SPD
R1000
; Pulse frequency is stored in DR1000 (R1001 and R1000).
DRV
ADR,+,D100,Ut
; Moving forward, the stroke is stored in DD100 (D101 and D100).
WAIT
Time,R500
; The waiting time is stored in R500.
GOTO NEXT
003 SPD
; To perform the next step
R1002
; Pulse frequency is stored in DR1002 (R1003 and R1002).
DRV
ADR,,D102,Ut
; Moving backward, the stroke is stored in DD102 (D103 and D102).
EXT
X0
; When external trigger X0 (slow down point) ON, it performs the next
GOTO NEXT
004 SPD
2000
; step immediately.
; Pulse frequency = 2KHz
DRV
ADR,,R4072,Ps
; Keep outputting the remain (stored in DR4072).
WAIT
X1
: Wait until X1 ON,
GOTO 1
; Perform the next step.
: Perform the first step.
Format and example for the positioning program 2:

001 SPD
R0
; Pulse frequency is stored in DR0 (R1 & R0).
DRV
ABS, D0,Ut
; Move to the position stored in DD0 (D1 & D0).
WAIT
M0
; Wait until M0 ON.
GOTO NEXT
002 SPD
DRV
; Perform the next step.
R2
; Pulse frequency is stored in DR2 (R3 & R2).
ADR, D2, Ut
; Moving stroke is stored in DD2 (D3 & D2).

Working direction determined by the sign of setting value.
MEND
; End of positioning program
13-18
Example for FUN140 Program Application
Program example: Jog forward

As the jog forward button has been pressed for less than 0.5 seconds (changeable), it sends out only one
(changeable) pulse;
As the jog forward button has been pressed for more than 0.5 seconds (changeable), it continuously sends pulses
out (the frequency is 10KHz, changeable), until the release of the jog forward button to stop the pulse transmitting;
or it may be designed to send N pulses out at the most.
Jog forward button
Jog
forward Servo Manual Condition
button Ready operation for action M1
EN RST
M1
EN RST
R2000
Clear finish signal.
Perform from the first step every time.

M0
M0
140.HSPSO
M0
EN
Positioning Program:
001 SPD 1000
PAU
DRV ADR+1Ps
WAIT TIME50
GOTO NEXT
ABT
002 SPD 10000
DRV ADR+999999Ut
MEND
M0
Ps :
M1000
0
SR : R
5000
WR : R
2000
ACT
M1001
ERR
M1002
DN
M1996
EN
SET
When the last step been complete,
M1
set finish signal.
Program example: Jog Backward

As the jog backward button has been pressed for less than 0.5 seconds (changeable) it sends out only one
(changeable) pulse;
As the jog backward button has been pressed for more than 0.5 seconds (changeable), it continuously sends
pulses out (the frequency is 10KHz, changeable), until the release of the jog backward button to stop the pulse
transmitting; or it may be designed to send N pulses out at the most.
Jogforward
backward
Jog
buttonbutton
Jog
Jog
backward
forward Servo Manual Condition
button
button Ready operation for action M3
EN RST
M3
EN RST
R2007
Clear finish signal.
Perform from the first step every time.

M2
M2
140.HSPSO
M2
EN
Positioning Program:
PAU
001 SPD 1000
DRV ADR1Ps
WAIT TIME50
ABT
GOTO NEXT
002 SPD 10000
DRV ADR999999Ut
MEND
M2
Ps :
M1003
0
SR : R
5020
WR : R
2007
ACT
M1004
ERR
M1005
DN
M1996
EN
SET
M3
13-19
When the last step been complete,
set finish signal.
FUN 141
MPARA
Instruction of Parameter Setting for Positioning Program
FUN 141
MPARA
Ps: The set number of Pulse Output (03).

SR: Starting register for parameter table, it has totally 18
parameters which controlled by 24 registers.
HR
Range
Operand
Ps
SR
DR
ROR
R0
D0
R5000
R3839 D3999 R8071
03
Instruction explanation
1. This instruction is not necessary if the system default for parameter value is matching what users need.
However, if it needs to open the parameter value to do dynamic modification, this instruction is required.
2. This instruction incorporates with FUN140 or FUN147 for positioning control purpose, each axis can have one
FUN141 instruction only.
3. Whether the execution control input EN = 0 or 1, anyway, this instruction will be performed.
4. When there is error in parameter value, the output indication ERR will be ON, and the error code is appeared
in the error code register.
Explanation for the parameter table:
SR =Starting register of parameter table, suppose it is R2000.
R2000 (SR+0)
02
Parameter 0
System default =1
R2001 (SR+1)
165535 Ps/Rev
Parameter 1
System default =2000
Parameter 2
Parameter 3
System default =2
Parameter 4
0921600 Ps/Sec
Parameter 5
System default =141
1999999
DR2002 (SR+2)
1999999
M/Rev
mDeg/Rev
1999999x0.1 mInch/Rev
R2004 (SR+4)
DR2005 (SR+5)
DR2007 (SR+7)
03
1921600 Ps/Sec
1153000
R2009 (SR+9)
165535
Parameter 6
R2010 (SR+10)
032767
Parameter 7
System default =0
R2011 (SR+11)
030000
Parameter 8
R2012 (SR+12)
01
Parameter 9
System default =0100H
R2013 (SR+13)
-3276832767
Parameter 10
System default =0
R2014 (SR+14)
-3276832767
Parameter 11
System default =0
R2015 (SR+15)
030000
Parameter 12
System default =0
R2016 (SR+16)
030000
Parameter 13
System default =500
04294967295
Parameter 14
System default =0
Parameter 15
System default =FFFFFFFFH
-999999999999
Parameter 16
System default =0
0255
Parameter 17
System default =1
DR2017 (SR+17)
DR2019 (SR+19)
DR2021 (SR+21)
R2023 (SR+23)
01
00HFFH
00HFFH
00HFFH
00HFFH
13-20
FUN 141
MPARA
Editing Servo Parameter Table with WinProladder

Click the Servo Parameter Table Item which in project windows :
Project name
Table Edit
Servo Parameter Table
Click right button and select New Table.
Table Type : It will be fixed to Servo Parameter Table .

Table Name : For modify or debug, you can give a convenient name.
Table Starting address : Enter the address which Starting register of Servo Parameter Table.
13-21
FUN 141
MPARA
FUN 141
MPARA
FUN 141
MPARA
Explanation for the parameter:

z Parameter 0: The setting of unit, its default is 1.
y When the setting value is 0, the moving stroke and speed setting in the positioning program will
all be assigned with the unit of mm, deg, inch, so called machine unit.
y When the setting value is 1, the moving stroke and speed setting in the positioning program will
all be assigned with the unit of pulse, so called motor unit.
y When the setting value is 2, the moving stroke setting in the positioning program will all be
assigned with the unit of mm, deg, inch, and the speed setting will all be assigned with the unit
of pulse/sec, which is called as compound unit.
Parameter 0, unit setting
0 machine unit
1 motor unit
2 compound unit
Parameter 1, 2
Must be set
No need to set
Must be set
Parameter 3, 7, 10, 11
mm, deg, inch
Ps
Mm, deg, inch
Parameter 4,5,6,15,16
cm/min, deg/min, inch/min
Ps/sec
Ps/sec
z Parameter 1: Pulse count/1-revolution, its default is 2000, i.e. 2000 Ps/rev.

y The pulse counts needed to turn the motor for one revolution.
A= 165535 (for value greater than 32767, it is set with unsigned decimal) Ps/rev.
y When Parameter 14 = 0, Parameter 1 is the setting for pulse /rev.
y When Parameter 14 0, Parameter 14 is the setting for pulse/rev.
z Parameter 2: Movement/1 revolution, its default is 2000, i.e. 2000 Ps/rev.
y The movement while motor turning for one revolution.
B=1999999 m/rev
1999999 mdeg/rev
1999999x0.1 minch/rev
13-22
FUN 141
MPARA
FUN 141
MPARA
z Parameter 3: The resolution of moving stroke setting, its default is 2.

Parameter 0
Set value=0, machine unit; Set value=2, compound unit;

mm
Parameter 3
deg
inch
Set value=1
motor unit (Ps)
Set value =0
0.1
1000
Set value =1
0.1
0.1
0.01
100
Set value =2
0.01
0.01
0.001
10
Set value =3
0.001
0.001
0.0001
z Parameter 4: The limited speed setting, its default is 512000, i.e. 512000 Ps/sec.
y Motor and compound unit: 1921600 Ps/sec.
y Machine unit: 1153000 (cm/min, 10 deg/min, inch/min).
However, the limited frequency cant be greater than921600 Ps/sec.
f_max =V_max 1000 A/6 B 921600 Ps/sec
f_min 1 Ps/sec
Note: A = Parameter 1, B =Parameter 2.
z Parameter 5: Initiate/Stop speed, the default = 141.
y Motor and compound unit: 1921600 Ps/sec.
y Machine unit: 115300 (cm/min, 10 deg/min, inch/min).
However, the limited frequency cant be greater than 921600 Ps/sec.
z Parameter 6: Creep speed for machine zero return; the default is 1000.
Motor and compound unit : 165535 Ps/Sec
Machine unit : 115300 (Cm/Min, 10 Deg/Min, Inch/Min)
(Not used in linear interpolation instruction)
z Parameter 7: Backlash compensation, the default =0.

y Setting range: 032767 Ps.
y While backward traveling, the traveling distance will be added with this value automatically.
z Parameter 8: Acceleration/Deceleration time setting,
(Not used in linear interpolation instruction)
the default = 5000, and the unit is ms.

y Setting range: 030000 ms.
y The setting value represents the time required to accelerate from idle state up to limited speed
state or decelerate from the limited speed state down to the idle state.
y The acceleration/deceleration is constant slope depending on Parameter 4 / Parameter 8.
y When Parameter 12 = 0, Parameter 8 is the deceleration time.
y There will have the auto deceleration function for short stroke movement.
z Parameter 9: Rotation and zero return direction; the default is 0100H (Not used in linear interpolation mode)
b15
SR+12
b8 b7
Para 9-1
Para 9-0
13-23
b0
FUN 141
MPARA
FUN 141
MPARA
Parameter 9-0Rotation direction setting; the default is 0.
Setting value=0, the present value increases while in forward pulse output; the present
value decreases while in backward pulse output.
Setting value=1, the present value decreases while in forward pulse output; the present
value increases while in backward pulse output.
Parameter 9-1Zero return direction setting; the default is 1.
Setting value=0, direction in which the present value increases.

Setting value=1, direction in which the present value decreases.
z Parameter 10: Forward movement compensation, the default = 0. (Not used in linear interpolation instruction)
y When it is in forward pulse output, it will automatically add with this value as the moving
distance.
z Parameter 11: Backward movement compensation, the default =0. (Not used in linear interpolation instruction)
y When it is in backward pulse output, it will automatically add with this value as the moving
distance.
z Parameter 12: Deceleration time setting, and the unit is ms. (default =0) (Not used in linear interpolation mode)
y Setting range: 030000 ms.
y When Parameter 12 = 0, Parameter 8 is the deceleration time.
y When Parameter 12 0, Parameter 12 is the deceleration time.
z Parameter 13: Interpolation time constant, the default = 500.
y Setting range: 030000 ms
y Set the time required to achieve the speed specified by the program. (The initiate speed is
always regarded as 0.)
y This parameter is valid while interpolation control.
z Parameter 14: Pulse count/1-revolution, the default = 0.
y The pulse counts needed to turn the motor for one revolution.
y Setting range: 01999999
y When Parameter 14 = 0, Parameter 1 is the setting for Pulse /rev.
y When Parameter 14 0, Parameter 14 is the setting for Pulse/rev.
z Parameter 15: I/O control interface for DRVZ; the default is FFFFFFFFH
B15
SR+12
SR+20
b8 b7
Para 15-1
Para 15-0
Para 15-3
Para 15-2
b0
y Parameter 15-0 : Setting of DOG input (SR+19),

it must be the input of the main unit.
b6b0 : Reference number of DOG input (015, it means X0X15)
b7 = 0 : Contact A or Normal Open
= 1 : Contact B or Normal Close
b7b0 : FFH, Without DOG input
13-24
FUN 141
MPARA
y Parameter 15-1 : Setting of stroke limit input (SR+19)

b14b8 : Reference number of limit input (0125, it means X0X125)
b15 = 0 : Contact A or Normal Open
= 1 : Contact B or Normal Close
b15b8 : FFH, Without limit input
y Parameter 15-2 : Setting of PG0 signal input (SR+20)
it must be the input of the main unit.
b6b0 : Reference number of PG0 input (015, it means X0X15)
b7 = 0 : Start counting at front end of sensing DOG input
= 1 : Start counting at rear end of sensing DOG input
b7b0 : FFH, Without PG0 input
y Parameter 15-3 : Setting of CLR signal output (SR+20)
it must be the output of the main unit.
b15b8 : Reference number of CLR output (023, it means Y0Y23)
b15b8 : FFH, Without CLR output
z Parameter 16: Machine zero point address, the default is 0,
y Setting range : -999999999999 Ps
z Parameter 17: Number of zero point signals (Sensing of PG0 input), the default is 1.
y Setting range : 0255 Count
13-25
FUN 141
MPARA
FUN 141
MPARA
FUN 141
MPARA
The parameter 13 of the axis with longest movement is used for acceleration and deceleration control for
linear interpolation if each axis owns its own motion parameter table.
Using the same motion parameter table (through FUN141 and give the same starting address of SR
operand for each axis) for the simultaneous linear interpolation axes, it is the best way for multi-axis linear
interpolation motion control.
13-26
FUN 142 P
PSOFF
Enforcing to Stop Pulse Output
FUN 142 P
PSOFF
N: 03, enforces the assigned set number of Pulse Output

to stop its output.
1. When stop control EN =1, or changes from 01( P instruction), this instruction will enforce the assigned set
number of Pulse Output to stop its output.
2. When applying in the process of return home , as the home has returned, it can immediately stop the pulse
output by using this instruction, so as to make it stop at the same position every time when performing
machine homing.
Program example
; When M0 changes from 01, it enforces the
Ps0 to stop the pulse output.
13-27
FUN 143 P
PSCNV
Converting the Current Pulse Value to the Displaying Value

(mm, deg, inch, PS)
Ladder symbol
Execution control
EN
FUN 143 P
PSCNV
Ps: 03; converting the assigned pulse position to mm (deg,
143P.PSCNV
inch, PS) which has the same unit as the set point, so
Ps :
as to make the current position displayed.
D: Registers that store the current position after conversion.
It uses 2 registers, e.g. D10 represents D10 (Low

Word) and D11 (High Word) two registers.
Range
Operand
Ps
D
HR
DR
ROR
R0
D0
R5000
R3839 D3999 R8071
03
1. When execution control EN =1 or changes from 01( P instruction), this instruction will convert the
assigned current pulse position (PS) to be the mm (or deg, inch, or PS) that has the same unit as the set
value, so as to make current position displaying.
2. After the FUN140 instruction has been performed, it will then be able to get the correct conversion value by
executing this instruction.
Program Example
; When M0=1, it converts the current pulse position of

Ps0 (DR4088) to the mm (or deg or inch or PS) that
has the same unit as the set value, and store it into the
DD10 to make the current position displaying.
13-28
13.7 Machine Homing

The machine set which undertakes relative model encoder as shifting detector usually need the reset action for
the reference of positioning coordinate; we called this action as machine homing (seeking for zero reference).
The machine homing diagram for NC servo unit is as follows:
Method 1:
Return home speed
Slow down speed
Left over travel limit switch
Near home sensing
Right over travel limit switch
When it encounters the near home signal, starts the Z phase counting.
Z phase counting is up, the pulse output stops, then send out the CLR signal to clear the error counter of servo
driver.
e.g.:
X3: Near home sensing input is configured as interrupt input; in the case of machine homing, it starts HSC4 to
begin counting in X3+ interrupt service subroutine.
X2: Z phase counting input, it is configured as UP input of HSC4; the X2+ is prohibited to interrupt in regular time,
when executing machine homing and X3 near home interrupt occurred, it starts HSC4 to begin Z phase
counting. When HSC4 counting is up, it stops the pulse output, prohibit the X2+ interrupt, set home
position to signal, and sends out the CLR signal to clear the error counter of servo driver. Please consult
program example.
Method 2: According to application demand, it may slow down when encountering the near home sensor, stop the
pulse output within near home sensing range, and then traveling slowly with backward direction; the very
moment when it get out of near home sensor (the sensing signal changes from 10), it is treated as
machine home.
(3)
Stop
(2) Slow down

speed
(4) Slowly
backward
(1)
Home speed
(5)
Stop
Near home signal 10, machine zero reference
Left over travel limit switch
Near home sensing
Right over travel limit switch
X3: Near home sensing input; it is configured as falling edge interrupt input.
Once encountering the near home sensor, it will enable X3 falling edge interrupt, and slow down to stop
within the near home sensing range.

Slowly backward traveling until the near home sensing signal changes from 10.
When the near home sensing signal changes from 10, it performs the X3- interrupt service subroutine
immediately.
The X3- interrupt service subroutine: Stops the pulse output immediately, prohibits the X3- interrupt, sets
home position to signal, and sends out CLR signal to clear the error counter of servo driver. (Please
consult the example program.)
13-29
Program Example 1: Machine homing (method 1)
X2: Configured as the UP input of HSC4, and connected to Z phase input.
X3: Configured as the rising edge interrupt input, and connected to near home sensing input.
Main Program
146
M1924
Prohibits X2+ interruption
X2+I
EN DIS
(HSC4 does not count).
141.MPARA
0
EN Ps :
SR : R 2900
Parameter table R2900R2923.
ERR
M92
EN RST
M50
EN RST
M5
EN RST
M1007
EN RST
R 2014
Clears the homing completion signal.

Clears the instruction completion
signal for homing.

Clears the error signal.
Clears the step pointer, it starts from
D
EN RST
R 4112
EN RST
R 4115
Clears the current value of HSC4.

Clears the High Word of preset value
for HSC4.
Fill the preset value of HSC4 with
08.MOV
EN S
D
SERVO Manual
M92 READY operation M5
the content of Parameter 17 of

FUN141.
: R 2923
: R 4114
M4
M50 M1007
M4
140.HSPSO
M4
Positioning program:
001 SPD R2909
DRV ADR,,999999,Ut
EXT X3
GOTO NEXT
002 SPD DR2907
DRV ADR,,9999,Ut
MEND
M4
EN Ps :
PAU
SR : R
5040
WR : R
2014
ABT
ACT
M1007
ERR
DN
M1996
EN SET
Y8
M1006
0
read only register (ROR) before

programming, after then, when
storing program, the Ladder
program will automatically contains
the positioning program.
Homing instruction completed
M5
Signal for homing completion
.01S
EN T0
Configure R5000R5199 as the
50
TUP
Fill the current PS registers with 0
while homing completed.
T0
EN RST
Y8
Signal to clear error counter of servo
D
EN RST
R 4088
13-30
driver -- Y8 is ON for 0.5 seconds.
Sub Program
65
X3 rising edge interrupt service subroutine.
X3+I
LBL
145
M4
EN EN
X2+I
Enables HSC4 counting if homing.
69
RTI
65
LBL
Interrupt service subroutine of HSC4
HSC4I
(Z phase counting is up)

142
M4
EN PSOFF
Stops pulse output immediately.

0
Prohibits rising edge interrupt of X2.
146
X2+I
EN DIS
Y8 Output to clear error counter of servo

M50
driver.
Sets the homing completion signal.
74.IMDIO
EN D
N
: Y8
Sends output immediately.
: 1
69
RTI
13-31
Program Example 2: Machine homing (method 2)
X3: Connected to near home sensing input, and configured as falling edge interrupt input.
Main Program
67
M1924
EN CALL
INIT
65
LBL
Homing
HOME
Servo Manual Left over

Ready operation travel limit
M20
M20
EN RST
M50
EN RST
M5
Clears the instruction completion
signal for homing.

Clears the step pointer, it starts from
M20
Servo
Ready
EN RST
M5
Clears the homing completion signal.
R2014
M50
M4
M4
M4
145P
X3
140.HSPSO
M4
EN Ps :
Positioning Program
001 SPD R2909
DRV ADR,,999999,Ut
EXT X3
GOTO NEXT
002 SPD 1000
DRV ADR,,1000,Ps
WAIT TIME,10
GOTO NEXT
003 SPD R200
DRV ADR,+,999999,Ut
MEND
M4
Enable X3 (falling edge) interrupt.
X3 - I
EN EN
PAU
M1006
0
SR : R
5040
WR : R
2014
ABT
ACT
read only register (ROR) before

programming, after then, when storing
program, the Ladder program will
automatically contains the positioning
program.
ERR
DN
M1996
EN SET
M5
M51
M50
M51
EN SET
Y8
Configure R5000R5199 to be the
Signal for homing completion.
Y8
.01S
EN T0
30
EN RST
Y8
Homing instruction completed.
Output to clear error counter of servo

TUP
driver -- Y8 is ON for 0.3 seconds.
T0
08D.MOV
EN S
D
:
0
: R 4088
13-32
Fill the current PS registers with 0.
Sub Program
65
INIT
LBL
146
X3 - I
EN DIS
Prohibits X3 interrupt
141.MPARA
ERR
EN Ps : 0
SR : 2900
68
Parameter table R2900R2923
RTS
65
LBL
X3 - I
y X3 falling edge interrupt service

subroutine.
142
M4
EN PSOFF
Prohibits X3 interrupt
146
EN DIS
Stops pulse output immediately
X3 - I
69
RTI
13-33
Sets the homing completion signal.
Program Example 3: JOG Forward
Jog forward button
Clears the completion signal.
M1
EN RST
Starts from the first step every
D
Jog
Manual
forward Servo Manaul
operation
button Ready operation
jog execution.
R 2000
EN RST
M1
M0
M0
140.HSPSO
M0
EN Ps :
001 SPD 1000
DRV ADR,+,1,Ps
WAIT TIME,50
GOTO NEXT
002 SPD R2907
DRV ADR,+,99999999,Ut
MEND
M0
PAU
M1000
0
SR : R
5000
WR : R
2000
ABT
ACT
M1001
ERR
DN
As the execution of last step
M1996
EN SET
completed, it sets up the

completion signal.
M1
Program Example 4: JOG Backward

Jog backward button
Clears the completion signal.
M3
EN RST
Starts from the first step every
D
Jog
Manual
backwardServo Manaul
operation
button Ready operation
jog execution.
R 2007
EN RST
M3
M2
M2
140.HSPSO
M2
EN Ps :
Positioning Program
001 SPD 1000
DRV ADR,,1,Ps
WAIT TIME,50
GOTO NEXT
002 SPD R2907
DRV ADR,,99999999,Ut
MEND
M2
PAU
M1003
0
SR : R
5020
WR : R
2007
ABT
ACT
M1004
ERR
DN
As the execution of the last step
M1996
EN SET
M3
13-34
completed, it sets up the

completion signal.
Program Example 5: Step by step, One cycle, Continuous positioning control.
M93 : Start
M101 : Step by step operation mode
M102 : One cycle operation mode
M103 : Continuous operation mode
M104 : Regular shut down.
M105 : Emergency stop.
M93
EN RST
M7
EN RST
M1010
Clears the error signal.
EN RST
M1011
Clears the step completion signal.
EN RST
R 2021
EN RST
R 2022
Clears shut down signal.
M101
SERVO
M93 READY
M105
Except step by step mode, the step
pointer is cleared to be 0; it starts

from the first step to execute.
Clears being active bit of FUN140
M6
M1010
M6
M101
M1011
M101
M7
140.HSPSO
M6
EN Ps :
001 SPD
1000
DRV
ADR,+,20000,Ut
WAIT TIME,100
GOTO NEXT
PAU
M1009
0
SR : R
5100
WR : R
2021
ACT
M1010
ERR
M1011
ABT
DN
002 SPD 20000

DRV ADR,+,40000,Ut
WAIT M200
GOTO NEXT
003 SPD 25000
DRV ADR,,50000,Ut
WAIT TIME,500
GOTO NEXT
004 SPD 5000
DRV ADR,,10000,Ut
WAIT X16
GOTO 1
M6
M102
M1996
EN SET
M103
M7
M104
Set up the shut down signal.
13-35
Chapter 14
Application of ASCII Output Function
The WSZ's ASCII file output function allows the controller to directly drive ASCII output devices such as printers and
terminals, and let them print or display English document data or display screens such as production reports, materials
details and warning messages. For application of the ASCII file output function, it is necessary to edit, the ASCII file data
to be output must be edited to fit the required format of the WSZ-controller FUN 94 (ASCWR) instruction. Then using this
instruction, it will be sent out via port 1 to the ASCII output device connected with port 1.
14.1 Format of ASCII File Data

ASCII file data may be divided into fixed, unchanging background file data and dynamically changing variable data.
The background file data may be in English characters, numerals, symbols, graphs, etc, and the variable data can only be
printed out as binary, decimal, or hexadecimal numeric value data.
ASCII code is a byte length code, which has a total of 256 combinations. Of these, the first 128 (0-127) are fairly
clearly defined and are used by most of the ASCII peripherals. For codes greater than 128 each manufacturer has
different definitions and graphics and there are no uniform specifications. WSZ-controller designed the FUN 94 (ASCWR)
instruction to be solely responsible for transmission, and not for editing. This work is done by the ASCII editor of the
WinProladder software package. Below is the editing command format adopted by the WinProladder software package
editor.
1. Basic command Symbols
Linefeed
A line slanting down from right to left means that no matter where the printing is up to, if this symbol is
encountered, then the printing head or the terminal display will move to the beginning (the very left) of the next line
and go on printing or displaying from that point. A series of "/" will create a succession of linefeeds (one "/" will cause
one linefeed).
Page feed
A line slanting down from left to right means that when this symbol is encountered the printing head or the
terminal display will move to the beginning (top left hand corner) of the next page, and continue printing or displaying
from that point. A series of "\" will create a succession of pagefeeds. (One "\" will cause one pagefeed).
Comma
Used to separate statements in the file data, all the data included between two commas is a complete and
executable statement (must not be used for beginning and end of file). Note that although the shape of a comma is
the same as the shape of a single quotation mark, their positions are different (the comma is in a position near the
center of the letter, while the single quotation mark is near the top right corner). The function meaning that they
represent is completely different. Please refer to Item 2, background data format - statements.
END
File end
At the end of the ASCII file END is added to show that the ASCII file is finished.
14-1
2. Background Data Format

M X N N1 N N2
M X ' A B C D E F G H I J K '
or
Repeat ASCII codeN
Repeat tangible ASCII code
MX:
Represents the number of repeats. M can be 1 to 999. The ASCWR instruction can send out M times successively all
the hexadecimal ASCII code or tangible ASCII code data contained between X and the first comma ( , ). If there is no
data after X (ie, the comma comes directly after X), then the ASCWR instruction will send out M successive space
codes. If you only have to send out the ASCII code or the tangible ASCII code once, then MX can be discarded.
ASCII code data format: This data format has an N two-digit hexadecimal value. Every two adjoining hexadecimal
numerals starting from the right hand side of X will be regarded as an ASCII code. NN can be any ASCII code,
including tangible or intangible ASCII code such as English characters, numeric symbols or control codes. However,
its main use is as a special tangible code for control codes which cannot be represented by tangible character fonts or
cannot find a font or symbol on the WinProladder ASCII editor. For tangible characters or symbols that can be directly
represented on the ASCII editor by tangible keys, it should be more convenient to use the original printing out format.
For example, if you want to print out the character "A", with the original printing method you can type A via the
keyboard. But if you want to use ASCII code, you must check the table on which "A" is represented by 41 H, and then
enter 41. It is obviously a lot less convenient.
Original printing out tangible ASCII code data format: What is enclosed within two single quotation marks' ', can only
be tangible ASCII code such as English characters, numerals, symbols, and graphics (characters that can be found
on or input via the ASCII editor keyboard). The ASCWR instruction will faithfully print out all the characters that are
contained in ' ', so if you need to print out a single quotation mark itself, you must have two successive single
quotation marks. For example:
'I''M A BOY' will be printed out as I' M A BOY

If the graphics or symbols of the ASCII output device cannot be found on the ASCII editor keyboard, then you naturally
are unable to do input using this format. In such a case you can check the ASCII code for that symbol or graphic, and use
ASCII code to input and print out.
3. Variable Data Format

"8 . 2 R
0 D"
Format code
Variable register
Digits after the decimal point
Total number of variables printed out
A data statement within two double quotation marks " ", is used to specify the register address of variable data, and what
format or format code it will be printed out.
Total number of variables printed out: In this example, "8" are used to print out the reserved 8 digit columns of the
variable (R0) numeric value (including negative signs). If the variable value is larger than the total number of printed
out digits then the high digit will be cut out. If the number of digits is insufficient, the remaining positions will be
occupied by spaces.
Digits after the decimal point: The number of digits after the decimal point within the total number of digits of the
variable. In this example, in a total number of 8 digits, there are 2 places after the decimal point. The decimal point
symbol "." itself occupies one position so the integer will remain 5 digits.
14-2
Variable register: Can be R, D,WX, WY,etc, of a 16-bit register, or DR,DD,DWX, DWY, etc, of a 32-bit register. The
contents of these registers can be retrieved and printed out using the format and format code specified by the
contents of " " .
Format code: Can use hexadecimal H, decimal D or binary B format for printing out (when format code is not specified,
it will be decimal - therefore D can be omitted).
This example assumes that the content value of R0 is -32768. In the 8.2 format, the print out result is
- 327 . 68
If the format changes from 8.2 to 5.1 then the print out result changes to
276 . 8
14.2 Application Examples of ASCII File Output

The file data print out will start from the top left hand corner of each page. It will print from left to right with lines
going from top to bottom (please refer to the format in the diagram below). When the final character in a line is reached
(this varies according to the output device - a printer can have 80 characters or 132 characters), the printer will
automatically jump to the start (left-hand side) of the next line. If it has not yet printed to the final character, but
encounters the linefeed command (/) or the page feed command (\), then it will jump to the start of the next line or the
next page, and start printing from that point.
Suppose that the production statistics table for the manufacturing division of a certain company has the following
format. This can be used as an example to explain the editing and printing out of its ASCII file data.
...................28 spaces..................... PRODUCTION REPORT

==================
................................ 52 spaces ....................................................................................... DATE: 1/20/99
... .16 spaces.. .. TOTAL NUMBER
1000 PCS
NUMBER OF YIELD
983 PCS
NUMBER OF REPAIR
17 PCS
STANDARD TIME
TOTAL WORKING TIME
8500 MIN
ACTUAL WORKING TIME
9190 MIN
EFFICIENCY
92.49
22 spaces
REMARK:
A3DEEFG
14-3
8.5 MINPCS
Before editing this file, you must first tell the file editor starting from which register within controller the file to be
edited shall be stored. When editing the file data, you must differentiate whether the file data to be edited (printed out) is
fixed background data or variable data. The background data can be input using ASCII characters or symbol graphic of
the original print out format (using what is contained inside ' '), or it can directly use the ASCII code of its character or
symbol graphics. As for the variable data section, because it is stored in registers (so as long as the variable value
changes, the print out numerical value will change with it), the print out message must contain the register number and
print out format, such as number of characters, digits after the decimal point,etc, as well as the format code that is used
for the print out (contained inside " "). In the example in the table above, the year, month, day data and the total number
(A) to efficiency (G) figures are all variable data. It assumes that the year, month, day data accesses the year, month, day
registers (R4133 to R4131) within the real time clock register RTCR. R0 stores the total number (A), R1 stores the
number of yield (B), etc, and R6 stores the efficiency (G) value. Below is the ASCII file data for this statistical table
example:
///,28X,'PRODUCTION REPORT',/,28X,'==================', /,
52X,'Date:',"2R4132",'/',"2R4131",'/',"2R4133",//,16X,'TOTAL NUMBER
(A) :',"10R0",' PCS',//,16X, 'NUMBER OF YIELD
(B) :' , "10R1",'
PCS',//,16X,'NUMBER TO REPAIR
(C) :',"10R2",' PCS',//,16X,'STANDARD TIME
(D) :',"10.1R3",' MIN/PCS',//,16X,'TOTAL WORKING TIME (E) :',"10R4",'
MIN',//,16X,'ACTUAL WORKING TIME(F) :',"10R5",' MIN',//,16X,'EFFICIENCY
(G) :' ," 10.2R6",' %',/////,22X,'REMARK: AXD=E, E/F=G',END
* : In the above example ' ================== ' can be replaced by 18X'=' or 18X3D.
During the process of file output, when the output reaches variable data, the CPU will retrieve and do output with the
numerical values at that time of the register whose address are contained within the " ". Therefore, if a variable is printed
out both at the beginning and end of a file, a different numerical value may be obtained (when it has printed to halfway the
register value changes).
After the file editing has been completed, the FUN94 instruction can be used to print out its background and
dynamic data. If this file is edited (stored) starting from R1000, then when it is outputting, S must be specified as R1000
before there can be an accurate output, as seen in the program example in the diagram below left. Supposing that the
numerical value of the variable register is as shown in the diagram below right, then when X1 and X2 are 0, and X0 goes
from 0 to 1, this instruction will print out the statistical table from the previous page, from Port 1 of controller.
R4133
R4132
R4131
R0
R1
14-4
=99
=1
=20
=1000
=983
R2
R3
R4
R5
R6
=17
=85
=8500
=9190
=9249
Chapter 15
Real Time Clock RTC
A real time clock (RTC) has been built in the WSZ's main unit. No matter whether the controller is switched on or off,
the RTC will always keep accurate time. It provides 7 kinds of time value data-week, year, month, day, hour, minute and
second. Users can take advantage of the real time clock to do 24 hour controls throughout the year (for example,
businesses or factories can switch lights on and off at set times each day, control gate access, and do pre-cooling and
pre-heating before business or operations begin). It can enable your control system to automatically coordinate with
people's living schedules, and not only will it raise the level of automatic control, it will improve efficiency.
15.1 Correspondence between RTC and the RTCR within Controller

Within controller, there are special purpose registers (RTCR) for storing the time values of the RTC. There are 8
RTCR registers in all, going from R4128 to R4135. R4128 to R4134 are used to store the 7 kinds of time values
mentioned above, from weeks to seconds. Because in practical daily application, certain hour and minute time data is
often used, we have specially merged the time values of the hour register (R4130) and minute register (R4129) within
RTCR, and put them in R4135 high byte and low byte, so they can be accessed by the user. The diagram below shows
the correspondence between RTC and the RTCR within controller, as well as the control switch and status flag
(M1952-M1955) related to RTC accessing.
RTC
(IC)
(R4128~R4134)
R4128 (Sec) 0~59
R4128~R4134
set value write-in
(M1952 must be 1)
(Set)
M1952
Sec
0~59
R4129
(Min) 0~59
Min
0~59
R4130
(Hrs) 0~23
Hrs
0~23
R4131 (Day) 1~31
Day
0~31
Mon
0~12
(Read Out)
M1952
R4132
(Mon) 1~12
R4133
(Yr) 0~99
Yr
0~99
R4134
(Wk)
0~6
Wk
0~6
R4135
Hrs
Min
30 second adjustment)
(30
M1953
(RTC installation detection)

M1954
( )
(set value error)

M1955
Standby battery(for use during power failue)
15-1
( )
15.2 RTC Access Control and Setting

Within controller, the RTCR registers have been allocated to store the time values of RTC, and this is of great
convenience to the user. However, if you want to load the set values of RTCR into RTC or read out what is in RTC onto
RTCR, and tune the time value etc, then the setting must be done using the special relays (M1952 and M1953) for RTC
access. Below is an explanation of the access and adjustment procedures, and the status flag relays.
1. RTC setting:
The (RTCRRTC) setting action is only executed once at the moment that relay M1952 goes from 10 (falling edge).
ON
M1952
Timing stopped
Timing active
At the moment when M1952 goes from 1 to 0, the set

values of R4128 to R4134 within RTCR will be written
into the corresponding hardware registers within RTC.
After M1952 has returned to 0 the timing action will start.
Also, with each scan, CPU will retrieve time values from
RTC in the opposite direction and write them onto RTCR.
Note: If you want to load the set values into RTC, you must first make M1952 as 1 and then load the set values into
RTCR. The loading of the set values into RTCR can be done via MOVE instruction. However, you must first halt
the RTC read out (make M1952 as 1), otherwise the data that you just wrote into RTCR will immediately be
overridden by the time data being read back from RTC in the opposite direction.
2. RTC read out (RTCRTCR):
whenever the M1952 relay is 0 (RTC timing active). With every scan, CPU will take the time value data within RTC and
move it to RTCR. When it is 1, it will not read out. In this case RTCR can load in the set values and they won't be
overridden.
3. 30 second adjustment:
At the moment that the status of relay M1953 goes 1, CPU will check the value of the second register (R4128) within
RTC. If its value is between 0 and 29 seconds then it will be cleared to 0. If its value is between 30 and 59 seconds
then besides being cleared to 0, the minute register (R4129) will be increased by 1 (i.e., one minute will be added).
This can be used to adjust your RTC time value.
4. M1954 RTC installation detecting flag:
When RTC is fitted to the controller, relay M1954 will be set as 1; otherwise it will be 0.
5. M1955 set value error flag:
When the time value which is set to RTC's IC is illegal, then the error flag relay M1955 will be set as 1, and the setting
action will not be executed.
15-2
Setting calendar with WinProladder

Click the calendar Item which in Tool bar :
PLC
Setting
calendar
Click right button and select New Table.
PLC current time : It is means current time of controller in on-line situation. In the Setup frame, if Apply PC
time item is chosen then current time of PC will display below, press Update PLC time
button to write PCs current time into controller. But if Apply PC time item isnt chosen you
can modify the Date and Time by yourself. After you change the Date and Time, press
Update PLC time button to write the Date and time into controllers calendar.
15-3
Chapter 16
WSZ-6AD Analog Input Module
WSZ-6AD is the analog input module of FUJI WSZ series controller. It provides 6 channels A/D input with 12 or 14
bits effective resolution. Base on the different jumper settings it can measure the varieties of current or voltage signal.
The reading value is represented by a 14-bit value no matter the effective resolution is set to 12 or 14 bits. In order to
filter out the field noise imposed on the signal, it also provides the average of sample input function.
16.1 Specifications of WSZ-6AD

Item
Specifications
Total Channel
6 Channels
8192+8191or 016383(14 bits)
Digital Input Value

Span
Of
Analog
input
Bipolar*
Unipolar
Remark
2048+2047or 04095(12 bits)

*1.Voltage1010V
5.Current2020mA
5V
2. Voltage55V
6. Current1010mA
10V
3. Voltage010V
7. Current020mA
5V
4. Voltage05V
8. Current010mA
10V*
Resolution
Finest resolution
* It means the default setting
14 or 12 bits
Voltage0.3mV
= Analog input signal / 16383
Current0.61A
I/O Points Occupied
6 IR (Input Register)
Accuracy
Within 1% of full scale
Conversion Time
Updated each scan
Maximum absolute input

signal
Voltage15V (max)
Current30mA (max
Input resistance
63.2K (Voltage input), 250 (Current input)
Isolation
Transformer(Power) and photocoupler (Signal)
Indicator(s)
5V PWR LED
Supply Power
24V-15%/+20%, 2VA
Internal Power Consumption
5V, 100mA
Operating Temperature
0 ~ 60 oC
Storage Temperature
-20 ~ 80 oC
Dimensions
40(W)x90(H)x80(D) mm
It may cause the destruction to

hardware if exceeds this value.
16-1
16.2 The Procedure of Using WSZ-6AD Module

Start
Set the I/O voltage/current (V/I), polarity (B/U), and

the V/I range of each point before installation.
Connect WSZ-6AD to the expansion interface on
-------
controller in series and connect an external 24VDC
Please refer to section 16.4 for hardware

explanation.
source and analog output wires to the module.
Directly read the value of the six corresponding

value input registers to obtain the analog input
reading of CH0~CH5.
End
16.3 Address Allocation of WSZ-Controller Analog Inputs

The I/O addressing of WSZ-6AD inputs is beginning from the module closest to main unit, it is orderly numbered as
CH0CH5 (1st module), CH6CH11 (2nd module), CH12CH17 (3rd module) and increased with occurring order
number, i.e. for each module, it adds with 6 and is totally 64 inputs from CH0CH63, and they are corresponding to the
respective internal analogue input register of controller (so called as IR register) R3840R3903 as listed in following
table. After connecting WSZ-6AD to the expansion interface on the controller, WSZ-controller will automatically detect the
number of AD points. WinProladder will automatically detect and calculate the IRs on the system after connecting to the
controller. Users may refer to the I/O Module Number Configuration provided by WinProladder in order to find out the
exact I/O address of each expansion module to facilitate programming.
Numeric Input
Content of IR (CH0CH63)
RegisterIR
B 1 5 B 1 4 B 1 3 B 1 2 B 11 B 1 0 B 9 B 8 B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0
Input lable
Of WSZ6AD
IR+0
14/12 bit ; 14-bit , B14~ B15= B13 ; 12-bit, B12~ B15= B11
CH0
IR +1
14/12 bit ; 14-bit , B14~ B15= B13 ; 12-bit, B12~ B15= B11
CH1
IR +2
CH2
IR +3
CH3
IR +4
CH4
IR +5
CH5
IR +6
Depends on module type
CH X
IR +7
CH X
IR +8
CH X
IR +9
CH X
16-2
W SZ- 6 AD
CH X
R3 897
CH X
R3 898
CH X
R3 899
CH X
R3 900
CH X
R3 901
CH X
R3 902
CH X
R3 903
CH X
R3 896
Other Modules
16.4 WSZ-6AD Hardware Description
* WSZ-6AD contains 3 PCBs overlapping one

another. The lowest one is the power
supply unit (isolated power supply). The
24V IN
I0+
I1+
AG
I0I1-
I U B 5V 10V
C
H
1
C
H
0
middle one is the I/O board (connectors

are on this layer). The upper one is the
control board (control/expansion I/O
connections) as described below:
FATEK
4
POW
C
H
2
C
H
3
C
H
4
WSZ-6AD
C
H
5
I4+
I5+
I2+
I3+
I4I5I2I3-
10 11 12
Outlook of top view
16-3
External power input terminal Power supply of analogue circuit for WSZ-6AD, the voltage can be 24VDC20% and
should be supplied with 4W of power at least.
Protecting ground terminalConnect to the shielding of the signal cable.
Expansion input cableIt should be connected to the front expansion unit, or the expansion output of main unit.
Expansion output connectorProvides the connection for next expansion unit.
Power indicator It indicates whether the power supply at analogue circuit and external input power source are
normal.
AG GroundNo connection is needed in general; except when the common mode signal is too high.
7
12 Input terminal of CH0CH5.
16.4.1
WSZ-6AD Hardware Jumper Setting
B
U
JP5 V
I
JP1
JP4 V
I
B
JP3
U
JP2
5V
10V
V
I
V JP7
I
JP8 V
I
V
JP6
I
JP9 V
I
Pin layout in control board (open top cover)
Pin layout on I/O board (remove control board)
16-4
1. Input code format selection (JP1)

Users can select between unipolar and bipolar codes. The input range of unipolar codes and bipolar codes is
0~16383 and 8192~8191, respectively. The two extreme values of these formats correspond to the lowest and highest
input signal values, respectively (see table below). For example, if the input signal type is set to -10V~ +10V, the unipolar
code corresponding to the input is 8192 and the bipolar code corresponding to the input is 0 for 0V input. If the input is
10V, the unipolar code corresponding to the input is 16383 and the bipolar code corresponding to the input is 8191. In
general, the input code format is selected according to the form of input signals; i.e. unipolar codes for unipolar input
signals; and bipolar codes for bipolar input signals. In doing so, their correlations will become more heuristics. Unless it is
necessary to make a deviation conversion through FUN32; otherwise, do not select bipolar codes for unipolar input
signals (see FUN32 description for details). The format of input codes of all channels is selected from JP1. See above
diagram for the location of JP1
Input Code Format
JP1 Setting
Input Value Range
- 819 2 8 191
Bipolar
Corresponding Input Signals
- 1 0 V 10 V(- 20mA 20 mA)
Unipolar
- 5 V 5V(-20mA 2 0m A)
0V 10 V(0 m A 20mA)
0 1638 3
0V 5 V( 0 m A 10 mA)
2. Input signal form setup (JP2&JP3)

Users can set the input signal form (voltage/current) of individual channels; except the polarity and amplitude which
are common. The location of jumpers are tabulated below
Signal Form
JP3 Setting
JP2 Setting
0 10V
or
0 20mA
0 5V
or
0 10mA
5V
10V
-10 +10V
or
-20 +20mA
5V
10V
-5 +5V
or
-10mA +10mA
5V
10V
16-5
CH0~CH5 share the JP2 and JP3 jumper, therefore all channels must be of the same type that is one of the four
types listed at above table. Only the current/voltage setting can be chosen arbitrary
3. Voltage or current setting (JP4JP9)
Signal Type
JP4(CH0) JP9(CH5) Setting
Voltage
Current
The default factory settings of 6AD analogue input module are

Input code format Bipolar (-8192~+8191)
Input signal type and range Bipolar (-10V ~ +10V)
For those applications that require the setting differ than the above default setting should make some modifications
of jumper position according to above tables. While application, besides the setting of jumper should be conducted, the AI
module configuration of WinProladder also need to be performed.
16-6
16.5 WSZ-6AD Input Circuit Diagram
Inputs
WFBs-6AD
SZ-6AD
+15V
24V+
15V
24VDC
24V
I0+
I0
I1+
I1
CH0
Ch0Input
Input
(Voltage sou
(Voltage Source)
CH1
Ch1Input
Input
(Current sou
(Current Source)
CH5
Ch5Input
Input
(Voltage sou
(Voltage Source)
AG
I5+
I5
Voltage/
Current
selection
Twisted pair with shielding
16.6 WSZ-6AD Input Characteristics and Jumper Setting

Users can select the Input ranges of WSZ-6AD from the jumpers described above, such as V/I, U/B (I/O codes),
U/B (signal form), 5V/10V, etc. The Input signals conversion characteristics of these settings are illustrated below. Users
can adjust different Input forms by coordinating the conversion curve with various V/I (voltage/current) Input settings. See
Section 16.4 for details of V/I settings:
16-7
Diagram 1Bipolar 10V20mASpan
Input
Range
Voltage
1 0 V 10 V
Current
2 0m A 20 mA
Jumper
Setting
14-bit input format
12-bit input format
16-8
Input
Range
Voltage
5 V 5V
Current
1 0m A 10 mA
Jumper
Setting
14-bit input format
12-bit input format
16-9
Diagram 3Unipolar 10V20mASpan
Input
Range
Voltage
0 V 1 0 V
Current
0 m A 20 mA
Jumper
Setting
14-bit input format
12-bit input format
16-10
Input
Range
Voltage
0 V 5 V
Current
0 m A 10 mA
Jumper
Setting
14-bit input format
12-bit input format
Analog Input(MAX.)
+5V(+10mA)
Input Register Value

(12 bit)
-2048
Bipolar(B)
Unipolar(U)
+2047
+4095
0V(0mA)
Analog Input(Min.)
1 6 - 11
16.7 Configuration of Analog Input

For the analog input reading of WSZ series controller, there are 3 kinds of data formats used to represent the
reading value in compliance with the variation of the external analog inputs. Also, it supports the average method to
improve the drift of the reading value away from the noise interference or unstable original analog signal.
The WinProladder provides the friendly and convenient operation interface for the purpose of analog input
configuration. There are "analog input data format", "valid bits", and "number of average" for settings.
The Procedures for Analog Inputs Configuration with WinProladder

Project name
I/O Configuration
Select AI Configuration.
If WSZ main unit connects with AD Expansion nodule, then it will auto detect and allotted the system resource(IR).
16-12
Description of the configuration screen
AI Data Format
AI Modules
: All analog inputs can be assigned as 12-bit or 14-bit resolution of data format.
: This window displays the information of installed analog input modules, click the selective module will
bring the setting window for valid bits and times of average.
AI Setup
: When the data format is 12-bit resolution, each channel of analog input can be allowed to set the times
of average; When the data format is 14-bit resolution, each channel of analog input can be allowed to
set the valid bits and times of average.
AI Data Format
12-bit resolution with sign representation (-20482047)
B 1 5 B 1 4 B 1 3 B 1 2 B 11 B 1 0 B 9
B8
B7
B6
B5
B4
B3
B2
B1
B0
B 11 B 11 B 11 B 11 0 / 1 0 / 1 0 / 1
0/1
0/1
0/1
0/1
0/1
0/1 0/1
0/1
0/1
B8
B7
B6
B5
B4
B3
B2
B1
B0
0/1
0/1
0/1
0/1
0/1
0/1 0/1
0/1
0/1
B1
B0
B 11 = 0 - - - - - - - - - Positive reading value
1 - - - - - - - - - Negative reading value

B 1 5 B 1 2 = B 11
12-bit resolution without sign representation (04095)
B 1 5 B 1 4 B 1 3 B 1 2 B 11 B 1 0 B 9
0
0/1 0/1 0/1
14-bit but valid 12-bit resolution with sign representation (-81928188)
B 1 5 B 1 4 B 1 3 B 1 2 B 11 B 1 0 B 9
B8
B7
B6
B5
B4
B3
B13 B13 0/1
0/1
0/1
0/1
0/1
0/1
0/1 0/1
0/1
0/1
0/1
0/1
B2
B 1 3 = 0 - - - - - - - - - Positive reading value

B15 B14= B13 ; B1 B0= 0
In this Data Format, because B1 and B0 are fixed to 0, the value changes in multiples of 4.
14-bit but valid 12-bit resolution without sign representation (016380)
B 1 5 B 1 4 B 1 3 B 1 2 B 11 B 1 0 B 9
0
0/1 0/1 0/1 0/1 0/1
B8
B7
B6
B5
B4
B3
B2
0/1
0/1
0/1
0/1
0/1
0/1 0/1
In this Data Format, because B1 and B0 are fixed 0 then value change by time of 4.
16-13
B1
B0
14-bit resolution with sign representation (-81928191)
B 1 5 B 1 4 B 1 3 B 1 2 B 11 B 1 0 B 9
B8
B7
B6
B5
B4
B3
B2
B1
B0
B13 B13 0/1 0/1 0/1 0/1 0/1
0/1
0/1
0/1
0/1
0/1
0/1 0/1
0/1
0/1
B8
B7
B6
B5
B4
B3
B2
B1
B0
0/1
0/1
0/1
0/1
0/1
0/1 0/1
0/1
0/1
B 1 3 = 0 - - - - - - - - - Positive reading value

B15 B14= B13
14-bit resolution without sign representation (016383)
B 1 5 B 1 4 B 1 3 B 1 2 B 11 B 1 0 B 9
0
0/1
0/1
0/1
0/1
0/1
Relative Registers of AI Configuration
This introduction is for HMI or SCADA User, because they may modify through registers. WinProladers User can
ignore this introduction. When you configure Analog Input format with WinProladder, these value of registers will be
finished.
Register
Content
D4 042
5 612H
Description
All analog inputs are the 12-bit resolution ; it is allowed to set times of average for each
channel.
5 614H
All analog inputs are the 14-bit resolution ; it is allowed to set times of average for each
channel.
Register
D4006
D4006
D4007
D4007
Content
Description
B0 = 0
AI channel 0 is valid 12-bit resolution.
B0 = 1
B 15 = 0
B 15 = 1
B0 = 0
B0 = 1
B 15 = 0
B 15 = 1
16-14
Register
D4008
D4008
D4009
D4009
Register
D4010
Content
B0 = 0
B0 = 1
B 15 = 0
B 15 = 1
B0 = 0
B0 = 1
B 15 = 0
B 15 = 1
Content
Description
1 16
Low byte is used to define the times of average for AI channel 0.
1 16
High byte is used to define the times of average for AI channel 1.
D4041
Description
1 16
Low byte is used to define the times of average for AI channel 62.
1 16
High byte is used to define the times of average for AI channel 63.
The default of AI data format is 14-bit resolution, valid 12-bit, and time of average is 1.
The legal setting value for times of average is 116, if it is not the value :
The default for times of average is 1 when it is valid 12-bit resolution.
The default for times of average is 8 when it is valid 14-bit resolution.
16.8 Tackling on the OFFSET Mode Input

For the process of input for signal source of offset mode (take 420mA input for example), the user can set A/D
input range to be 0 20mA, convert the IR value to unipolar (0 16383), lessen the offset (4mA) value
(16383x4/20=3276), then times the maximum input amount (20mA), and divide by the maximum span (4mA20mA); and
it can acquire the offset input conversion from 4mA20mA to 016383, the procedure is as follows :
a . Set the A/D input range of analogue input module to be 020mA.

b . Add the IR (R3840R3903) value with 8192 and then store it into register Rn (the value of Rn is 016383).
4
) from value of register Rn, and store the calculated value back to register Rn; if the value is
c . Deduct 3276 (16383x
20
negative, clear the content of register Rn to 0 (the value of Rn is 013107).
16-15
d . The value of register Rn times 20 and then divide by 16 (Rn x
20
), and it will convert the 4mA20mA input to
16
range of 016383.
e . To sum up the items from ad, the mathematical equation is as follows

Offset mode conversion value = IR+8 192( or 0) 163 83
4
20

20
16
value is 0 163 83
* Special to 420 mA Offset mode, you can use FUN32 to substitute for processing above, but another offset mode
please refer to above processing.
note : Step b Add 8192 is means input code setting in bipolar mode( JP1 setting in position B). If input code setting in
unipolar mode (JP1 setting in position U) then you dont have to Add 8192.
16-16
Chapter 17
WSZ-2DA Analog Output Module
WSZ-2DA is the analog output module of WSZ series controller. It provides 2 channels 14 bits D/A output
respectively. Base on the different jumper settings it can provide varieties of current or voltage output signal. The output
code can be configured as unipolar or bipolar which makes the relation of output code and real output signal more
intuitive. For safety, the output signal will be automatically forced to zero(0V or 0mA) when the module is not serviced by
CPU for 0.5 seconds.
17.1 Specifications of WSZ-2DA

Item
Specifications
Total Channel
2 Channels
8192+8191 (Bipolar) or 016383 (Unipolar)
Digital Output Value

Span
Of
Analog
output
Bipolar*
Remark
*10V
*1. Voltage 10 10V
5. Current 20 20mA
5V
2. Voltage 5 5V
6. Current 10 10mA
10V
3. Voltage 0 10V
7. Current 0 20mA
5V
4. Voltage 0 5V
8. Current 0 10mA
Unipolar
Resolution
14 bits
Finest resolution
0.3mV(Voltage) ,0.61A(Current)
I/O Points Occupied
2 OR(Output register)
Accuracy
Within 1% of full scale
Conversion Time
Updated each scan
Maximum accommodation
Voltage5001M
for resistance loading
Current0500
Isolation
Transformer (Power) and photocoupler (Signal)
Indicator(s)
5V PWR LED
Internal Power Consumption
5V, 20mA
Operating Temperature
o
060 C
Storage Temperature
o
-2080 C
24V-15%/+20%, 70mA
Dimensions
40(W)x90(H)x80(D) mm
17-1
* It means the default

setting
The deviation will be

enlarged if exceeding this
range
17.2 The Procedure of Using WSZ-2DA Analog Output Module
Start
Set the I/O voltage/current (V/I), polarity (B/U), and the V/I
range of each point before installation. Connect
-------
WSZ-2DA to the expansion interface on controller in

series and connect an external 24VDC source and analog
Please refer to section 17.4 for hardware

explanation.
output wires to the module.
Directly fill the output value into the analogue output

registers R3904R3967 to acquire the corresponding
analogue output span of CH0CH63 from output
module.
End
17.3 Address Allocation of WSZ-Controller Analog Outputs
WSZ-2DA Provides 2 points of outputs. The I/O addressing of output is beginning from the module closest to main
unit; it is orderly numbered as CH0CH1 (1st module), CH2CH3 (2nd module), CH4CH5 (3rd module) and
increased with occurring order number, which reaches 64 points in total, and they are corresponding to the respective
internal analogue output registers (so called OR register) R3904R3967. User needs only to expand connecting
WSZ-2DA module through expansion interface, and main unit will automatically detect the quantity of the outputs and
send out the value to corresponding output of WSZ-2DA module. The following table is detailed OR registers (R3904
R3967) corresponding to the expansion analogue outputs (CH0CH63). WinProladder will automatically detect and
calculate the ORs on the system after connecting to the controller. Users may refer to the I/O Module Number
Configuration provided by WinProladder in order to find out the exact I/O address of each expansion module to facilitate
programming.
17-2
I/O allocation of WSZ-2DA
Numeric Output
Contents (CH0CH63)
RegisterOR
B 1 5 B 1 4 B 1 3 B 1 2 B 11 B 1 0 B 9 B 8 B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0
B13
Output lable
Of
WSZ-2DA
OR+ 1
CH1 output value
CH1
OR+ 2
CH2 output value
CH0
OR+ 3
CH3 output value
CH1
CH0 output value
B0
CH0
W SZ- 2D A
W SZ- 2D A
OR+ 0
Other modules
R3 966
CHX
R3 967
CHX
-- -- -- -- -- -- Unipolar code output (016383), B14, B15 = 00

Bipolar code output (-81928191), B14, B15 = B13
17.4 WSZ-2DA Hardware Description

1
24V IN
AG
V
O0+
O1+
O0O1C
H
0
I U B 5V 10V
C
H
1
FATEK
WSZ-2DA
POW
WSZ-2DA
5
Outlook of top view
17-3
External power input terminalPower supply of analogue circuit for this module, the voltage can be 24VDC20% and
should be supplied with 4W of power at least.
Protecting ground terminal Connect to the shielding of the signal cable.
Expansion input cable It should be connected to the front expansion unit, or the expansion output of main unit.
Expansion output connector Provides the connection for next expansion unit.
Power indicator It indicates whether the power supply at analogue circuit and external input power source are
normal.
AG Ground No connection is needed in general; except when the common mode signal is too high. See examples
overleaf for details.
7
8 Output terminal of CH0CH1.
17.4.1
WSZ-2DA Hardware Jumper Setting
Jumper location
17-4
Output code format selection (JP1)

Users can select between unipolar and bipolar codes. The output range of unipolar codes and bipolar codes is
0~16383 and 8192~8191, respectively. The two extreme values of these formats correspond to the lowest and highest
output signal values, respectively (see table below). In general, the output code format is selected according to the form
of output signals; i.e. unipolar codes for unipolar output signals; and bipolar codes for bipolar output signals. In doing so,
their correlations will become more heuristics. Yet, as the format of output code on all channels is selected from JP1, it is
the users choice to select unipolar or bipolar codes if both are used on different channels. See diagram above for location
of JP1 :
Output Code Format
JP1 Setting
Output Value Range
- 819 2 8 191
Bipolar
Corresponding Input Signals
- 1 0 V 10 V(- 20mA 20 mA)

- 5 V 5V(-10mA 1 0m A)
0V 10 V(0 m A 20mA)
Unipolar
0 1638 3
0V 5 V( 0 m A 10 mA)
Output signal form setup (JPA&JPB)

Users can set the output signal form (voltage/current) of individual channels; except the polarity and amplitude which
are common.
Signal Form
JPA (voltage/current) Setting
JPB (polarity/amplitude) Setting

B
0 V 1 0V
10V 5V
B
- 10 V 1 0V
10V 5V
B
0 V 5 V
10V 5V
B
- 5 V 5 V
10V 5V
B
0m A 2 0m A
10V 5V
B
-20 mA 20 mA
10V 5V
B
0m A 1 0m A
10V 5V
B
-10 mA 10 mA
10V 5V
17-5
17.5 WSZ-2DA Output Circuit Diagram

WSZ-2DA
FBs-4DA/2DA
Output
+15V
24V+
15V
24VDC
24V
O0+
O0
CH0 Voltage output
V+
V
Voltage Input
FG
AG
O
1+
On+
O1On
CH1
CHnCurrent
Currentoutput
output
I+
I
Current Input
Voltage/
Current output
selection
Twisted pair with shielding
n = 1 --- 2DA
n = 3 --- 4DA
17-6
FG
17.6 WSZ-2DA Output Characteristics and Jumper Setting

Users can select the output ranges of WSZ-2DA from the jumpers described above, such as V/I, U/B (I/O codes),
U/B (signal form), 5V/10V, etc. The Output signals conversion characteristics of these settings are illustrated below. Users
can adjust different Output forms by coordinating the conversion curve with various V/I (voltage/current) Output settings.
See Section 17.4 for details of V/I settings :
Output
Voltage
1 0 V 10 V
Current
2 0m A 20 mA
Range
Jumper
Setting
Output
Voltage
5 V 5V
Current
1 0m A 10 mA
Range
Jumper
Setting
17-7
(14 bits)
Output
Voltage
0 V 1 0 V
Current
0 m A 20 mA
Range
Jumper
Setting
(14 bits)
17-8
Output
Voltage
Range
Current
0 V 5 V
0mA 10mA
Jumper
Setting
(14 bits)
17-9
Chapter 18
General Purpose PID Control
18.1 Introduction of PID Control

As the general application of process control, the open loop methodology may be good enough for most situations,
because the key control elements or components are more sophisticated, and the performances of which are getting
better, there is no doubt, the stability and reliability may meet the desired requirement. It is the way to get not bad C/P
value with great economic consideration. But the characteristics of the elements or components may change following the
time eclipse and the controlling process may be affected by the change of loading or external disturbances, the
performance of open loop becomes looser; it is the weakness of such solution. Thus, closed loop (with the sensors to
feedback the real conditions of controlling process for loop calculation) PID control is one of the best choices for
manufacturing process to make perfect quantity and best products.
WSZ-controller provides digitized PID mathematical algorithm for general purpose application, it is enough for most
of applications, but the response time of loop calculation will have the limitation by the scan time of controller, thus it must
be taken into consideration while in very fast closed loop control.
For an introduction to key parts of a control loop, refer to the block diagram shown below. The closed path around
the diagram is the "loop" referred to in "closed loop control".
Typical Analog Loop Control System
18.2 How to Select the Controller

Depends on the requirement, the users may apply the suitable controller for different applications; it is much better
of the thinking that the control algorithm is so simple and easy to operate and the final result will be good enough, that's
all. Therefore comes the answers, there are three types of controller could be activated from the PID mathematical
expression, these are so called "Proportional Controller, "Proportional + Integral Controller" and "Proportional + Integral +
Derivative Controller". The digitized mathematical expression of each controller shown bellows.
18-1
18.2.1
Proportional Controller
The digitized mathematical expression as follows:

Mn = (D4005/Pb) x (En) + Bias
Where,
Mn Output at time n.
D4005The gain constant, the default is 1000, it's range is 15000.
Pb Proportional band
- the expression stating the percent change in error required to change the output full scale.
Range15000, unit in 0.1%Kc(gain)=D4005/Pb
En The difference between the set point (SP) and the process variable (PV) at time "n";
En = SP - PVn
Ts
Solution interval between calculationsRange13000, unit in 0.01s
Bias Offset to the outputRange016383

The algorithm of "Proportional Controller" is very simple and easy to implement, and it takes less time for loop
calculation. Most of the general applications, this kind of controller is good enough, but it needs to adjust the offset (Bias)
to the output to eliminate the steady state error due to the change of set point.
18.2.2
Proportional + Integral Controller

n
Mn =(D4005/Pb) x (En) +
[(D4005/Pb)KiTsEn] + Bias
0
Where,
Mn
Output at time n.

Pb
Proportional band Range15000, unit in 0.1%Kc(gain)=D4005/Pb
En
The difference between the set point (SP) and the process variable (PV) at time "n";
Ki
Integral tuning constantRange09999, it means 0.0099.99 Repeats/min
Ts
En = SP - PVn
Bias Offset to the outputRange016383

The most benefit of the controller with integral item is to overcome the shortage of the "Proportional Controller"
mentioned above; via the integral contribution, the steady state error may disappear, thus it is not necessary to adjust the
offset manually while changing the set point. Almost, the offset (Bias) to the output will be 0.
18-2
18.2.3
Proportional + Integral + Derivative Controller

n
Mn = (D4005/Pb) x (En) +
[(D4005/Pb)KiTsEn] - [(D4005/Pb)Td(PVnPVn-1)/Ts] + Bias

0
Where,
Mn
Output at time n.

Pb
Proportional band Range15000unit in 0.1%Kc(gain)=D4005/Pb
En
Ki
Integral tuning constantRange09999, it means 0.0099.99 Repeats/min
Td
Derivative tuning constant Range09999, it means 0.0099.99 min
PVn
Process variable at time n
En = SP - PVn
PVn-1 Process variable when loop was last solved

Ts
Bias
Offset to the outputRange016383
Derivative item of the controller may have the contribution to make the response of controlling process smoother
and not too over shoot. But because it is very sensitive of the derivative contribution to the process reaction, most of
applications, it is not necessary of this item and let the tuning constant (Td) be equal to 0.
18.3 Explanation of the PID Instruction and Program Example

The followings are the instruction explanation and program example for PID (FUN30) loop control of
WSZ-controller.
18-3
FUN 30
PID
Convenient Instruction of PID Loop Operation
Ladder symbol
Mode
Ts Solution interval between calculations

13000 ; unit in 0.01s
30.PID
Ts :
A/M
ERR
Setting error
HAL
High alarm
SR Starting register of loop settings ;
SR :
Bumpless
BUM
it takes 8 registers in total.
OR :
OR Output register of PID loop operation.
PR :
Direction
WR :
D/R
FUN 30
PID
LAL
Low alarm
PR Starting register of loop parameters;

it takes 7registers.
Range
ROR
DR
R0 R5000 D0
R3839 R8071 D3999
Operand
Ts
SR
OR
PR
WR
HR
*
*
*
*
WR Staring register of working registers

for this instruction;
13000
it takes 5 registers and can't be

repeated in using.
The WSZ-controller software algorithm uses mathematical functions to simulate a three-mode (PID) analog
controlling technique to provide direct digital control. The control technique responds to an error with an
output signal. The output is proportional to the error, the error's integral and the rate of change of the process
variable. Control algorithms include, P, PI, PD and PID which all include the features of auto/manual
operation, bumpless/balanceless transfers, reset wind-up protection, and adaptive tuning of gain, integral,
and derivative terms.
The digitized mathematical expression of WSZ-controller PID instruction as bellows:

n
Mn = (D4005/Pb) x (En) +
[(D4005/Pb)KiTsEn] - [(D4005/Pb)Td(PVnPVn-1)/Ts] + Bias

0
Where,
Mn
Output at time n
D4005 The gain constant, the default is 1000, which can be set between 15000.
Pb
Proportional band
- the expression stating the percent change in error required to change the output full scale.
Range15000unit in 0.1%Kc (gain) =D4005/Pb
Ki
Integral tuning constant (Range09999, it means 0.0099.99 Repeats/min)
Td
Derivative tuning constant (Range09999, it means 0.0099.99 min)
PVn
Process variable at time n
PVn-1 Process variable when loop was last solved.

En
En = SP - PVn
Ts
Solution interval between calculations (Range13000, unit in 0.01s)
Bias
Offset to the output (Range016383)
18-4
FUN30
PID
FUN30
PID
Principle of PID parameter adjustment

z As the proportional band (Pb) adjustment getting smaller, the larger the proportional contribution to the
output. This can obtain a sensitive and rapid control reaction. However, when the proportional band is
too small, it may cause oscillation. Do the best to adjust Pb smaller (but not to the extent of making
oscillation), which could increase the process reaction and reduce the steady state error.
z Integral item may be used to eliminate the steady state error. The larger the number (Ki, integral tuning
constant), the larger the integral contribution to the output. When there is steady state error, adjust the
Ki larger to decrease the error.
When the Ki = 0, the integral item makes no contribution to the output.
For ex, if the reset time is 6 minutes, Ki=100/6=17if the integral time is 5 minutes, Ki=100/5=20.
z Derivative item may be used to make the process smoother and not too over shoot. The larger the
number (Td, derivative tuning constant), the larger the derivative contribution to the output. When there
is too over shoot, adjust the Td larger to decrease the amount of over shoot.
When the Td = 0, the derivative item makes no contribution to the output.
For ex, if the rate time is 1 minute, then the Td = 100; if the rate time is 2 minutes, then the Td = 200.
z Properly adjust the PID parameters can obtain an excellent result for loop control.
Instruction description
z When control input "A/M"=0, it performs manual control and will not execute the PID calculation. Directly
fill the output value into the output register (OR) to control the loop operation.
z When control input "A/M"=1, it defines the auto mode of loop control; the output of the loop operation is
loaded by the PID instruction every time it is solved. It is equal to Mn (control loop output) in the digital
approximation equation.
z When control input "BUM"=1, it defines bumpless transfer while the loop operation changing from manual
into auto mode.
z When control input "A/M"=1, and direction input "D/R"=1, it defines the direct control for loop operation;
it means the output increases as error increases.
z When control input "A/M"=1, and direction input "D/R"=0, it defines the reverse control for loop operation;
it means the output decreases as error increases.
z When comes the error setting of loop setting points or loop parameters, the PID operation will not be
performed and the output indication "ERR" will be ON.
z While the engineering value of the controlling process is greater than or equal to the user set High Limit,
the output indication "HAL" will be ON regardless of "A/M" state.
z While the engineering value of the controlling process is less than or equal to the user set Low Limit, the
output indication "LAL" will be ON regardless of "A/M" state.
18-5
FUN30
PID
FUN30
PID
Description of operand Ts
z TsIt defines the solution interval between PID calculations, the unit is in 0.01 sec; this term may be
constant or variable data.
Description of operand SR (Loop setting registers)
z SR+0 = Scaled Process VariableThis register is loaded by the PID instruction every time it gets solved. A
linear scaling is done on SR+6 using the high and low engineering range found in SR+4 and
SR+5.
z SR+1 = Setpoint (SP)The user must load this register with the desired setpoint the loop should control
at. The setpoint is entered in engineering units, it must be the rangeLER SP HER
z SR+2 = High Alarm Limit (HAL) The user must load this register with the value at which the process
variable should be alarmed as a high alarm (above the setpoint). This value is entered as the
actual alarm point in engineering units and it must be the rangeLER LAL < HAL HER
z SR+3 = Low Alarm Limit (LAL) The user must load this register with the value at which the process
variable should be alarmed as a low alarm (below the setpoint). This value is entered as the
actual alarm point in engineering units and it must be the rangeLER LAL < HAL HER
z SR+4 = High Engineering Range (HER) The user must load this register with the highest
value for
which the measurement device is spanned. (For example a thermocouple might be spanned for 0
to 500 degrees centigrade, resulting in a 0 to 10V analog input to the WSZ-controller (0V=0,
10V=500); the high engineering range is 500, this is the value entered into SR+4.)
The high engineering range must be9999 < HER 19999
z SR+5 = Low Engineering Range (LER)The user must load this register with the lowest value for which
the measurement device is spanned.
The low engineering range must be9999 LER LAL < HAL HER
z SR+6 = Raw Analog Measurement (RAM)The user's program must load this register with the process
variable (measurement). It is the value that the content of analog input registerR3840R3903
is added by the offset if necessary. It must be the range0 RAM 16380 if the analog input
is 14-bit format but valid 12-bit resolution, and 0 RAM 16383 if the analog input is 14-bit
format and valid 14-bit resolution.
The resolution of analog input can be defined by register D4004,
D4004=0, it means 14-bit format but valid 12-bit resolution; D4004=1, it means 14-bit format and
valid 14-bit resolution.
z SR+7 = Offset of Process Variable (OPV)The user must load this register with the value as described
follows: OPV must be 0 if the raw analog signal and the measurement span of the analog input
module are all 020mA, there is no loss of the measurement resolution; OPV must be 3276 if
the raw analog signal is 420mA but the measurement span of the analog input module is 0
20mA, there will have few loss of the measurement resolution (163834 / 20 = 3276).
It must be the range 0 OPV < 16383
z When the setting mentioned above comes error, it will not perform PID operation and the output indication
"ERR" will be ON.
Description of operand OR
z OROutput register, this register is loaded directly by the user while the loop in manual operation mode.
While the loop in auto operation mode, this register is loaded by the PID instruction every time it is
solved. It is equal to Mn (control loop output) in the digital approximation equation. It must be the
range0 OR 16383
18-6
FUN 30
PID
FUN 30
PID
Description of operand PR (Loop parameters)
z PR+0 = Proportional Band (Pb)The user must load this register with the desired proportional constant.
The proportion constant is entered as a value between 1 and 5000 where the smaller the
number, the larger the proportional contribution.
(This is because the equation uses D4005 divided by Pb.)
It must be the range1 Pb 5000, unit is in 0.1%
Kc(gain)=D4005/ Pb; the default of D4005 is 1000, and it's range is 1 D4005 5000.
z PR+1 = Integral tuning Constant (Ki)The user may load this register to add integral action to the
calculation. The value entered is "repeats/min" and is entered as a number between 0 and 9999.
(The actual range is 00.00 to 99.99 repeats/min.) The larger the number, the larger the integral
contribution to the output.
It must be the range0 Ki 9999 (0.0099.99 repeats/min)
z PR+2 = Rate Time Constant (Td)The user may load this register to add derivative action to the
calculation. The value is entered as minutes and entered as a number between 0 and 9999.
(The actual range is 0.00 to 99.99 minutes.) The larger the number, the larger the derivative
contribution to the output.
It must be the range0 Td 9999 (0.0099.99min).
z PR+3 = BiasThe user may load this register if a bias is desired to be added to the output when using PI
or PID control. A bias must be used when running proportional only control. The bias is entered
as a value between 0 and 16383 and is added directly to the calculated output. Bias is not
required for most applications and may be left at 0.
It must be the range0 Bias 16383.
z PR+4 = High Integral Wind_up Limit (HIWL)The user must load this register with the output value, (1
to 16383), at which the loop shoud go into "anti-reset wind-up" mode. Anti-reset wind-up
consists of solutions of solving the digital approximation for the integral value. For most
applications this should be set to 16383.
It must be the range1 HIWL 16383.
z PR+5 = Low Integral Wind-up Limit (LIWL)The user must load this register with the output value, (0
to 16383), at which the loop shoud go into "anti-reset wind-up" mode. It functions in the same
manner as PR+4. For most applications this should be set to 0.
It must be the range0 LIWL 16383.
z PR+6 = PID Method

=0 , Standard PID method;
=1 , Minimum Overshoot Method;
Method 0 is prefer because most applications using PI control (Td=0).
The user may try method 1 when using PID control and the result is not stable.
z When the setting mentioned above comes error, it will not perform PID operation and the output indication
"ERR" will be ON.
18-7
FUN 30
PID
FUN 30
PID
Description of operand WR (Working registers)
z WR+0 = Loop status register

Bit0 =0 , Manual operation mode
=1 , Auto mode
Bit1 : This bit will be a 1 during the scan while the solution is being solved,
and it is ON for a scan time.
Bit2=1 , Bumpless transfer
Bit4 : The status of "ERR" indication
Bit5 : The status of "HAL" indication
Bit6 : The status of "LAL" indication
z WR+1 = Loop timer registerThis register stores the cyclic timer reading from the system's 1ms cyclic
timer each time the loop is solved. The elapsed time is calculated by calculating the difference between
the current reading of the system's 1ms cyclic timer and the value stored in this register. This difference is
compared to 10 the solution interval. If the difference is greater than or equal to the solution interval, the
loop should be solved this scan.
z WR+2 = Low order integral summationThis register stores the low order 16 bits of the 32-bit sum
created by the integral term.
z WR+3 = High order integral summationThis register stores the high order 16 bits of the 32-bit sum
created by the integral term.
z WR+4 = Process variable - previous solutionThe raw analog input (Register SR+6) at the time the loop
was last solved. This is used for the derivative control
mode.
Program example
z Adding the content of analog input register with the offset
R2000 and stores it into R1006 being as the raw analog
input of PID instruction.
z When the value of R3840 is -81928191, the value of

R2000 must be 8192 ; the value of R3840 is 016383,
then the value of R2000 must be 0.
11.(+)
EN
U/S
Sa : R3840
D=0
Sb : R2000
CY
: R1006
BR
30.PID
M0
A/M
Ts : R999
Y0
ERR
SR : R1000
z M0=0, Manual operation

=1, Auto operation
BUM
OR : R1010
Pr
D/R
Y1
HAL
: R1020
WR : R1030
Y2
LAL
12.(-)
EN
z R1010 is the output of PID instruction.
z Deducting the offset R2001 from the output value
and stores it into the analog output register for analog
output.
z If the output value of R3904 is 016383, the value of
R2001 must be 0 ; If the value of R3904 is -81928191,
the value of R2001 must be 8192.
18-8
U/S
Sa : R1010
D=0
Sb : R2001
CY
: R3904
BR
FUN 30
PID
R999 The setting of solution interval between
FUN 30
PID
R1020 The setting of proportional band; for
calculations; for example the content of R999 is
example the content of R1020 is 20,
200, it means it will perform this PID operation
it means the proportional band is 2.0%
every 2 seconds.
and the gain is 50.
R1000 Scaled process variable, which is the engineering
R1021 The setting of integral tuning constant;
unit loaded by the PID instruction every time it
for example the content of R1021 is 17,
gets solved. A linear scaling is done on R1006
it means the reset time is 6 minutes
using the high and low engineering range found
(100/617).
in R1004 and R1005.
R1022 The setting of derivative tuning constant;
R1001 Setpoint, it is the desired value the loop should

control at; which is entered in engineering unit.
For example the span of controlling process is
0C500C, the setting of R1001 is equal to
100, it means the desired result is at 100C.
R1002 The setting of high alarm limit; which is entered in
engineering unit.
The example mentioned above, if the setting of
R1002 is equal to 105, it means there will have
the high alarm while the loop is greater than or
equal to 105C.
for example the content of R1022 is 0, it

means PI control.
R1023 The setting of the bias to the output;
most applications let it be 0.
R1024 The setting of high integral wind-up;
R1025 The setting of low integral wind-up;
R1026 The setting of PID method;
R1003 The setting of low alarm limit; which is entered in

engineering unit. The example mentioned, if the
setting of R1003 is equal to 95, it means there
will have the low alarm while the loop is less than
or equal to 95C.
R1004 The setting of high engineering range.
R1030 = Loop status register

Bit0 =0, Manual operation mode
=1, Auto operation mode
Bit1 : This bit will be a 1 during the scan where
The
the solution is being solved, and it is ON
example mentioned, if the setting of R1004 is
for
equal to 500, it means the highest value of this
a scan time.
loop is 500C.
R1005 The setting of low engineering range.
Bit2=1 , Bumpless transfer

The
example mentioned, if the setting of R1005 is

equal to 0, it means the lowest value of this loop
is 0C.
R1006 Raw analog measurement; it is the value that the
content of analog input register (R3840 R3903)
is added by the offset of 2048.
Bit4 : The status of "ERR" indication

Bit5 : The status of "HAL" indication
Bit6 : The status of "LAL" indication
R1031R1034: They are the working registers,

please refer to the description of
operand WR.
R1007 Offset of process variable; let it be 0 if the raw

analog signal and the span of the analog input
module are all 0 10V.
18-9
Appendix 1 WSZ-PACK Operation Instruction

The main unit of WSZ series Controller provides the function to write ladder program and the selected data registers
into MEMORY_PACK directly.
WSZ-PACK is the product name of MEMORY PACK; the memory capacity is 64K WORD. Setting the DIP switch of
the MEMORY_PACK at the unprotect position while writing, and at the protect ON position to avoid accidental writing.
To operate friendly, WinProladder supports the corresponding MEMORY PACK operation interface; but for general
usage, the direct register's access method is also introduced for further reference.
1.1 Write Program and Register Data to WSZ-PACK through WinProladder
Select Run MEMORY_PACK from Tool :
Tool
MEMORY_PACK operations
Write program and data to MEMORY_PACK :

Users can write programs and data into the MEMORY_PACK with this function. After clicking Next, the window display
below :
Appendix 1-1
Users can assign the range of registers which you want to read form MEMORY_PACK and write into Controller. If
you dont want to back-up any data of register, press Execute to start. The execution time may different depend on the
size of ladder program and register data. During written data into MEMORY_PACK, the system will appear the message
Under programming, please wait. If the data are successfully stored into MEMORY_PACK, the message
MEMORY_PACK write OK will appear. If it failed, the message MEMORY_PACK write error will appear.
It is allowed up to 4 groups of register or system backup for MEMORY_PACK manipulation, click "Add" or "Edit" or
"Delete" to accomplish the writing and further retrieve of the selected registers.
The item System Backup means stored all of data(including the PLCID and station number of Controller) into
MEMORY_PACK.
Erase MEMORY_PACK :
Users can clear programs or data stored in MEMORY_PACK with this function. click "Execute", it is showing Under
erase, please wait. It will show "MEMORY_PACK erase OK" if this erase is successful. It will show " MEMORY_PACK
erase error" if this erase is failed.
Disable FLASH content loading when power on :

Users can enter the test run modification mode with this function. Press Execute to enter test run modification mode
(Disable programs and data overwrite).
If the user needs to equip with a new MEMORY_PACK, selecting this item first to avoid the undesired overwrite of
ladder program by which storing in the new MEMORY_PACK while power up. This function is used to let the main
unit enter into the "Modify and Testing" mode for programming if it equips with the MEMORY_PACK. Please refer to
the next page for detailed description.
Appendix 1-2
Enable FLASH content loading when power on :

Press Execute to complete normal mode setup.
Every power up, the ladder program and the selected data registers storing in battery backup RAM of the main unit
will be replaced by which storing in the MEMORY_PACK (if this MEMORY_PACK was equipped with the main unit
and it had ever been written the ladder program), and the Controller will enter into "RUN" mode automatically
regardless it's "RUN" or "STOP" mode before.
For mass production of machine manufacturing or for long term easy after sale maintenance, the MEMORY_PACK is
a very good solution.
1.2 Write Program and Register Data to WSZ-PACK through Special Register Operation
To meet the application needs of different customers, users can write data into MEMORY_PACK by setting special
register. WinProladder users can skip this section because setting actions will be completed at the same time when
executing MEMORY_PACK options with WinProladder.
Operation relevant special register
R4052 : Dedicated register for MEMORY_PACK operation.

Register
Content value
Functions
Modify & Test mode for Controller programming while main unit being
equipped with the MEMORY_PACK.
There are 2 kinds of memory on main unit to store the ladder program
and data registers; one is the battery backup RAM, this is standard
equipment and the ladder program and data registers must be executed
here; another memory to store the ladder program and data registers is
the optional MEMORY_PACK, the ladder program and data registers
can't be executed here directly. In Modify & Test mode, the ladder
program and data registers storing in battery backup RAM of main unit
5530H
R4052
(Test run modification mode)
will not be overwritten by the MEMORY_PACK's while power up; it

means the content of the battery backup RAM will be kept, and the
modification if ever will not be lost, this is so called "Modify & Test
mode".
After the modification and testing has been finished, writing the ladder
program and data registers into the MEMORY_PACK is a better way for
long term saving and easy after sale service of maintenance or for mass
copy of same machine's program.
During the modification and testing, if the user want to give up the
change, it is only to set R4052 to be 0, and turn off then turn on the
power again, the ladder program and data registers storing in battery
backup RAM will be overwritten by which storing in the MEMORY_PACK
while power up, the main unit will return to the environment before
modification.
Appendix 1-3
Normal operation or Writing mode.

If the main unit equips with the optional MEMORY_PACK, and the
R4052
MEMORY_PACK had ever been written the ladder program before,

Other value
while every power up, the ladder program storing in battery backup RAM
of
the
main
unit
will
be
replaced
by
which
storing
in
the
MEMORY_PACK, and the Controller will enter into "RUN" mode

automatically regardless it's "RUN" or "STOP" mode before.
R4046 : Dedicated register to retrieve the data registers storing in ROM_PACK.

While writing the ladder program into the MEMORY_PACK along with the selected data registers, the content
of the selected data registers (locating at the RAM of the main unit) will be initialized with the values which
previously being written into the MEMORY_PACK on each power up; it is very useful for machine turning
parameter's long term saving and after sale service of maintenance.
But in many applications, it needs only one time initialization for the selected data registers while the first
power up and then the contents of those will be retentive after followings' power up.
User may control the value of R4046 to accomplish above mentioned applications.
Register
Content value
5530H
R4046
Other value
Functions
The selected data registers of the main unit will not be initialized with the values which
previously being written into the MEMORY_PACK while power up.
The selected data registers of the main unit will be initialized with the values which
previously being written into the MEMORY_PACK while power up.
If it needs only one time initialization for selected data registers
while the first power up, fill the register R4046 with
the value 5530H in the ladder program.
Either Controller in RUN or in STOP mode, the user can give the command to clear MEMORY_PACK or write the
ladder program and selected registers into MEMORY_PACK.
Register
R4 052
Content value
Functions
55 50H
giving the command to clear MEMORY_PACK
55 51H
the status to say " Being cleared"
55 52H
the status to say "Verify for clearing"
55 53H
the status to say "Complete the clear command "
55 54H
the status to say "Failed to clear the MEMORY_PACK"
55 60H
giving the command to write ladder

MEMORY_PACK
55 62H
the status to say "Writing the Ladder Program"
55 63H
the status to say "Writing the Registers"
55 66H
the status to say "Verify the Ladder Program"
55 67H
the status to say "Verify the Registers"
55 69H
the status to say "Verify the Special Register"
55 6AH
the status to say "Complete the writing"
55 6BH
the status to say "Failed to write ladder program"
55 6CH
the status to say "Failed to write registers"
Appendix 1-4
program and selectde registers into
1.3 Assigning the Retrieval of Register Stored WSZ-PACK

The contents of the selected registers can be written into the MEMORY_PACK and those will be read back from the
MEMORY_PACK for initialization while every power up. The tunning values or fixed preset values can be written into
the MEMORY_PACK for this kind of application to keep proper operation even the loss of the battery power.
The special registers of R4030~R4039 are used to assign which group of registers needed to be written into
MEMORY_PACK for above mentioned application, it is necessary to do the assignment first before giving command
to write the MEMORY_PACK.
Register
Content value
Functions
It is the identification flag to tell the selected registers needed be written into and read
A66AH
(Retentive registers support this function).
R4030
Other value
R4031
back from the MEMORY_PACK according to the following settings of R4031~R4039
14
There is not any register needed be written into and read back from the
MEMORY_PACK.
Quantity of register groups needed be written into and read back from the
MEMORY_PACK (4 in maximum).
The data length of register group 0.
The length is between 1 3840 for register R0 R3839;
R4032
Length 0
The length is between 1 4096 for register D0 D4095;

While the length is 7FF7H, it means for system backup including the PLC ID and
station number of Controller ;
It will not work when illegal length or out of range;
The starting address of register group 0.
The address is between 0 3839 for register R0 R3839;
The address is between 5000 8071 for R5000 R8071;
R4033
Start 0
The address is between 10000 14095 for D0 D4095;

(The address must be added by 10000 for register Dxxxx)
The address is between 4000 4165 for R4000 R4165;
R4033 and R4032 are used in pair.
R4034
Length 1
R4035
Start 1
The data length of register group 1.

The ranges of length same as mentioned above for R4032;
The starting address of of register group 1.
The ranges of address same as mentioned above for R4033;
R4036
Length 2
R4037
Start 2
The data length of register group 2

the starting address of of register group 2
Appendix 1-5
Register
R4038
Content value
Length 3
Functions
The data length of register group 3
the starting address of of register group 3
R4039
Start 3

1.4 Read and Write WSZ-PACK by Function Instruction

You also can read and write data or ladder program by Function Instruction( FUN161FUN162 ). The followings are
the instructions explanation and program example for FUN161 and FUN162 :
Appendix 1-6
FUN161P
WR-MP
Write Data Record into the MEMORY_PACK

Write memory pack
S Starting address of the source data
Ladder symbol
BKBlock number of the MEMORY_PACK01
161P.WR-MP
Operation
control
EN
Pointer
Increment
INC
Acting
Os:
ERR
Error
Pr :
L:
WR:
DN
Done
OsOffset of the block

PrAddress of the pointer
Bk :
Range
Operand
S
BK
Os
Pr
L
WR
ACT
S :
WY
WM
LQuantity of writing1128
WRStarting address of working registers, it takes 2
registers
S may combine with VZP0P9 for indirect addressing
application
WS
WY0
WM0
WS0
WY240 WM1896 WS984
TMR
CTR
HR
IR
OR
SR
ROR
DR
T0
T255
C0
C255
R0
R3839
R3840
R3903
R3904
R3967
R3968
R4167
R5000
R8071
D0
D4095
FUN161P
WR-MP
*
*
*
XR
VZ
P0~P9
01
032511
1128
The main purpose of the MEMORY_PACK of WSZ series's is used for long term storing of the user's ladder
program, except this, through the FUN161/FUN162 instructions, the MEMORY_PACK can be worked as the
portable MEMORY_PACK for machine working parameters's saving and loading.
When execution controlENchanges from 01, it will perform the data writing, where S is the starting
address of the source data, BK is the block number of the MEMORY_PACK to store this writing, Os is the
offset of specified block, Pr is the pointer to point to corresponding data area, L is the quantity of this writing.
The access of MEMORY_PACK manipulation adopts the concept of RECORD data structure to implement
with. The working diagram as shown below :
MEMORY_PACK
When input "INC" = 1, the content of the pointer will be increased by one after the execution of writing, it
points to next record.
Appendix 1-7
FUN161P
WR-MP
Write Data Record into the MEMORY_PACK

Write memory pack
FUN161P
WR-MP
If the value of L is equal to 0 or greater than 128, or the pointed data area over the range, the output "ERR"
will be 1, it will not perform the writing operation.
It needs couple of Controller solving scans for data writing and verification; during the execution, the output
"ACT" will be 1; when completing the execution and verification without the error, the output "DN" will be 1;
when completing the execution and verification with the error, the output "ERR" will be 1.
The MEMORY_PACK can be configured to store the user's ladder program or machine's working
parameters, or both. The ladder program can be stored into the block 0 only, but the machine's working
parameters can be stored into block 0 or 1; the memory capacity of each block has 32K Word in total.
Example program : Writing the record into block 1 of MEMORY_PACK with the different length
M1
M2
161P.WR_MP
EN
S :
Bk :
INC
Os :
Pr :
L :
WR:
M3
M4
M100
R0
ACT
1
0
D1
ERR
20
R2900
M101
M102
DN
161P.WR_MP
M103
R100
ACT
Os :
Pr :
1
10000
D2
ERR
L :
WR:
50
R2910
EN
S :
Bk :
INC
M104
M105
DN
MEMORY_PACK
Block 1
Head of Block 1
The RECORD starts from R0,
the length is 20(R0~R19)
Write
Os = 0
The length is 20
of RECORD 0
Pr = 0
The length is 20
of RECORD 1
Pr = 1
The RECORD starts from R100, Write

the length is 50(R100~R149).
Os = 9999
Os = 10000
The length is 20
of RECORD 499
Pr = 499
The length is 50
of RECORD 0
Pr = 0
Os = 32511
Appendix 1-8
The length is 50
of RECORD 449
Pr = 449
FUN162 P
RD-MP
Read Data Record from the MEMORY_PACK

Read memory pack
Ladder symbol
BKBlock number of the MEMORY_PACK01
162P.RD-MP
Operation
control
EN
Pointer
Increment
INC
OsOffset of the block
ERR
Bk :
Error
PrAddress of the pointer
Os:
LQuantity of reading1128
Pr :
L :
DStarting address to store the reading record

D:
Operand
Range
WY
application.
WM
WS
WY0
WM0
WS0
WY240 WM1896 WS984
BK
Os
Pr
L
D
FUN162 P
RD-MP
TMR
CTR
HR
IR
OR
SR
ROR
DR
T0
T255
C0
C255
R0
R3839
R3840
R3903
R3904
R3967
R3968
R4167
R5000
R8071
D0
D4095
*
*
*
XR
VZ
P0~P9
01
032511
1128
If the MEMORY_PACK of the WSZ series's has stored the data record written by the FUN161 instruction,
they can be read out for machine's working through this instruction, it will reduce the tuning time for machine
operation.
When execution control "EN" = 1 or from 01( P instruction), it will perform the data reading, where BK is
the block number of the MEMORY_PACK storing the record, Os is the offset of specified block, Pr is the
pointer to point to corresponding data area, L is the quantity of this record, and D is the starting address to
store this reading of record. The access of MEMORY_PACK manipulation adopts the concept of RECORD
data structure to implement with.
The working diagram as shown below:
MEMORY_PACK
When input "INC"=1, the content of the pointer will be increased by one after the execution of reading, it
points to next record.
Appendix 1-9
FUN162 P
RD-MP
Read Data Record from the MEMORY_PACK

Read memory pack
FUN162 P
RD-MP
If the value of L is equal to 0 or greater than 128, or the pointed data area over the range, the output "ERR"
will be 1, it will not perform the reading operation.
Output will be ERR if MEMORY_PACK is empty or data format not correct, and user used FUN162 to read
data from MEMORY_PACK.
Example program : Reading the record from block 1 of MEMORY_PACK with the different length
It is necessary that correct data in MEMORY_PACK or this example cant execute correctly.
M10
M11
M12
M13
162P.RD_MP
EN
Bk :
INC
Os :
Pr :
1
0
D10
L :
D :
20
R0
M110
ERR
162P.RD_MP
EN
INC
Bk :
1
10000
Os :
D11
Pr :
L :
D :
M111
ERR
50
R100
Appendix 1-10
Revision History
Date of printing
Oct. 2011
Index
None
Description of revision
First version
Product Warranty

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Preface, Contents

Introduction of FUJI WSZ Series

Power Supply Wiring, Power

Digital Input(DI) Circuit

Digital Output(DO) Circuit

Test Run, Monitoring and Maintenance

WSZ-Controller Memory Allocation

WSZ-Controller Instruction Lists

Descriptions of Function Instructions

Basic Function Instructions

Advanced Function Instructions

Step Instruction Description

Attention related to safety (Read carefully before application)

The three safety

Following is their description:

Chapter 2System Architecture

Chapter 3Expansion of WSZ-Controller

Chapter 4Installation Guide

Chapter 5Power Supply Wiring, Power Consumption Calculation, and

Chapter 6Digital Input (DI) Circuit

Chapter 7Digital Output (DO) Circuit

Chapter 8Test Run, Monitoring and Maintenance

The Operation Principle of Ladder Diagram ............................................................. 1-1

Combination Logic ................................................................................................. 1-1

Sequential Logic .................................................................................................... 1-2

Differences Between Conventional and PLC Ladder Diagram ................................ 1-3

Ladder Diagram Structure and Terminology ............................................................ 1-5

Chapter 2: WSZ-Controller Memory Allocation

WSZ-Controller Memory Allocation .......................................................................... 2-1

Digital and Register Allocations................................................................................ 2-2

Special Relay Details ............................................................................................... 2-3

Special Registers Details ......................................................................................... 2-8

Chapter 3: WSZ-Controller Instruction Lists

Sequential Instructions ............................................................................................. 3-1

Function Instructions ................................................................................................ 3-2

Chapter 4: Sequential Instructions

Valid Operand of Sequential Instructions ................................................................. 4-1

Element Description ................................................................................................. 4-2

Characteristics of A, B, TU and TD Contacts ............................................................ 4-2

OPEN and SHORT Contact .................................................................................... 4-3

Output Coil and Inverse Output Coil ......................................................................... 4-4

Retentive Output Coil ............................................................................................. 4-4

Set Coil and Reset Coil........................................................................................... 4-5

Node Operation Instructions..................................................................................... 4-5

Chapter 5: Descriptions of Function Instructions

The Format of Function Instructions......................................................................... 5-1

Input Control .......................................................................................................... 5-1

Instruction Number and Derivative Instructions ......................................................... 5-2

Operand ................................................................................................................ 5-3

Functions Output (FO) ............................................................................................ 5-6

Use Index Register(XR) for Indirect Addressing ...................................................... 5-6

Overflow and Underflow of Increment(+1) or Decrement(-1) ................................. 5-9

Carry and Borrow in Addition/Subtraction ................................................................ 5-10

Chapter 6: Basic Function Instructions

(T) .............................................................. 6-2

(SET) ......................................................... 6-8

(RST) ......................................................... 6-10

MASTER CONTROL LOOP START

(FUN0) ....................................................... 6-12

MASTER CONTROL LOOP END

(FUN1) ....................................................... 6-14

(FUN2) ....................................................... 6-15

(FUN3) ....................................................... 6-17