Lecture 1

Data Converters
Prof. Chih-Hung (James) Chen
Department of Electrical and Computer Engineering
McMaster University, Hamilton, ON, Canada
E-mail: chench@mcmaster.ca

Why Analog?
Analog - advantages
Most physical phenomena of interest are analog
Required for most real situa:ons

Transducers are simple

Poten:ally high precision
Rela:vely simple signal processing adequate
for most prac:cal situa:ons

Analog - disadvantages
Analog components - dri>, distor:on, noise, osets,
etc.
Errors in analog signals - accumulate during
processing, transmission, and storage

Data Converter

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Prof. C. H. Chen

Digital Circuits
Digital circuits used in
Computers, data processing
Electronic calculators and instrumenta:on
Control devices
Communica:on equipment, telephone networks, cell phones
Entertainment CD, MP3 Players, TV, radio, camera
Medical equipment

Disadvantages

Advantages

Signal strength easily restored

Not much degradation of signal accuracy during
processing, transmission & storage
Analog-to-digital converters and digital-to Components are cheap, reliable and consume
analog converters are required to interface a
low-power
digital system with real-world analog signals
Digital signal processing can be highly
sophisticated using special-purpose hardware or
software - programmable digital signal processors
or computers
Limited signal precision - number of bits
used to encode each sample

Data Converter

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Prof. C. H. Chen

Basic A/D and D/A Concepts

Fig. 1.1 Block diagram representations of (a) A/D converter and (b) D/A converter.

An analog signal vA is applied to the input of the A/D converter and the
output is an N-bit digital signal that can be represented as

where b1, b2, etc. are the bit coefficients that are either a 1 or 0. The bit b1
is the most significant bit (MSB) and the bit bN is the least significant bit
(LSB).
Data Converter R16.11.1

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Prof. C. H. Chen

vA vs. vD Characteristics
Quantization Error : Constant vD for
1
1
(m )LSB < v A < (m + )LSB.
2
2
Rounding
causes
quantization
error.
VREF = 5V

6 bits

VREF
LSB = N (Quantization)
2

Threshold

Fig. 1.2 Digital output versus analog input for a 6-bit A/D converter.
Data Converter R16.11.1

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Prof. C. H. Chen

Discrete Output from D/A Converter

Low-Pass Filter

Fig. 1.3 Discrete analog output vA and smoothed output vA versus

time from a D/A converter.
Data Converter R16.11.1

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Prof. C. H. Chen

Weighted-Resistor 4-Bit D/A

RF = 10 k

RF
voi =
(5V ) Si , where Si = 0 or 1
Ri

Fig. 1.4 A 4-bit weighted-resistor D/A converter.

Data Converter R16.11.2

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Prof. C. H. Chen

Weighted-Resistor 4-Bit D/A

= 10 k

Drawback: The
accuracy for the
large resistances in
LSB becomes more
difficult to
maintain. The size
of this D/A
converter is in
general limited to a
4-bit input.

vo = voi =
i =1

RF
(5V ) Si
Ri

where Si = 0 or 1

Fig. 1.4 A 4-bit weighted-resistor D/A converter.

Data Converter R16.11.2

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Prof. C. H. Chen

R2R Ladder Network D/A

1
1
Therefore,
I
=
I
=
At any node: Rx = 2R, the current splits equally.
N
N 1 N 1 I1
2
2
1 VREF VREF
= N 1
= N
2 2R 2 R
Advantage:
Easy to control R & 2R.

Fig. 1.5 Example of an R2R ladder network in an N-bit D/A converter.

bN
bi RF if RF = R
b1 b2
vo = ( I i ) RF = ( VREF ) i
=

+
+
...
+
(
)
REF

2
N
2
R
2
2
2

i =1
i =1

Data Converter R16.11.2

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Prof. C. H. Chen

Comparators
High

Low

is usually very small.

Figure
15.24
(a) Open-loop
comparator
(b) voltage
transfer
characteristics,
Fig. 1.6
(a) Open-loop
comparator
and and
(b) voltage
transfer
characteristics,

open-loop
open-loop comparator
comparator .
Data Converter

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Prof. C. H. Chen

Parallel or Flash A/D Converters

Issues: # of R and The signal vA is applied to seven
comparators for
comparators at the noninverting
large bits.
terminals. A reference voltage is

applied to a resistive ladder network,

whose outputs are applied to the
inverting terminals of the comparators.
The total resistance in the ladder
network is 8R so VREF/8R represents 1
LSB in terms of current.
A complete conversion is obtained
during one clock period.

1
= LSB
2
High/Low
Comparators
Fig. 1.7 A 3-bit flash or parallel A/D converter.

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3
= LSB
2

Prof. C. H. Chen

Counting A/D Converters

Drawbacks: To complete the conversion process, the
clock must go through its complete cycle, which 2N
clock periods (i.e., 16 clock periods for a 4-bit output).

High/Low

(b)
(a)
Threshold Voltage

Fig. 1.8 (a) Block diagram of a counting A/D converter and (b) the timing diagram of
a 4-bit A/D counting converter for a specific input voltage.

VREF
1
1
vo = LSB + m LSB, where LSB = N , Quantization Error = LSB
2
2
2
Data Converter R16.11.3

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Prof. C. H. Chen

Dual-Slope A/D Converters

S1 = Opened

S1 = Opened

S 2 = v A' (sampled v A )

S 2 = VREF

(b)
(a)
Counter Overflows & Reset

Fig. 1.9 (a) Block diagram and (b) timing diagram of a dual-slope A/D converter .

vA'
VREF

T1 =
RC
RC

T2

Data Converter R16.11.3

T1 = 2 N To , T2 = n To
where To = clock period
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Prof. C. H. Chen