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This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics

A Single Stage CCM Zeta Microinverter for


Solar Photovoltaic AC Module
Ravi K Surapaneni, Student member, IEEE, Akshay K Rathore, Senior Member, IEEE

Abstract Microinverter mounted on each photovoltaic

(PV) panel, i.e., microinverter is gaining popularity due to


increased energy harvest. This paper proposes a novel
single stage zeta microinverter for PV applications. The
proposed topology is based on zeta converter with high
frequency (HF) transformer isolation and a single low side
switch on the primary side of transformer. The most
distinctive feature of the proposed inverter is its ability to
work in continuous conduction mode (CCM) over a wide
load range, which results in high efficiency, reduced
current stress, and components' rating. All the secondary
switches operate at line frequency, thus reducing switching
losses significantly. A comprehensive study of the proposed
microinverter including steady-state analysis and design
has been reported. A 220 W microinverter was designed,
developed, and tested in the laboratory. Experimental
results are demonstrated to verify the CCM operation of
the inverter and its performance over a wide load range.
Index TermsPhotovoltaic (PV), AC module, Zeta,
Microinverter, Continuous Conduction Mode (CCM).

I.

concern [10]-[13]. Third kind is single-stage microinverters


where all three tasks i.e. MPPT, voltage boosting and dc to ac
conversion are done in one stage. Such microinverters are very
promising due to reduced switch count and high power density
[14, 15]. Other type of microinverters utilize active power
decoupling that enables the use of thin film capacitors instead
of electrolytic capacitors to increase the life span of the
microinverter. However, this comes with an additional cost
and relatively low efficiency [16]-[19].
Among single-stage microinverters, flyback converter with
a line frequency inverter (LFI) is the most commonly reported
topology as there is only one main switch on the primary.
Most of the flyback inverters reported in literature operate
under discontinuous conduction mode (DCM). DCM mode of
operation leads to higher inverter losses, current stress and
component rating compared to CCM operation [20]-[23]. This
is due to the control complexity caused by the right half plan
(RHP) zero when flyback converter is operated in CCM. To
address the problems in flyback inverter and to achieve CCM
operation with a moving RHP zero, Li & Oruganti proposed
control strategies [21] and demonstrated significant efficiency
improvement. However, designing controller with a moving
RHP zero is always a challenge.

INTRODUCTION

O address the growing concern of depletion of fossil


fuels, energy cost, and CO2 emission, higher penetration
of renewable energy sources into the grid is encouraged.
Among various renewable energy sources, solar is the most
abundant form of energy. Series connected PV panels with a
single large inverter (string inverter) can be used to feed
power into the grid with a common Maximum Power Point
Tracking (MPPT). However, this is an inefficient way of
harvesting energy because individual MPPT of solar panels is
not done. A panel mismatch, shading or formation of debris
will reduce the energy harvest significantly. To solve the
above-mentioned problem, the concept of microinverter is
picking up. Microinverters are attached at the back of a PV
panel and directly generate ac with MPPT [1]-[3]. Improving
the efficiency, reducing number of power conversion stages,
and scalability are major design considerations.
Among various microinverters reported in literature, the
most generic are two stage inverters where a dc/dc converter is
used in the front-end to track MPPT and to boost the voltage
while second stage pulse width modulated (PWM) inverter
convert dc to ac [4]-[9]. The major drawback of this type of
inverters is the components count and cost. Non-isolated
microinverters are simple and compact, but boosting the
voltage to the grid level without transformer is a major

Fig. 1. Proposed zeta microinverter

Modeling of zeta dc/dc converter and parameter selection to


eliminate RHP zero was earlier reported in [24-25]. It is
concluded that zeta converter can achieve higher bandwidth,
and good closed loop stability. A DCM mode zeta converter
based inverter was earlier reported in [25]. The inverter power
rating was limited to 80W. Low switching frequency (20 kHz)
operation resulted into a larger filter and transformer.
In this paper, a novel single stage CCM zeta microinverter
is proposed as shown in Fig.1, with a single primary switch
and four secondary switches working as LFI. The objectives
and layout of the paper are as follows: Steady state operation
and analysis of zeta microinverter are explained in Section II.
Key design considerations are discussed in Section III.

2168-6777 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics

Experimental results are demonstrated and discussed in


Section IV.
II.

PROPOSED TOPOLOGY AND DETAILED ANALYSIS OF


CCM ZETA MICROINVERTER

This Section studies the steady-state operation of proposed


microinverter. To simplify analysis, the following assumptions
are made: (i) All semiconductor devices are ideal and lossless
(ii) input voltage ripple is negligible.
Operation of zeta microinverter is explained for the positive
half cycle of load current at switching frequency. The main
switch Sm is modulated at high frequency (HF) with a variable
duty cycle to generate rectified ac output and secondary
switches S1 - S4 are operated at line frequency to produce ac
output at line frequency. On the secondary side, during
positive half cycle of load current switches S1, S3 are gated to
conduct and during negative half cycle of load current,
switches S2, S4 are gated to conduct. Steady-state operation of
the proposed microinverter in DCM and CCM mode of
operation is analyzed. Equivalent circuits for the inverter in
different operating modes are shown in Fig. 2. Steady-state
operating waveforms of zeta microinverter in DCM and CCM
modes are shown in Fig. 3 and 4, respectively.
A. DCM mode of operation
a. Interval 1 (td0 < t < td1) Fig. 2(a)
At t = td0, the main switch Sm is tuned-on. Secondary switches
S1, S3 are conducting for the entire positive half cycle of load
current. Diode Ds2 is reverse biased as shown in Fig. 2(a).
Primary current Ip increases linearly starting from zero as
shown in Fig. 3. Primary current Ip and magnetizing inductor
current Ilm can be given as
V
n 2Vin
(1)
(t td 0 )
i p (t ) in
Lo
Lm
V
(2)
ilm (t ) Ilm (td 0 ) in (t td 0 )
Lm
In this interval, secondary switch current is2 = 0 and secondary
side currents isp, iLo and icf are similar due to series connection
as shown in Fig. 2(a) and the values is derived as

isp (t )

i p (t ) ilm (t )
n

iLo (t ) icf (t )

(3)

Flying capacitor Cf is discharging, and at the end of this


interval, its voltage falls below the minimum value, Vcf_min.

(b)

(c)
Fig. 2. Equivalent circuit depicting the different intervals of operation of the
proposed microinverter.

At the end of this interval, primary current ip reaches


maximum value denoted by Ip_peak given by (4). Duration of
this interval is equal to DTs (td1=DTs) where D is the duty
cycle and Ts is the time period of main switch Sm.
V
n 2Vin
(4)
( DTs )
I p (td 1 ) I p _ peak in
Lo
Lm

I Lo (td 1 ) I Lo _ peak

I p _ peak I Lm (t td 1 )
n

(5)

b. Interval 2 (td1 < t < td2) Fig. 2(b)


At t = td1, the main switch Sm is turned-off and secondary
side diode Ds2 goes into conduction. At the start of this
interval, the diode current is equal to peak primary current
Ip_peak referred to secondary given by
I p _ peak
(6)
I ds2 (td 1 ) I s 2 (td 1 )
n
Vin n 2Vin

( DTs )

I p _ peak
Lm
Lo

(7)
I s 2 (t d 1 )

n
n
The magnetizing inductance LM starts charging the flying
capacitor from initial value of Vcf_min. Switch current is2 and
output inductor current iLo are given as
I
v (t )
V
(8)
is 2 (t ) p _ peak o (t td 1 ) cf2 (t td 1 )
n
Lo
n Lm
1
(9)
vcf (t ) Vcf _ min
icf dt
Cf
iLo (t ) I Lo _ peak

V0
t td 1
L0

(a)

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(10)

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics

Fig. 2(c). A voltage (Vcf Vo) appears across the output


inductor and its current expression is
Vcf Vo
(14)
iLo (t ) I Lo (td 2 )
(t t d 2 )
Lo
The second term in (14) is very small which makes inductor
current approximately dc. The same current flows through the
magnetizing inductance but negative. At the end of this
interval, the current iLo and ilm are given by
Vcf Vo
(15)
I (T ) I (t )
(T t )
Lo

Lo

d2

Lo

d2

(16)
I lm (Ts ) I lm (td 0 ) nI Lo (Ts )
The inverter operation is repeated at switching frequency with
a variable duty cycle D to generate a rectified sine output.
Once the reference load current is negative, switches S1 and S3
are tuned-off, and the switches S2, S4 are turned-on.
B.

Fig. 3. Steady-state operating waveforms of the for proposed inverter in DCM


mode of operation.

It should be noted from (9) that with increase in value of


flying capacitor, voltage ripple will reduce. Average voltage
across the output capacitor and the flying capacitor is equal for
given switching cycle (<Vcf> = < Vo>). Thus, for higher values
of flying capacitance, vcf is approximately equal to the output
voltage Vo and is constant for a given switching cycle. So, the
switch current is2 can be approximated to
I p _ peak Vo
V
(11)
i s 2 (t )
(t t d 1 ) 2 o (t t d 1 )
n
Lo
n Lm
However, for a practical design with higher flying capacitance
value, corresponding increase in series resistance (ESR) of
capacitor will increase conduction losses. Although,
conduction losses in the diode Ds2 will reduce with increasing
capacitance value. Thus, an optimum value of the flying
capacitor should be chosen to limit overall losses. This
interval ends when the switch current is2 becomes zero. Thus
duration of this interval can be obtained by my making is2 = 0,
and substituting t = td2 and is given by
I p _ peak
td 2

V
V
0 2 o DTs
L
n
Lm
0
V0
V
2 o
L
n
Lm
0

(12)

At the end of this interval, inductor current iLo is given by


I Lo (td 2 ) I Lo _ peak

Vo
td 2 DTs
Lo

(13)

c. Interval 3 (td2 < t < td3) Fig. 2(c)


This interval starts when the secondary diode current is2
becomes zero and extends until the primary switch is turnedon at t = td3. This interval is seen only if inverter goes into
DCM and equivalent circuit for this time interval is shown in

CCM mode of operation

a. Interval 1 (tc0 < t < tc1) Fig. 2(a)


At t = tc0, the main switch Sm is tuned-on and secondary
switches S1, S3 are conducting throughout the positive half
cycle. Equivalent circuit of the proposed zeta inverter for the
current interval is shown in Fig. 2(a). Fig. 4 shows the steady
state operating waveforms when operated in CCM. This
interval is common to both DCM and CCM but prior to this
interval the voltage across the primary of the transformer is
non-zero, thus the current in the primary starts from a
minimum value. In this interval input voltage, Vin is applied
across the magnetizing inductance Lm of the transformer.
Diode Ds2 is reverse biased, thus the secondary switch current
is2 = 0 in this interval. Mathematical equations for the various
current waveforms are
V
n 2Vin
(17)
(t tc 0 )
i p (t ) I p (tc 0 ) in
L
L
o
m
V
(18)
ilm (t ) I lm (tc 0 ) in (t tc 0 )
Lm
i p (t ) ilm (t )
(19)
isp (t )
iLo (t ) icf (t )
n
At the end of this interval, flying capacitor is discharged to
Vcf_min, currents I p, ILm and ILo reach their peak values which
can be represented by Ip_peak , ILm_peak and ILo_peak, respectively
and are given by
V
n 2Vin
(20)
( DTs )
I p (tc1 ) I p _ peak I p (tc 0 ) in
Lo
Lm
V
(21)
I Lm (tc1 ) I Lm _ peak I Lm (tc 0 ) in ( DTs )
Lm
I p _ peak I Lm _ peak
(22)
I Lo (tc1 ) I Lo _ peak
n
This interval with duration DTs ends when the main switch Sm
is tuned-off.

b. Interval 2 (tc1 < t < tc2) Fig. 2(b)


At t = tc1 the main switch Sm is turned-off and secondary side
diode Ds2 goes into conduction as shown in Fig. 2(b). At the
start of this interval, the diode current is equal to peak primary
current Ip_peak referred to secondary, which can be given as

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics

average current ratio compared to DCM mode as the current


ripple in the inductors LM, Lo are reduced. This will in turn
translate into improved inverter efficiency as the conduction
losses are reduced.
III.

DESIGN EXAMPLE FOR CCM ZETA MICROINVERTER

This Section presents the major design guidelines for zeta


microinverter operating in CCM. The specifications are: an
Input voltage Vin = 30 48 V, Vo = 230 V, 50 Hz, and rated
power of 220 W.
A. Average input current
The average input current of the inverter can be derived from
the efficiency () of the inverter as
P
(30)
I in o
Vin

Fig. 4. Steady-state operating waveforms of the for proposed inverter in CCM


mode of operation.

I ds2 (t c1 ) I s 2 (t c1 )

I p _ peak

(23)

V
n 2Vin
( DTs )
I p (tc 0 ) in
I p _ peak
Lm
Lo

(24)
I s 2 (tc1 )

n
n
Output voltage of Vo is applied across the inductor Lo and the
inductor current decreases linearly given by
V
(25)
i Lo (t ) I Lo _ peak o t DTs
Lo
Flying capacitor voltage VCf appears across the magnetizing
inductance, but the average voltage across the output capacitor
and the flying capacitor is equal for given switching cycle
(<Vcf> = < Vo>). Thus, for higher values of flying capacitance,
vcf is approximately equal to the output voltage V0 thus the
current in flying capacitor Icf increases linearly with a slope
Vo/(n2Lm) thus expression for switch current can be given as
I p _ peak V0
V
(26)
i (t )
(t t ) 0 (t t )
s2

L0

c1

n 2 Lm

c1

For CCM operation, switch Sm is turned-on before the diode


current reaches zero. Thus, the currents at the end of this
interval are equal to currents at the start of next interval.
(27)
I p (t tc 0 ) nI s 2 Ts
I Lm (t tc 0 ) nI cf Ts
Substituting (26) in (27) the expression for the initial current
when the primary switch is turned-on can be obtained as

(28)

I p _ peak
V
V
I p (t c 0 ) n
(1 DTs ) 0 2 0
L0 n Lm
n

(29)

From the above analysis, it should be realized that CCM


operation of zeta microinverter results into lower RMS to

B. Input capacitor
While the power output of the microinverter is time varying,
the input power from PV panel must be maintained constant at
average value to increase the energy harvest. Thus a large
capacitor needs to be connected across PV panel to balance
this difference. Voltage ripple due to insufficient capacitance
has a significant impact on the MPPT performance and to
maintain MPPT efficiency at 99% the maximum voltage
ripple allowed is limited to 5% [1].
Cin

Pin
2fVin Vin

(31)

Where, f is the mains frequency. At Vin= 30 V, 220 W,


allowing 5% input voltage ripple requires input capacitor of 15
mF. This is a large electrolytic capacitor and usually expected
to have short lifespan. However, it has been shown that proper
thermal design extends the lifespan of electrolytic capacitors
up to 30 years by maintaining the core capacitor temperature
below 65 C, thus improving the reliability [26].
C. Switch selection
The selection of primary switch Sm is important because it
operates at HF and carries the highest current in the circuit.
Maximum voltage that appears across devices is
Vo _ peak
(32)
VSM Vin _ max
n
(33)
VS1 VS 2 VS 3 VS 4 nVin _ max Vo _ peak
Where Vin_max and Vo_peak are the maximum input voltage of
PV panel and peak value of output voltage, which are 48 V
and 325 V respectively.
D. Transformer turns
To select the transformer turns, it is required to know the
DC gain of the inverter, which is derived by applying volt-sec
balance across the transformer. In an ideal case when
operating in CCM a voltage of Vin appears across the
transformer when the switch is turned-on and the voltage of
Vo appears when the switch is tuned-off.
V
(34)
Vin ( DTs ) o (1 D )Ts 0
n

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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Vo
Dn

Vin 1 D

(35)

Duty cycle of the inverter is varied such that the output


voltage waveform is a rectified sine wave i.e.
(36)
Vo Vo _ peak sin(t )
Thus, the transformer turns ratio should be selected such that
least possible input voltage should be translated up to peak
output voltage using
Vo _ peak (1 Dmax )
(37)
n
Vin _ min Dmax
For this design Vin_min, Dmax are taken as 30 V and 0.65
respectively.
The transformer required for zeta microinverter is the same
as that of conventional flyback transformer, which stores
energy when the main switch Sm is turned-on and releases
energy when Sm is turned-off. By using an air-gap core, the
energy storage capacity of the transformer is increased. In case
of microinverter, sufficient air-gap has to be given to allow the
energy storage without saturation at peak input voltage and for
peak power transfer.
E. Open loop modulator
The proposed inverter is buck boost derived whose gain varies
non-linearly with duty cycle, so a non-sinusoidal modulating
signal should be used which can be derived from (35) and (36)
as
Vo _ peak sin(t )
(38)
mD
nVin Vo _ peak sin(t )
F. Lm and switching frequency fs
The values of Lm and fs are selected such that the inverter
operates in CCM throughout the power range. Generally, at
higher switching frequency the value of magnetizing
inductance required to keep the inverter in CCM will reduce.
It will increase the switching losses and transformer core
losses. From (18), the relationship between Lm, fs is given as
V D
(39)
I I (t t ) I (t t ) in
LM

LM

c1

LM

c1

Lm f s

Selecting ILM < Iin, proposed microinverter can be operated in


CCM. At full load with 92% efficiency, Iin is calculated as 8
A. To ensure CCM at rated power with Lm = 28 H, switching
frequency fs should be greater than 87 kHz. In this design
example, switching frequency is taken as 100 kHz.
G. Flying capacitor Cf
Flying capacitor Cf is computed to limit the voltage ripple
(Vcf) in the capacitor to a minimum value, taking Vcf = 5%
xVo_peak, and the value of capacitance is computed as
D I
(40)
C max out
f

Vcf f s

H. AC filter design
The output inductor Lo value can be determined based on
maximum allowable current ripple in the inverter using
nVin D
(41)
L
o

Where I = ILo_peak - ILo (tc0). The filter capacitor Co can be


obtained from the ac filter cut off frequency fc that is usually
taken as one tenth of the switching frequency fs (fc = 10%x fs)
1
(42)
f
c

2 Lo C o

I. Active-clamp
When the main switch Sm is turned-off, a voltage spike
appears across it due to the energy stored in the leakage
inductance of transformer. This will necessitate use of
overrated switches and will reduce the inverter efficiency.
Instead, an active-clamp with a small auxiliary switch (Sac)
and a series capacitor as shown in Fig. 5 can be added. The
active-clamp eliminates turn-off spike and recycle the parasitic
energy back to the inverter. This improves the inverter
efficiency by limiting the device voltage.

Fig. 5. Active clamp for main switch Sm.

IV.

EXPERIMENTAL RESULTS

In this Section, simulation and experimental results of the


proposed zeta microinverter are demonstrated. The developed
laboratory prototype is rated at 220 W and work with wide
solar panel input voltage variation from 25 V to 48 V (suitable
for most of the 60 cell PV modules [27]), generating constant
ac output of 230 V at 50 Hz. The details of the prototype are
listed in Table I. The gating signals were generated from
dSPACE DS1104 control board. The developed laboratory
prototype rated at 220 W is shown in Fig. 6. Experimental
results at full load (220 W) for Vin = 30 V and 48 V are shown
in Fig. 7 and 8, respectively.
Table 1 Parameters of laboratory prototype
Components

Secondary Switches
S1,S2,S3 and S4
Flying Capacitor Cf

Parameters
4 Electrolytic capacitors of 4700 F,
50 V in parallel
IRF4115pbf,150 V; 104 A; Rdson = 9.3 m
2 coil craft transformers JA4635-AL in
parallel
Leakage inductance Llk = 0.138 H
Magnetising inductance Lm = 28 H
Turns ratio 1:6:6
IPP65R125C7; 700 V; 75 A; Rdson = 125
m
0.64 F, 400 V HF film capacitor

AC filter Inductor L0

5 mH, 5 A

AC Filter Capacitor C0

1 F, 450 V AC, HF film capacitor

Input Capacitor Cin


Primary switches Sm

Transformer

If s

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Fig. 6. Prototype for proposed Zeta microinverter.

Fig. 7(a) shows sinusoidal output voltage and current


waveforms with total harmonic distortion of 3.05%. Fig. 7(b)
shows main switch Sm voltage and current waveforms. It
should be observed that waveforms have a sinusoidal envelope
at line frequency of 50 Hz. Peak voltage of 85 V, i.e.,
(Vin+Vo/n) is observed. Similar results are seen across the
transformer primary in Fig. 7(c).
The waveforms shown in Fig. 7(b) and 7(c) are shown in HF
window in Fig. 7(d) and Fig. 7(e), respectively. It should be
noticed that switch current has a current spike at switch turnon and there is subsequent ringing in the current waveform
due to output capacitance (Coss) of secondary switches. This
current spike can be minimized and subsequent ringing can be
eliminated by adding snubber across secondary switches. This
will result in additional power loss.
Experimental results shown in Fig. 7(d) and Fig. 7(e) are
taken with switch having low Coss (22 pf), thus the ringing is

(a)

(b)

quite low and no snubber is added across the switch. From Fig
8(a), THD in this operating condition is observed to be 3.58%.
Observations similar to Fig. 7 have been noticed in Fig. 8
confirming the inverter operation at different input voltage.
Fig. 9 shows the experimental results at 50% load (110 W)
for Vin = 30 V. It should be observed that the THD in the
current waveform for this case is higher than 5% limit
(5.52%). This is due to the open loop feed-forward control,
which is optimized for full load. Closed loop control may
reduce the THD to acceptable limits.
DCM mode of operation is obtained for the proposed
microinverter at 20 kHz [25]. Fig. 10 and 11 presents
theoretical loss distributions for zeta microinverter in CCM
and DCM modes, respectively, at different load conditions. It
should be observed from Fig. 10 and 11 that at any load
conditions the losses in CCM zeta microinverter are lower
than DCM counterpart for the given specifications (low
voltage high current input, high voltage boost ratio). This can
be explained by considering RMS to average current ratio. At
any value of given power transfer, RMS current through the
components under DCM mode is be higher than CCM mode.
Fig. 12 shows the theoretical efficiency curves for both
DCM and CCM modes along with experimental CCM
efficiency curve. It should be noted that the CCM efficiency is
higher than DCM under all load conditions. There is a
significant improvement in efficiency (nearly 8%) in CCM
mode compared to DCM mode. Experimental CCM efficiency
curve closely follows theoretical efficiency curve.

(c)

(d)
(e)
Fig. 7. Experimental results for Vin = 30 V at full load of 220 W (a) Output voltage Vac and current Iac (x axis: 5 ms/div). (b) Gate to source voltage Vgsm and drain
to source voltage Vdsm of Sm and current through switch Sm at line frequency (x axis: 2 ms/div). (c) Voltage Vp across transformer primary and current Ip at line
frequency (x axis: 2 ms/div) (d) Gate to source voltage Vgsm and drain to source voltage Vdsm of Sm and current through switch Sm at switching frequency (x axis: 2
s/div). (e) Voltage Vp across transformer primary and current Ip at switching frequency (x axis: 2 s/div).

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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(a)

(b)

(c)

(d)

(e)

Fig. 8. Experimental results for Vin = 48 V at full load of 220 W (a) Output voltage Vac and current Iac (x axis: 5 ms/div). (b) Gate to source voltage Vgsm and drain
to source voltage Vdsm of Sm and current through switch Sm at line frequency (x axis: 2 ms/div). (c) Voltage Vp across transformer primary and current Ip at line
frequency (x axis: 2 ms/div) (d) Gate to source voltage Vgsm and drain to source voltage Vdsm of Sm and current through switch Sm at switching frequency (x axis: 2
s/div). (e) Voltage Vp across transformer primary and current Ip at switching frequency (x axis: 2 s/div).

(a)

(b)

(d)

(c)

(e)

Fig. 9. Experimental results for Vin = 30 V at half load of 110 W (a) Output voltage Vac and current Iac (x axis: 5 ms/div). (b) Gate to source voltage Vgsm and drain
to source voltage Vdsm of Sm and current through switch Sm at line frequency (x axis: 2 ms/div). (c) Voltage Vp across transformer primary and current Ip at line
frequency (x axis: 2 ms/div) (d) Gate to source voltage Vgsm and drain to source voltage Vdsm of Sm and current through switch Sm at switching frequency (x axis: 2
s/div). (e) Voltage Vp across transformer primary and current Ip at switching frequency (x axis: 2 s/div).

2168-6777 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics

8
current stress. Traditional CCM mode flyback inverters have
closed loop complexity and stability issues. The proposed
inverter provides HF isolation and has only a single switch
operating at HF which will reduce the switching losses. The
circuit is simple and easy to develop. Critical factors to
consider while designing the inverter have been discussed and
studied. A 220 W inverter prototype has been developed and
tested in the laboratory to validate the claims, proposed
operation and design. The laboratory prototype has a peak
efficiency of 93% at rated power of 220 W.
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V.

SUMMARY AND CONCLUSION

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2168-6777 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics

9
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Dr. Rathore is a winner and recipient of 2013 IEEE IAS Andrew W Smith
Outstanding Young Member Award and 2014 Isao Takahashi Power
Electronics Award.

Ravi Kiran Surapaneni (S13) received his B.Tech.


degree in Electrical and Electronics Engineering from
Jawaharlal Nehru Technological University, Hyderabad,
India in 2010 and the M.Tech degree in Electric Drives
and Power Electronics from Indian Institute of
Technology, Roorkee, India in 2012. From 2012 to
2013, he worked as an Associate in Cognizant
Technology Solutions and from June 2013 to March 2014 he was working as
Research Engineer in National University of Singapore.
He is currently pursuing his PhD in the area of Power Electronics in the
department of Electrical and Computer Engineering, National University of
Singapore. His research interests include power electronic converters for
renewable energy sources, control techniques and electric drives.
Akshay Kumar Rathore (M05, SM12) received
his Masters degree from Indian Institute of
Technology (BHU), Varanasi, India in 2003. He was
awarded Gold Medal for securing highest academic
standing. He obtained PhD from University of
Victoria, Victoria, BC, Canada in 2008. He was a
recipient of University PhD Fellowship and
Thouvenelle Graduate Scholarship. He had two
subsequent postdoctoral research appointments with University of Wuppertal,
Germany, and University of Illinois at Chicago, USA.
Since November 2010, he is an Assistant Professor in Department of
Electrical and Computer Engineering, National University of Singapore. He
has been actively researching on novel and innovative current-fed topologies
and modulation techniques. He has published above 110 research papers in
international journals and conferences.
He is an Associate Editor of IEEE Transactions on Industry Applications,
IEEE Journal of Emerging Selected Topics in Power Electronics, IEEE
Transactions on Transportation Electrification, and IET Power Electronics,
and an Editor of IEEE Transactions on Sustainable Energy.

2168-6777 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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