L23

ECE 524:
Transients in Power Systems
Session 24; Page 1/29

Spring 2014
ECE 524: Lecture 24

s
s
10
ms
s
1000
Single Phase Transmission Line:

L' 1
mH
km
1
L' C'
Length
Zc
L'
C'
C' 11.5
nF
km
R' 0
5 km
2.95 10
Zc 294.88
3.3912 10
ohm
km
Length 100km
Just below speed of light

Set step at 10 sec
ECE 524:
Case 1: Energize line with DC source:

First use a
distributed
parameter line
model:

Spring 2014
ECE 524:

Spring 2014
Vdc 100kV
VDC
VREC
VSEND
Switch at receiving end to

create a short or open circuit.
1 Phase Line
210
[kV]
Open Circuit:
Sending and
receiving end
voltage:
180
150
120
90
60
30
0
0
(f ile dc-cpline.pl4; x-v ar t) v :VSEND
8
v :VREC
12
16
[ms]
20
ECE 524:

Spring 2014
250
Recall
0.34 ms
Start of transition
[kV]
10.34ms
11.02ms
200
150
10ms
100
50
0
9.5
9.9
(f ile dccasecp.pl4; x-v ar t) v :VSEND
10.3
10.7
11.1
v :VREC
[ms] 11.5
ECE 524:

Spring 2014
400
Open Circuit:
[A]
339.12A
300
Sending and
receiving end
current:
200
100
0
-100
-200
Recall that:
-300
339.12A
-400
0
(f ile dc-cpline.pl4; x-v ar t) c:VDC
-VSEND
12
16
[ms]
20
12
16
[ms ]
20
c:VREC -
12
Short Circuit:
[kA ]
10
Sending and
receiving end
current (sending
end voltage same
as above, receiving
end zero:
0
0
(f ile dc -c pline. pl4; x -v ar t) c : VD C
8
-VSEN D
c : VR EC -
Vdc
Zc
339.12 A
ECE 524:

Spring 2014
3500
[A]
Zoomed current:
3000
2500
2000
1500
1000
678.23A
500
339.12A
0
9.20
9.64
10.08
-VSEND
c:VREC -
Repeat with nonzero resistance:
10.52
10.96
198.65kV
R1' 0.04
Open Circuit:
Sending and
receiving end
voltage:
ohm
km
[ms] 11.40
200
[kV ]
160
120
Line resistance creates a resistive

voltage divider reducing the applied
voltage entering the line model at the
sending end.
R1' Length
Zc
4
Vappl 100kV
80
40
Zc
Vappl 99.66 kV
0
0
(f ile dc -c pline.pl4; x -v ar t) v :VSEN D
8
v : VR EC
12
16
[ms ]
20
Vrec 2 Vappl
Vrec 199.32 kV
ECE 524:

Spring 2014
Vrec is a little off, due to a second voltage drop in the middle of the lineA little off
- Lets look into this is more detail
- Looking into the resitance + Zc, we get a terminating resistance of:
Rt Zc
R1' Length
2
Rt 296.88
Rt Zc
Rt Zc
Vmid_rec Vappl 1
Vmid_rec 100 kV
Then the voltage applied to the second line section of the model again sees a voltage divider:
Vapplied_mid Vmid_rec
Zc
R1' Length
Zc
2
Vapplied_mid 99.33 kV
The receiving end is open circuited, so the voltage reflection coefficient is:
v 1
Vrec Vapplied_mid 1 v
Vrec 198.65 kV
Which agrees with the simulation result
ECE 524:
Sending and
receiving end
current:

Spring 2014
400
[A]
337.97
335.69
300
200
100
Isend
-200
-300
-400
0
8
-VSEND
12
16
[ms]
c:VREC -
9000
[A ]
Sending and
receiving end
current:
Zc
Isend 337.97 A
-100
Short Circuit:
Vappl
7500
6000
4500
3000
1500
0
0
(f ile dc -c pline. pl4; x -v ar t ) c : V D C
8
-V SE N D
c :VR EC -
12
16
[ms ]
20
20
ECE 524:

Spring 2014
1500
[A ]
1200
900
671.38
600
337.97
300
335.69
0
8.8
9.2
9.6
(f ile d c -c p lin e . p l4 ; x -v a r t ) c : V D C
10.0
10.4
10.8
11.2
[ms ]
11.6
c :VR EC -
PSCAD Implementation
Tim e d
Bre ake r
Lo gic
Op en @ t0
BR K
ISEN D
VSEN D
TERM
T
TLine
BR K
R=0
-V S E N D
VR EC
IREC
ISEN D
IR EC
VSEN D
VR EC
TER M
Tim e d
Brea ke r
L og ic
Ope n@ t0
ECE 524:

Spring 2014
Choose edit....
ECE 524:
Zc 294.88

Spring 2014
1
9 s
3.3912 10
Open Circuit:
Main : Graphs
0.40
ISEND
IREC
0.3369kA
0.30
0.20
y (kA)
0.10
0.00
-0.10
-0.20
-0.30
0.3369kA
-0.40
0.0040
0.0060
0.0080
0.0100
0.0120
0.0140
0.0160
0.0180
0.0200
ECE 524:

Spring 2014
Main : Graphs
VSEND
VREC
200
200kV
175
150
y (kV)
125
100
75
50
25
0
0.0040
0.0060
0.0080
0.0100
0.0120
0.0140
0.0160
0.0180
0.0200
Main : Graphs
Short Circuit
3.00
ISEND
IREC
2.50
y (kA)
2.00
1.50
1.00
0.50
0.00
0.0095
0.6783kA
0.3369kA
0.0098
0.0100
0.0103
0.0105
0.0108
0.0110
0.0113
0.0115
0.0118
ECE 524:

Spring 2014
Now replace the travelling wave line model with pi sections:
Case 1: Energize line with DC source:

Open circuit with a single pi circuit (R = 0):
VDC
VREC
VSEND
This will have problems with numerical

oscillations.in the current waveform due to
change in voltage across capacitor. We'll see a
possible fix below.
ECE 524:
Note that R, L and C entered per unit length and length entered as 100 here. Could have entered length
as 1 and entered R*100, L*100, and C*100.

Spring 2014
ECE 524:

Spring 2014
199.98
[kV]
No longer
squared pulses
159.98
119.99
79.99
40.00
0.00
0
(f ile dc-1-pi.pl4; x-v ar t) v :VSEND
12
16
[ms]
20
v :VREC
12
Currents demonstrate
numerical oscillations due
to dv/dt across capacitor
Note that the triangle
wave is changing each
time step
[kA]
8
-4
-8
-12
9.9
10.0
(f ile dc-1-pi.pl4; x-v ar t) c:VDC
10.1
-VSEND
c:VREC -
10.2
10.3
[ms] 10.4
ECE 524:

Spring 2014
Use regular circuit elements, and add a damping resistor for the capacitor by the switch.
Need to multiply L' and C' time the length of the line now.
Note that it would be more accurate to include source impedance.
Lpi L' 100km
Lpi 100 mH
Cpi 0.5 C' 100km
Cpi 0.58 F
Numerical oscillation damping included in capacitor
Ks 0.15
Rs
Simulation timestep
VSEND
0.575uF
t 10s
Ks t
2 Cpi
Rs 1.3043 ohm
199.98
[kV]
159.98
Same voltage
119.99
79.99
40.00
0.00
0
100mH VREC
Use Ks recommended by
ATPDraw
VDC
(f ile dc-1-pi_alt.pl4; x-v ar t) v :VSEND
8
v :VREC
12
16
[ms]
20
0.575uF
ECE 524:

Spring 2014
Sending end current. Note impact of

oscillation damping resistor with the large
current spike at just after switch closing
12
[kA]
8
Ipk_ss 239.71A
-4
-8
9
10
(f ile dc-1-pi_alt.pl4; x-v ar t) c:VDC
Current looks like a

numerical oscillation, but
with damping
11
-VSEND
12
c:VREC -
12
[kA]
8
-4
-8
9.9430
9.9905
10.0380
-VSEND
10.0860
c:VREC -
10.1330
10.1810 [ms] 10.2280
13
[ms]
14
ECE 524:
Repeat with Ks = 13.33

(which gives optimal damping,
but Rs= 115.9 ohm

Spring 2014
900
[A]
750
600
Ipk_ss 239.74A
450
300
Smaller initial overshoot (critically

damped). In this case
steady-state current not impacted
since capacitor with resistor is
across an ideal source, the current
actually increases a little..
150
0
-150
-300
0
8
-VSEND
12
16
[ms]
20
c:VREC -
Now compare the results with the distributed parameter line model
250
[kV]
Voltage waveforms:
Notice that the pi model has a
single frequency that doesn't
match up with the travel times
The first two travel time is an ok
approximation
200
150
100
50
0
9
10
dc-cpline.pl4: v :VSEND
dc-1-pi_alt.pl4: v :VSEND
11
v :VREC
v :VREC
12
13
14
15
[ms]
16
ECE 524:

Spring 2014
900
[A]
640
We see similar behavior with the

currents.
380
120
-140
-400
0
dc-cpline.pl4: c:VDC -VSEND

dc-1-pi_alt.pl4: c:VDC -VSEND
Short line case:
12
c:VREC c:VREC -
10
[kA]
8
Source and receiving

end currents
0
0
8
-VSEND
c:VREC -
12
16
[ms]
20
16
[ms]
20
ECE 524:
Zoom in on currents:

Spring 2014
2000
[A]
1600
1200
Little difference between

source and receiving end,
no delay.
800
400
0
9.5
10.0
10.5
Compare currents to travelling

wave model
-VSEND
11.0
11.5
12.0
[ms]
12.5
c:VREC -
12
[kA]
10
0
0
dc-1-pi_alt.pl4: c:VDC -VSEND

dc-cpline.pl4: c:VDC -VSEND
8
c:VREC c:VREC -
12
16
[ms]
20
ECE 524:

Spring 2014
EMTDC Implementation
Single Pi Section
Since built-in pi model is three phase
the single phase pi model is made manually
BRKPI
Timed
Breaker
Logic
Open@t0
0.1 [H]
IRECPI
VSENDPI
VRECPI
TERMPI
Timed
Breaker
Logic
Open@t0
IRECPI
ISENDPI
VRECPI
0.575 [uF]
0.575 [uF]
R=0
ISENDPI VSENDPI
TERMPI
BRKPI
Results match the ATPDraw

Don't need the numerical
oscillation damping resistance
with the capacitor.
Extending to 5 PI segments:
VDC
20mH
20km 20km 20km 20km
VREC
First section need damping

resistor, so build pi manually
VSEND
0.115uF
0.115uF
ECE 524:

Spring 2014
Open circuit energization
Currents
300
600
[kV]
[A]
250
400
200
Voltages
200
150
100
50
-200
0
-50
-400
-100
0
12
16
[ms]
20
-600
v :VREC
8
-VSEND
12
c:VREC -
12
[k A ]
10
Short circuit termination case:
0
0
( f ile d c - 5 - p i . p l4 ; x - v a r t ) c : V D C
8
-V S E N D
c :V R E C
12
-
16
[m s ]
20
16
[ms]
20
ECE 524:

Spring 2014
Compare to distributed
parameter case
300
[kV]
250
200
150
Better match for travel time

But not for peaks
100
50
0
-50
-100
8
10
12
14
16
[ms]
18
dc-5-pi.pl4: v :VSEND
v :VREC
dc-cpline.pl4: v :VSEND
v :VREC
600
[A]
400
200
-200
-400
-600
0
dc-5-pi.pl4: c:VDC -VSEND

c:VREC dc-cpline.pl4: c:VDC -VSEND
c:VREC -
12
16
[ms]
20
ECE 524:

Spring 2014
10 pi sections:
VDC
10mH
10km 10km 10km 10km 10km
VSEND
0.0575uF
0.0575uF
10km 10km 10km 10km
VREC
Open circuit termination

Voltage
300
[kV]
250
200
700
[A]
150
525
100
350
50
175
0
-50
-175
-100
0
12
16
[ms]
20
-350
v :VREC
-525
Current
-700
0
8
-VSEND
c:VREC -
12
16
[ms]
20
ECE 524:

Spring 2014
300
[kV]
250
10.45ms
200
150
Zoomed voltage
11.02ms
100
10ms
50
0
10.34ms
-50
11.17ms
-100
9.0
9.5
10.0
10.5
11.0
11.5
12.0 [ms]
12.5
v :VREC
300
[k V ]
Comparison
250
200
150
100
50
0
-50
-100
0
d c - 1 0 - p i. p l4 : v : V S E N D
d c - c p lin e . p l4 : v : V S E N D
4
v :V R E C
v :V R E C
12
16
[m s ]
20
ECE 524:

Spring 2014
700
[A ]
525
350
175
0
-175
-350
-525
-700
0
d c -1 0 -p i. p l4 : c : V D C
-V S E N D
d c -c p lin e . p l4 : c : V D C
-V S E N D
8
c :VR EC c :VR EC -
12
16
[ms ]
20
ECE 524:

Spring 2014
Short circuit termination
12
[kA ]
10
0
0
(f ile d c -1 0-pi. p l4 ; x -v a r t ) c : V D C
-V S E N D
12
16
[ms ]
20
c :VR EC -
3500
[A ]
3000
2500
2000
1500
1000
500
0
9
d c - 1 0 - p i. p l4 : c : V D C
d c - c p lin e . p l4 : c : V D C
10
-V S E N D
-V S E N D
10 Pi Sections
11
c :V R E C c :V R E C -
12
13
[m s ]
14
ECE 524:

Spring 2014
10 Pi Sections
PSCAD circuit:

Timed
Breaker
Logic
Open@t0
BRKPI
TERMPI
Timed
Breaker
Logic
Open@t0
R=0
ISENDPI VSENDPI
0.01 [H]
0.01 [H]
0.01 [H]
0.01 [H]
0.01 [H]
0.01 [H]
0.01 [H]
VSENDPI
VRECPI
300
250
200
y (kV)
150
100
50
0
-50
-100
-150
0.0050
0.0075
0.0100
0.0125
0.0150
0.0175
0.0200
0.0225
0.0250
0.0275
VRECPI
IRECPI
350
0.01 [H]
0.05 [uF]
Main : Graphs
0.1 [uF]
0.1 [uF]
0.1 [uF]
0.1 [uF]
0.1 [uF]
0.1 [uF]
VRECPI
0.01 [H]
0.1 [uF]
VSENDPI
0.1 [uF]
IRECPI
0.1 [uF]
0.05 [uF]
ISENDPI
0.01 [H]
TERMPI
BRKPI
ECE 524:

Spring 2014
Main : Graphs
350
VSENDPI
VRECPI
300
250
200
y (kV)
150
100
50
0
-50
-100
-150
0.0050
0.0075
0.0100
0.0125
0.0150
0.0175
0.0200
0.0225
0.0250
0.0275

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ECE 524:

Transients in Power Systems

Session 24; Page 1/29

ECE 524: Lecture 24

Single Phase Transmission Line:

Just below speed of light

Case 1: Energize line with DC source:

Session 24; Page 2/29

Session 24; Page 3/29

Switch at receiving end to

(f ile dc-cpline.pl4; x-v ar t) v :VSEND

Session 24; Page 4/29

(f ile dccasecp.pl4; x-v ar t) v :VSEND

Session 24; Page 5/29

(f ile dc-cpline.pl4; x-v ar t) c:VDC

(f ile dc -c pline. pl4; x -v ar t) c : VD C

Session 24; Page 6/29

(f ile dc-cpline.pl4; x-v ar t) c:VDC

Repeat with nonzero resistance:

Line resistance creates a resistive

(f ile dc -c pline.pl4; x -v ar t) v :VSEN D

Session 24; Page 7/29

Which agrees with the simulation result

Session 24; Page 8/29

(f ile dc-cpline.pl4; x-v ar t) c:VDC

(f ile dc -c pline. pl4; x -v ar t ) c : V D C

Session 24; Page 9/29

Session 24; Page 10/29

Session 24; Page 11/29

Session 24; Page 12/29

Session 24; Page 13/29

Now replace the travelling wave line model with pi sections:

Case 1: Energize line with DC source:

This will have problems with numerical

Session 24; Page 14/29

Session 24; Page 15/29

(f ile dc-1-pi.pl4; x-v ar t) v :VSEND

(f ile dc-1-pi.pl4; x-v ar t) c:VDC

Session 24; Page 16/29

Cpi 0.5 C' 100km

Numerical oscillation damping included in capacitor

(f ile dc-1-pi_alt.pl4; x-v ar t) v :VSEND

Session 24; Page 17/29

Sending end current. Note impact of

(f ile dc-1-pi_alt.pl4; x-v ar t) c:VDC

Current looks like a

(f ile dc-1-pi_alt.pl4; x-v ar t) c:VDC

10.1810 [ms] 10.2280

Repeat with Ks = 13.33

Session 24; Page 18/29

Smaller initial overshoot (critically

(f ile dc-1-pi_alt.pl4; x-v ar t) c:VDC

Session 24; Page 19/29

We see similar behavior with the

dc-cpline.pl4: c:VDC -VSEND

Short line case:

Source and receiving

(f ile dc-1-pi_alt.pl4; x-v ar t) c:VDC

Session 24; Page 20/29

Little difference between

(f ile dc-1-pi_alt.pl4; x-v ar t) c:VDC

Compare currents to travelling

dc-1-pi_alt.pl4: c:VDC -VSEND