Module 1 Using VHDL [20 Hours]

M-1 Introduction to HDLs and VHDL for Digital Design [10 Hours]
(Introduction to Digital IC Design, Basic Concepts in VHDL, Data Types, Operators,
Continuous Assignment, Hardware Modeling Examples, Procedural Blocks,
Procedural Continuous Assignments , Structural Modeling, Compiler Directives,
Tasks & Functions)
M-2 VHDL for Verification (Test Bench Generation) [6 Hours]
Verification with VHDL, VHDL ASIC Support, Verification with all kind of abstraction
etc
M-3 Digital System Simulation using HDL Simulators[4 Hours]
Tool Demonstration, VHDL Program writing etc
Laboratory: 24 Hours (Here the instructor demonstrates the tool and then the
students write small programs as per given assignment as attached)
Module 2 FPGA using Xilinx [30 Hours]
M-1 Introduction to Programmable Device based Designs and FPGA [3 Hours]
M-2 ASIC Design Flow (Specification to Bit file Generation) [3 Hours]
(Coding, Verification, Synthesis, Optimization in terms of area, power, timing, Floor
Planning, Placing and Routing, I/O pin assignment, constraints etc)
M-3 Simulation using ISE [2 Hours]
M-4 Validation of Digital Systems using Spartan-3 [4 Hours]
M-5 Timing Analysis and Power Analysis [4 Hours]
M-6 Mini Project on XXXXXXXXXXXXXXXXXX [4 Hours]
M-7 Architecture of Xilinx Spartan 3 [2 Hours]
1. Laboratory: 24 Hours (All the VHDL code written and verified are
implemented using Xilinx FPGA and verified in the Board. Boards used are
Xilinx Spartan 3E)