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OP
OPA
643
A64
OPA
3
658
APPLICATIONS
DESCRIPTION
The OPA643 provides a level of speed and dynamic
range previously unattainable in a monolithic op amp.
Using a de-compensated voltage feedback architecture with two internal gain stages, the OPA643 achieves
exceptionally low harmonic distortion over a wide
frequency range. The "classic" differential input provides all the familiar benefits of precision op amps,
such as bias current cancellation and very low inverting current noise compared with wideband current
feedback op amps. High slew rate and open-loop gain,
along with low input noise and high output current
+5V
ADS805
Low Gain
Compensation
0.1F
280
2Vp-p
0.1F
50
Analog
Input
OPA643
47pF
50
Source
5V
806
402
1Vp-p
10MHz
12-Bit
20MSPS
Measured
80dB SFDR
5k
REFB
56.9
2.7pF
0.1F
14pF
SBOS025
1
PDS-1191D
SPECIFICATIONS
ELECTRICAL
At TA = +25C, VS = 5V, RL = 100, RF = 402, unless otherwise noted.
OPA643P, U, N
PARAMETER
CONDITIONS
OFFSET VOLTAGE
Input Offset Voltage
Average Drift
Power Supply Rejection (PSR)
TYP
MAX
4
65
2.5
5
90
VCM = 0V
19
VCM = 0V
0.1
30
40
2.0
3.0
VS = 4.5 to 5.5V
VCM = 0.5V
2.75
2.5
65
INPUT IMPEDANCE
Differential
Common-Mode
OPEN-LOOP GAIN
Open-Loop Voltage Gain (AOL)
Over Specified Temperature
FREQUENCY RESPONSE
Closed-Loop Bandwidth
MIN
TYP
MAX
UNITS
1.5
70
0.5
3
mV
V/C
dB
A
A
A
A
2.3
23
nV/Hz
Vrms
2.5
pA/Hz
92
V
V
dB
k || pF
k || pF
dB
dB
3.0
80
85
7 || 2.5
630 || 1.3
VO = 2V, RL = 100
VO = 2V, RL = 100
82
80
Gain = +5V/V
Gain = +10V/V
Gain = +20V/V
95
87
80
G = +5, 2V Step
G = +5, 2V Step
G = +5, 2V Step
G = +5, 2V Step
G = +5, 2V Step
G = +5, f = 5MHz
VO = 2Vp-p, RL = 500
G = +5V/V, VO = 0V to 1.4V, RL = 150
G = +5V/V, VO = 0V to 1.4V, RL = 150
200
85
40
800
1000
920
21
16.5
7.5
90
95
MHz
MHz
MHz
MHz
V/s
V/s
ns
ns
ns
dBc
0.005
0.015
%
degrees
No Load
3.25
V
V
V
V
mA
mA
3.0
RL = 100
2.5
40
35
0.1MHz, G = +5V/V
TMIN to TMAX
Ambient
JA, Junction to Ambient
2.75
50
40
60
4.5
5
20
40
100
125
150
NOTE: (1) Slew rate is rate of change from 10% to 90% of output voltage step.
65
0.055
OPA643
OPA643PB, UB, NB
MIN
5.5
25
26
16
+85
V
V
mA
mA
C
C/W
C/W
C/W
PIN CONFIGURATION
JA.
Top View
DIP/SO-8
NC
+VS2(1)
Inverting Input
+VS1
Non-Inverting Input
Output
VS1
VS2(1)
Maximum TJ
SOT23-5
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from performance degradation to complete device failure. Burr-Brown
Corporation recommends that all integrated circuits be handled
and stored using appropriate ESD protection methods.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published specifications.
Output
VS
Non-Inverting Input
+VS
Inverting Input
NOTE: (1) Making use of all four power supply pins is highly recommended,
although not required. Using these four pins, instead of just pins 4 and 7, will
lower the power supply impedance improving distortion.
PACKAGE/ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE
DRAWING
NUMBER(1)
OPA643U
OPA643UB
OPA643N
182
182
331
40C to +85C
40C to +85C
40C to +85C
OPA643U
OPA643UB
A43
OPA643NB
5-pin SOT23-5
331
40C to +85C
A43B
OPA643P
OPA643PB
006
006
40C to +85C
40C to +85C
OPA643P
OPA643PB
TEMPERATURE
RANGE
PACKAGE
MARKING(2)
ORDERING
NUMBER(3)
OPA643U
OPA643UB
OPA643N-250
OPA643N-3k
OPA643NB-250
OPA643NB-3k
OPA643P
OPA643PB
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) The B grade of the SO-8 and
DIP packages will be marked with a B by pin 8. The B grade of the SOT23-5 will be marked with a B near pins 3 and 4. (3) The SOT23-5 is only available on a 7"
tape and reel (e.g. ordering 250 pieces of OPA643N-250 will get a single 250 piece tape and reel. Ordering 3000 pieces of OPA643N-3k will get a single 3000 piece
tape and reel). Please refer to Appendix B of Burr-Brown IC Data Book for detailed Tape and Reel Mechanical information.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
OPA643
3
0
VO = 1Vp-p
14
G = +10
3
6
9
12
G = +20
15
G = +5
17
G = +5
Gain (3dB/div)
11
VO = 2Vp-p
8
5
VO = 4Vp-p
2
1
4
18
G = +50
21
24
0.5MHz
10MHz
7
100MHz
10
0.5MHz
500MHz
10MHz
Frequency
500MHz
200
2.0
160
1.6
Output Voltage (400mV/div)
120
80
40
0
40
80
120
160
1.2
0.8
0.4
0
0.4
0.8
1.2
1.4
200
2.0
Time (5ns/div)
Time (5ns/div)
RS vs CAPACITIVE LOAD
60
Gain to Capacitive Load (3dB/div)
23
50
40
RS ()
100MHz
Frequency
30
20
10
0
20
G = +5
CL = 10pF
17
CL = 22pF
14
11
RS
VIN
OPA643
5
402
VO
CL
1k
2
1
100
(1k is optional)
CL = 100pF
7
1
10
100
OPA643
100MHz
Frequency (20MHz/div)
CL = 47pF
200MHz
(CONT)
70
G = +5
RL = 200
G = +5
75
80
RL = 100
85
90
95
75
80
85
90
RL = 200
95
RL = 500
RL = 500
100
100
0.1
0.1
10
60
60
G = +5
65
G = +5
2nd Harmonic Distortion (dBc)
10
RL = 100
70
RL = 200
75
80
RL = 500
85
65
70
75
80
RL = 200
85
RL = 500
90
90
0.1
10
0.1
RL = 100
10
60
G = +5
3rd Harmonic Distortion (dBc)
G = +5
2nd Harmonic Distortion (dBc)
RL = 100
65
RL = 100
70
75
RL = 200
RL = 500
80
85
65
70
75
RL = 200
80
RL = 500
85
RL = 100
90
90
0.1
0.1
10
10
OPA643
(CONT)
40
VO = 2Vp-p
VO = 2Vp-p
50
G = 20
60
G = 10
70
G=5
80
90
50
60
G = 20
70
80
G = 10
90
G=5
100
100
0.1
10
0.1
20
10
Frequency (MHz)
Frequency (MHz)
100
20
55
10
Current Noise
Voltage Noise
Intercept (dBm)
50
2.5pA/Hz
45
40
Pi
50
50
35
PO
50
2.3nV/Hz
402
30
100
25
102
103
104
105
106
107
80
60
70
90
60
120
50
150
40
180
30
210
20
240
10
270
300
103
104
105
106
107
108
109
Frequency (Hz)
OPA643
15
20
25
30
35
40
45
50
0.004
0.002
0.000
0.002
0.004
0.006
0
0.7
1.4
DC Offset (V)
Differential Phase Error ()
90
100
102
10
Frequency (MHz)
Frequency (Hz)
OPA643
0.015
0.010
0.005
0.000
0
0.7
DC Offset (V)
1.4
(CONT)
100
PSR
G = +5
10
CMR
80
Output Impedance ()
90
70
60
50
40
0.10
0.01
30
0.001
20
102
103
104
105
106
107
108
10
100
Frequency (MHz)
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
1000
500
90
Common-Mode Rejection (dB)
Common-Mode Input
Impedance (k)
0.1
Frequency (Hz)
100
Differential Input
10
80
70
60
50
102
103
104
105
106
107
108
Frequency (Hz)
Common-Mode Voltage
110
80
IO+
100
70
AOL
+PSR
90
PSR
CMR
60
IO
50
40
30
ICC
20
10
80
75
50
25
25
50
75
100
125
50
Temperature (C)
25
25
50
75
100
125
OPA643
APPLICATIONS INFORMATION
+VS
+5V
2.2F
+
0.1F
50 Source
VI
0.1F
3
50
RT
7
6
OPA643
VO
50
50 Load
5
0.1F
2
4
0.1F
RF
402
RG
100
2.2F
+
Gain,
5V
VS
VO
VI
=1+
RF
RG
OPA643
+5V
Supply Decoupling
Not Shown
OPA643
VO = ID RF
RF
10k
ID
CD
20pF
5V
CF
0.8pF
VB
+5V
50 Source
0.1F
52.3
Supply Decoupling
Not Shown
50
PI
1k
OPA643
PO
50 Load
RF
1k
1/(2RFCF) = (GBP/(4RFCS))
5V
RG
144
Gain =
PO
PI
RF
RG
dB
OPA643
+5V
Supply Decoupling
Not Shown
0.1F
81.6
OPA643
VO = (V1 + V2 + V3 + V4)
BANDWIDTH VS GAIN
Voltage feedback op amps exhibit decreasing closed-loop
bandwidth as the signal gain is increased. In theory, this
relationship is described by the Gain Bandwidth Product
(GBP) shown in the Electrical Specifications. Ideally, dividing
GBP by the non-inverting signal gain (also called the noise
gain, or NG) will predict the closed-loop bandwidth. In
practice, this relationship only holds true when the phase
margin approaches 90, as it does in high gain configurations.
At low signal gains, most high speed amplifiers will exhibit
a more complex response with lower phase margin. The
OPA643 is optimized to give a maximally flat frequency
response at a gain of +5. Dividing the typical 800MHz gain
bandwidth product by the noise gain of 5 would predict a
closed-loop bandwidth of 160MHz. However, the actual
bandwidth is extended to > 200MHz due to the reduced
(< 90) phase margin at this noise gain. Increasing the gain
will increase the phase margin moving the closed-loop
bandwidth closer to that predicted by the gain bandwidth
product. The 40MHz bandwidth at a gain of +20, shown in
the Electrical Specifications, agrees with that predicted using
the 800MHz GBP.
402
V1
402
RF
402
V2
402
V3
402
5V
V4
OPERATING SUGGESTIONS
OPTIMIZING RESISTOR VALUES
Since the OPA643 is a voltage feedback op amp, a wide
range of resistor values may be used for the feedback and
gain setting resistors (RF and RG in Figure 1). The primary
limits to these values are set by dynamic range (noise and
distortion) and parasitic capacitive considerations. Usually,
the feedback resistor value should be between 200 and
1k. Below 200, the feedback network will present
additional output loading which can degrade the harmonic
distortion performance of the OPA643. Above 1k, the
typical parasitic capacitance (approximately 0.2pF) across
the feedback resistor may cause unintentional band-limiting
in the amplifier response.
OPA643
10
gain for the op amp and the noise gain pole, set by 1/RFCF,
is placed correctly, a very well controlled second-order low
pass frequency response will result.
+5V
RT
280
0.1F
OPA643
RG
402
VO
RF
806
VI
CS
12.6pF
CF
1.9pF
5V
+5V
50 Source
RT
50
RI
133
OPA643
VO
To choose the values for both CS and CF, two parameters and
only three equations need to be solved. The first parameter
is the target high frequency noise gain NG2, which should be
greater than the minimum stable gain for the OPA643. Here,
a target NG2 of 7.5 will be used. The second parameter is
the desired low frequency signal gain, which also sets the
low frequency noise gain NG1. To simplify this discussion,
we will target a maximally flat second-order low pass
Butterworth frequency response (Q = 0.707). The signal
gain of 2 shown in Figure 6 will set the low frequency noise
gain to NG1 = 1 + RF/RG (= 3 in this example). Then, using
only these two gains and the Gain Bandwidth Product (GBP)
for the OPA643 (800MHz), the key frequency in the
compensation can be determined as:
50
RF
402
RG
402
5V
ZO =
GBP
NG12
NG1
NG1
1
1 2
NG 2
NG 2
CF =
1
2 R F Z O NG 2
C S = ( NG 2 1) C F
F 3dB Z O GBP
11
OPA643
DISTORTION PERFORMANCE
The OPA643 is capable of delivering an exceptionally low
distortion signal at high frequencies over a wide range of
gains. The distortion plots in the Typical Performance Curves
show the typical distortion under a wide variety of conditions.
Most of these plots are limited to 100dB dynamic range. The
OPA643s distortion does not rise above 90dBc until either
the signal level exceeds 0.5V and/or the fundamental
frequency exceeds 500kHz. Distortion in the audio band is
< 120dBc.
Generally, until the fundamental signal reaches very high
frequencies or powers, the second harmonic will dominate
the distortion with negligible third harmonic component.
Focusing then on the second harmonic, increasing the load
impedance improves distortion directly. Remember that the
total load includes the feedback networkin the noninverting configuration this is sum of RF + RG, while in the
inverting configuration it is only RF (Figure 1). Larger
output voltage swings lead directly to increased harmonic
distortion. A 6dB increase in output voltage swing will
generally increase the second harmonic by 12dB and the
third harmonic by 18dB. Higher signal gain settings will also
increase the second harmonic distortion. A 6dB increase in
voltage gain will raise the second and third harmonics by
OPA643
12
+5V
5k
+VS
100
1k
0.1F
Supply Decoupling
Not Shown
OPA643
5k
NOISE PERFORMANCE
The OPA643 complements its ultra-low harmonic distortion
with low input noise terms. The input voltage noise combines
with the two input current noise terms to give low output noise
under a wide variety of operating conditions. Figure 8 shows
the op amp noise analysis model with all noise terms included.
In this model, all voltage and current noise density terms are
expressed in nV/Hz or pA/Hz respectively.
VO
5V
RG
RF
VI
VS
ENI
EO
OPA643
RS
IBN
ERS
RF
4kTRS
4kT
RG
RG
IBI
4kTRF
4kT = 1.6E 20J
at 290K
13
OPA643
DC OFFSET CONTROL
The OPA643 provides excellent DC signal accuracy due to
the combination of high open-loop gain, high commonmode rejection, high power supply rejection, low input
offset voltage and low bias current offset errors. The high
grade (B) version of any package type provides less than
1.5mV input offset voltage. To take full advantage of this
low input offset voltage, careful attention to input bias
current cancellation is also required. The high speed input
stage for the OPA643 has a relatively high input bias current
(19A typical into each input pin) but with a very close
match between the two input currentstypically 100nA
input offset current. The total output offset voltage may be
considerably reduced by matching the source resistances
which appear at the two inputs. For example, one way to
include bias current cancellation in the circuit of Figure 1
would be to insert a 55 series resistor into the noninverting input after the 50 terminating resistor, RT. When
the 50 source resistor is DC coupled, this will increase the
source resistance for the non-inverting input bias current to
80. Since this is now equal to the resistance appearing at
inverting input (RF || RG), the circuit will cancel the gains for
the bias currents to the output, leaving only the offset current
times the feedback resistor as a residual DC error term at the
output. Using a 402 feedback resistor, this output error
will now be less than 3uA 402 = 1.2mV over the full
temperature range.
Eq. 1
EO =
(E
2
NI
+ ( I BN R S ) + 4kTR S NG 2 + ( I BI R F ) + 4kTR F NG
2
I R
4kTR F
2
E N = E NI 2 + ( I BN R S ) + 4kTR S + BI F +
NG
NG
E 2
NF = 10 log 2 + N
Eq. 3
kTRs
G = 15V/V [23.5dB]
RS = 50
1:6
Supply Decoupling
Not Shown
50
1.8k
OPA643
50
Load
THERMAL ANALYSIS
The OPA643 will not require heatsinking under most
operating conditions. Maximum desired junction temperature
will set the maximum allowable internal power dissipation
as described below. In no case should the maximum junction
temperature be allowed to exceed 175C.
402
5.7dB
Noise Figure
100
OPA643
14
+5V
Supply Decoupling
Not Shown
0.1F
OPA643
200
VO
5V
+5V
RG
250
RF
1k
VI
5k
20k
10k
0.1F
5k
VO
VI
RF
RG
= 4
5V
15
OPA643
+V CC
External
Pin
Internal
Circuitry
V CC
50 Source
+5V
125
Power Supply
Decoupling Not Shown
D2
50
50
OPA643
D1
5V
505
50
126
DESIGN-IN TOOLS
DEMONSTRATION BOARDS
OPA643
16
17
OPA643
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.