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UNITRONIXPtyLtd
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How Does the FMC (FPGA Mezzanine Card) Standard Measure up Against
the PMC/XMC Format for Embedded Defense/Aerospace Applications?
Abstract
Introduction
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Parallel or
High-speed Serial I/O
Device(s)
Parallel Connectivity
Power Supply
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Cooling
Cooling rugged FPGA-based XMC cards can be
a significant challenge as such boards can easily
exceed 20W power dissipation. Typical rugged aircooled specifications for such cards define upper
air-inlet temperatures of 70C and conduction-cooled
cold walls of 85C. Making a mezzanine work within
this environment with much lower power levels is
already difficult. To compound this, XMC hosts often
have two XMC sites. Consider the size and orientation
of an XMC. When plugged onto a 3U host card,
such as 3U VPX, the XMC covers the majority of
hosts real estate which means, if there are any hot
devices on the host, they are under the XMC. This is
not ideal and can seriously affect cooling. The XMC
mezzanines devices face down onto the host, not the
outside, placing the heat generating devices opposite
those on the host and compound the cooling problem
further. To cool the XMC, the air needs to be squeezed
between the host and mezzanine which can be a
very small cross section, thus limiting the volume of air
available to cool the assembly. Conduction cooling is
less difficult but having all the heat generators in one
plane is still a problem as there may be hot spots.
A 6U solution is not really any better; some of the
hosts real estate is not covered by mezzanines, but
the thermal paths to either the cooling air inlet or cold
wall interface are longer.
Cooling is another advantage for FMC based designs.
An FMC, being smaller than an XMC, ensures that
a larger amount of space on the host carrier is not
covered by the mezzanine itself. Appropriate FMC
host design allows for suitable heat sinks to be
implemented in the areas not restricted by mezzanine
placement. Superior cooling with either greater airflow or greater heat sink cross sectional areas may
be the factor that determines whether the solution is
viable. In addition, as the FMC has no FPGA, only
I/O devices, the FMC will be easier to cool as well
especially if the devices are not above a hosts thermal
hot spot (see Figure 4). The FMC specification limits
the power dissipation of a single width module to
10W.
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Bandwidth
XMCs might get around the bandwidth problem,
compared with FMCs, through decimation or using
newer generation serial interfaces operating at ever
higher speeds. However, some applications may
not be able to tolerate this reduction in data off the
mezzanine. Beam-forming applications may fall
into this category where high bandwidth data, from
potentially a large number of channels, must be
shared between processing elements. Therefore, high
bandwidth beam-forming is another good application
area for FMC technology because it would not suffer
from data reduction problems.
Simplicity
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Customization
FPGA Centric
Limitations
Finite Connectivity
No mezzanine specification is perfect because its
target markets are usually varied, and therefore a
compromise. If the compromises are few, then these
imperfections can be overlooked. Supporting up to 80
differential signals, it is easy to conceive of parallel
interfaces providing data throughputs in excess of
10GB/s and largely limited only by the host FPGAs
capabilities. However, although 80 differential
signals represent significant connectivity, it is finite.
A monolithic design, not using a mezzanine, could
provide more than 80 FPGA pairs to connect to the
devices on the FMC. The practicality of FMCs is down
to the host FPGA and I/O devices. An example is a
3.6GS/s 12bit ADC, which exists today and might
use 1:4 multiplexer to allow it to be interfaced to an
FPGA. Such a device would require 48 LVDS pairs,
probably clocked at 450MHz DDR. This would use
more than half of the FMCs connectivity for parallel
connections for the data path alone, on top of which
control signals would be needed. In this example only
a single ADC device could be implemented on an
FMC even though there may be sufficient space and
power budget to fit on a second part. However, by
comparison, the performance bandwidth for FMCs
over XMCs is considerable.
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Summary
PMC
XMC
FMC
Monolithic
Bandwidth
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Latency
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aa
aa
aa
aa
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Power dissipation,
ease of cooling
aa
aaa
Installed base of
users
Conclusion
[1] IEEE 1386.1-2001 Standard Physical and Environmental Layers for PCI
Mezzanine Cards
[2] ANSI/VITA 39-2003: American National Standard for PCI-X Auxiliary
Standard for PMCs and Processor PMCs.
[3] ANSI/VITA 20 (R2005): American National Standard for Conduction
Cooled PMC
[4] ANSI/VITA 42.0-2008: STANDARD FOR VITA 42.0 XMC
[5] ANSI/VITA 42.3-2006: American National Standard for XMC PCI
Express Protocol Layer Standard
[6] ANSI/VITA 57.1:-2008: American National Standard for FPGA
Mezzanine Card (FMC) Standard
[7] Xilinx ML605 Virtex-6 evaluation card: www.xilinx.com
[8] Curtiss-Wright Controls Embedded Computing web site
www.cwcembedded.com
All other brands and names are property of their respective owners.
UNITRONIXPtyLtd
POBox486,MorissetNSW2264
NSW:Tel:61249773511Fax:61249773522
WA:Tel:61894552424Fax:61894552458
unitsyd@unitronix.com.au www.unitronix.com.au
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