This is observation done at low temperatures and at high temperatures

of 60 degree Centigrade with HI-6110 PCTF, Transformer (PM-DB2745S )

and Cyclone fpga. Only BC-RT command is used with Sub add 1, RT Add
2 ad data length of 11 words/1 word.

Legend:
D0
D5
D4
D1
D2
D3
M

CLK
MASTER RESET (MR)
RCMBDA
RCVA
FFEMPTY
VALMESS
DIFFERENTIAL BUS A

Fig1. At normal temperatures, BC to RT command (1word).

Observations are in line with datasheet for temp < 55 OC.

Fig2. At temperatures > 60 OC, FFEMPTY is misbehaving (always high) &

VALMESS is proper.

Fig3. At all times, RCVA is prior to RCMBDA .

We have made the above observations. Fig.1 is at normal temperatures, and

every action is fine. We have used both 24MHZ and 12 MHz clk for HOLT external
clock and observations are still same.
In Fig2. We observe that FFEMPTY does not go low, but VALMESS goes
high, to indicate that it was a valid message. Please clarify the misbehaviour of
the HOLT IC.
In Fig 3. RCMBDA arrives later than RCVA. But according to the data sheet,
RCMBDA pulse comes first, and then RCVA. I want to know why this is
happening?. Also what is the pulse width of RCMBDA?

We are using FPGA Cyclone IVCE for host microcontroller. A state machine is
written in the FPGA. Holts behaviour should not change with the temperature as
far as clk and Master Reset are given fine. We have verified, at high
temperatures clk and MR is working fine.

Fig.4 shows the PCB layout of our design, where the Holt processor and
transformer are one below the other (overlapping) because of space constraint.
Does this layout have any influence to the FFEMPTY behaviour? Fig 5. Shows the
schematic.
We would like to solve this issue with the current layout. Let us know if schematic
requires any fine tuning. Please look into the matter and help resolve this issue
and make the board work at high temperatures as early as possible.

FIG4. HOLT and Transformer Layout.

FIG5. Schematic of mil interface. (configured for RT mode & RT add 2 in H/w)