GC9403 Application Notes Ver04 - 20141206

GC9403
a-Si TFT LCD Single Chip Driver

320RGBx480 Resolution and 16.7M color
GC9403
Application Notes
Version:04
Date:Dec 06, 2014
GALAXYCORE CORP.
11F,Duilding2 No.560 Shengxia Road,
Pudong New Area,shanghai,P.R.China
Tel:86-21-51083755 ,Fax:86-21-58968522
http://www.gcoreinc.com

GC9403
contents
1. HSD3.5 PANAL........................................................................ 2
1.1 HSD3.5FPC Application Circuit ............................................. 2
1.2 HSD3.5Init Code.................................................................... 3
2. CMO3.5 PANAL ...................................................................... 9
2.1 CMO3.5FPC Application Circuit............................................. 9
2.2 CMO3.5Init Code ................................................................. 10
3. IVO3.5 PANAL....................................................................... 16
3.1 IVO3.5FPC Application Circuit ............................................. 16
3.2 IVO3.5Init Code ................................................................... 17
4. Revision History ...................................................................... 23
Page 1 of 23
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1
GND
MIPI_DATA_N
MIPI_DATA_P
GND
MIPI_CLK_N
MIPI_CLK_P
GND
DB23
DB22
DB21
DB20
DB19
DB18
CABC_PWM
IM0
IM1
IM2
RESX
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DOUT
DIN/SDA
RD
WR_SCL
D/CX
CS
TE
IOVCC
VCI
GND
C2
C4 C5 C6 C7
REMARK:
1.MIPI_DATA_N/P,MIPI_CLK_N/PZlayout
2.
IM2 IM1 IM0
interface
0
0
0
i-80 24bit busDBI=111
0
0
0
i-80 18bit busDBI !=111
0
0
1
i-80 9_bit bus
0
1
0
i-80 16_bit bus
0
1
1
i-80 8_bit bus
1
0
1
spi 3_line
1
1
0
MIPI DSI
1
1
1
spi 4_line
IM000interface0x3AHDBI=11124 bit bus18 bit bus
50PIN_connector
Page 2 of 23
C11
1.0uF/25V
C9
MIPI_DATA_N
C13
C14
1.0uF/10V
1.0uF/25V
VCOM
VDD
C21A
C21B
C11A
C11B
C12
VCOM
C21A
C21B
C52A
C52B
C51A
C51B
VGH
VGL
VCI
DDVDL
DDVDH
VCL
C41B
C41A
IOVCC
DB23
DB22
DB21
DB20
DB19
DB18
CABC_PWM
IM0
IM1
IM2
RESX
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DOUT
DIN/SDA
RD
WR_SCL
D/CX
CS
TE
MIPI_CLK_P
MIPI_CLK_N
MIPI_DATA_P
1.0uF/10V
C10
1.0uF/25V
C8
1.0uF/10
1.0uF/10V
1.0uF/6.3V
1.0uF/10V
1.0uF/10V
C3
1.0uF/10V
C1
1.0uF/10V
1.0uF/6.3V
1.0uF/6.3V
VCOM
TEST TP
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144
VCOM
VCOM
VCOM
TES TP
TES TP
VSSAM
VSSAM
MVDDL_TEST_PAD
REF_TEST_PAD
DUMMY_DMP[4]
DUMMY_DMP[5]
DUMMY_DMP[6]
MVDDA
MVDDA
MIPI_DATA_N
MIPI_DATA_N
MIPI_DATA_P
MIPI_DATA_P
MIPI_CLK_N
MIPI_CLK_N
MIPI_CLK_P
MIPI_CLK_P
test_vref/mipi_clk_p
DB[23]
DB[22]
DB[21]
DB[20]
DB[19]
DB[18]
CABC_PWM
IM[0]
IM[1]
IM[2]
RESX
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DOUT
DIN_SDA
RDX
WRX_SCL
D_CX
CSX
TE
IOVCC
IOVCC
VDD
VDD
GND
GND
GND
VGS
AGND
AGND
AGND
VCOM
VCOM
VCOM
C41A
C41A
C41B
C41B
N_VCORE
N_VCORE
VCL
VCL
DDVDH
DDVDH
DDVDL
DDVDL
VCI
VCI
VCI
C11B
C11B
C11B
C11B
C11A
C11A
C11A
C11A
C12B
C12B
C12B
C12B
C12A
C12A
C12A
C12A
VGL
VGL
VGL
VGL
AGND
AGND
AGND
VGH
VGH
VGH
VGH
C51B
C51B
C51B
C51A
C51A
C51A
C52B
C52B
C52B
C52B
C52A
C52A
C52A
C52A
C21B
C21B
C21B
C21B
C21A
C21A
C21A
C21A
VCOM
VCOM
VCOM

GC9403
1. HSD3.5 PANAL
1.1 HSD3.5FPC Application Circuit
GC9403 for HSD 3.5"COM3.5"panal

GC9403
1.2 HSD3.5Init Code

void Init_LCD(void)
{
//----------------------------------- Reset Sequence------------------------------//
LCD_nRST = 1;
delayms(120);
LCD_nRST = 0;
delayms(100); // delay 10ms This delay time is necessary
LCD_nRST = 1;
delayms(120);
//----------------------------end Reset Sequence-------------------------------//
//-------------------------display control setting--------------------------//
delayms(120);
LCD_ GC9403_CMD(0xfe);
LCD_ GC9403_CMD(0xef);
LCD_ GC9403_CMD(0x3a);
LCD_ GC9403_DATA(0x06); //18bit
LCD_ GC9403_CMD(0x36);
LCD_ GC9403_DATA(0x48);
LCD_ GC9403_CMD(0xb4);
LCD_ GC9403_DATA(0x00); //colum inversion
Page 3 of 23

GC9403
//---------------------------end display control setting---------------------//

//--------------------------Power Control Registers Initial------------------//
LCD_ GC9403_CMD(0xa8);
LCD_ GC9403_CMD(0xe5);
LCD_ GC9403_CMD(0xE4);
LCD_ GC9403_CMD(0xed);
Page 4 of 23

GC9403
//--------------------end Power Control Registers Initial----------------------//

//---------------------------display window 320X480---------------------------//
LCD_ GC9403_DATA(0x3F);
LCD_ GC9403_CMD(0x2b);
LCD_ GC9403_DATA(0xDF);
LCD_ GC9403_CMD(0x2c);
//-----------------------end display window ---------------------------------//
delayms(10);
//---------------------------gamma setting------------------------------------//
LCD_ GC9403_CMD(0xf0);
LCD_ GC9403_DATA(0x0f); //vp0
0~f
LCD_ GC9403_DATA(0x3b); //vp1
0~3f
LCD_ GC9403_DATA(0x38); //vp2
0~3f
LCD_ GC9403_DATA(0x0a); //vp4
0~f
Page 5 of 23

LCD_ GC9403_DATA(0x0a);
LCD_ GC9403_DATA(0x0f);
LCD_ GC9403_DATA(0x0d);
LCD_ GC9403_DATA(0xa9);
Page 6 of 23
GC9403

GC9403
//----------------------------end
gamma setting---------------------------------//
delayms(120);
}
void GC9403_enter_sleep(void)
{
delayms(120);
delayms(150);
Page 7 of 23

}
void GC9403_exit_sleep(void)
{
delayms(120);
}
Page 8 of 23
GC9403
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9
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5
4
3
2
1
GND
MIPI_DATA_N
MIPI_DATA_P
GND
MIPI_CLK_N
MIPI_CLK_P
GND
DB23
DB22
DB21
DB20
DB19
DB18
CABC_PWM
IM0
IM1
IM2
RESX
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DOUT
DIN/SDA
RD
WR_SCL
D/CX
CS
TE
IOVCC
VCI
GND
C2
C4 C5 C6 C7
REMARK:
2.
IM2 IM1 IM0
interface
0
0
0
0
0
0
0
0
1
i-80 9_bit bus
0
1
0
i-80 16_bit bus
0
1
1
i-80 8_bit bus
1
0
1
spi 3_line
1
1
0
MIPI DSI
1
1
1
spi 4_line
50PIN_connector
Page 9 of 23
C11
1.0uF/25V
C9
MIPI_DATA_N
C13
C14
1.0uF/10V
1.0uF/25V
VCOM
VDD
C21A
C21B
C11A
C11B
C12
VCOM
C21A
C21B
C52A
C52B
C51A
C51B
VGH
VGL
VCI
DDVDL
DDVDH
VCL
C41B
C41A
IOVCC
DB23
DB22
DB21
DB20
DB19
DB18
CABC_PWM
IM0
IM1
IM2
RESX
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DOUT
DIN/SDA
RD
WR_SCL
D/CX
CS
TE
MIPI_CLK_P
MIPI_CLK_N
MIPI_DATA_P
1.0uF/10V
C10
1.0uF/25V
C8
1.0uF/10
1.0uF/10V
1.0uF/6.3V
1.0uF/10V
1.0uF/10V
C3
1.0uF/10V
C1
1.0uF/10V
1.0uF/6.3V
1.0uF/6.3V
VCOM
TEST TP
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142
143
144
VCOM
VCOM
VCOM
TES TP
TES TP
VSSAM
VSSAM
MVDDL_TEST_PAD
REF_TEST_PAD
DUMMY_DMP[4]
DUMMY_DMP[5]
DUMMY_DMP[6]
MVDDA
MVDDA
MIPI_DATA_N
MIPI_DATA_N
MIPI_DATA_P
MIPI_DATA_P
MIPI_CLK_N
MIPI_CLK_N
MIPI_CLK_P
MIPI_CLK_P
test_vref/mipi_clk_p
DB[23]
DB[22]
DB[21]
DB[20]
DB[19]
DB[18]
CABC_PWM
IM[0]
IM[1]
IM[2]
RESX
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DOUT
DIN_SDA
RDX
WRX_SCL
D_CX
CSX
TE
IOVCC
IOVCC
VDD
VDD
GND
GND
GND
VGS
AGND
AGND
AGND
VCOM
VCOM
VCOM
C41A
C41A
C41B
C41B
N_VCORE
N_VCORE
VCL
VCL
DDVDH
DDVDH
DDVDL
DDVDL
VCI
VCI
VCI
C11B
C11B
C11B
C11B
C11A
C11A
C11A
C11A
C12B
C12B
C12B
C12B
C12A
C12A
C12A
C12A
VGL
VGL
VGL
VGL
AGND
AGND
AGND
VGH
VGH
VGH
VGH
C51B
C51B
C51B
C51A
C51A
C51A
C52B
C52B
C52B
C52B
C52A
C52A
C52A
C52A
C21B
C21B
C21B
C21B
C21A
C21A
C21A
C21A
VCOM
VCOM
VCOM

GC9403
2. CMO3.5 PANAL
2.1 CMO3.5FPC Application Circuit
GC9403 for HSD 3.5"COM3.5"panal

GC9403
2.2 CMO3.5Init Code

void Init_LCD(void)
{
//---------------------------- Reset Sequence----------------------------------//
LCD_nRST = 1;
delayms(120);
LCD_nRST = 0;
LCD_nRST = 1;
delayms(120);
//-----------------------------end Reset Sequence----------------------------//
//-------------------------display control setting---------------------------//
delayms(120);
//column inversion
Page 10 of 23

GC9403
//------------------------end display control setting-----------------------//

//------------------------Power Control Registers Initial-------------------//
Page 11 of 23

GC9403
//--------------------end Power Control Registers Initial-----------------//

//-----------------------display window 320X480----------------------------//
CD_ GC9403_DATA(0x01);
//--------------------------------end display window ------------------------//
delayms(10);
//--------------------------------gamma setting--------------------------------//
LCD_ GC9403_DATA(0x2e);
Page 12 of 23

LCD_ GC9403_DATA(0x2e);
LCD_ GC9403_DATA(0x0c);
LCD_ GC9403_DATA(0xba);
Page 13 of 23
GC9403

GC9403
//---------------------------end gamma setting------------------------------//
delayms(120);
}
{
delayms(120);
delayms(150);
Page 14 of 23

}
{
delayms(120);
}
Page 15 of 23
GC9403
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3
2
1
GND
MIPI_DATA_N
MIPI_DATA_P
GND
MIPI_CLK_N
MIPI_CLK_P
GND
DB23
DB22
DB21
DB20
DB19
DB18
CABC_PWM
IM0
IM1
IM2
RESX
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DOUT
DIN/SDA
RD
WR_SCL
D/CX
CS
TE
IOVCC
VCI
GND
C2
C4 C5 C6 C7
REMARK:
2.
IM2 IM1 IM0
interface
0
0
0
0
0
0
0
0
1
i-80 9_bit bus
0
1
0
i-80 16_bit bus
0
1
1
i-80 8_bit bus
1
0
1
spi 3_line
1
1
0
MIPI DSI
1
1
1
spi 4_line
50PIN_connector
Page 16 of 23
C11
1.0uF/25V
C9
MIPI_DATA_N
C13
C14
1.0uF/10V
1.0uF/25V
VCOM
VDD
C21A
C21B
C11A
C11B
C12
VCOM
C21A
C21B
C52A
C52B
C51A
C51B
VGH
VGL
VCI
DDVDL
DDVDH
VCL
C41B
C41A
IOVCC
MIPI_CLK_P
DB23
DB22
DB21
DB20
DB19
DB18
CABC_PWM
IM0
IM1
IM2
RESX
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DOUT
DIN/SDA
RD
WR_SCL
D/CX
CS
TE
MIPI_CLK_N
MIPI_DATA_P
1.0uF/10V
C10
1.0uF/25V
C8
1.0uF/10
1.0uF/10V
1.0uF/6.3V
1.0uF/10V
1.0uF/10V
C3
1.0uF/10V
C1
1.0uF/10V
1.0uF/6.3V
1.0uF/6.3V
VCOM
TEST TP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
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125
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127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
VCOM
VCOM
VCOM
TES TP
TES TP
VSSAM
VSSAM
MVDDL_TEST_PAD
REF_TEST_PAD
DUMMY_DMP[4]
DUMMY_DMP[5]
DUMMY_DMP[6]
MVDDA
MVDDA
MVDDA
MIPI_DATA_N
MIPI_DATA_N
MIPI_DATA_P
MIPI_DATA_P
MIPI_CLK_N
MIPI_CLK_N
MIPI_CLK_P
MIPI_CLK_P
DB[23]
DB[22]
DB[21]
DB[20]
DB[19]
DB[18]
CABC_PWM
IM[0]
IM[1]
IM[2]
RESX
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DOUT
DIN_SDA
RDX
WRX_SCL
D_CX
CSX
TE
IOVCC
IOVCC
VDD
VDD
GND
GND
GND
VGS
AGND
AGND
AGND
VCOM
VCOM
VCOM
C41A
C41A
C41B
C41B
N_VCORE
N_VCORE
VCL
VCL
DDVDH
DDVDH
DDVDL
DDVDL
VCI
VCI
VCI
C11B
C11B
C11B
C11B
C11A
C11A
C11A
C11A
C12B
C12B
C12B
C12B
C12A
C12A
C12A
C12A
VGL
VGL
VGL
VGL
AGND
AGND
AGND
VGH
VGH
VGH
VGH
C51B
C51B
C51B
C51A
C51A
C51A
C52B
C52B
C52B
C52B
C52A
C52A
C52A
C52A
C21B
C21B
C21B
C21B
C21A
C21A
C21A
C21A
VCOM
VCOM
VCOM

GC9403
3. IVO3.5 PANAL
3.1 IVO3.5FPC Application Circuit
GC9403 for IVO 3.5"panal

GC9403
3.2 IVO3.5Init Code

void Init_LCD(void)
{
//----------------------------- Reset Sequence-------------------------------//
LCD_nRST = 1;
delayms(120);
LCD_nRST = 0;
LCD_nRST = 1;
delayms(120);
//-----------------------------end Reset Sequence--------------------------//
//-----------------------------display control setting-----------------------//
delayms(120);
//column inversion
Page 17 of 23

GC9403
//---------------------------end display control setting--------------------//

//--------------------------Power Control Registers Initial----------------//
Page 18 of 23

GC9403
//--------------------end Power Control Registers Initial----------------------//

//---------------------------display window 320X480--------------------------//
//--------------------------end display window ------------------------------//
delayms(10);
//--------------------------------gamma setting--------------------------------//
Page 19 of 23

LCD_ GC9403_DATA(0x2b);
Page 20 of 23
GC9403

GC9403
//-------------------------------end gamma setting---------------------------//
delayms(120);
}
{
delayms(120);
Page 21 of 23

delayms(150);
}
{
delayms(120);
}
Page 22 of 23
GC9403

GC9403
4. Revision History
Version No.
Date
Page Description
V01
V02
V03
V04
2013/02/19
2014/05/16
2014/09/01
2014/12/06
All
All
All
All
New version
Update all
Add a8ha7h
Update the gamma register
Page 23 of 23

GC9403 Application Notes Ver04 - 20141206

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GC9403

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

1.1 HSD3.5FPC Application Circuit

GC9403 for HSD 3.5"COM3.5"panal

a-Si TFT LCD Single Chip Driver

1.2 HSD3.5Init Code

a-Si TFT LCD Single Chip Driver

//---------------------------end display control setting---------------------//

a-Si TFT LCD Single Chip Driver

//--------------------end Power Control Registers Initial----------------------//

LCD_ GC9403_DATA(0x3b); //vp1

LCD_ GC9403_DATA(0x38); //vp2

LCD_ GC9403_DATA(0x0a); //vp4

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

2.1 CMO3.5FPC Application Circuit

GC9403 for HSD 3.5"COM3.5"panal

a-Si TFT LCD Single Chip Driver

2.2 CMO3.5Init Code

a-Si TFT LCD Single Chip Driver

//------------------------end display control setting-----------------------//

a-Si TFT LCD Single Chip Driver

//--------------------end Power Control Registers Initial-----------------//

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

3.1 IVO3.5FPC Application Circuit

GC9403 for IVO 3.5"panal

a-Si TFT LCD Single Chip Driver

3.2 IVO3.5Init Code

a-Si TFT LCD Single Chip Driver

//---------------------------end display control setting--------------------//

a-Si TFT LCD Single Chip Driver

//--------------------end Power Control Registers Initial----------------------//

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

a-Si TFT LCD Single Chip Driver

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