Singapore Polytechnic

Digital Electronics

7. Counters and Registers

Objectives
Understand the operation and characteristics of
asynchronous counters.
Construct asynchronous
numbers less than 2N.
Construct
counters.

both

up

and

counters
down

with

MOD

asynchronous

Eliminate decoder spikes by a technique called

called stobing.
Recognize and understand the operation of various
types of shift registers.

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Digital Electronics

Asynchronous Counters

The basic Asynchronous counter circuit is a

cascaded configuration of toggle flip-flops with the
output of a preceding flip-flop connected to the
clock input of the following flip-flop.
The counter is Asynchronous because the outputs
at each flip-flop do not change at the same time.
Because of the cascaded connection (Output to
Clock), output A has to change before output B
changes and so on.
The Asynchronous counter shown above has 16
different states ranging from:

0000 to 1111
It is also called a MOD - 16 Asynchronous counter
(or ripple counter).

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Digital Electronics

In general, the MOD number (or modulus) of a

counter is the number of states the counter goes
through before it gets back to its initial (starting)
state.
The MOD number of an Asynchronous counter
increases when more FFs are added to the basic
configuration.
The Mod number for an asynchronous counter is
given by:

Mod Number = 2N
where N is the number of FFs in the counter.
Each FF in the circuit divides its Clock by 2 as
illustrated below:

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Digital Electronics

The table below shows the sequence of states the

Mod-16 counter goes through, starting from an
initial count of 0000.
D
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
.

C
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
.

B
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
.

A
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
.

No. of CLK pulses

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 (recycles)
17
18
19
20
21
.

The counter recycles or repeats its count sequence

on reaching its maximum count value of 1111.

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Digital Electronics

Question?
Assuming the Mod-16 counter starts from an initial
state of 0000 and clock pulses are then
subsequently applied.
- Some time later the clock pulses are removed.
- The counter output reads 0011.
- How many pulses have been applied?
Answer:
3
or

16 + 3 = 19

or

32 + 3 = 35

or

48 + 3 = 51

or

64 + 3 = 67
& so on.

I.e. the mod-16 counter repeats its sequence

every 16 clock cycles.

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Digital Electronics

Counter with MOD Numbers < 2N

The basic ripple counter is limited to MOD
numbers that are equal to exactly 2N.
2N is the maximum MOD number that can be
obtained using N FFs.
The basic counter can be modified to produce MOD
numbers < 2N by resetting the flip-flops when the
required count state is reached.
The example shown below illustrates:

The NAND gate output goes Low when flip-flop

outputs B and C are both High at the same time.

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Digital Electronics

This occurs when count reaches 110 momentarily;

the Low at the NAND output activates the CLR
inputs, subsequently forcing all flip-flop outputs to
Reset to 000.

With the count truncated, 101 becomes the last

steady state & hence the count sequence
becomes: 000 001 010 011 100 101
and then repeating from 000 again.
In effect, the counter becomes Mod-6 as there are
only 6 distinct states.

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Digital Electronics

Example 2: A Mod-14 Ripple Counter

A Mod-16 basic Asynchronous counter is modified
to Mod-14 by using the temporary count state of
1110 (14 decimal) to reset the flip-flops.
This is accomplished by connecting the flip-flop
outputs of B, C and D to the inputs of a 3-input
NAND gate; the output of which is connected to
the CLR inputs of the flip-flops.

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Digital Electronics

Designing a non-2N Asynchronous counter

The required procedure is to modify a Mod 2N
counter by connecting an appropriate NAND
gate between the required FF outputs and the
CLR inputs of all the FFs.
1.

Determine the number of toggle FFs

required from the given Mod-Number.
E.g. For Mod-25, the maximum count is 24,
which is binary 11000, consisting of 5 bits
& thus requiring 5 toggle FFs.

2. Use the Mod number to reset the counter FFs.

E.g. For Mod-25, 25 in binary is 11001. The 3
1s in this binary number 3-input NAND
gate is required. The position of the 1s
also determines where the NAND inputs
are connected to, in this case the MSB FF,
the FF next to the MSB and also the LSB
FF.

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Digital Electronics

IC Asynchronous Counter
The 74293 or 7493 is an IC counter consisting of 4
JK flip-flops internally configured as a Mod 2 and
Mod 8 counter. By making external wiring, the IC
can be connected to function as counter of any
mod number between 2 and 16.

Symbolically, the 74293 is as shown. CP0 and CP1

are the two CLK inputs of the Mod-2 and Mod- 8
counters, respectively. MR1 and MR2 are the
master resets and proper connections to these 2
inputs allow the IC to be configured as counters
with Mod numbers < 2N.

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Digital Electronics

Application Examples on 7493

Mod-16 Counter
All flip-flops are required to
configure for a Mod-16
counter. Basically this
involves cascading the Mod
2 and Mod 8 counter, i.e.
making a connection from
Q0 to CP1 and applying the
clock signal to Q0. MR1 and
MR2 are not used and
should be grounded.

Mod-10 (Decade) counter

The count sequence of a
mod-16 counter is truncated
by using 1010 (10 in binary)
to reset the flip-flops
through the Master Reset
inputs.
Hence when the counter
reaches the momentarily
count of 1010, all flip-flops
reset to 0000. The counter
thus only recycles through
ten stable states ranging
from 0000 to 1001 .

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Digital Electronics

Asynchronous Down Counters

The counters we have seen so far count upwards
from zero. They are called up-counters.
Down-counters count down from all the 1s to 0s.
A basic Asynchronous down counter has the
connections is as shown. The connection is from
the complementary output of the preceding flipflop to the clock input of the next flip-flop.

Waveforms of the Mod-16 down counter is as

shown:

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Digital Electronics

Another configuration of a Mod-16 Asynchronous

down counter is shown below. The circuit
connections are similar to that of an up-counter
except that the outputs are taken from the
complementary (i.e. Not Q) outputs of the flipflops rather than the true outputs.

The waveforms of the counter are the inverted

waveforms of an up-counter and as can be seen,
has a down-count sequence.

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Digital Electronics

Propagation Delay in Ripple Counters

Ripple counters are the simplest type of binary
counters. They are also called Asynchronous
counters because the flip-flop outputs do not all
change at the same time.
They have a major drawback- propagation delay
(tpd) accumulates with the number of flip-flops
used.
Assume there are N flip-flops in the counter:
For the last flip-flop to respond to a clock
transition - it will take N * tpd
Therefore the total propagation delay of the
counter increases with the number of flip-flops.

Illustrating the effects of flip-flops propagation delays on

a 3-bit counter.

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Digital Electronics

Shown below are the waveforms of a 3-bit counter

illustrating the effects of flip-flops propagation
delays. Clock frequency has been changed to 10
MHz but propagation delay remains the same as in
the previous circuit.

In this instance, the total propagation delay over 3

flip-flops exceeds the clock period and the
resultant effect is that the counter misses at least
one of its count state.
In general, the theoretical Maximum clock
frequency that can be applied to a Counter is
= 1/(total propagation delay)
Question:
What is the Max Clock frequency that can be
applied to a Mod-16 counter if each flip-flop in the
counter has a propagation delay of 25nS?

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Digital Electronics

Decoding a Counter
A MOD-X counter has X different states.
A decoding network can generate up to X different
outputs.
The decoder outputs can be either active HIGH or
active LOW.

Using AND gates to decode a MOD-8 counter

produces active High outputs.

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Digital Electronics

Decoding Glitches
With asynchronous counters the propagation
delays can cause glitches when decoding.

Waveforms for a MOD-4 counter showing glitches on

decoded outputs.

The glitches are generated because the FF outputs

do not change at the same time, resulting in very
short instances where the output values
correspond to the decoded values.

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Digital Electronics

There are two basic solutions to eliminate the

glitches:
1.

2.

Use synchronous counter.

Outputs of FFs in synchronous counters are
synchronized by the Clock signal and change
states at the same time & glitches are thus not
produced when the outputs are decoded.
Use strobing.

Use of strobe signal to eliminate decoding spikes

A strobe is a narrow pulse signal of the same
frequency as the CLK but delayed such that its
edges are away from the CLK edges. The strobe
is used as an Enable signal to enable the
decoding gates during periods where glitches are
not present. In this way glitches are eliminated.

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Digital Electronics

IC Registers
There are basically four different types of shift
registers which are classified as:
1.

Parallel in / parallel out

2.

Serial in / serial out

3.

Parallel in / serial out

4.

Serial in / parallel out

Each of the above configuration of shift registers is

available in IC form.
Examples of shift register ICs include: 74174,
74164, 74165, etc.
Click on the following power point file attachment
for description on each type of shift register circuit

ShiftReg.ppt

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Digital Electronics

Parallel In/Parallel Out - The 74174

The 74174 IC is a 6-bit shift register IC which is
normally configured to function as Parallel-input /
Parallel-output register.
Through external connections and logic gates
however, the 74178 can also be wired to function
in the other 3 modes of shift register
configuration.

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Digital Electronics

Serial-In/Parallel-Out - The 74ALS164

The 74ALS164 IC is an 8-bit Serial-in, Parallel-out
shift register IC, with each flip-flop output being
externally accessible.
Instead of a single serial input, an AND gate
combines input A and B to produce the serial input
to the first flip-flop.
The MR input provides asynchronous resetting of
all flip-flops on a Low level.
CP (PGT) is the clock input for shifting operation.

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Digital Electronics

Serial-In/Serial-Out - The 4731B

The 4731B IC is a CMOS quad 64-bit Serial-in,
Serial-out shift register IC.
This shift register IC can only be operated in one
mode as the output pins available are only- serial
input D0, serial output Q63 and NGT clock input
CP.
Q63 is the only output that is available from the
register and it goes through a buffer circuit, its
function is basically to increase the output current
drive capability.

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Digital Electronics

Parallel-In/Serial-Out - The 74ALS165

The 74ALS165 IC is an 8-bit Parallel-in, Serial-out
shift register IC.
Besides the 8-bit parallel data inputs, there is an
additional serial input labeled DS. This additional
serial input allows the IC to also function as a
serial-in, serial-out shift register, if need be.
The IC contains 8 D-flip-flops internally connected
as a serial shift register but only output Q7 and its
complement Q7, is available. Thus the stored data
can only be transferred out in serial mode.
CP (PGT) is the normal clock input for shifting
operation.

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