PHY108 Transistors and Amplifiers

Dr Tim Searle, E49

Course structure and contents

1 Introduction
1.1 Gain
1.2 Thvenins theorem
1.3 Input and output impedance
1.4 Circuits carrying ac and dc currents
2 Bipolar Transistors
2.1 Transistor operation
2.2 Transistor characteristics
2.3 Operating conditions
3 The common emitter configuration
3.1 A usable common emitter amplifier
3.2 Variations on the common emitter amplifier circuit
4 The common collector configuration
4.1 The simple emitter follower
4.2 Bootstrapping
4.3 The Darlington connection
4.4 Bootstrapped Darlington pair
4.5 Current mirror and transistor biasing
4.6 Push pull amps and amplifier operation classes
5 Frequency response
5.1 R and C together
5.2 The low frequency limit
5.3 The high frequency limit

6 Differential amplifiers
7 Operational amplifiers
7.1 Introduction
7.2 Feedback
7.3 Feedback and amplifiers
7.4 Operational amplifier circuits
7.5 The inverting amplifier
7.6 Frequency response
7.7 Non-inverting amplifier
7.8 An op-amp constant current source
7.9 Differential amplifiers using op-amps
7.10 A summing amplifier
7.11 Integrator
7.12 Differentiating circuit
7.13 Solving differential equations with op-amps
7.14 Logarithmic amplifiers
7.15 Exponential amplifiers
7.16 Multipliers and dividers
7.17 Bridge amplifier
7.18 High and low pass active filters
7.19 Comparators and the Schmidt trigger
7.20 Relaxation oscillator

1 Introduction
PHY108 is about amplifiers in general; then transistor amplifiers, their circuits
and properties; and finally about a particular class of amplifier called and
operational amplifier. Lets start by looking at the properties of a general
amplifier, without (for the moment) worrying about the circuit details.
What does it do? Well, usually it has an electrical input and output. In
PHY107 last term I used lower case letters to represent time varying voltages
v and currents i. These are often sinusoidal in time, but they dont have to be.
So suppose the input voltage and current are vin and Iin, and the
corresponding output vout and iout. Usually the outputs are bigger than the
input, and we have amplification or gain.
1.1 Gain
We can define three sorts of gain.
Voltage gain Av = vout/ vin ;
Current gain Ai = iout/ iin ; and
Power gain Ap = Av.Ai since power (watts) is volts x amps.
We can imagine an ideal amplifier in which each of these parameters is
independent of the size and shape of the input. In particular, with an input of
the form
vin = v0 sin(2 ft) ,
with f frequency and t time, such an amplifier would have gains independent
of f and v0. Our ideal amplifier would for instance have a voltage output
vout = Av v0 sin(2 ft) ,
just Av times the input. Generally, things are not so simple.

Frequency dependence
First, and perhaps most important, the gains of real amplifiers will be
frequency dependent. Usually there is a well-defined frequency range over
which Ap (for example) is at least roughly constant, with regions at high and
low frequency where the gain falls to zero. We refer to the width of the flat
gain region as the amplifiers bandwidth. For a quality audio amplifier one
might want a flat region from about 10 Hz to 25 kHz, to suit the ear. For a

telecoms amplifier for optical cable work, the upper limit will be over 10 GHz.
The flatter the gain curve in this central region, the closer the amplifier is to
our ideal one at these frequencies.
Notice that even if the gain is frequency dependent, the output may still have
the form sin(2ft); the output is not distorted. This is usually the case for small
inputs and outputs.
Waveform distortion
Once the inputs and outputs are large, the shape of the two may differ, and an
input of the form above may not yield a sinusoidal output. We saw an
example of such distortion at the end of PHY107 with a simple common
emitter amplifier
lecture1\Transistor1.cyt
with a 50 mV input there is severe distortion; the peak-to-peak input is about
100/600 = 12% of the quiescent (or d.c.) base voltage.
One can describe the distorted output wave form in terms of a sum of sine
waves with frequencies f, 2f, 3f etc, or harmonics. This is what you hear with
an overloaded amplifier.
Phase distortion
Even without waveform distortion, i.e. when the output is sinusoidal, the
output may be subtly different from the input, and have the form
vout = Av v0 sin(2 ft + ).
, the phase shift, is an angle between 0 and 2 radians. It may be a
constant; for example, in the common emitter amplifier above the voltage gain
is negative. One way of interpreting that is to say the gain is positive but the
phase shift is , which shifts the wave by half a wavelength, inverting it.
Worse though, we may have frequency dependent phase shifts. These will
distort a non-sinusoidal input i.e. a square wave into a different shape, even if
the voltage gain is flat. Generally this matters, though there has been a lot of
discussion about the ears sensitivity to phase distortion.
dB (decibels)
Power and voltage ratios are often expressed in dB. For power P the
definition is
dB = 10 log10 (P1 / P2).
For voltages, since powers go as the square of them
dB = 20 log10 (v1 / v2).

1.2 Thvenins theorem

This is a very general and useful result for circuits containing any number of
resistors and batteries. The result is that any such circuit, however messy,
can be reduced to just one battery and one resistor. Further, it tells us how to
find the values of voltage and resistance of the two components. It says
a) the voltage of the battery is the same as that we get when there is no
load resistor added across the output of the circuit, that is the open
circuit voltage Voc and
b) the appropriate resistor RTh is found by measuring the output current
when the output is short circuited, Isc and dividing it into Voc in the usual
Ohms law way.
As an example of its use, lets look again at the voltage divider formed by two
resistors R1 and R2 in series across a supply voltage. The output is across
the latter. Its open circuit voltage (no load resistor) is the familiar
Voc = Vs R2 / (R1 + R2),
and this is the equivalent voltage. The current when the output is shortcircuited is just
= Vs /R1
(R2 is shorted out) so the equivalent resistor = Voc/ Isc = R1 R2 / (R1 + R2).
That is, RTh is the parallel resistance of the pair, sometimes written R1||R2.

RTh
Voc

Here is the circuit. If we put a load on the output, RL say, we get by inspection
Vload = Voc RL / (RTh + RL) and
Iload = Voc/ (RTh + RL).
These results are more easily obtained using the equivalent circuit. They of
course agree with the open and short-circuit results; you can check out the
last two results.

1.3 Input and output impedance

We also want to know what current we shall draw from a source when we
connect it to the input of an amplifier at a particular voltage. What resistance
or impedance does the source see? Likewise, given a particular output
voltage, what current flows? What resistance does the output see?
We can parameterise this with two quantities, the input and output
impedance, Zin and Zout. These are defined as the voltage to current ratios,
i.e.
Zin = vin / iin and
Zout = vout / iout.
Given the discussion above, it will come as no surprise to find that the Z
values may depend on frequency.
Why do these matter? Suppose you are trying to measure a small voltage
across one resistor of a voltage divider. If the amplifier in the voltmeter has a
high input impedance, then little current will flow through it, but if its
impedance is low it will lower the resistance across the divider, lowering the
voltage we were trying to measure. Voltmeters need to have high input
impedances.
It is useful to have equivalent (simplified) circuits for the amplifier to think
about their behaviour. The input side is obvious: we just have an impedance
across the input terminals. The output of the amplifier can be described as a
voltage source (producing a voltage equal to the input voltage times the gain)
with an impedance in series. The value of the impedance is Zout. The triangle
is just the symbol for an amplifier.

Zout

Returning to the measurement above, the voltage generator sees Zout +

Zvoltmeter in series, and so the output voltage is divided over
Zvoltmeter/ (Zout + Zvoltmeter),
which is only = 1 for very large Zvoltmeter.
Another important example comes when we feed the output of one amplifier
into the input of another, and are trying to get the maximum power output.
Suppose the two amplifiers have output and input impedances Zout1 and Zin2.
The fractional voltage fed to the second amplifier is, following the previous
example,
Zin2/(Zout1 + Zin2)
and the current fed to the second amplifier is the voltage divided by
(Zout1 + Zin2). So the power (volts x amps) transferred to the second amplifier
is proportional to
Zin2/ (Zout1 + Zin2)2,
and you can check by differentiation that this has a maximum when Zout1 =
Zin2. This is a particular example of a very general result, for all sorts of
systems (optical, acoustic, electrical), that for maximum power transfer
impedances must be matched, i.e. equal. The plot below shows the rise and
fall or power either side of matching.
There is one more point to make about the Z values. The input impedance is
well defined above, since a given voltage over the input produces a well
defined current. But to get a current out of the circuit to find Zout, we have to
put a load in place for the current to flow through. This may lower the output
voltage in a way that depends on the load, so we want a better, unique way of
stating the conditions. It turns out that the definition to use is the ratio
[Vout(infinite load) ]/[ iout (short circuit)].
This should not be a surprise in view of 1.2
1.4 Circuits carrying ac and dc currents
All the circuits we shall look at carry both constant (dc) and sinusoidaly time
varying currents, labelled as described above by upper and lower case
symbols. The dc currents and voltages are there to set up the transistors, to
bias them for action; the ac currents are the signals we want to amplify. We
can treat these two kinds of currents individually; they dont interact, except
through the transistors they encounter, and so we can, if it helps draw
separate circuit diagrams, one for each.

There are two differences between ac and dc representations of the same

circuit. To see the first, recall the impedance of a capacitor capacitance C to
a current of frequency f is
1/2fC,
so that at high enough f the impedance is negligible. On the other hand, for
dc (f =0) currents the impedance is infinite, as if there were a gap in the
circuit. So our ac in our version, we short out the capacitors, or replace them
with wire, and in the dc version leave a break or remove the connection
altogether.
Thus this arbitrary circuit, which really looks like

appears to dc as,

and at (high enough frequency ac) appears as

The a.c. circuit is just a voltage divider, so by Thevenins theorem the

equivalent resistance is that of R1 and R2 in parallel.
There is an obvious question about how high the frequency needs to be
before we can treat is a ac in the sense of shorting out the capacitors. To
answer it, consider a capacitor and a resistor in parallel. At dc, the
impedance is R, and at high frequency 1/2fC. So to be firmly in the ac
regime,
1/2f C<<R or 2fRC >> 1.
In practice, to be sure of meeting the inequality, we might design to
2fRC = 10 (since 10>>1).
2 Bipolar Transistors
This is a revision of things covered in PHY107. The main points are as
follows.
2.1 Transistor operation
Types of such transistors: we can make either p-n-p or n-p-n junctions. The
n/p refers to the carrier in the doped semiconductor, n (negative, electrons) or
p (positive, holes). For details see the notes for PHY107. The diagram from
those notes is reproduced below.

emitter

base

collector

n p

representation as a pair of diodes, and their symbols

Each has a sandwich structure, with a lightly doped and thin base region. The
current into the base controls the current between the two outer regions.
Each type has three connections, labelled emitter, base and collector. As the
name suggests, the carriers originate in the emitter region, so that if they are
electrons as in the n-p-n device, the conventional current flows out of the
emitter away from the transistor. For the p-n-p transistor, conventional current
flow is into the transistor. This immediately tells us something about the
polarity of the voltage across the transistor.
Consider the n-p-n transistor. First, the collector must be positive with respect
to (wrt) the emitter. We also want the n-p (emitter-base junction) in forward
bias for conduction, and so the base needs to be about 600 mV wrt the
emitter in n-p-n case. The current that passes, though, is base current
controlled, as incoming holes replace those lost to electron-hole
recombination and reduce the number of electron-repulsive negative acceptor
cores. This results in an approximately linear relationship between the base
current Ib and those in the collector (Ic) and emitter (Ie). The number of
electrons lost in the base is small, so these two last currents are
approximately equal. Finally, we would expect the collector to be positive wrt
the base, to help the electrons on their way, making this junction reverse
biased. Overall, the conventional current flows from collector to emitter in the
n-p-n transistor, since the carriers are negatively charged electrons.
Real n-p-n transistors are not symmetrical, since the collector is less heavily
doped than the base.
In p-n-p transistors, with positive carriers all signs are reversed.

2.2 Transistor characteristics

By characteristics we mean plots of one of the currents or voltages against
another. With three currents (emitter, base and collector) and three voltages
(Vce Vcb Vbe), there are several (15?) possible two-dimensional plots. There
are three particularly useful ones.

10

Current transfer characteristic

This is a plot of Ic versus, showing how a small base current can control a
large collector (or emitter) current. It is almost linear, and its local slope, the
current gain
hfe = dIc /dIb
is almost equal to the slope
hFE = Ic / Ib.
These two h parameters are known as the ac and dc current gain
respectively. Values depend on the transistor type, and vary by large
amounts for different examples of the same type, but values of a few hundred
are typical.
Input characteristic
This concerns the emitter-base junction, a forward biased p-n junction, and
plots Ib vs. Vbe.

It looks much like a diode under forward bias, lifting off around 600 mV. Note,
though, that it depends on the emitter-collector voltage Vce. This is because Ib
= Ie Ic, and Vce increases Ic gently through changes in the bias of the CB
junction, an effect seen more clearly in the next set of characteristics.
The local slope of this plot is called gM, and as we saw in PHY107 is important
in determining the gain of a single transistor amplifier stage. The bigger the
ac voltage vbe, the bigger the ac collector current output ib.hfe.
The reciprocal of gM has the dimensions of a resistance and is called the
emitter resistance. It is analogous to the dynamic resistance of a diode
(dynamic = local inverse slope).
We often want to calculate re, and its worth noting that

11

re = 1/(40IC) = 25/ IC, ..............2.1

with the current in mA.

Common emitter output characteristics

For these, we plot Ic vs. Vce, which looks rather like the characteristic of a
reverse biased diode (the base collector junction is reverse biased), but with a
reverse saturation current that depends on Ib. It must, of course since we
know that the base and collector currents are linearly related by the forward
transfer characteristic. We are plotting Vce here, not Vbc, so to compare with
the reversed diode we have to subtract Vbe., about 0.6, but increasing with Ib,
as ever.

The current transfer characteristic is at work here. For example, if you go to

about Vce = 8 V, and up to between the two lines marked Ib = 4 A and 5 A
(so say Ib = 4.5 A), the collector current is 2 mA. Thus hfe =2000/4.5 = 444
(but not that precisely).

12

Amplifiers normally work in the region where the base and collector currents
are linearly related, the flattish part of the output characteristic. This is the
region where the base-collector junction is solidly reverse biased.

2.3 Operating conditions

We are usually trying to amplify an ac signal as faithfully as possible. As we
saw in PHY107, large values of vbe (compared with the dc or quiescent
voltage Vbe) produces distorted output, because the local slope gM of the input
characteristics depends on the quiescent value Vbe. We have to pick our
operating point on the input characteristic set by biasing. The same is true for
the choice of quiescent Vce on the output characteristics, when we want to get
onto the active region.
In setting these operating points or quiescent conditions, we are able to use
capacitors; these discriminate between ac (signals) and dc (bias) by
presenting the latter with a high impedance, but letting ac signals of frequency
f through, so long as 2fC R >> 1 (cf 1.2)
We noted above that the transistor parameter hfe varied a lot even between
transistors of the same model number. We have to find a way of designing
the biasing of transistors that is not sensitive to such variations, unless we are
willing to accept the expense of selecting individual components.

3 The common emitter configuration

Every circuit has a ground rail and a supply rail. In most circuits the signal
that is passed to the next stage is taken between the ground rail and some
intermediate point on the other side of the transistor. In the common emitter
configuration the emitter is close to ground, and in its simplest form connected
to ground. The output is between ground and the collector. We met a very
simple but not very desirable common emitter amplifier in PHY107.

13

Here the 2k resistor forms a voltage divider for the output, with only ac going
through the capacitor. On the input side the other capacitor isolates the
source from the rail, and the1.8M resistor provides the required base current
or dc voltage bias. The supply voltage to the collector is generally labelled
VCC, = 9 V here.
The analysis of PHY107 (equation 6.6) showed that the voltage gain of this
circuit is
AV = vc / vbe = - gM .Rc .3.1
= - 40 Ic Rc,
where gM, the transconductance, is = 1/re = 40 Ic via the ideal diode equation.
We set the gain by choosing the bias resistor (the1.8 M) to fix Ib and hence Ic
since Ic = hFE Ib.
This circuit will work, but it has two undesirable features. The gain depends
on hFE, which varies greatly from transistor to transistor, and also on re, which
depends on the quiescent current (the operating point) and on temperature.
The 40 in 3.1 is an approximation to the room temperature value of e/kT, and
hence falls as T increases, so re increases.

3.1 A usable common emitter amplifier

Lets look first at the effect of the addition of a resistor RE between emitter
and ground, which might avoid the re problem. Here is the circuit.
VCC

It turns out, as we will see that this does several things. It stabilises the
current through the transistor; it increases the input impedance; but it reduces
the gain.

14

How does it stabilise things? Imagine that the collector current increases
because of temperature. Then the voltage drop over RE will also increase.
Supposing the base voltage wrt ground is fixed somewhere around 0.6 V (we
will see how to do this in a moment), then the base emitter voltage will fall,
taking this junction closer to being off and reducing the current. The collector
current drops back towards its original value. This is an example of negative
feedback, which always stabilises systems.
What is the voltage gain now? The argument is much as before,
remembering lower case letters are a.c. amplitudes. The base voltage (wrt
ground) is
vb = ve + vbe = ie (RE + re)
where vE is across RE. The output a.c. voltage (vce) is
- ic RC,
so the voltage gain is the ratio of these
AV = - RC / (RE + re) .3.2.
This is the same as equation 3.1 when RE becomes small compared with re as
it should. Recall that re is, typically, a few ohms. We will see shortly that RE
may need to be a few k, so the result of including this resistor is to drop the
gain quite a lot. However, we are now able to separate the gain from the
transistors dynamic resistance re, which is both temperature dependent and Ic
dependent, to make it only depend on the values of RC and RE.
The other thing RE does is to change the input impedance. We would like this
to be high, so our amplifier does not draw too much current from its source.
Z in = vb/ ib = (RE + re)ie / (ie/hfe) = (RE + re) hfe RE hfe , 3.3
where I have approximated ie = ic (equivalently that hfe >> 1). Remembering
that re is small, even a modest value for increases the input impedance
greatly. With RE say thousands of ohms, Zin is a fraction of a M. It does,
however depend on the variable parameter hFE.
I mentioned two other amplifier parameters, the current gain and the output
impedance. The first is very simple, since
Ai = ic / ib = hfe .. 3.4;
(hfe rather than hFE is fussy, but right) this is still transistor dependent. The
output impedance is a messier calculation, but it turns out to be approximately
RC, so long as this is not too big. This is because this resistor is effectively
(for ac signals) across the load (output) for the reasons discussed in 1.3, and
RC, being quite low value shunts any others.

15

What happens when we add an external load RL? This shunts the output
impedance, i.e. is in parallel with Zout RC, so that in expressions like 3.2, we
should replace RC with the impedance of RC and RL in parallel. This is a
reminder of why we would like amplifier stages to have relatively high input
impedances, so they have a small effect on those feeding into them.
This deals with the effects of RE. We were also worried about the way we set
the base bias. In the simple circuit, our decision to fix the base current left us
exposed to variations in hFE. It turns out that if we fix the (quiescent) value of
Vbe, then transistor to transistor variations are less acute. We can set this
voltage with the simple voltage divider, where the relative values of R1 and R2
set the base voltage bias. We will want input and output capacitors to isolate
the dc, quiescent settings from the ac signals.

VCC
RC
R1

R2

RE

Example: design an amplifier of this kind

The spec says the supply is 15 V, IC is 0.5 mA (remember that our power
supply has its limitations) and the transistor has hFE =100. We want the
maximum voltage output swing, a gain of 6.7 and the circuit should work
down to at least 1 kHz.

i)

The first step is the choice of RC. From what we said above (c.f. the
output characteristics), we want the base collector junction reversed
biased, so VC > 1.6 V. In order to get the maximum a.c amplitude,
we should aim to operate at a quiescent value half way between
this minimum value and the maximum provided by the supply.
Then the output can swing by (15 1.6)/2 V = 6.7 V. Since the
collector current is 0.5 mA, RC must be 6.7 / 0.5 = 13.4 k.

16

ii)

Next we calculate RE. This is RC / gain = 13.4 /6.7 = 2k. We

need to keep RE big enough to maintain the thermal stability, at
least 0.1 RC,

iii)

Designing the divider. Now the voltage on the base is = Ve + Vbe =

2000x 0.5x10-3 + 0.6 = 1.6 V. This is what we want from our
potential divider, so
Vb = VCC R2/(R1 + R2)
So, roughly R1 is about 10 times R2 since VCC =15 V. We know the
exact ratio from the above equation. Actually, this is only exact if
the presence of the transistor makes no difference to the divider,
which is so if the input impedance of the transistor is much greater
than R1||R2, meaning the parallel resistance of the pair (remember
1.3). For all practical purposes, this is R2, since this is the smaller
resistance. Thus we want
hFERE = 200 k >> R2.
A factor of ten for the >> will do fine, so put R2 = 20 k. With this
value we need R1 = 167 k. Note also the current down the divider,
15 / (167000 + 20000) = 80 A is much less than the design IC of
500 A.

iv)

Finally, what input capacitor? In the absence of the biasing divider,

we would just go for 2fCZ in >> 1 = 10 say, but is this OK? No,
because we deliberately made R2 << Zin. R2 provides the capacitor
discharge path. Thus, with f = 1kHz, we get C = 80nF.

We can now calculate the current and power gains, using equation 3.4. We
get
Ai = hfe = 100, and hence Ap = 670.
The input impedance in the absence of the divider is RE hfe from equation 3.3,
but with the divider is Zin || R1||R2 R2. The bias resistor lowers the input
impedance and effectively determines it. If we want to increase it we need to
scale up R1 and R2 together, and decrease the input capacitor by the same
factor to keep the same bandwidth. However, remember that R2 has to be
<< REhfe, about 200 k, so unless we increase RE we have a problem in
getting a higher input impedance. Increasing RE decreases the gain,
however.
A CC version of this circuit is at lecture2/CEamp1.cyt. The output capacitor
blocks dc. At 1 kHz and 100mV input we measure a gain of about 6.2 about
as expected. We get the same gain at 10kHz. If we go down to say 100 Hz,
well below our design frequency, the gain drops to about 3.9. We would need
a bigger input capacitor to work at these frequencies.

17

We can also measure the input impedance i.e. vb / ib. I did this by putting a
small (10, to little to affect the base bias) resistance into the base
connection to find the voltage drop across it with the scope, and hence ib. I
got 21.7 k, close to R2 = 20k as expected.
Finally, what about the maximum voltage output? We had designed for a
amplitude of 6.7 V, i.e. a maximum input of 1 V given our calculated gain of
6.7. The CC model with that input shows significant distortion: the output is
asymmetric, with a maximum of 5.2 V and minimum of 6.2. The negative
going part of the output is evidently not distorted, but the positive side is being
limited. bearing in mind the negative sign of the gain, the distortion is
occurring on the negative swing of the input, as we would expect from the
discussion of PHY107.

3.2 Variations on the common emitter amplifier circuit

What to do about the low gain? Well, we can separate out the thermal
stability problems, which are essentially due to dc (quiescent) currents, from
those of decreased gain by directing ac and dc currents in different directions.
If we put a capacitor across RE we can short it out (by-pass it) for ac,
increasing the gain to that of equation 3.1 ( RC / re) for ac signals, leaving the
quiescent voltage and current (the operating point) stable for dc values. For
this to work, 2fre >>1 (see 1.2). An alternative strategy is to use several
amplifier stages, one after the other. Perhaps surprisingly, the latter may be
the cheaper way.

RE

This does leave the gain dependent on the variable parameter re. We can get
around this by only by passing part of RE, by splitting it into two resistors and
only bypassing the ground side one.

18

RE2

RE1

Now the gain is

-RC/ (RE2 + re) -RC/ RE2,
and we have control of the gain so long as RE2 >> re. The latter is about
1/ (40IC) = 50 , so say RE2 = 500 , giving a voltage gain of 13.4 / 0.5 =
26.8. RE1 then makes up the resistance to the original RE of 2 k, so is
1.5 k. Of course, the by pass capacitor has to present a low impedance
even at the bottom of our bandwidth, 1 kHz, so 2x1000x500C >>1, or C
0.33 F.
The other route to higher voltage gain is to cascade amplifier stages. As you
would expect, the overall gain is the product of the individual stages. We
have to make sure that the coupling capacitor between each stage has a low
impedance at the lowest working frequency compared with the input
impedance of the next stage. The calculation is as that in section (iv) above.

19

4 The common collector configuration

These are typically circuits with low voltage gain but high power gain; the are
impedance converters.
4.1 The simple emitter follower
We will see the properties and use of this circuit shortly. Its unbiased
essentials are shown below.

There are two differences between this and the common emitter circuits we
have been looking at: there is no collector resistance, and the output is
between ground and the emitter.
As before, we will want the two gains and two impedances. What about AV?
The transistor acts (for ac signals) like a resistance re, and this is in series
with, with the signal across the latter. So we have a voltage divider, and the
voltage gain is
AV = RE / (RE + re) < 1. 4.1.
A voltage gain of unity does not sound promising, but wait. At least one can
now understand the name of emitter follower, since the emitter voltage output
follows the input.
This circuit on the input side is exactly the same as the common emitter, so
Z in = (R+ re) hfe RE hfe, 3.3.

The current gain

Ai = - ie / ib = - (1 + hfe) - hfe.
This is very similar to the result for the common emitter, apart from the
involvement of ie rather than ic. This is also the reason for the change of sign;
before, both collector (load) and base currents were into the transistor and

20

therefore in phase, whereas now the emitter (load) current is out of the
transistor and out of phase with the base current. In the common emitter
case, it was the voltage output that was out of phase (negative AV).
Finally, we need to calculate Zout. There is no RC to dominate it as in the
common-emitter, and you might think, given the picture above, that this will be
RE||re. This certainly makes a contribution, but there is another and more
interesting part. Suppose the input is represented in its Thevenin form of a
voltage source (voltage vs say) and resistance rs in series. How does this
affect the output impedance?

rs

RE

With open circuit output, we have

i) voc vs (remember this is ac, so no contribution from the 0.6 V
across the diode, but we are neglecting the voltage drop across rs)
ii)

with the load shorted, isc = (1+ hfe) ib, and

iii)

ib = vs /rs.

Hence the output impedance

Zout = voc / isc = rs / (1+ hfe) rs / hfe .....4.2
This term generally dominates the contribution from re. So we have shown
that this circuit has a low output impedance compared with the impedance of
the circuit feeding it, which is reduced by hfe, typically over a hundred.
So what have we got? A circuit with unit voltage gain, useful current gain via
a low output impedance. With a unit voltage gain and lower Zout, the current
must increase.
Where do we use such a circuit element? Two possible cases follow.

21

a) We want high input impedance

Two examples
i)

We have a current source (the signal is proportional to current, as in

a photo-detector, where each incoming photon produces an
electron). We pass this current through a high resistance to get the
biggest voltage, and so need an amplifier with a high input
impedance to avoid shorting this out. Having lowered the
impedance, we can then use standard amplifiers with smaller input
impedances.

ii)

Suppose such a detector has to be wired to an amplifier a little way

(a few meters) away. We want a big resistance R for the reasons
above, but any cable has capacitance C (ordinary 50 ohm co-axial
cable has about 100pf/m) and this produces an RC time constant
(5ns/m) which may limit the upper band-pass of the system. We
need to keep the effective resistance low, and we can do this with
our emitter follower: R is the output impedance of the circuit.

b) We want low output impedance

Our output is into a low impedance system, an obvious example being
loudspeakers or some other electromechanical device.
So we use the emitter follower chiefly as an impedance changing stage, or
current amplifier, tolerating the lack of voltage gain. After our design exercise,
we will look at some of the issues raised by requirements a) and b) in turn in
section 4.2.
Example: design an emitter follower

R1

RC

R2

RE

As before, we need to look at the biasing with the aid of a numerical example.
Suppose the power supply produces = 10 V, that hfe =100 and the desired
quiescent current is Ie = 2.5 mA.

22

As in the earlier common emitter example, we are going to work as a class A

amplifier, centred halfway along the flat part of the output characteristics.
Thus we fix the quiescent voltage Ve at half VCC. This determines RE via
RE = VCC/ (2 Ie) = 10/ (2x2.5x10-3) = 2 k.
Also Vb = Ve + Vbe = 5.0 + 0.6 = 5.6 V, and
Ib Ic / hfe = 3.10-3 / 100 = 30 A.
Ive assumed here that the input characteristic shows that Vbe=0.6 gives Ib =
30 A. Notice Vb is close to half the supply voltage, and higher than in the
common emitter amplifier.
We can now design our divider. The criteria are much as before: we want it to
set Vb = 5.6 V, but not be perturbed by the transistor input.
The divider has to set Vb = 5.6 V, so
R2/ (R1 + R2) = 5.6/10 = 0.56.
In addition, the voltage dividers Thvenin resistance (R1||R2) has to be << Zin,
otherwise the input lowers the effective divider resistance. With our usual
safety factor (for the <<) of 10, we have
R1R2/ (R1 + R2) = Zin / 10
= RE hfe /10
= 2x100/10 = 20 k.
Thus R1 = 20 /0.56 = 36 k and R2 therefore 45 k. The bias chain current is
10 / (45+36) = 124 A, small compared with the emitter current. The input
capacitor is determined in the usual way, making C big enough to present low
impedance to ac at, say 1 kHz, i.e.
2fC(R1||R2) >> 1

or 2fC(R1||R2) =10, giving C = 80 nF.

Here is the working circuit EmitterFollower. The output R and C are just there
to provide a load and segregate the ac as before. Notice the near unit gain
(positive, in phase).
Just because these bias resistors have to be small compared with Zin, they
will inevitably decrease the prized high input impedance of the emitter-follower
to around R1||R2, i.e. by our factor 10. Lowering this factor turns out to lower
the thermal stability, the reason for this choice of biasing. Can we get the
high input impedance and the stability together?
4.2 Bootstrapping
Looking again at the impedance problem, it occurs that there are really two
things going on here. One is the need not to shunt the bias resistors
23

significantly under dc conditions, the other the wish not to short out Zin by the
bias resistors for the ac signal. Perhaps we can avoid the problem by treating
ac and dc differently.
Suppose we take the same circuit as above, but add a link between the base,
emitter and bias chain as shown. For the moments the two new components,
which we will call RB and CB have not yet had their values fixed. Note the
absence of a connection where the input crosses the bias chain.

Think first about the dc circuit by mentally removing the capacitors, leaving a
break. The circuit looks like

the only difference compared with the non-bootstrapped circuit being the base
resistor RB = 10k.
The Thevenin resistance of the new divider turns out unsurprisingly to be
(R1||R2)+RB. This is the dc impedance as seen from the transistor base. In
our example of 4.1, we set this equal to 20 k to be much less than Zin.
Because of the extra resistance, we can lower the values of R1 and R2 by a
common factor of 2, say, which leaves the fraction of the supply voltage on
the base unchanged since
Vb = VCC.R2/(R1 + R2).

24

Suppose we round these values to R1 = 18 k and R2 = 22 k, we get Vb =

5.5 V and R1||R2 = 10 k (half the previous value, of course). Thus we can
make RB = 10 k also and get our earlier total of 20 k. So the dc bias is
sorted.
What about the ac signal? Suppose we have chosen C so that its impedance
is low at the signal frequency. With a signal voltage at the top of RB equal to
vin say, the voltage at the bottom of it is the same as the output voltage AVvin.
So the voltage drop across RB is vin(1 AV), and there must be a
corresponding current
iB = vin(1 AV)/ RB.
Dont confuse this current with the base current ib. If we look out from the
base, we see a voltage vin and a current, so the effective impedance seen by
the base is
Zeff = vin/ iB = RB / (1 AV)
which looks promising since we want Zeff large and it will be since AV is close
to 1 and hence the denominator is almost zero. Well get a value for it in a
moment, but just recall that before we modified the circuit, the impedance we
are now calling Zeff was the Thevenin resistance of the divider R1||R2. We
were forced to fix this at 20 k to meet the dc bias requirements.
Lets look at the expression for Zeff by substituting for AV from equation 4.1:
AV = RE / (RE + re) . 4.1.
From this, 1 AV
1 AV = rE / (RE + re),
and so
Zeff = RB(RE + re) / re RB.RE / re .....4.3
since re << RE. From the reminder about PHY107 in 3, we know that for an
ideal diode model re = 1/(40 IC) = 1/(40x2.5.10-3) = 10 . This means that
Zeff = 10.103x2.103 /10 = 2.0 M. It is indeed large, much larger than the
20k of the earlier circuit. However, we should not get too excited, since this
impedance is in parallel with Zin RE hfe = 2.100 = 200 k. What we have
done is to prevent this being shunted by the bias resistors. In this circuit,
unlike the biased emitter follower without bootstrapping, Zin is the true base
input impedance and is handily high.
In a now familiar procedure, we fix the value of CB by making sure its
impedance is low compared with RE at the lowest frequency we want to work
at, i.e. 2f RE CB =10. With RE = 2 k and f = 1 kHz, we find CB = 800 nF.

25

Our circuit simulation is Bootstrap. Measurement of input impedance using

a10 resistor in the signal line gives 140 k at 1 kHz.
To improve the input impedance further, now we have separated out the
effects of biasing, means we must find higher base impedances.

4.3 The Darlington connection

This is an arrangement of a pair of transistors T1 and T2 that can be used in
bootstrapping circuits. It looks a bit like an emitter follower with RE replaced
by a second transistor:

T1
T2

I shall not give the detailed analysis, but it will not surprise you that this pair
acts as a single transistor which has
i)
ii)

a first base to second emitter voltage drop of about 2x0.6 = 1.2 V,

and
an overall current gain hfeoverall = hfe 1. hfe2. Here the two transistors
are referred to by superscripts.

If we now add a resistor RE to the emitter of T2, we have an emitter follower

with
a) base impedance Zin = hfeoverall RE (compare equation 3.3), and
b) an output impedance Zout = rs / hfeoverall
Because of the multiplication of gains, hfeoverall is large, at least 1.104 and
maybe105. For example, if both hfe= 100, and RE = 2 k, then the voltage
gain is about 1 but the current gain 104. The product, the power gain is also
104. Zin = 20 M and Zout down by 100 of the single transistor value.

26

Real Darlingtons (they come in a single package, though we can hand-make

them) have a resistor between the emitters of the two transistors. One thing
this does is to provide a discharge path for the charge on T2 when T1 is turned
off; otherwise this switch off is slow. It also provides a route for T1s leakage
current, so that this does not switch T2. It keeps the drop over RBE less than
the diode drop, so the leakage current will not turn T2 on. Values of RBE range
from a few k for small signal Darlingtons to a few hundred Ohms for power
Darlingtons, the latter having much larger leakage currents
Thus including the external emitter resistance, the basic circuit looks like

RBE

RE

Here is a biased circuit using a Darlington pair. This one is designed around
a pair of VC109 transistors each with hfe =250. The 10 k resistor is the one
mentioned in the previous paragraph. The standard bias resistors shunt the
base input impedance of (hfe)2 RE= (250)2x3.3 k = 200 M to 330||330 =
165 k.

27

The simulation is at DarlingtonPair. The measured Zin agrees within the

measurement errors (I made it 140 k).
4.4 Bootstrapped Darlington pair
The Darlington pair is a common configuration in all sorts of circuits, and we
can use it directly in our quest to get a high input impedance emitter follower.
We should use a Darlington pair in place of a single transistor in our
bootstrapped emitter follower.
The circuit below is the bootstrapped version of that in 4.3 above. Though
the bootstrapping arrangement looks a little different from that in 4.2, it is the
same. The value of the resistor RB is chiefly limited by the need not to upset
the bias chain, so we have used 10 k, a good deal less than the 330 k
pair. The other10 k between the two transistors is part of the Darlington.

The simulation is at Bootstrapped Darlington.

The impedance of the chain seen from the base of T1 with bootstrapping is
using equation 4.3 of 4.2.

RB.RE/ re

To find re we measure the emitter current Ie Ic from the simulated circuit via
the voltage over RE, and then using re = 1/(40 Ic), the ideal diode result. I
found re = 25 and hence the impedance
= 10x3.3/25 = 1.3 M.
The base impedance looking in is, as above, 200 M, much greater than this,
so the input impedance is about 1.3 M. The measures value in the
simulation is just this.

28

Having pushed up the base impedance with the Darlington, we are still in the
situation where the bias resistors are setting the input impedance, but
because we are bootstrapping, we have made this contribution much bigger
(factor 8 in this example, 1.3 M compared with R1||R2 = 165 k). Anything
over a M is a respectable input impedance for many current sources like
photomultipliers, photodiodes etc.

4.5 Current mirror and transistor biasing

We have spent a whole talking about the biasing of the common collector
transistor, but have only used resistors to do it. It is also possible to bias
using transistors., and this is particularly helpful if we use a pair or identical
transistors, one to bias the other. Though I am not going to look at this in
detail, the advantage comes about because they both (being identical)
behave in the same way to changes of temperature. We can use one to
produce just the right base voltage for the other.
The circuit we are going to look at uses this characteristic. It also uses (for a
change) p-n-p transistors, but again in the common collector connection.
Finally, it produces a current source, and this leads us to think about output,
rather than input impedances. Its called a current mirror and at its simplest
looks like this.

The simulation is at Current Mirror. Since they are p-n-p transistors the
emitter is positive.
Think of it in two parts, the left and right sides, and start to understand it by
looking at the left first. There is no emitter resistance and the base is
connected to the collector. We then have a variable collector resistance to
ground.

29

Since the base and collector are common, Vce = Vbe 0.6 V. Then, with a
101 k resistance, there is a collector current Ic = (15-0.6)/101 mA = 143 A.
In fact, Vbe is exactly 0.6 V at this current, so the left hand ammeter reads
143 A. Of course, as we lower the resistance the current increases, with a
small increase of Vbe. The 1k resistor prevents the current getting
damagingly large. The maximum current is 14.3 mA at Vbe = 0.7 V. You will
recall the input characteristic Ie vs.Vbe. We could plot the load line
R Ic = 15 - Vbe on it to determine Vbe, but the main point is that the latter
depends on the current.
The base voltage of the left-hand transistor is just that needed to produce the
current we have set by the variable resistor, so the right-hand chain will
produce exactly the same current; it mirrors the left. To about 2%, the
simulation does this when then right-hand resistance is zero.
You can see very clearly that we have a current source by varying the righthand resistor. Whatever value between 0 and 1 k is used, the current stays
fixed where we have set it. However, if we use a 10 k variable resistance
we start to hit the limits of the circuit. We find that roughly when the
resistance in the left chain is less than that on the right, the mirror starts to fail.
The reason for this is straightforward: the current on the left is (VCC Vbe)/
Rleft and that on the right (VCC Vbe - Vbc)/ Rright. Since Vbc (which is 0 only on
the left) Rleft cannot be less than 0 on the right, we can only get equality of
currents whilst Rleft > Rright.
The right and left currents are not quite equal since identical small currents
flow (out, since these are p-n-p transistors) from both bases, and these can
only go to ground via the base-collector connection on the left leg. Thus the
left current is bigger than the right one by a factor 1+ 2/ hfe.
For lower resistances though, we have a good current source, that is one with
an output impedance close to infinity so that the addition of a load in series
has little effect on the current.
Ive not checked this out with real transistors, but some books suggest the
impedance is not as high as here, with maybe 25% variation in current over
the compliance range. If so, it maybe that CCs output characteristics are
flatter than real ones.
There are many variants on this simple circuit, including some that increase
the output impedance with, for example, a couple of 1 k emitter resistors.
Control of a current by a current is much used in integrated circuits, largely
because a single resistor (generating losses and heat) can run many mirrors
to set up different operating currents. The overall heat savings are valuable.
Its worth noting that identical transistors are most easily achieved on a single
piece of silicon.

30

4.6 Push pull amps and amplifier operation classes

In our earlier designs of amplifiers, for example the common emitter amplifier
of 3.2, we decided to set the collector current such that the quiescent Vce =
to about half the supply voltage in order to get the greatest range of signal
output voltage swing on the flat part of the output characteristic. Here the
collector current is fixed by the base voltage or current, whatever the collector
voltage, though only exactly if the curve is flat.
We can plot a load line to find the quiescent operating point, since
Ic = (VCC Vce) / Rc.
We normally have a load RL between collector and ground for a common
emitter amplifier, segregated by a capacitor, so there is an a.c. load line that
shares a common quiescent and zero signal point, but has reciprocal slope
RL|| Rc as shown. To stay on the flat bit, Vce must not reach VCC (otherwise
clipping occurs), nor drop below a few tenths of a volt into the saturation
regime.

31

This is called class A operation, and offers low distortion. The main price is
the power drain caused by the non-zero quiescent current, always on
whatever the signal. This applies to both common emitter and common
collector class A amplifiers.

32

There are less power hungry solutions if we can accept some distortion. One
of these is the push-pull amplifier, working in what is known as class B. We
bias the amplifier so that with no, or negative signals, the transistor is off. The
quiescent current is then zero and power likewise; but the distortion is horrid
because we are only amplifying the positive part of the signal.
The answer is to use a pair of transistors, one to handle the positive part of
the cycle and one the negative. We use a complementary pair, one p-n-p
and one n-p-n with matching characteristics. The circuit is as below, with p-np at the bottom. It is a power amplifier, with the usual near unit voltage gain
of emitter followers but a current and hence power gain of about hfe
Notice that the supply is symmetric, not grounded (standard notation is VEE for
the emitter side supply) and that as a consequence the oscillator and speaker
are earthed to the centre point of the supply. The simulation is at PushPull.
Note VEC VCC as here are no collector resistances.
VCC

-VEE
As the signal voltage swings from positive to negative, first one transistor then
the other conducts. There is a time, though, when neither is conducting, that
is when then signal magnitude is less than the diode voltage required to turn
on the transistor The output is about 0.7 V less than the input, i.e. a gain of 1
with a diode drop of 0.7 V. There is significant distortion because of the loss
of the first 0.7 V of the forward and reverse swings, or if you like because of
the non-conducting period mentioned above. This is known as cross-over
distortion, and is the price we pay for low power class B operation.
It is not difficult to improve things by getting rid of this of period. We add a
pair of resistors and diodes as shown below. The resistors bring the diodes
in forward conduction, each with a diode drop across them, so the base of the
upper transistor is a diode drop above the signal and the base of the lower
transistor a diode drop below the signal. Now as the signal goes through zero
conduction switches immediately from one transistor to the other.

33

with the simulation at PushPullAB. This shows that the diodes have done
their stuff and there is no non-conducting period at cross-over. By eye, there
is little distortion. You might want to tweak the system to make sure the diode
and transistor drops were as close as possible by adjusting the chain current.
The other point to watch is that the resistors are low enough to provide the
base current necessary for the collector current amplitude required. On the
other hand, we must not let the base current get so high we destroy the
transistor.
We can check out these numbers by noting we have a voltage amplitude at
the speaker of about 2 V. This is across the speakers impedance of 15 , so
the collector current amplitude is 133 mA. With hfe= 100, ib is 1.3 mA. The
current through the resistors is (18 - 1.2)/10000 = 1.6 mA, which is just big
enough to allow the swings. With an input of 3 V (ib = 2.0 mA) we get serious
clipping.
5 Frequency response
As I said earlier, all amplifiers have some limits on the frequencies they can
handle. An audio amplifier might give nearly constant gain from 15Hz to 30
kHz, rolling off at frequencies above and below. A telecoms amp might only
need to deal with frequencies close to 10 GHz. The details of these two
amplifiers will be very different, but they will both have limits to the frequency
range over which the gain is constant, and beyond which the gain falls. The
details of their frequency response may again be complicated, but usually
bandwidth is set by capacitance effects.

34

5.1 R and C together

i) If we just discharge a capacitor originally at V0 through a resistor R we find
that the voltage at time t is
V =V0 exp (-t / RC) V0 exp (-t /0).
After a discharge for the characteristic time, or time constant 0, the voltage
has fallen by e-1 = 0.368.
ii) A capacitor has impedance 1/(2fC) at frequency f. This is equal to R
when 2fC R =2 f 0 = 1.
iii) The impedance of a resistor and capacitor together in series is
(R2 + 1/(2fC)2)1/2 = R (1 + 1/(2f0)2)1/2.
i.e. they add in a Pythagorean way.
If you have not met these results before, dont worry about the proof. There is
more to ii) and iii) than I have said.
5.2 The low frequency limit
Suppose our amplifier has input impedance Rand the signal comes in through
a segregating capacitor C. Then the voltage input is across R of the divider,
and the fraction of the signal that goes into the amplifier is
R / (R (1 + 1/(2f0)2)1/2 = 1 / (1 + 1/(20f)2)1/2........ 5.1
This looks roughly like
fig
In the low frequency limit, 5.1 approximates to

linear in frequency.

2f0, 5.2

This is why the amplification falls at low frequencies: the impedance of the
capacitor gets bigger and most of the voltage falls across it and not across the
input of the amplifier. Of course we need the capacitor to separate the a.c.
signals and d.c. bias, so we will need larger capacitors to get to lower
frequencies. We did these sums before when we required 2RCf >> 1 = 10
say to make the input impedance (R here) dominate the divider.
The fall off is often characterised by the frequency at which the gain has fallen
by 3 dB. That is where the power, which goes as v2 has fallen by 50%. The
dB is a log measure = 10 log10(fractional power) or 20 log10(fractional voltage),
35

so at 50 % power the dB = 10 log10(0.5) = -3.01 -3, a fall of 3dB. From 5.1,

this happens when the denominator doubles, i.e. when
2 f 0 = 1.
So with an input impedance of 10 k and a 1 F capacitor the 3dB point is at
1/(2104.10-6) = 16 Hz.
Because of the extra factor two in the voltage ratio/dB definition, the
difference between power and voltage is taken into account and the 3 dB
points are at the same frequency for both.
Series capacitance determines the low frequency limit. If we go to the low
frequency region where the gain described by equation 5.2, and ask how
many dB we increase in an octave (a doubling of frequency), we get
20log10(2/1) = 6 dB/octave (positive, rising with f).

5.3 The high frequency limit

From the above, it sounds as if a high frequency roll off might be due to
looking across the capacitor in a different R + C divider. If so, the input
voltage is
(1/(2fC) / (R (1 + 1/(2f0)2)1/2 = 1 / (2 f0 (1 + 1/(2f0)2)1/2)
1 / (2 f0) 5.3
at high frequency, falling with frequency as expected at 6dB / octave. The
upper 3 dB point is at a frequency given by
2 f 0 = 1 ..5.4
again, remembering this is a different 0 to that at the low frequency end, the
product of a different R and C. Where do these quantities come from?
The trouble at high frequencies is that even small capacitances present low
impedances because of the inverse frequency dependence. At 100 MHz, for
example, a 5 pF capacitor has an impedance of 320 . Capacitors can be
produced unintentionally between components; there do not have to be
parallel plates separated by a dielectric. Two wires running close together will
produce capacitance, as will the structures in the contacts of transistors.
These we can minimise with careful layout and design. There is also inherent
capacitance in the junctions of the transistor, which will comes as price for the
desirable properties of the device. All of these will play a part at high
frequency. Schematically, the amplifier looks a bit like

36

Rload
Ccb
CL
Rin

Cbe

Rin and Rout are the source || input resistance (RS||hfeRE) and load || collector
resistors (RL||RS) respectively and CL is the combination of a discrete output
capacitor and the stray output capacitance. The other two capacitances are
due to the transistor junctions and do not correspond to a discrete component.
Their values depend on operating conditions, in particular on IC. Cbe also
includes any stray input capacitance. There are several RC combinations to
worry about, and the usual approach is to look at output and input sides
separately, to see which provides the bandwidth bottleneck.
On the output side we have (RL|| RC) (CL + Ccb), noting that the capacitors are
in parallel like the resistors, but parallel capacitors add (like series resistors).
We also see this capacitor Ccb on the input side. It effective value, though, is
enhanced by the amplifier gain to Av C cb, a result known as the Miller effect.
Notice that the input impedance for the common emitter amplifier is about
RE hfe RE Av (equation 3.3). However on the input side Rin is usually
dominated by the source resistance (<<RE hfe ) and so
in = RS (Av C cb + Cbe).
So with a 1 k load, much less than RC, RS = 50, negligible load
capacitance, Cbe = Ccb =5 pF, AV = 100 and RE = 2k , we have
out = 5 ns and in = 25 ns.
In this amplifier the input side would limit the upper 3 dB point to
in (25 + 5) ns, or a 3 dB point of about 5 MHz. For serious high frequency
working (GHz) we need to avoid the Miller effect, and happily there are ways
of doing this.
One approach is to use a low gain, low output impedance stage like an
emitter follower to produce a low source resistance for an subsequent

37

common emitter amplifier. Other solutions involve common base amplifiers,

which show intrinsically negligible Miller effects.
6 Differential amplifiers
Differential amplifiers have two inputs and produce an amplified version of the
voltage difference between them. They are widely used. Suppose the two
signal wires both pick-up stray mains at 50 Hz, but also have another time
varying signal difference between them, then the differential amplifier will only
amplify the signal, not the 50 Hz. Sometimes long leads from signal sources
are inevitable as in ECGs. We want to amplify the heart muscle signal, not
mains pick-up. Balanced (differential) signals are also common in audio and
radio frequency applications. They are also used in low frequency (essentially
d.c.) amplifiers, where the thermal stabilisation biasing normally done with
capacitors cannot be applied because the capacitor values would need to be
enormous. Instead, the symmetrical nature of the circuit compensates for
thermal drifts, Finally, as we will see shortly, they are at the heart of
operational amplifiers.
One key parameter is the common mode rejection (CMRR). Common mode
means that part of the input signal common to both, for example the 50 Hz
above. We want the subtraction or difference action to remove all of this. The
CMRR is the ratio of normal mode (the sought-after difference in input
voltages) to common mode in the output, often expressed in dB.
The basic, unbiased circuit is below. It has strong left-right symmetry.
VCC = VEE. The two signals are applied between the bases and ground, and
the output from collector and ground (spoiling the symmetry slightly). Though
the labelling distinguishes the two collector resistances (1 & 2), they have the
same value; and likewise the two emitter resistances are the same.
Having seen the circuit, its alternative name should come as no surprise: the
long tailed pair.
Suppose that the signal on one input is vcm + vnm/2, and on the other
vcm - vnm/2, i.e. the normal mode (that we care about) is equally split between
the two inputs and is in total the difference between the two vnm.

38

VCC
RC1

RC2
out

signal 1

RE2

RE1

signal2

RT
-VEE

To understand what happens, lets look at the voltage at base1 (left)

measured from the bottom of RT
vb1 = RT( iE1 + iE2) + iE1(RE1 + re1).
The first term comes about since the currents from both sides flow though RT.
Similarly
vb2 = RT( iE1 + iE2) + iE2(RE2 + re2). .........6.1
The difference is base voltages is then
vb1 - vb2 = iE1(RE1 + re1) - iE2(RE2 + re2).
Up to this point we have not assumed that all the transistor and resistor
values in the two halves of the circuit are the same. In reality they will not be
identical, but lets now suppose they are. Thus
vb1 - vb2 = (RE1 + re1)( iE1- iE2)........6.2
Now vb1 - vb2 = vnm, and by symmetry for the normal mode with its equal and
opposite voltages iE1 = - iE2 , so
vnm = (RE + re) 2 iE,
the subscripts 1 &2 dropped because of our assumption of symmetry. So
both emitter currents depend on the voltage difference. We have got the
differential bit of differential amplifier. What about the gain? We need to
know the output, which is
= - iC RC - iE RC = - vnm RC /(2(RE + re)), .....6.3
so the normal mode or differential gain is

39

Adif = vo / vnm = - RC /(2(RE + re)). .....6.3

By symmetry, the common mode signal produces iE1 = iE2, equal to each
other but not the same as iE in the previous paragraph. From equation 6.2 the
common mode produces no voltage difference between the bases. However,
there is an output, since from equation 6.1
vcm = vb2 = iE (2RT + RE2 + re2).
This gives an output
vocm = = - iC RC - iE RC = - RC vcm / (2RT + RE2 + re2).....6.4,
so the common mode gain mode is
Acom = - RC / (2RT + RE2 + re2). .....6.4a
This shows what RT is for. The output is non-zero because we are using
what is called a single-ended output, that is from one collector only. The
symmetry is lost through this choice. We could have used a double-ended
output, between the two collectors, and in this case, if all the left and right
hand components are perfectly matched the common mode output would be
zero. Single-ended outputs are more common despite this disadvantage,
because one side of the output is conveniently at ground.
We usually express the result 6.4 in terms of the CMRR, defined as the
output ratios for normal and common mode when the two input voltages are
equal, i.e. vcm = vnm. Then the ratio of equations 6.3 and 6.4 give
vo / vocm = CMRR = = (2RT + RE + re) / (2(RE + re)) RT / (RE + re),
the approximation working since RT has to be large to get a high CMRR.
The required high value hints at a slight problem, in that RT has to carry the
emitter current of order mA, and this seems to need rather large supply
voltages, e.g. 20 V for 1 mA through 20 k. There is a standard escape from
this, using mirrors, but first lets use this circuit and calculate some values.
Suppose we want a quiescent collector current of 100 A. As usual, we set
VC = VCC /2 = 7.5 V to get the maximum swing. Thus RC = 75 k. RT has to
carry 2x100 A, and has about 15 V over it, so its value is also 75 k. At a
collector current of 100 A, re = 25 / 0.1 = 250 from equation 2.1.
We have chosen 1k emitter resistors to set the gain.
With these values we have from equation 6.3
Adif = - RC /(2(RE + re)) = - 75/(2(1+0.25) = - 30.

40

We could make this bigger (150) by having no emitter resistances, but the
cost would be to lower the differential input impedance fro about 250 k to
50 k. One could of course use Darlingtons to get M impedance. We set
the gain with RE, then sort the impedance.
The common mode gain from 6.4a is
Acom = - RC / (2RT + RE2 + re2) = - 75/ (2x75 + 1 + 0.25) = - 0.496 - 0.5.
The CMRR = Adif / Acom = 30 / 0.5 = 60. In dBs it is 20xlog10(60) = 36 dB.
The simulation of this circuit is at DiffAmp. At opening it is set up with two 10
mV oscillators 180 out of phase. The difference should be 20 mV amplitude,
and the output with a gain of 30 = 600 mV The oscilloscope shows peak to
peak 1200 mV. In phase we measure about 10 mV p-p, or the 5 mV
expected from a common mode gain of 0.5.
It is perhaps worth noting with the simulation that we do not need the resistor
RC1, since we are not measuring the collector voltage here. Power saving!
I mentioned the fact that high CMRR are obtained with high RT, values but this
required high voltages to carry the 2IC. One can replace this resistor with a
current source such as the current mirror we looked at earlier, though there
are alternative circuits. Current sources have almost infinite resistance and
through equation 6.4a this brings down the common mode gain enormously.
In current terms, the current source keeps the sum of emitter currents
constant at whatever value we have chosen, what ever the base voltages, so
the are no common mode collector current changes and no voltage output.
These matching voltage changes across RT do not show up in the differential
output (see, e.g. equation 6.2), and the differential gain remains as before.
7 Operational amplifiers
7.1 Introduction
We have already begun to find out about operational amplifiers, since they are
differential amplifiers at heart. They have though, much higher gains ( 105
106) than our earlier circuits and also lower output impedances. The output
can swing through most of the VCC to VEE (typically 15 V) supply.
What we are going to concentrate on is the application of these integrated
circuits, rather than examining the internal design and detailed operation of
the circuits themselves. We will start, though by having a look at the outside
and inside of a typical mid 1980s example, the LF114. This comes in a mini
Dual Inline Package (mini-DIP), and the picture shows what it looks like.

41

The 7 connections within the 8 pins are shown below. The triangle is the
amplifier symbol. With op-amps the power connections are not normally
shown on the symbol, but we include them here. So we have two (differential)
inputs and one output, plus power plus two offset nulls that we use to trim the
circuit to the symmetric state of the ideal long tailed pair.

The full circuit (from the data sheets ) is quite frightening, with 26 transistors
and three Zener diodes (21 BJTs, 3 FETs, 1 cap and 11 resistors) . The
transistor symbol with three parallel wires like a on its side represents FET
transistors, different from the bi-polars we have talked about and giving
greater input impedances. There are few (3) capacitors; we want this circuit
to work under near d.c. conditions.
42

However, the manufacturers provide a simplified circuit diagram, and this has
some familiar features. We see that in essence we have a differential
amplifier, with a current mirror souce in the tail, followed by a class AB pushpull amplifier. The FETs make the input impedance so high that mostly we
can neglect the input current, which is about 200 pA for an LF114 and less for
more expensive op-amps.

Finally, since we will be using CrocClips to demonstrate op-amps, its

interesting to compare the LF411 with the CC model loosely based on the
industry standard 741 op-amp:

43

Voltage gain
Unity gain bandwidth
Maximum slew rate
Maximum supply voltage
Minimum supply voltage
Output voltage swing
(with 15 V supply)
Output resistance
Short-circuit output current
Maximum input voltage
(with 15 V supply)
Input impedance

CrocClips

LF411

20 000
(86dB)
1 MHz
0.5 V/s
99 V
3 V

200V/mV (2.105)
(106dB)
4 MHz
15 V/s
18 V
4.5 V

13 V
75
25 mA

13.5 V
(h.f.) 40

16 V

15 V
1012

The input notation is (for any op-amp) that the output is positive when the
non-inverting input voltage is bigger than the non-inverting. Hence the
names.

7.2 Feedback
Feedback is used in all sorts of circuits, not just those with op-amps, but it is
crucial in the use op-amps. Part of the output is sent back (fed back) to the
input, which in turn modifies the output. If the feedback is negative, it reduces
the signal in a way that is proportional to the output, and hence reduces the
output still more ... This way we get low gains, which sounds bad until we
remember the emitter follower with its near unit voltage gain. It was
nonetheless a useful configuration.
With positive feedback, which sounds more exciting, we get growth in the
output as the feedback increases the input. But eventually this growth must
stop. This way we get oscillators.
There are many non-electronic examples of feedback, from the processes
that control the global climate to the thermostat in your living space. Left to
itself, the temperature in your room would climb until heat losses to the
outside world matched the input to the outside. If its cold outside, you lose
more heat and the room is colder; warm outside, and low losses make the
inside hotter. With a thermocouple feeding back information to the heater, the
latter can be told to produce less heat when the temperature is high, more
when it is low (note: the usual thermostat is a digital device, but we are
thinking analogue here), The dependence of the room temperature on that
outside is decreased.
This shows three features common to systems with feedback:
44

a) the output (room temperature) is more stable against external

changes;
b) implementation requires a signal from out to input (heater);
c) we are using negative feedback, where a large output produces
a reduced input.

7.3 Feedback and amplifiers

Before we look at the details of connecting op-amps, lets explore a general
model. We have an amplifier with open loop gain A, that is the voltage gain
with no feedback, an input voltage vi and a circuit that allows a fraction of
the output vo to be fed back to the input.
vi
vo

vi - vo

vo

Somehow, inside the first ellipse the fed back and input signals are combined
to feed vi - vo into the amplifier. The minus sign means negative feedback.
Thus, when things have settled,
v = A (vi -vo), or
v / vi = A/ (1 + A)

....... 7.1

This ratio is called the closed loop gain, i.e. the gain with the feedback loop
closed or connected. Recalling that we have an op-amp with a high gain,
maybe 105, then unless is very small then the closed loop gain is 1/.
This assumption about is saying that A >> 1 or 1/ << A; the closed loop
gain is much less than the open loop gain because of negative feedback.

45

7.4 Operational amplifier circuits

Op-amps are differential amplifiers and have two inputs. A positive voltage on
one with the other grounded will produce a positive output. This is called the
non-inverting input. The other, with the first grounded, produces a negative
output, and is called the inverting input. Remember turning a sine wave
upside down is the same as multiplying it by 1 or changing the phase by
180 or .
We usually make a few approximations when we first analyse an op-amp
circuit
i)

infinite open circuit gain;

ii)

infinite input impedance;

iii)

zero output impedance; and

iv)

zero offset, i.e. v = 0 when vi = 0.

These are not exact but helpful. They lead to two golden rules:

I)

The output adjusts itself so the input is zero;

II)

The input current is zero.

The first follows from the infinite gain (i) and the expression vo=A (vi -vo).
With infinite A, the input in the sense of (vi -vo) must be zero. Slightly more
realistically, with the LF411s A = 2x105an output voltage of 10V requires an
input of 10/ (2x105) = 50 V, small enough to be ignored mostly.
The second follows immediately from (ii). The LF411 input impedance is
1012 , so an input voltage of 50 V requires a current of 50x10-6/ 1012 =
5x10-17 A. Thats small!
The other point to note is that we want negative feedback and that means that
the feedback in all (non-oscillatory ) circuits goes to the inverting input. This,
if you like, supplies the negative sign.

46

7.5 The inverting amplifier

This is our first op-amp circuit.
R2
R1
a
vi

vo

The power connections to the op-amp are indicated but not completed. Input
is to the inverting input via R1, with the non-inverting input grounded. We
shall improve on that but it will do for now. Shunt feedback is via R2.
Lets compare voltages at points a and b. According to GR I these are the
same, so a is at ground. This means that
i)
ii)

the voltage across R2 is vo and

the voltage across R1 is vi.

Since according to GR II no current flows from a to b, the net current into a is

zero, that is
or

vi./ R1 + vo / R2 = 0,
closed loop voltage gain = vo / vi = - R2 / R1 ...... 7.2.

The minus sign shows it is an inverting amplifier. One thing needs noting
here: the gain does not depend on the op-amp properties, only on the external
resistors. That is characteristic of op-amp circuits.
If we compare equations 7.1 and 7.2, we see that in this circuit = - R1 / R2
since the closed loop gain is 1/ for A >> 1.
Lets look at what is going on in the feedback process to get this result 7.2.
Suppose, for example that R1 = 10 k and R2= 100 k, giving a gain of 10.
Start with an input voltage of 1 V and an output initially of 0 V. All voltages are
wrt ground unless stated otherwise. The two resistors form a divider of total
resistance 110 k with 1V across it, so the inverting input is at +10/110 = +
0.91 V. With this large inverting input the output is driven negative until it

47

reaches 10 V. Then, there is a drop of 1-(-10) =11 V across the divider.

The inverting input is then 11x10/110 = +10 V above the output, which is at
10 V i.e. at 0 V or ground, the same as the non-inverting input. GRI has been
fulfilled. An output of 10 V is what equation 7.2 predicts, but this is how the
voltage gets to that value.
One other parameter which is easy to determine is the input impedance.
Point a is at 0 V(see last paragraph and GR1), that is at ground. Often this
condition is referred to as a virtual ground. Thus the only resistance seen by
the input is R1, and this is the input impedance. This is sometimes a limitation
on this very simple deign, since we may want R1 small to get a big gain, but
not have a low input impedance. Well see how to sort this in a moment, but
first let us look at a simulation.
Inverting Amplifier
This behaves as expected, with an inverted output given by equation 7.2.
One point that we notice here is that this amplifier works at d.c. without any
need for external capacitors. It also works as an a.c. amplifier
AC inverting amp
Note the inversion and the gain of 10, The gain begins to fall at frequencies >
25 kHz, with a 3dB (down to 70 %) point at about 80 kHz.
7.6 Frequency response
Why does the gain drop off? Like any amplifier, op-amps have a falling gain
at higher frequency, and the shape of this is usually carefully designed by the
makers. The characteristics will include a Bode plot of log A ( A is the open
circuit gain, remember) versus f. We dont have this for the CC chip, but for
the somewhat faster LF411 it looks like
figure 4.31 H&H
Flat only below about 20 Hz, this looks very slow, but remember that the
closed loop gain is given by equation 7.2 so long as A >>1 or A >> closed
loop gain (1/). Thus we get constant closed loop gain until A has fallen to
about this value. Equation 7.1 shows that as the frequency increases further,
the closed and open loop gains fall together.
The plot also shows the fall to unit gain which for the LT411 is 4 MHz (see
table in 7.1). The CC amp is at least 4 times slower. If we had used the
LT411 at a gain of 10 (rather than the 100 shown on the figure), the gain
would have started to fall at about 250 kHz, so calculating a quarter of this for
the CC amp at about 60 kHz, we find rough agreement with the measured 80
kHz. This is all a bit approximate, partly because not all op-amps have this
very linear roll off (on a Bode plot).
48

Faster op-amps exist, and glancing through a data table I noticed that the
CLC203 has unit open circuit gain at 5 GHz. We will see how to drop the gain
at low frequencies shortly.
7.7 Non-inverting amplifier
In 7.5 we got an inverting amplifier, with a rather low input impedance. Its
easy to produce a non-inverting amplifier with a much higher input impedance
using the following circuit.

R1

R2

Notice that the op-amp has been inverted, so the signal goes to the noninverting input. The two resistors are in the same place as before, but R1 is
now grounded.
To analyse, first find va = v0 R1 /( R1 + R2). By GRI va = vin for zero input,
and hence
closed loop gain = v0/ vin = 1+ R2 / R1 ...... 7.3.
It is non-inverting since the sign is positive. The signal only sees the
impedance of the op-amp, which is very high (1012 for the LT411); there are
no resistors in the input line.
The demo is at Non-inverting Amp. With these resistors, equation 7.3 gives a
gain of 11.
There are a couple of modifications one might make for a.c use. If the source
is ac coupled, i.e. just a capacitor then we need a resistor to ground between
the capacitor and the non-inverting input to provide a current path to ground.
Its value will determine the low pass cut-off point in the usual way.
If the source is not ac coupled but we do not want to amplify dc, we might put
a capacitor between R1 and ground. At low frequencies its impedance
becomes large and adds to R1, reducing the low frequency gain via equation
7.3. With R1= 2 k, R2=18 k and C = 4.7 F we have a combined
impedance of R1 and C (they add in a Pythagorean way, recall 5.1)

49

= (R12 + (1/2fC)2)1/2.
If you ignore the 1 in 7.3, on the basis that it only changes the gain by 10%,
then you can find the 3 dB point fast by recalling from 5.1 that 3 dB was a
1/2 fall in voltage, and this will happen when the impedance of capacitor and
resistance are equal, doubling the high frequency total of just R1. In the
approximation the 3 dB point is given by
R1 = 1/(2fC), or f = 17 kHz.
If you leave the 1 in, then the result is 22 kHz. Its a good check, even if you
want the exact result, and often good enough.
There is one interesting special case of the non-inverting amplifier that takes
us back to the emitter-follower of 4.1. Suppose we take out R1 (put it equal
to infinity) and short out R2 (put it equal to 0). The gain is then +1. Its
properties are like the emitter follower: high input impedance, unit voltage but
high current and power gain via a low output impedance. Such circuits are
sometimes known as buffers.
7.8 An op-amp constant current source
We often need a constant current source, and we looked at one such in 4.5,
the current mirror, which used a current to set a current, and whose output
current was practically independent of load over a useful range. There were, I
mentioned other transistor based circuit. There are also op-amp based ones,
for example the very simple one shown here.

RL

We show the load as a variable resistor and there is a fixed vin. The circuit is
the same as the non-inverting amplifier, so use equation 7.3 to get
v0 = vin ( R + RL) /R.
The current through the load is

50

v0 /( R + RL) = vin/ R,
independent of the load and so our desired current source.
There is a better way of thinking about this result. Use GRI, so feedback
means there is vin on the inverting input; thus the current through R is vin/ R,
and also through the load.
The simulation is at Constant current source. it will reach its limits at the max
and min voltage swing of the op-amp, depending on type and power supply.
There is though problem with this circuit, in that neither side of the load is at
ground (and they usually are). The grounding is actually set by the power
supply, which normally has its common terminal grounded. Instead, we can
float it as shown in
Fig 4.10 H&H,
grounding one end of the load as desired. The voltage divider sets vin. Te
circuit is otherwise exactly as before and will work fine. However, the voltage
reference is now floating and this means we cannot reference from a
grounded source. The usual way out of this one is to a transistor or two. For
example, consider this circuit.

Feedback forces vin on the inverting input, so there is a voltage VCC - vin
across R and hence a current (VCC - vin) / R (= (9-3)/1000 above) through it.
The feedback process works via the base voltage but we dont need to follow
this in detail, just use GRI. This emitter current (slightly less than Ic) flows
through the load. The simulation is at Constant current with grounded load. it
shows again a current independent of load. The circuit is the first we have
51

met with more active components than just one op-amp. It shows how easily
they can be brought together and how the GRs still rule.
7.8 Photodiodes and the current to voltage converter
Many devices produce a current output proportional to some stimulus. Light
detectors are common and important examples, with a current output
proportional to the light intensity or photons/ sec. Sometimes we can get
away with just a resistor to convert this current signal into a voltage, but this
voltage appears across the device and may (for some devices ) change the
current. It is worth a brief diversion to understand how a photodiode works.
You recall the standard diode characteristic from PHY107. We will refer to
this from now on as the dark characteristic In forward bias the diode is
conducting, but reverse biasing produces only a small current. The device
works with electrons and hole from the doped n and p (respectively) parts of
the junction. The potential energy diagram for electrons and holes looks like

Potential
energy of
electrons

p-type

Potential
energy of
holes

n-type

field

depletion region the field is negative since positive charges

with reverse bias increasing the step and preventing significant current flow.
What happens when a light falls on the device? More electrons and holes are
generated in the junction region and are separated and swept out by the
internal field. Notice that the electrons travel down the potential from p to n
regions, or if you prefer the conventional photocurrent current goes from n to
p. This is the reverse direction, since in forward bias the p-contact is biased
positive and the current goes from p to n.
So what does this do to the dark diode characteristic? It is the current
generated (electrons s-1 proportional to photons s-1) that is constant for a fixed
light intensity and subtracts (its a reverse current) from the dark characteristic
at all voltages, so the light characteristic moves down with respect to the dark
one.

52

Sketch
Obviously one thing one could do is reverse bias the diode and measure the
current. Thats fine, and the more usual way to measure optical signals, but
one gets slightly better sensitivity (lower noise) in the absence of the dark
reverse current which is there if we reverse bias. We could just put a resistor
in
Sketch
and we get the reverse current shown and what is clearly forward bias.
Where are we on the characteristic?
Sketch

Fix the resistor value, draw the load line and you can work out the current
(and hence the light intensity) from the voltage across the resistor. I think you
can see, though, that the voltage and current are not linearly related (actually
approximately logarithmic). It would be good if we could measure the current
directly, at effectively constant voltage. The current to voltage converter does
that. Its very simple:

Ive shown an ordinary diode here as CC lacks a photodiode. The op-amp

keeps the bias on the diode zero (the inverting input is a virtual ground), which
is fine (see characteristic) and the output voltage just measures the current.
We will come back to the value of the resistor in a moment.

53

CC will do a phototransistor, which is similar and generally has no base

connection, so I show one of these circuits at Phototransistor circuit. This
particular device has a dark current of 100 nA, very large compared with
decent photodiodes.
Inspection shows that the voltage is linear in the current, at 10 V/mA. Why?
Well, remember GRII says no current flows into the op-amp, so the
photocurrent must go through the resistor, The output voltage is just the
current times the 10k resistor, hence 10 V/mA. The output is negative
since the current flows from the emitter, and the potential on the output is
below ground.
Phototransistors have bigger output than photodiodes (though they are
noisier), so we might use a 1M resistor in the earlier circuit to give a
sensitivity of 1V/A. In fact good photodiodes have dark currents of order
10-14 A, so 10 M would output only 0.1 V at the lowest intensities we could
hope to measure with a solid state diode.
There is a limit to linearity, of course. If you back to the CC op-amp specs,
the maximum voltage swing on the output with a 15 V supply is 13 V. Thus
at 1.3 mA we should expect non-linear behaviour. Indeed, at 1.3 mA and
above the output saturates at 12.9 V.
From these examples we see that a perfect current to voltage converter has
zero input impedance (a direct consequence of the zero voltage drop required
by GR1). One should recall that this behaviour is that of an ideal op-amp, and
at the limits of very small current measurement we may have to do a more
refined analysis.
7.9 Differential amplifiers using op-amps
As I said at the beginning of this section, op-amps are differential amplifiers,
so the application is direct. The two signals go in via the two equal resistors
R1, and two equal R2 provide feedback to the inverting input and ground the
non-inverting input.

54

v1

v2

R1

R2

R1

vo
R2

The only difficulty is getting exactly matching resistors. One can get
tolerances down to 0.01%, but beware the standard 10%. The analysis is
standard. We work out the voltages on the two inputs and equate them.
Thus
vni = v2 R2 / (R1 + R2) and
vi = vo + (v1 vo) R2 / (R1 + R2), so that, putting these equal
v2 R2 = vo (R1 + R2 ) + (v1 vo) R2 or
vo = (R2 / R1) (v2 - v1).
We have a closed loop gain of (R2 / R1) and a signal proportional the input
difference.
What about the common mode rejection ratio that we met earlier? This
expressed the ability of the amplifier to reject signals common to both inputs.
Suppose the two resistors going to the non-inverting input are slightly different
from the other pair, say R1* and R2*. Then the expression for
vni = v2 R2*/ (R1* + R2*) and equating this with the unaltered expression for vi
gives, after a little tidying up

R + R2 v 2R2*
vR
vo = 1
1 2
*
*
R1 R1 + R2 R1 + R2
This is the same as before if the two pairs of resistors are identical. If they are
not, then the output is not exactly proportional to the input difference; one
input is slightly weighted wrt to the other.
We can use this result to find the CMRR, since it is the ratio of the output
when the inputs are v1 = v say and v2 = 0 to the with v1 = v2 = v. Substituting
in, and cancelling the left hand brackets top and bottom and the vo terms
straight away, we have

55

CMMR =

R2*
R1* + R2*
R2*
R2

*
R1 + R2 R1 + R2

We could tidy this up, but this way it is easy to see that when the two pairs of
resistors are equal i.e R1* = R1 and R2* = R2 the CMMR goes to the ideal
value of infinity.
Suppose the inequality was such that
R2*
0.99R2
,
=
*
*
R1 + R2 R1 + R2
i.e. the two terms differ by 1%. We have immediately that the CMMR is
1/(1-0.99) =100 or 20log10(100) = 40 dB.
A typical choice of values for a gain of 100 might be 1 M and 10 k. As
always output voltage swings must stay within the linear range of the op-amp,
a volt or so below the supply.

7.10 A summing amplifier

It turns out that there are a number of mathematical operations that can be
done with op-amps, giving us an analogue alternative to digital methods.
Summing is one of the simplest. Consider this circuit, an inverting amplifier
with multiple inputs.
v1
v2

R1

R2

v3
R3

The input current v1 / R1 + v2 / R2 + v3/ R3 and so when this flows through R

(the inverting input is a virtual earth) we get an output
vo = - (v1 / R1 + v2 / R2 + v3/ R3) R.
If all the resistors are equal, we get the sum of the inputs as output, or rather
minus this sum. If that aspect is a problem we can easily invert it with a unit
gain inverting amplifier. The simulation is at Summing amplifier.

56

If we want |gain| >1, then put all the input resistors equal but increase R. If
we want a weighted sum, then that is easy; the weights are Rj /R. So what is
the output of the circuit below?

It weights the three inputs in the ratio 1:1/2:1/3 and adds them, and the
feedback resistor R = 5.454 k is chosen so that (in k)
1/R = 1/10 + 1/20 +1/30 = 11/60
so that with 1 V on each input we get 1 V output. Mathematicians and
physicists would call this last step normalising. The simulation is at Weighted
sum.
If we wanted just to add in the ratio 1:1/2:1/3 we would set R = R1. Here we
have a circuit that does this and has the inverter (equal resistors so gain 1)
included.

The simulation is at Inverted weighted sum.

7.11 Integrator
We cannot do this with resistors alone, but it is easy with a capacitor C. The
key is that the voltage across a capacitor is Q/C. We deal with currents rather
than charge, but if a constant current i flows into a capacitor for time T , then
the charge is i T. If the current is time dependent, i(t) then the charge is

57

i ( t ) dt

and the voltage across the capacitor is

i ( t ) dt

vC = (1/C)

Suppose we put a capacitor into the feedback loop.

With the inverting input a virtual ground, the current vsig(t) /R flows into the
capacitor and the output voltage is that across the capacitor.
T

1
v o = i (t )dt
C0
T

1
=
v s (t )dt
RC 0
The minus sign is familiar (its the inverting amplifier configuration) but in detail
positive charge arrives on the left late of the capacitor, so the output side is
negative and likewise the output voltage.
We can see it at work most easily if we put in a square wave signal or similar.
It integrates sine and cosine waves to, but they look like their integral apart
from the phase. A square wave, though integrates to a triangular one. Here it
is in the simulation Integrator. Note it is inverted, the integral decreasing
whilst the input is positive and constant.
In the simulation the square wave input has amplitude 0.5 V, so its integral is
0.5xT. RC is 10 ms, so vo = - (1/10-2) x0.5xT = - 0.5 since in the simulation T
is also 10mV.
Its worth noting that if we used a sine wave vssin(2ft) the integral would
gives us an output -vs (1/2fRC) cos(2ft). That is, the magnitude of the gain

58

is 1/(2fRC). This should come as no surprise since for the normal inverting
amplifier the gain is R2 / R1. Their equivalents here are 1/(2fC) and R, so we
have the same result.
It is interesting to see what happens when we put in a triangular waveform.
For a moment this looks sinusoidal, but it is not quite the right shape.
Actually, we are integrating (during the rising art of the wave) a voltage
proportional to t, so the integral is t2. During the falling part of the triangular
wave, the integral is proportional to t2, so we get a series of rising and falling
parabolas. Remember the inversion when thinking about this. The point of
inflexion occurs at the maxima and minima of the input as it should.
Integrating circuits are a common feature of filters. One way of improving
noisy signals is to average them, smoothing out fluctuations. That is done
with an integrator. One can use simple capacitors, or circuits like this one, or
digital circuits.
One other variant of the integrating circuit is the adder-integrator. You can
guess what this is like and what it does from its name. The circuit looks like
this.

It adds the voltages then integrates the result. It works, as did the adder,
because both input currents flow to the virtual ground and add to go through
the feedback loop.

7.12 Differentiating circuit

It turns out that if we reverse the positions of the resistor and capacitor we get
differentiation. Here is the circuit.

59

Why does this work? Noting that i = dQ/ dt and Q = VC, we have
i = C dV/ dt.
Thus the output voltage (again the inverting input is a virtual ground) is - R
times this current,
vo = -R C dV/ dt.
The output is proportional to the differential of the input. We can check the
result as we did in 7.11, noting that our inverting amplifier now has R1 =
1/(2fC) and R2 = R, so the expected gain is R2/ R1 = RC 2f. The 2f comes
from differentiating the sine wave and our two arguments agree.
The simulation is Differentiator. A triangular input yields an inverted square
wave as expected, constant and negative whilst the input is rising linearly.

7.13 Solving differential equations with op-amps

The behaviour of all sorts of dynamical systems can be described in terms of
differential equations, but finding analytical solutions is not always easy. One
can usually solve them numerically, and we may do this with either digital or
analogue techniques. Ill concentrate on the latter here, using the adding,
differentiating and integrating circuits we have just met.
Suppose we have a (unit) mass which can be displaced through a distance x,
and in oing so experiences restoring force = -kx. So the equation of motion is
d 2x
= kx
dt 2
This leads to simple harmonic motion. It might be that some periodic force
drives this system, so that the equation becomes
d 2x
= kx + A cos(2 ft ) ,
dt 2

60

the equation of forced shm. Now suppose is another forces force acting,
slowing the motion down via frictional forces and proportional to the velocity
dx/dt. Our equation then looks like

d 2x
dx
= B
kx + A cos(2 ft )
2
dt
dt
Suppose we integrate both sides of this, getting
dx
dx
= B
kx + A cos(2 ft )dt
dt
dt
Because out integrator inverts, it makes sense to rewrite the equation again as
dx
dx
= (B
+ kx A cos(2 ft )dt )
dt
dt
.
We are going to represent these quantities with input voltages into an adderintegrator circuit. Out of it will come the derivative or velocity. Ill continue to
use the variable x rather than v to avoid confusion with velocities. Of course
we will have to know what values to use for the parameters k, f, B and A.
Knowing the latter, its straightforward to generate a cosine voltage function,
but how to cope with x and its derivative? Dont worry; all will become clear!
So to begin with we use this the adder-integrator below, with the inputs
shown.
C1
R11
-Acos(2ft)
R12
x
R13
dx/dt

We will use the three resistors to set the coefficients of these terms. We will
work in seconds and chose the capacitor C1=1 F. Remember the weighting
(gain) of the adder/integrators terms goes as 1/ RC. Suppose k= s-2 and B =
3 s-1. Then if we choose R11 =1 M, R12 = 4 M and R13 = 1/3 M we have
R1jC1 values 1, 0.25 and 3 s respectively, the required coefficients.

61

OK, but what about x and dx/dt. These are quantities we are trying to find, so
of course we do not know them. But wait! The output is dx/dt, so why not feed
this back?

dx/dt
So that has sorted. What about x? Well, we can get that from dx/dt using
another integrator.
C2

R2

This outputs - x / R2C2, so if we make R2C2 = 1 s with say 1 M and 1 F,

then the out put is x. This is almost what we want, but it is inverted, so lets
invert it again with a unit gain inverting amplifier, with its last modification, and
send +x back to its input. The loop is closed!

62

R4
R3

We make R3 = R4 to get a gain of 1. A pair of 1 M resistors will do. So

here is the final circuit with component values

The simulation is Differential Equation. Note that it is a low frequency system.

That is the result of the choice of k =0.25 s-2. If you know your shm, you will
know that the free resonant frequency of such a system is

k
2

= 0.08Hz .

This is really too low for CC, though it is very plausible for a mechanical
system. The easiest way to get quickly to handier frequencies is to change
the two capacitors to 1 nF. This pushes the free resonant frequency up by
1000 to about 25 Hz. One can then explore, for example, the amplitude
versus frequency response.

63

7.14 Logarithmic amplifiers

So far all the components in our op-amp circuits have been linear in the sense
that the voltage drop v across them is proportional to the current i through
them. Other behaviour is possible; recall the ideal diode at reasonable
forward bias, where
i = is exp(vd)
with v in volts and is the diode saturation current (c.f. PHY107). = e/kT
40 V-1 at room temperature. Inverting this gives
vd = (1/) loge(i / is)
Suppose we construct an inverting amplifier, but put a diode in the feedback
loop rather than a resistor.

As ever the inverting input is a virtual ground, so the current is vsig / R and
vo = - vd = - (1/) loge(vsig / isR ).
The simulation is at Logarithmic amplifier. The CC diode is modelled
approximately by an ideal diode with = 38.37 V-1 and is = 3.83.10-14 A in the
forward region. Thus with an input of 1000 mV and R = 10 k we expect an
output of -565 mV, at 100 mV 505 mV, at 10 mV 445 mV etc. The
magnitude of the output increases in steps of 60 mV = (1/) loge(10) for each
decade fall in input. The prediction of 60 mV per decade is robust, in the
sense that it will be about right for any diode whatever its saturation current.
This is what we see in the simulation, though from 10 to 1 mV input the step is
58 mV; the current is dropping into a region where the diode response is not
accurately exponential (less than 0.4 V). Nonetheless the output is linear in
log(input) to <2% from 10 V to 1 mV, 4 orders of magnitude.
It is not hard to improve on this, and the LF411 is a better performer than the
CC 741-alike which draws relatively high currents (80 nA). (A 1 mV input to a
10 k resistor gives a current of 100 nA.) In this way one can get linearity
over at least 7 decades. Quite often a transistor with a grounded base is
used in place of the diode, using the observation that Ic is accurately
exponential in Vbe.

64

7.15 Exponential amplifiers

In the previous case we wanted a logarithmic output, so we put an element
with an exponential response in the feedback loop. Remember logs and
exponentials are inverse operations mathematically, i.e. exp[log(x)] = x =
log[exp(x)]. So one way to an exponential amplifier is to put a logarithmic
element in the feed back loop.
This is done in the circuit below, with the log amplifier at top right.

The input to the log amplifier section is the output vo, so loge(vo). Thus
vin loge(vo) , or
vo exp(vin).
We have our exponential amplifier, though it is a rather simple version.
There is an alternative way of doing this. Remember the integrator and
differentiator circuits of 7.11 and 7.12? Integration and differentiation are
another pair of inverse functions. In this case we swapped the resistance and
capacitor around to switch between circuits. We can do the same thing here:
move the diode from the feedback loop to the input, as shown below.

This works in the usual way: vo = - id R since the inverting input is a virtual
ground. The diode current is given by

65

id = is exp(vd)
as before, and vd = vsig. Thus vo = -R is exp(vsig) as we wished.
The simulation is at Exponential Amplifier . Notice the rather high supply
voltage; one result of producing an output which is proportional to exp(input)
is that the former rapidly increases, and we can easily saturate the amplifier.
This one saturates with input > about 600 mV, even with the high supply.
As before, the CC diode is modelled approximately by an ideal diode with
=38.37 V-1 and is = 3.83.10-14 A in the forward region. Thus at 500 mV,
id =3.83.10-14xexp(38.37x0.5) = 8.22A, which through 10 k produces 82 mV.
Ive plotted out the actual CC output and you see that we have linearity on a
semi-log plot over about 5 decades of output, but not with inputs below about
350 mV. We are looking at the diode I V characteristic, with log[IR]
vertically. The input range in this simple version is therefore limited between
about 350 and 600 mV.

7.16 Multipliers and dividers

Now we know how to make log amps, exp (i.e. anti-log) amps and adders, we
can do multiplication and division. Ill not show the circuit details, just circuit
blocks.

v1

log amp 1
v1

adder
v2

exp
amp

log amp 2

so at the adder we have log(v1) + log(v2) = log(v1v2)and the exp amp turns this
into the product v1v2.
If we wanted v1 / v2 we should put a unit gain inverting amplifier in the lower
path after the log amp, so the adder output is log(v1) - log(v2) = log(v1 / v2).

66

7.17 Bridge amplifier

Resistors are used as sensors in many situations. Lets think of the example
of a temperature dependent resistor which is being used to determine
changes in temperature, though there are many other sorts of passive sensor.
One classic way to do this is to make the resistor part of a Wheatstone bridge.
Here is a simple version of that circuit.

vref

Suppose for simplicity (we do not have that choice) that the two top fixed
resistors have resistance R. Below than is a variable resistor and the sensor,
shown as a thermistor. One way we could do the measurement is to adjust
the variable resistor until the voltage on the meter is zero. Then the values of
the variable resistance and the sensor are equal, since the mid point
potentials in both legs are the same.
This is fine, but what we would really like is a voltage output proportional to
the difference in value of the two lower resistors. Think about a simpler
circuit, with the variable resistor and the upper two all of value R, and the
thermistors resistance equal to R + R. It is that interests us, as it shows
the fractional change in temperature from that value where the thermistors
resistance was also R.
The voltage drop over the bottom left resistor is vref R / (R +R) = vref / 2, and
on the right is R / (R +R +R ) = vref /( 2+ ). So the voltage on the meter is
vo =vref (1/ 2 1/( 2+ ))
= vref /(2( 2+ ))

vref /4
if <<2. So we get a signal which is proportional to the fractional change in
temperature.

67

We might just pause to see how the voltage and temperature are related in
detail. Suppose the thermistor has resistance R at temperature T0 and that its
resistance increases at temperature T to R + ( T - T0). The temperature
coefficient is in ohms per degree and is the usual way of specifying the
behaviour of a thermistor. So R = ( T - T0), and if we measure we know
the temperature change.
Lets put in some numbers. Say R = 10 k (determined by the resistance of
the themistor at T0), and =1 /C. Then for a 1C rise the change of
resistance is 1 in 10 k, or =1x10-4. With a 10 V reference source the
output voltage is 10 x1x10-4 /4 = 250 V.
The sensitivity is 250 V /C. Here is the circuit with values

and where I have replaced the thermistor with a series pair 10 k plus a
variable 1 - 10 resistor. The latters value is R = ( T - T0) and 1 with
=1 /C corresponds to a rise of 1C. The simulation is at Wheatstone
Bridge.
Incidentally, the reason for not using CCs therrmistor is that it is rather nonlinear (i.e. is itself temperature dependent) which whilst more realistic is a
complication we can live without for now.
Can we do better with an op-amp difference amplifier? Happily we dont need
to do a lot of analysis, because we can make use of what we did in 7.9.,
where we looked at this circuit,

68

v1

v2

R1

R2

R* 1

vo
R* 2

and the result for the output was

R + R2 v 2R2*
vR
vo = 1
1 2 .
*
*
R1 R1 + R2 R1 + R2

Now suppose all the resistors have the same value, R say, apart from R*2 (it
doesnt matter which wee choose) which we put equal to R + R. Also we will
put the two input voltages the same, equal to vref.

vref
R

vo
R+R

The output is then

69

1
R + R
v o = 2v ref

R + R + R 2
1+ 1
= 2v ref

2+ 2
2 + 2 2
= v ref

2 +

= v ref

2 +

v ref
2
the approximation holding as before if <<2. The output is bigger (better) by
a factor 2. With the component values used before, the sensitivity is
500 V /C. The simulation is at Bridge amplifier.
Youll notice I have added a very small trimming resistor (2.5 m) to the
sensor resistor. This gets rid of a few V of signal when the circuit should be
balanced, due to the rather high leakage current of CCs 741 op-amp. In
reality we always have to do a bit of trimming, with or without op-amps,
because resistors are never identical. The signal for a 1 imbalance is
500 V as calculated. We can easily add an amplifying stage if we need a
higher value.

7.18 High and low pass active filters

We have noted before that if you have a resistor and capacitor in series, pass
an ac current through them and look at the voltage across the capacitor, we
get a large response at low frequencies (because the impedance of the
capacitor is high) and a low response at high frequencies. The circuit passes
low frequencies, or is a low pass filter. If we look across the resistor, we have
a high pass filter.
In detail, because of the way in which impedances combine, the low pass filter
produces a voltage

70

vs
2 fC
1
R2 +

2 fC

vs

( 2 fRC )

+1

so we get all the input when 2fRC <<1. For higher frequencies the voltage
falls as 1/f, a factor 2 or 6 dB per octave. This is quite gentle.
For the high pass filter the voltage is, similarly

v s 2 fCR

( 2 fCR )

+1

and the output is vs when 2fRC >>1. We get a fall of 6dB/octave at low
frequencies.
We might try improving the low pass filter by cascading a pair of RC filter as
below, but we still end up with the same 6 dB/ octave.

R1

C1

R2

C2
You ca imagine that we might want to make a filter that passed a relatively
narrow range of frequencies, with a high pass at the bottom and a low pass at
the top. These very simple RC filters might do the trick, but for a narrow pass
band we might well want steeper sides. We need to boost the frequency
response with active components.
There are many designs, but one classic is the Sallen and Key filter, which
uses cascaded RC filters plus bootstrapping via an op-amp. This is the low
pass version.

71

C1
R2
R1

C2

We have the same circuit as above with an emitter follower of unit positive
gain in the dotted box. This keeps the voltage over C2 equal to the output and
holds off its fall at higher frequency; in the absence of bootstrapping this
voltage would otherwise fall as 1/f. Once this boost is lost as the frequency
rises the output falls rapidly.
The detailed analysis is a bit messy, but the result is a low pass filter with a
faster fall. To compare the filters, I have computed and drawn plots of
log(output) versus log(frequency) for a simple RC filter (with RC = 1), a
cascaded pair (with R1C1 = R2C2 = 1) and the Sallen and Key filter with
R2C1 = 1, R2C2 = 0.3, R1C2 = 3 and R1 C1 = 10. The latter values set the
start of the fall at about the same frequency as in the simpler circuits.

log( vo( w ) )

0
log( w )

The simple RC filter, with its 6 dB per octave roll off

72

log( V( w ) )

0
log( w )

The cascaded filter, with a weak bump and earlier initial fall but at high
frequencies the same roll off

2
log( yy( w ) )
4
2

0
log( w )

The Sallen and Key filter with a much faster roll off (note the cange in vertcal
scale)
The Sallen and Key example above shows a slope of 12 dB per octave, and
this is always the high frequency limit for this filter (the output falls as 1/f2
rather than the 1/f of the RC filter) but can be steeper at the start of the roll off.
The simulation is at Low pass filter.
We can make the equivalent high pass filter by swapping the Rs and Cs. The
output rises faster than 6 dB per octave with increasing frequency for the
same reasons as above.

73

The plot below shows the high pass Sallen and Key filter characteristics with
R1C1 = R1C2 = 0.1 and R2C2 = 1. The slope is again 12 dB per octave
(1/f2) but can be steeper. Notice also the little bump or resonance. This is
characteristic of the Sallen and Key and most active filters, high pass or low,
though they are not always seen as our earlier low pass filter example shows.
If we had changed C2 so that R1C2 = 1 rather than 3, this too would have
shown a resonance.

log( outz( w ) )

0
log( w )

In the days before active filters one would have used an inductance to get
resonance effects and steep roll offs, but they (coils) are not easily made
small and modern electronics avoids them, using op-amps instead.
The simulation is at High Pass filter.

74

7.19 Comparators and the Schmidt trigger

Im going to end with a couple of related examples of the use of op-amps with
positive feedback. Up to now we have always used negative feedback by
connecting the output and the inverting connection. Inverting means that the
output is multiplied by 1.
Positive feedback is associated with oscillators, Ill discuss a simple oscillator
shortly, but first lets look at an even simpler circuit. Suppose we have a
changing voltage and we wish to know if it is higher or lower than a particular
reference voltage. We can do this with the next circuit.

The resistors form a divider to provide a reference voltage. Remember the opamp without negative feedback has very high gain, so when the non-inverting
input is even slightly more positive then the other, the amplifier will saturate
positively. If the differential input is negative the amplifier output will swing
into negative saturation. The output has two states, depending on whether
the signal is greater or less than the reference voltage. This is a basic
comparator.
Its worth reminding ourselves that the Golden Rules no longer apply; they
were for negative feedback only. These inputs will stay different.
Lets see this working at Comparator. We set the reference at 3.0 V with the
divider. For signals > 3.0 V we are in negative saturation, and vice versa at
7.0V. The battery plus variable voltage represent signal and the oscillator
provides some (monochromatic!) noise. The circuit work fine with zero noise
(oscillator at zero mV), certainly able to tell whether the input is +25 mV or
25 mV below the threshold. It is indecisive at the exact threshold, but worse it
shows jitter between high and low states when at the threshold with as little as
5 mV noise. Every time the signal falls above or below threshold, switching
occurs
This circuit is OK if the input is a very well defined though steadily changing
voltage. Switching will occur at the reference voltage. However, if the input
is noisy, the output may show jitter, switching on and off several times as the
signal passes through the reference voltage. Also, switching can be quite

75

slow. Both these defects can be sorted with positive feedback. One the
output goes from negative to positive (say), there is an additional (fed back)
voltage to keep it this way. It also speeds the switching process up. Such a
circuit is called a Schmidt trigger, at Schmidt Trigger. With up to about
200 mV peak to peak noise it is jitter free even at the 3 V threshold, but
otherwise behaves like the earlier circuit. It is very widely used.

7.20 Relaxation oscillator

This oscillator, the most basic kind, has things in common with the Schmidt
trigger. It, too has two states, with an op-amp in either positive or negative
saturation. The difference is that it oscillates between the two in a regular
way. The circuit is below. Being an oscillator, it doesnt have an input.
C

R1

R2

How does it work? Imagine there is some noise in the circuit, so there is a
differential input. The oscillator swings into saturation, and is held there by
positive feedback via R2 as in the similar Schmidt trigger. If - its random
the output is positive, the capacitor will begin to charge with a time constant
RC, increasing the potential of the inverting input. Eventually, when this
voltage gets to be R1/(R1+R2) of the saturation voltage, the polarity of the input
changes sign and the output swings to negative saturation, and the capacitor
begins to charge with opposite sign, or discharge if you like. It swings
between Vsat. It is a square wave generator.
The simulation is at Relaxation Oscillator. With 10k and 1 F, the measured
period is 22 ms. The wave is square, though a close look shows that it
switches from +8 V to 8V in 32 s. If we look back to the CC op-amp
specifications we see a maximum slew rate of 0.5 V/s, i.e. 16 V in 32 s.
The maximum swing (8 V) is 2 V less than the supply, again as the
specification suggests.
The amplitude and period are easily calculated. The CC op-amp saturates at
2 V below the supply (10 V here) so the amplitude = Vsat = 8 V. The capacitor
has to charge from -Vsat (since R1=R2 here) to +Vsat, but (if it did not get
interrupted by the switching of the op-amp) would rise to Vsat. We need to
know how long it takes to get from Vsat to -Vsat. This will be the same time
as taking a capacitor from 0 to Vsat with a charging voltage of 3/2Vsat (adding

76

Vsat to all three voltages does not affect the timing. So the time t for the
capacitor voltage to rise from 0 to Vsat is given by
Vsat = 3/2Vsat ( 1 exp(-t/RC), i.e.
2

/3 = (1 exp(-t /RC) or

exp(-t /RC) = 1/3, giving

t =1.1xRC
The period of the square wave is twice this, or 2.2 RC. and so in our case is
2x1.1x10-6x104 = 22 ms, as observed. The simulation also shows that
switching occurs at the expected capacitor voltage.
Of course, from a square wave we can construct others. If we differentiate it
we get a triangular wave. Such waveforms are used very widely, for example
to scan CRO electron beams, and in general as timing waveforms.
You will learn one day that waveforms that are not sinusoidal can be built out
a set of waves that are, different amplitude sums of sine waves of frequency f,
2f, 3f .....etc.. This is called Fourier analysis. We can make use it to produce
a sine wave from our square wave generator, simply by including a low pass
filter that does not pass the higher harmonics.
Simulation is at Sine wave oscillator.

77