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A

Compal Confidential
VAWGA/B Schematics Document
2

AMD "Kabini" Platform


AMD 25W APU With Jaguar Core and Integrated Yangtze FCH + ATI Sun

LA-9912P REV: 1.0


2013-04-01

2012/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2015/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

COVER PAGE
Document Number

Rev
1.0

VAWGA/GB
Monday, April 01, 2013

Sheet
E

of

37

Compal Confidential
Model Name : VAWGA/B
1

AMD Kabini

Memory BUS(DDR3)

204pin DDRIII-SO-DIMM X2

Single Channel

P.8~P.9

BANK 0, 1, 2

1.5V DDRIII 1600MHz


GFX

LVDS Conn.
HDMI Conn.

P11

DP0

P10

DP1

P12

DAC

CMOS P.11
Camera
AMD FT3 APU

CRT Conn.

GPP

GPP2

MINI Card
(WLAN/BT)

P16

Jaguar Core
Integrated Yangtze FCH

Int.KBD

HDA
SPI

Touch
Screen

Port 4

P.16

Port 1

Port 0
2

MB P.17
3.0 Conn. LP2
Port 1

USB3.0
HD Audio

SATA

Gen3 Port 0

Port 1

HDD
Conn.

ODD
Conn.

P.18

PS2

P.13

Audio
Conexant
CX20757

P.13

P.21

P.4~P.7

Touch Pad

P.17
S/B
2.0 Conn.

Port 9

Port 0

LPC

ENE
KBC9012

P.20

Port 8

USB

P15

P.5

USB2.0

Card P.20
Reader

Port 5

MB P.17
3.0 Conn. LP1

BGA 769-balls

P14

Transformer
RJ45
BIOS (4M)

Port 3
USB

GPP1

LAN
Atheros
AR8162/8172

WLAN P.16
BT Combo

Thermal Sensor
P.19

P.20

Int. MIC

Int. Speaker Conn.


page 21

Audio Combo Jacks


HP & MIC

page 21

page 21

Sub-borad
15"
14"
ODD/B

IO/B

LS9634P

LS9633P

page 13

page 20

Power/B

LS9631P
page 20

LED/B

LS9635P
page 20

USB/B

2012/04/22

Issued Date

page 17

Compal Electronics, Inc.

Compal Secret Data

Security Classification

LS9632P

2015/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

BLOCK DIAGRAMS
Document Number

Rev
1.0

VAWGA/GB
Thursday, March 28, 2013

Sheet
E

of

37

Voltage Rails

Description

S0

S3

S5

VIN

Adapter power supply (19V)

ON

ON

ON

B+

AC or battery power rail for power circuit.

ON

ON

ON

+APU_CORE

Core voltage for APU

ON

OFF

OFF

+APU_CORE_NB

Voltage for On-die VGA of APU

ON

OFF

OFF

+VGA_CORE

0.95-1.2V switched power rail

ON

OFF

OFF

+VDDCI

0.95-1.2V switched power rail

ON

OFF

OFF

3.3V always on power rail

ON

ON

OFF

+3VS

3.3V switched power rail

ON

OFF

OFF

+1.8VALW

1.8V always on power rail

ON

ON

ON*

+1.8VS

1.8V switched power rail

ON

OFF

OFF

+0.95VALW

0.95V always on power rail

ON

OFF

OFF

+0.95VS

0.95V switched power rail

ON

OFF

OFF

Board ID

+1.5V

1.5V power rail for APU and DDR

ON

ON

OFF

+1.5VS

1.5V switched power rail

ON

OFF

OFF

+3VGS

3.3V switched power rail for VGA

ON

OFF

OFF

+1.8VGS

1.8V switched power rail for VGA

ON

OFF

OFF

+1.5VGS

1.5V switched power rail for VGA

ON

OFF

OFF

+0.95VGS

0.95V switched power rail for VGA

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON

+5VS

5V switched power rail

ON

OFF

OFF

0
1
2
3
4
5
6
7

+VSB

VSB always on power rail

ON

ON

ON

+RTC_APU

RTC power

ON

ON

ON

+0.75VS

0.75V switched power rail for DDR terminator

ON

OFF

OFF

SMBUS Control Table

APU_SCLK0
APU_SDATA0
SMB_EC_CK2
3

SMB_EC_DA2

SOURCE

VGA

BATT

KB9012

KB9012

+3VALW

+3VALW

WLAN
SODIMM WWAN

+3VS

APU

+3VS

+3VS

KB9012

+3VS

+3VS

X
X
V

+3VS

SIGNAL

+VALW

+V

+VS

Full ON

HIGH

HIGH

ON

ON

ON

ON

S1(Power On Suspend)

HIGH

HIGH

ON

ON

ON

LOW

S3 (Suspend to RAM)

HIGH

HIGH

ON

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

ON

OFF

OFF

OFF

STATE

Board ID / SKU ID Table for AD channel


Vcc
R1562

Thermal
Sensor FCH

PCB Revision
MP
PVT
DVT
EVT

Board ID
0
1
2
3
4
5
6
7

+3VALW

SMB_EC_CK1
SMB_EC_DA1

BOARD ID Table

Power Plane

3.3V +/- 5%
100K +/- 5%
R1564
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

APU

+3VS

OC#
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

RTD2132

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

0
1
2
3

Port

EC SM Bus2 address

LAN
WLAN

Device

Address

HEX

Device

Address

HEX

Smart Battery

0001 011X b

16H

Thermal Sensor

1001 101X b

9AH

SB-TSI (APU)

1001 100X b

98H

VGA Internal Thermal

USB 2.0 USB 3.0

1000 001X b

82H

APU
SM Bus address

XHCI

Device

Address

HEX

DDR DIMM1

1010 000Xb

A0H

DDR DIMM2

1010 001Xb

A2H

Port

0
1

USB20 port1,2,8,9

3 External
USB Port
RIGHT USB
Touch Screen
Camera
CardReader
WLAN/BT Combo
LEFT USB (for colay)
LEFT USB (for colay)
LEFT USB3.0
LEFT USB3.0

A6@
A4@
E2@
E1@
E1PC@
X4@
X5@
X2@
EMICU@
EMICP@
EMIUSB2RU@
EMIUSB2RP@
USB2R@
SUN@
MARS@
14@
15@
PX@
CMOS@
HDMI@
EMIGASP@
8162@
8172@
SWR@
LDO@
THERMAL@
ME@
UMA@
@
ZODD@
TS@
EMIP@
EMIU@
ESDP@
ESDU@

2012/04/22

2015/04/22

Deciphered Date

Date:

BTO Item
2

A6 R3 BGA APU
A4 R3 BGA APU
E2 R3 BGA APU
E1 R3 BGA APU
E1 PC BGA APU
X4 ES2 BGA APU
X5 ES2 BGA APU
X2 ES2 BGA APU
CardReader EMI Un pop
CardReadear EMI pop
Right USB2.0 port EMI un pop
Right USB2.0 port EMI pop
Right USB2.0 port component
SUN PRO GPU (R3 compal part)
MARS XT GPU (R1 compal part)
for 14" componect

for 15" componect


Common VGA circuit
CMOS Camera part
HDMI part
Gastube
Ateros AR8162 LAN Chip
Ateros AR8172 LAN Chip
LAN Switching mode
LAN LDO mode
Lenovo Thermal Sensor
ME part
UMA part
Unpop
Zero Power ODD part
Touch Screen
EMI pop component

EMI Un pop component


ESD pop component
ESD Un pop component

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

USB30 port0,1

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

0
1
2
3
4
5
6
7
8
9

USB Port
USB20 port0

BOM Structure

Device

0
1
2
3

BOM Structure Table

APU PCIE PORT LIST

Clock

USB OC MAPPING

USB Port Table


EC SM Bus1 address

SLP_S3# SLP_S5#

NOTES LIST
Document Number

Rev
1.0

VAWGA/GB
Monday, April 01, 2013

Sheet
E

of

37

M_DATA0

M_ADD1

M_DATA1

M_ADD2

M_DATA2

M_ADD3

M_DATA3

M_ADD4

M_DATA4

M_ADD5

M_DATA5

M_ADD6

M_DATA6

M_ADD7

M_DATA7

M_ADD9

M_DATA8

M_ADD10

M_DATA9

M_ADD11

M_DATA10

M_ADD12

M_DATA11

M_ADD13

M_DATA12

M_ADD14

M_DATA13

M_ADD15

M_DATA14

M_BANK1

M_DATA16

M_BANK2

M_DATA17

M_DM0

M_DATA19

M_DM1

M_DATA20

M_DM2

M_DATA21

M_DM3

M_DATA22

M_DM4

M_DATA23

M_DM6

M_DATA24

M_DM7

M_DATA25

M_DM8

M_DATA26

M_DQS_H0

M_DATA28

M_DQS_L0

M_DATA29

M_DQS_H1

M_DATA30

M_DQS_L1

<8,9>
<8,9>

M_DATA31

M_DQS_L2

M_DATA32

M_DQS_H3

M_DATA33

M_DQS_L3

M_DATA34

M_DQS_H4

M_DATA35

M_DQS_L4

M_DATA36

M_DQS_H5

M_DATA37

M_DQS_L5

M_DATA38

M_DQS_H6

M_DATA39

M_DQS_H7

M_DATA40

M_DQS_L7

M_DATA41

M_DQS_H8

M_DATA42

M_DQS_L8

M_DATA43

DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1

M_DATA45

M_CLK_L0

M_DATA46

M_CLK_H1

M_DATA47

DDRA_ODT0
DDRA_ODT1
DDRB_ODT0
DDRB_ODT1

<8>
<8>
<9>
<9>

DDRA_SCS0#
DDRA_SCS1#
DDRB_SCS0#
DDRB_SCS1#

AF40
AF41
AK40
AK41
AE40
AE41
AJ40
AJ41

DDRAB_SDQ32
DDRAB_SDQ33
DDRAB_SDQ34
DDRAB_SDQ35
DDRAB_SDQ36
DDRAB_SDQ37
DDRAB_SDQ38
DDRAB_SDQ39

AM41
AN40
AT41
AU40
AL40
AM40
AR40
AT40

DDRAB_SDQ40
DDRAB_SDQ41
DDRAB_SDQ42
DDRAB_SDQ43
DDRAB_SDQ44
DDRAB_SDQ45
DDRAB_SDQ46
DDRAB_SDQ47

AV41
AW40
BA38
AY37
AU41
AV40
AY39
AY38

DDRAB_SDQ48
DDRAB_SDQ49
DDRAB_SDQ50
DDRAB_SDQ51
DDRAB_SDQ52
DDRAB_SDQ53
DDRAB_SDQ54
DDRAB_SDQ55

BA36
AY35
BA32
AY31
BA37
AY36
BA33
AY32

DDRAB_SDQ56
DDRAB_SDQ57
DDRAB_SDQ58
DDRAB_SDQ59
DDRAB_SDQ60
DDRAB_SDQ61
DDRAB_SDQ62
DDRAB_SDQ63

<10>
<10>

DP2_TXP3
DP2_TXN3

<11>
<11>

LVDS_A2
LVDS_A2#

<11>
<11>

LVDS_A1
LVDS_A1#

LVDS

<11>
<11>

LVDS_A0
LVDS_A0#

<11>
<11>

LVDS_ACLK
LVDS_ACLK#

AJ37
AL34
AL35

+MEM_VREF
+VREF_DQ

1
R576

AD40
2
AC38
0_0402_5%

M_DATA48

M_CLK_L2

M_DATA49

M_CLK_H3

M_DATA50

M_CLK_L3

M_DATA51

M_RESET_L

M_DATA53

M_EVENT_L

M_DATA54

ZZZ

A11
B11

TDP1_TXP2

A12
B12

TDP1_TXP3

TDP1_TXN1

TDP1_TXN2

TDP1_TXN3

M0_CKE1

M_DATA56

M1_CKE0

M_DATA57

M1_CKE1

M_DATA58

M0_ODT0

M_DATA60

M0_ODT1

M_DATA61

M1_ODT0

M_DATA62

M1_ODT1

M_DATA63

M0_CS_L0

M_CHECK0

M0_CS_L1

M_CHECK1

M1_CS_L0

M_CHECK2

M1_CS_L1

M_CHECK3

M_RAS_L

M_CHECK5

M_CAS_L

M_CHECK6

M_WE_L

M_CHECK7

V41
W40
AB40
AC40
U41
V40
AA41
AB41

APU_SVT
APU_SVC
APU_SVD
R124 1
R127 1

EC_SMB_CK2
EC_SMB_DA2

<29>

LTDP0_AUXP
LTDP0_AUXN

D15
E15

A5
B5

LTDP0_TXP1

LTDP0_HPD

H17

DAC_RED

B14

LTDP0_TXP2
LTDP0_TXN2

DAC_GREEN

A14

A7
B7

LTDP0_TXP3

DAC_BLUE

B15

DAC_HSYNC

G19
E19

APU_SIC
APU_SID

B22
B21

<29>

H_PROCHOT#

DAZ0Y600201

M_ZVDDIO_MEM_S

AD41

DISP_CLKIN_H

B20
A20

APU_RST#
LDT_RST#

DAC_SDA

D19
D21

SVD

DAC_ZVSS

A16

<10,12>
<10,12>

HDMI_DET

<10>

EDID_CLK
EDID_DATA

<11>
<11>

DAC_RED

<12>

DAC_GRN

<12>

DAC_BLU

<12>

CRT_HSYNC
CRT_VSYNC

<12>
<12>

CRT_DDC_CLK
CRT_DDC_DATA

<12>
<12>

CRT

2 499_0402_1%

THERMDA

SID

THERMDC

APU_RST_L

R118 1

R120 1

2 0_0402_5% APU_PROCHOT#
APU_ALERT#

PROCHOT_L

A22
B18
D29
D31
D35
D33
G27
B25
A25
D23
G23
E25
E23

A6@

UAPU

LDT_RST_L

LDT_PWROK

ALERT_L
TDI
TDO

APU_BP0
APU_BP1
APU_BP2
APU_BP3
APU_PLLTEST1
APU_PLLTEST0
APU_BPCLK_H
APU_BPCLK_L

EDID_CLK
EDID_DATA

R255 2
R256 2
RP23
8
7
6
5

T39
T40
T41

A29

FREE_2

GIO_TSTDTM0_SERIALCLK H21

TRST_L
DBRDY

GIO_TSTDTM0_CLKINIT

DAC_BLU
DAC_GRN
DAC_RED
DP_150_ZVSS

T42

APU_SCLK
APU_CLKINT

H25

1
2
3
4

150_0804_8P4R_1%

TCK
TMS

1 4.7K_0402_5%
1 4.7K_0402_5%

DBREQ_L
VDDCR_NB_SENSE

USB_ATEST1

VDDCR_CPU_SENSE

M_ANALOGIN

VDDIO_MEM_S_SENSE

M_ANALOGOUT

VSS_SENSE

TMON_CAL

AJ10
AJ8
R32
N32
AP29

HDMI_EN/DP_STEREOSYNCE21

VDD_095_FB_H

T45
T43
T44
T46
T47
DP_STEREOSYNC

VDD_095_FB_L

A4@

X4@
A4 PR KABINI AM5000IBJ44HM 1.5G BGA 769P APU

E1@

APU_PWRGD
C1270

ESDU@
1
2
100P_0402_50V8J

APU_RST#

E2@
C1273

ESDU@
2
100P_0402_50V8J

M_ZVDDIO

X2@

UAPU

3
5

APU_TRST#

@ RP11
11
1
2
3
4

APU_ALERT#
APU_SID
APU_PROCHOT#
APU_SIC

8
7
6
5

13
15
17
19

+MEM_VREF

10

11

12

13

14

15

16

19

R80
R82
R18

1
1
1

8
7
6
5
1K_0804_8P4R_5%
2 300_0402_5%
2 300_0402_5%
2 511_0402_1%

+1.8VS

17

APU_RST#
APU_PWRGD
APU_BPCLK_L

+1.8VS

RP5 @
1
2
3
4

APU_SVT
APU_SVC
APU_SVD

E1 PC 2M101082J2361 1G BGA 769P

PU +1.8VS + PD

8
7
6
5
1K_0804_8P4R_5%

PU +1.8VS

For HDMI Need

+3VS

RP4
1
2
3
4

R113
1K_0402_5%

DP_STEREOSYNC
CRT_HSYNC

E1PC@

2
+1.5V
R74
39.2_0402_1%
X2 ES2 KABINI ZMA5B078J2360 1.65G BGA CPU

ESDP@ C195
0.1U_0402_16V7K

2
@
@
C342
C164
1U_0402_6.3V6K
0.1U_0402_16V7K
2
1

PU +3VS

+3VS

R114
1K_0402_5%

E2 PR KABINI EM3000IBJ23HM 1.65G BGA 769P APU

+1.8VS

FT3_BGA769

E1 PR KABINI EM2100ICJ23HM 1G BGA769P APU

X5 ES2 ZM201079J4460 2G BGA 769P

18
20

APU_TCK

APU_TMS

APU_TDI

APU_TDO

RP6
APU_TDI
APU_TMS
APU_TCK
APU_DBREQ#

1
2
3
4

APU_SCLK
APU_CLKINT
APU_SCLK
APU_CLKINT

1K_0804_8P4R_5%
10

APU_PWRGD

12

APU_RST#

14

APU_DBRDY

16

APU_DBREQ#

18

APU_PLLTEST0

20

APU_PLLTEST1

+1.8VS

RP3 @
8
7
6
5

1
2
3
4

8
7
6
5
1K_0804_8P4R_5%

PD

RP7 @

APU_BP2
APU_BP3
APU_BP0
APU_BP1

1
2
3
4

APU_TRST#
APU_PLLTEST0
APU_PLLTEST1

1
2
3
4

8
7
6
5
1K_0804_8P4R_5%
RP8
+1.8VS
8
7
6
5
4

1K_0804_8P4R_5%

RP11, RP6 will @ when MP


R19 1

APU_BPCLK_H

2 511_0402_1%

MEM_MAB_EVENT#
1

1K_0804_8P4R_1%
2

2
C337
1U_0402_6.3V6K

@ SAMTE_ASP-136446-07-B
C163
0.1U_0402_16V7K

2012/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2015/04/22

Deciphered Date

Title

FT3 DDR3/DISP/MISC//HDT+

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

+3VS

H27
H29
D25
BP0 A27
BP1 B27
BP2 A26
BP3 B26
PLLTEST1 B28
PLLTEST0 A28
BYPASSCLK_H B24
BYPASSCLK_L A24
PLLCHRZ_H AV35
PLLCHRZ_L AU35
M_TEST E33

SIC

R416 1

DAC_ZVSS

FT3_BGA769

10K_0804_8P4R_5%
8
7
6
5

HDMI_CLK
HDMI_DATA

FT3 REV 0.51

X5@

RP2
1
2
3
4

CRT_HSYNC

SVC

APU_PWROK

A6 PR KABINI AM5200IAJ44HM 2G BGA769P APU

+1.5V

DAC_VSYNC

SVT

B19
APU_PWRGD
2 0_0402_5%
LDT_PWRGD A19

AV33
AU33

UAPU

FT3 REV 0.51

+VREF_DQ

<18>
<11>
<11>

+3VS

DISP_CLKIN_L

2 0_0402_5%

APU_VDD_RUN_FB_L

UAPU

M_VREFDQ

DAZ0Y700201

MEMORY VREF

2 100K_0402_5%

LTDP0_TXN3

APU_VDDNB_SEN
APU_VDD_SEN

UAPU

R897 1

ENBKL
APU_ENVDD
APU_INVT_PWM

LTDP0_TXN1

A6
B6

G31
D27
E29

JHDT2
15@

H19

LTDP0_TXN0

APU_SVT
APU_SVC
APU_SVD

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
<29>
<29>

2 2K_0402_1%

DIECRACKMON

APU_PWRGD

<18,24,29,6>

2 0_0402_5%
2 0_0402_5%

@
@

R117 1

M_VREF

UAPU

LA9912P

TDP1_HPD

LTDP0_TXP0

+1.8VS
14@

D17
E17

A4
B4

HDT+
LA9912P

TDP1_AUXN

TDP1_AUXP

DAC_SCL

<18,19>
<18,19>

R400 1

M0_CKE0

X4@
ZZZ

TDP1_TXP1

USB_ATEST0

M_CLK_H2

M_CHECK4

DDRAB_SRAS#
DDRAB_SCAS#
DDRAB_SWE#

A10
B10

K15
H15
<29>
<29>
<29>

DP_150_ZVSS
DP_2K_ZVSS

DP_BLON

UAPU
AJ34
AR38
AL38
AN35

DP_2K_ZVSS

M_CLK_L1

M_DATA59

AN38
AU38
AN37
AR37

<8>
<8>
<9>
<9>

<8,9>
<8,9>
<8,9>

M_CLK_H0

M_DATA55

L34
J38
J37
J34

DDRAB_SDQ24
DDRAB_SDQ25
DDRAB_SDQ26
DDRAB_SDQ27
DDRAB_SDQ28
DDRAB_SDQ29
DDRAB_SDQ30
DDRAB_SDQ31

DP2_TXP2
DP2_TXN2

M_DQS_L6

M_DATA52

G38
MEM_MAB_EVENT# AE34

MEM_MAB_RST#
MEM_MAB_EVENT#

<8>
<8>
<9>
<9>

AC35
AC34
AA34
AA32
AE38
AE37
AA37
AA38

DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#

M41
N40
T41
U40
L40
M40
R40
T40

<10>
<10>

HDMI

M_DQS_H2

M_DATA44

<8>
<8>
<8>
<8>
<9>
<9>
<9>
<9>

DDRAB_SDQ16
DDRAB_SDQ17
DDRAB_SDQ18
DDRAB_SDQ19
DDRAB_SDQ20
DDRAB_SDQ21
DDRAB_SDQ22
DDRAB_SDQ23

DP2_TXP1
DP2_TXN1

B16
A21
B17
DP_DIGON A17
DP_VARY_BL A18

DP_150_ZVSS

TDP1_TXN0

B33
A33
B40
A40
H41
H40
P41
P40
AH41
AH40
AP41
AP40
BA40
AY41
AY33
BA34
AA40
Y41

DDRAB_SDQS0
DDRAB_SDQS0#
DDRAB_SDQS1
DDRAB_SDQS1#
DDRAB_SDQS2
DDRAB_SDQS2#
DDRAB_SDQS3
DDRAB_SDQS3#
DDRAB_SDQS4
DDRAB_SDQS4#
DDRAB_SDQS5
DDRAB_SDQS5#
DDRAB_SDQS6
DDRAB_SDQS6#
DDRAB_SDQS7
DDRAB_SDQS7#

F40
F41
K40
K41
E40
E41
J40
J41

<10>
<10>

UAPUC
DISPLAY/SVI2/JTAG/TEST
TDP1_TXP0

M_DM5

M_DATA27

<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>
<8,9>

DDRAB_SDQ8
DDRAB_SDQ9
DDRAB_SDQ10
DDRAB_SDQ11
DDRAB_SDQ12
DDRAB_SDQ13
DDRAB_SDQ14
DDRAB_SDQ15

A9
B9

DP2_TXP0
DP2_TXN0

B32
B38
G40
N41
AG40
AN41
AY40
AY34
Y40

B37
A38
D40
D41
B36
A37
B41
C40

<10>
<10>

M_BANK0

M_DATA18

DDRAB_SDM0
DDRAB_SDM1
DDRAB_SDM2
DDRAB_SDM3
DDRAB_SDM4
DDRAB_SDM5
DDRAB_SDM6
DDRAB_SDM7

DDRAB_SDQ0
DDRAB_SDQ1
DDRAB_SDQ2
DDRAB_SDQ3
DDRAB_SDQ4
DDRAB_SDQ5
DDRAB_SDQ6
DDRAB_SDQ7

M_ADD8

M_DATA15

AJ38
AG35
N34

DDRAB_SBS0#
DDRAB_SBS1#
DDRAB_SBS2#
DDRAB_SDM[7..0]

B30
A32
B35
A36
B29
A30
A34
B34

M_ADD0

HDMI & LVDS should be reverse in KABINI:


APU TX0 to Connector TX2 ; APU TX1 to Connector TX1
APU TX2 to Connector TX0 ; APU TX3 to Connector CLK

<8,9>

DDRAB_SDQ[63..0]

MEMORY

DDRAB_SMA0 AG38
DDRAB_SMA1 W35
DDRAB_SMA2 W38
DDRAB_SMA3 W34
DDRAB_SMA4 U38
DDRAB_SMA5 U37
DDRAB_SMA6 U34
DDRAB_SMA7 R35
DDRAB_SMA8 R38
DDRAB_SMA9 N38
DDRAB_SMA10 AG34
DDRAB_SMA11 R34
DDRAB_SMA12 N37
DDRAB_SMA13 AN34
DDRAB_SMA14 L38
DDRAB_SMA15 L35
<8,9>
<8,9>
<8,9>
<8,9>

UAPUA

DDRAB_SMA[15..0]

<8,9>

Rev
1.0

VAWGA/GB

Monday, April 01, 2013

Sheet
E

of

37

UAPUB

APU POWER SEQUENCE

PCIE

<14>
<14>

LAN

<16>
<16>

WLAN

PCIE_DTX_C_ARX_P1
PCIE_DTX_C_ARX_N1
PCIE_DTX_C_ARX_P2
PCIE_DTX_C_ARX_N2

R10
R8

P_GPP_RXP0

P_GPP_TXP0

P_GPP_RXN0

P_GPP_TXN0

R5
R4

P_GPP_RXP1

P_GPP_TXP1

P_GPP_RXN1

P_GPP_TXN1

N5
N4

P_GPP_RXP2

P_GPP_TXP2

P_GPP_RXN2

P_GPP_TXN2

N10
N8

P_GPP_RXP3

P_GPP_TXP3

P_GPP_RXN3

P_GPP_TXN3

L2
L1

+RTC

G-A

K2
K1

PCIE_ATX_DRX_P1
PCIE_ATX_DRX_N1

C19
C20

1
1

2
2

0.1U_0402_16V7K
0.1U_0402_16V7K

J2
J1

PCIE_ATX_DRX_P2
PCIE_ATX_DRX_N2

C17
C18

1
1

2
2

0.1U_0402_16V7K
0.1U_0402_16V7K

EC_ON

PCIE_ATX_C_DRX_P1 <14>
PCIE_ATX_C_DRX_N1 <14>

LAN

PCIE_ATX_C_DRX_P2 <16>
PCIE_ATX_C_DRX_N2 <16>

WLAN

+3VALW/+5VALW

G-B

H2
H1

+1.8VALW

+0.95VALW
1

+0.95VS_APU_GFX

2 P_TX_ZVDD_095
R404
1.69K_0402_1%

W8

P_RX_ZVDD_095 W7

P_TX_ZVDD_095

L5
L4

P_GFX_RXP0

P_GFX_TXP0

P_GFX_RXN0

P_GFX_TXN0

J5
J4

P_GFX_RXP1

P_GFX_TXP1

P_GFX_RXN1

P_GFX_TXN1

G5
G4

P_GFX_RXP2

P_GFX_TXP2

P_GFX_RXN2

P_GFX_TXN2

D7
E7

P_GFX_RXP3

P_GFX_TXP3

P_GFX_RXN3

P_GFX_TXN3

P_RX_ZVDD_095

1
R73
1K_0402_1%

+0.95VS_APU_GFX

SYSON
+1.5V

G-C

G2
G1

SUSP#

F2
F1

+3VS

G-D

+1.8VS
E2
E1

+1.5VS

D2
D1

+0.95VS
VR_ON
+APU_CORE

G-E

FT3 REV 0.51

X4@

+APU_CORE_NB

FT3_BGA769

UAPUE
2

CLK/SATA/USB/SPI/LPC

R90
R96

2
2

AL4
AL5

SATA_RX0P

SATA_TX1N

USB_HSD1P

AY17
BA17

SATA_RX1N

AR19
AP19

SATA_ZVSS

BA30

SATA_ACT_L/GPIO67

AY12

SATA_X1

SATA_RX1P

USB_HSD2P
USB_HSD2N

SATA_ZVDD_095

USB_HSD3P
USB_HSD3N

T48

USB_HSD4P
USB_HSD4N
USB_HSD5P
USB_HSD5N

BA12

SATA_X2

USB_HSD6P
USB_HSD6N

U4
U5

0_0402_5%
2
@
2
@
0_0402_5%
2
R125 1
@
2
R126 1
@
0_0402_5%

LAN
<14>
<14>
<16>
<16>

R116 1
R119 1

CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_WLAN
CLK_PCIE_WLAN#

GFX_CLKP

USB_HSD7P

GFX_CLKN

USB_HSD7N

AC8
AC10

GPP_CLK0P

USB_HSD8P

GPP_CLK0N

USB_HSD8N

GPP_CLK1P AE4
GPP_CLK1N AE5

GPP_CLK1P

USB_HSD9P

GPP_CLK1N

USB_HSD9N

GPP_CLK2P AC4
GPP_CLK2NAC5

GPP_CLK2P

AA5
AA4

GPP_CLK3P

USB_SS_0TXP

GPP_CLK3N

USB_SS_0TXN

X14M_25M_48M_OSC

USB_SS_0RXP

WLAN

AP13

USB_SS_ZVSS

USB_SS_1TXN

N1

X48M_X2

USB_SS_1RXP

R103 R104 for EMI


<18,6>
<6>

R103 1
R104 1

LPC_CLK0_EC
LPC_CLK1
<18>
<18>
<18>
<18>
<18,6>
<18>

USB_SS_1RXN

@
@

2 0_0402_5%
2 0_0402_5%

AY2
AW2

SERIRQ
T50

AT2
AT1
AR2
AR1
AP2
AP1
AV29
AP25
AV2

USB20_P1
USB20_N1

<16>
<16>Touch

USB20_P3
USB20_N3

<11>
<11>CAMERA

USB20_P4
USB20_N4

<20>
<20>CardReader

USB20_P5
USB20_N5

<16>
<16>WLAN/BT

USB20_P6
USB20_N6

<17>
<17>USB2.0

LP1

USB20_P7
USB20_N7

<17>
<17>USB2.0

LP2

USB30_P8
USB30_N8

<17>
<17>MB

USB3.0 port0

USB30_P9
USB30_N9

<17>
<17>MB

USB3.0 port1

USB port
Screen

AG1
AG2
AF1
AF2
AE1
AE2
AD1
AD2
AC1
AC2
AB1
AB2
AA1
AA2
AE10

USBSS_ZVSS R644 1
USBSS_ZVDD R645 1

T2
T1

2 1K_0402_1%
2 1K_0402_1%

48MHz CRYSTAL

combo

48M_X2
R938
1M_0402_5%

+0.95VALW

RP12
APU_SPI_AISO
APU_SPI_AOSI_U
APU_SPI_CLK_U
APU_SPI_CS1#_U

USB30_MRX_DTX_P0<17>
USB30_MRX_DTX_N0<17>

R1
R2

<17>
USB30_MTX_C_DRX_P1
<17>
USB30_MTX_C_DRX_N1

W1
W2

1
2
3
4

8
7
6
5

EC_SPI_AISO
EC_SPI_AOSI
EC_SPI_CLK
EC_SPI_CS1#

SPI_CLK/GPIO162

AU7

APU_SPI_CLK
APU_SPI_CS1#

SPI_CS2_L/GPIO166 AR4

LAD0

AR11
SPI_DI/GPIO164 AR7
SPI_HOLD_L/GEVENT9_LAU11
SPI_WP_L/GPIO161 AU9

LAD1

SPI_DO/GPIO163

LAD2
LAD3
LFRAME_L

APU_SPI_AOSI
APU_SPI_AISO
APU_SPI_HOLD#
APU_SPI_WP#

T51

R110 1
R111 1

2 33_0402_5%
2 33_0402_5%

APU_SPI_CLK_U
APU_SPI_CS1#_U

R109 1

2 33_0402_5%

APU_SPI_AOSI_U

APU_SPI_AISO

LDRQ0_L

X4@

FT3_BGA769

EC_SPI_AISO
EC_SPI_AOSI
EC_SPI_CLK
EC_SPI_CS1#

<18>
<18>
<18>
<18>

C794
6P_0402_50V8

C795
6P_0402_50V8

+3VALW

R108 1

R614
10K_0402_5%
1
2APU_SPI_CS1#_U
APU_SPI_AISO_U
1
2APU_SPI_WP#
R616
10K_0402_5%

2 33_0402_5%

2
U56
1
2
3
4

CS#
SO/SIO1
WP#
GND

VCC
HOLD#
SCLK
SI/SIO0

8
7
6
5

APU_SPI_HOLD#
APU_SPI_CLK_U
APU_SPI_AOSI_U

APU->EC->ROM must route as


W25Q32FVSSIG SOIC 8P SPI ROM
Daisy Chain for Share ROM quality
APU_SPI_CLK_U 1
(RP12 was request to added for the recoverable solution
as original method--backup)
2012/04/22

1
C635
0.1U_0402_16V4Z
2
R615
10K_0402_5%
4

2
1
2
R617 EMIU@
10_0402_5%
C636 EMIU@
10P_0402_50V8J

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

+3VALW

LPC_CLKRUN_L
LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L

4MB SPI ROM


(Current Share mode)

R108 close to ROM

SERIRQ/GPIO48

0_0804_8P4R_5%

USB30_MRX_DTX_P1<17>
USB30_MRX_DTX_N1<17>

R109,R110,R111 close to APU


LPCCLK1

Y20
48MHZ_8PF_X3S048000D81H-W

<17>
USB30_MTX_C_DRX_P0
<17>
USB30_MTX_C_DRX_N0

V2
V1

48M_X1

LPCCLK0

FT3 REV 0.51

<17>
<17>Right

AG7
AG8

SPI_CS1_L/GPIO165 AW9

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

USB20_P0
USB20_N0

X48M_X1
USB_SS_1TXP

48M_X2

AJ4
AJ5

AE8
USB_SS_ZVDD_095_USB3_DUAL

GPP_CLK2N

USB_SS_0RXN

N2

48M_X1

2 11.8K_0402_1%

SATA_TX1P
USB_HSD1N

1 1K_0402_1% SATA_ZVSS
1 1K_0402_1% SATA_ZVDD

R641 1

AY19
BA19

<13> SATA_DTX_C_ARX_N1
<13> SATA_DTX_C_ARX_P1
+0.95VS

USB_HSD0P

USB_ZVSS

SATA_RX0N
USB_HSD0N

<13> SATA_ATX_DRX_P1
<13> SATA_ATX_DRX_N1

ODD

USB_ZVSS

AG4

BA16
AY16

<13> SATA_DTX_C_ARX_N0
<13> SATA_DTX_C_ARX_P0

SATA_TX0N

HDD

W4
USBCLK/14M_25M_48M_OSC

SATA_TX0P

BA14
AY14

<13> SATA_ATX_DRX_P0
<13> SATA_ATX_DRX_N0

2015/04/22

Deciphered Date

Title

FT3 PCIE/SATA/CLK/USB/SPI

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
1.0

VAWGA/GB

Date:

Thursday, March 28, 2013

Sheet
E

of

37

ACPI/SD/AZ/GPIO/RTC/MISC

EC_RSMRST#_R

AY4
AY9

LPC_RST_L

AY5

RSMRST_L

SD_PWR_CTRL

PCIE_RST_L

SD_CLK/GPIO73
SD_CMD/GPIO74
SD_CD/GPIO75

<18>
<16>

PBTN_OUT#

PWR_GOOD_APU
T36
APU_PCIE_WAKE#

APU_PCIE_WAKE#

<18>
<18>

PWR_BTN_L

SD_WP/GPIO76

AY3
BA5
TEST0
CS_JTAG_TMS_TEST1
TEST2

AU13
AY10
AY6
AR23
AR31
AN5
AL7

KBRST#
GATEA20
EC_SCI#
EC_SMI#

SD_DATA3/GPIO80

BA22
AY21
AY24
BA24

SD_LED/GPIO45

AY25

TEST1/TMS

SCL0/GPIO43

TEST2

SDA0/GPIO47

AU25
AV25

SYS_RESET_L/GEVENT19_L

SD_DATA0/GPIO77

WAKE_L/GEVENT8_L

SD_DATA1/GPIO78

SLP_S3_L

KBRST_L

SCL1/GPIO227

GA20IN/GEVENT0_L

<14>
<16>

<17>
<17>

<21>

LAN_CLKREQ#
WLAN_CLKREQ#

USB_OC0#
USB_OC1#

T52
T54

HDA_SDIN0

T55
T56
T57

AY8
AW1
AV1
AY1
AN2
AN1
AK2
AK1
AM1
AL2
AM2
AL1

HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SYNC
HDA_RST#
32K_X1

AJ2

32K_X2

AJ1

C912
150P_0402_50V8J

SDA1/GPIO228

APU_SCLK0
APU_SDATA0

AY11
BA11

LPC_SMI_L/GEVENT23_L

GPIO49

AC_PRES/IR_RX0/GEVENT16_L

GPIO55

IR_TX0/GEVENT21_L

GPIO57

IR_TX1/GEVENT6_L

GPIO58

IR_RX1/GEVENT20_L

GPIO59

IR_LED_L/LLB_L/GPIO184

GPIO64

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60

GPIO68

CLK_REQ1_L/GPIO61

GPIO69

CLK_REQ2_L/GPIO62

GPIO70

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63

GPIO71

CLK_REQG_L/GPIO65/OSCIN

GPIO174

AP27
AY28
BA28
AV23
AP21
BA26
AV19
AY27
BA27
AU21
AY26
AV21
AM21
BA3

USB_OC2_L/TCK/GEVENT14_L
USB_OC3_L/TDO/GEVENT15_L
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167

EC_LID_OUT#

AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169

GENINT1_L/GPIO32

AZ_SDIN3/GPIO170

GENINT2_L/GPIO33

BT_OFF#

<16>

WL_OFF#
ODD_EN

<16>
<13>

APU_SPKR

<21>

If use as SMBUS :
Pulled-up to VDD_33(port0) , VDD_33_ALW(port1) with a resistor of:
Qty: 1; Value: 2.2 K; Tol: 5%
If no use :
Pulled-up to VDD_33(port0) , VDD_33_ALW(port1) with a resistor of:
Qty: 1; Value: 10 K; Tol: 5%

+3VS

UMA@

Function

<18,24,29,4>

H_PROCHOT#

PX5.5

UMA

PX@ R912
10K_0402_5%

32.768KMHz CRYSTAL
<18>

EC_LID_OUT#

BA29
AP23

32K_X1
1

AZ_SYNC
AZ_RST_L

FANIN0/GPIO56

AV31
AU31

RTCCLK

AV11

FANOUT0/GPIO52

R911
10K_0402_5%

Board_ID1

GEVENT2#

GEVENT2_L

USB_OC1_L/TDI/GEVENT13_L

Board_ID1
2 0_0402_5%
R661 1
@
APU_GPIO174

<14,16>

Board_ID1

AV17
GEVENT4_L BA4
GEVENT7_L AR15
GEVENT10_L AP17
GEVENT11_L AP11
GEVENT17_L AN8
BLINK/GEVENT18_L AU17
GEVENT22_L BA6

USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L

APU_PCIE_RST#
1

<16,8,9>
<16,8,9>

APU_SCLK0
APU_SDATA0

APU_SCLK1
APU_SDATA1

LPC_PME_L/GEVENT3_L

SPKR/GPIO66

AU29
AW29
AR27
AV27
AY29

2
R907
33_0402_5%

TEST0

GPIO51

LAN_CLKREQ#
WLAN_CLKREQ#
T53

APU_PCIE_RST#_BUF

SLP_S5_L

GPIO50

AP15
AV13
BA9
BA10
AV15

AY23
AY20
BA20

PWR_GOOD

SD_DATA2/GPIO79

SLP_S3#
SLP_S5#

<18>
<18>
<18>
<18>

BA8
AM19
AY7
AW11

BA23
AY22

LPC_RST_A#
APU_PCIE_RST#_BUF

2
R602
33_0402_5%

LPC_RST#

UAPUD

C615
150P_0402_50V8J
<18>

32K_X2

R914
20M_0402_5%

<16>

BT_DISABLE#

X32K_X1

Y3
32.768KHZ_12.5P_1TJF125DP1A000D
X32K_X2

<18>

RTC_CLK

FT3 REV 0.51

X4@

FT3_BGA769

PU +3VALW + PD

1
C682
22P_0402_50V8J

C686
18P_0402_50V8J

+3VALW
RP13
2 10K_0402_5%
<21>
<21>
<21>
<21>

1
2
3
4

HDA_RST#_AUDIO
HDA_SYNC_AUDIO
HDA_BITCLK_AUDIO
HDA_SDOUT_AUDIO

8
7
6
5

HDA_RST#
HDA_SYNC
HDA_BITCLK
HDA_SDOUT

STRAPS OF APU

33_0804_8P4R_5%

LPC_FRAME#

PU +3VALW
APU_SCLK1
APU_SDATA1
APU_PCIE_WAKE#

EC_RSMRST# , POWER_GOOD
follow CRB
(APU side 1.8V power rail)

R345
47K_0402_5%

NORMAL POWR
UP/RESET TIMING
(DEFAULT)

LPC ROM

BOOT FAIL TIMER


DISABLED
(DEFAULT)

CLKGEN
DISABLED

3.3V SPI ROM


(DEFAULT)

FAST POWER
UP/RESET TIMING
FOR SIMULATION

R685
10K_0402_5%

<18,5>
<18,5>
<5>

RB751V-40TE17_SOD323-2

2 8.2K_0402_5%

WLAN_CLKREQ#

R621 1
R673 1
R674 1

2 8.2K_0402_5%
2 2.2K_0402_5%
2 2.2K_0402_5%

LAN_CLKREQ#
APU_SCLK0
APU_SDATA0

PU +3VALW + PD

R684 1

2 10K_0402_5%

HDA_BITCLK

R688 1

2 10K_0402_5%

HDA_SDIN0

1U_0402_6.3V6K
C212

LPC_FRAME#
LPC_CLK0_EC
LPC_CLK1
GEVENT2#
RTC_CLK

+3VALW

RP9 @
1
2
3
4

@
R903
2K_0402_5%

8
7
6
5

R622 1

1U_0402_6.3V6K
C209

+3VS

R949
10K_0402_5%
2

PWR_GOOD_APU

@
R950
2.2K_0402_5%

R929
2.2K_0402_5%

@
R927
2K_0402_5%

R926
2K_0402_5%

SYS_PWRGD_EC

@
R928
10K_0402_5%

R925
10K_0402_5%

<18>

@
R904
10K_0402_5%

R902
10K_0402_5%

RB751V-40TE17_SOD323-2

PU +3VS

1K_0804_8P4R_5%
RP10 @
TEST0
CS_JTAG_TMS_TEST1
TEST2

1
2
3
4

8
7
6
5
15K_0804_8P4R_5%

2012/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2015/04/22

Deciphered Date

Title

FT3 GPIO/AZ/MISC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
1.0

VAWGA/GB

Date:

+3VALW

EC_RSMRST#_R

EC_RSMRST#

<18>

EC_LID_OUT#
USB_OC0#
USB_OC1#

D5

PD

RTC_CLK

2 100K_0402_5%
2 100K_0402_5%
2 100K_0402_5%

1.8V SPI ROM

D3
1

+1.8VALW

Must connected to 10 ms RC delay


circuit on +1.8-V S5 power rail.

10K_0804_8P4R_5%
R656 1
R650 1
R651 1

GEVENT2_L

CLKGEN
ENABLE
(DEFAULT)

8
7
6
5

LPC_CLK1

BOOT FAIL TIMER


ENABLED

RP14

+3VALW
1
2
3
4

LPC_CLK0_EC

SPI ROM
(DEFAULT)

APU_GPIO174

2 10K_0402_5%

R686 1

R691 1

Thursday, March 28, 2013

Sheet
E

of

37

RTC OF APU

CORE POWER OF APU

VDDBT_RTC_G
+RTCBATT

VDDCR_CPU
+RTCBATT_R

180P_0402_50V8J

W=20mils

1
C166
0.22U_0402_10V6K

R93

2 10K_0402_5%

C190

1U_0402_6.3V6K

C189

1U_0402_6.3V6K

1U_0402_6.3V6K

C188

C187

1U_0402_6.3V6K

C186

1U_0402_6.3V6K

1U_0402_6.3V6K

C184

C183

1U_0402_6.3V6K

1U_0402_6.3V6K

C182

C181

1U_0402_6.3V6K

1U_0402_6.3V6K

C180

C179

+APU_CORE

CLRP1 J@
SHORT PADS

Need OPEN
1

for Clear CMOS

INTEGRATED GPU POWER OF APU

+3VALW/+3VS OF APU

VDDCR_NB

+APU_CORE_NB

+3VALW

+3VS

@
+3VALW_APU

UAPUH

1U_0402_6.3V6K

2
UAPUF

C232
180P_0402_50V8J

1U_0402_6.3V6K

180P_0402_50V8J

1U_0402_6.3V6K

C233

1U_0402_6.3V6K

C240

C239

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C238

C237

10U_0603_6.3V6M

1U_0402_6.3V6K

10U_0603_6.3V6M

C236

+0.95VALW

AL10
AL11

+1.5VS

B1
B2

+1.8VALW

AL13
AM13
AR5
AU4
AV7
AW5

C245

C248

AE11
AE13
AJ11
AJ13

+0.95VALW
2

180P_0402_50V8J

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

VDD_095_USB3_DUAL

1U_0402_6.3V6K

180P_0402_50V8J

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

VDDIO_MEM_S_6
VDDIO_MEM_S_7
VDDIO_MEM_S_8
VDDIO_MEM_S_9
VDDIO_MEM_S_10
VDDIO_MEM_S_11
VDDIO_MEM_S_12
VDDIO_MEM_S_13
VDDIO_MEM_S_14
VDDIO_MEM_S_15
VDDIO_MEM_S_16
VDDIO_MEM_S_17
VDDIO_MEM_S_18
VDDIO_MEM_S_19
VDDIO_MEM_S_20
VDDIO_MEM_S_21
VDDIO_MEM_S_22
VDDIO_MEM_S_23

L13
VDDCR_NB_2 L17
VDDCR_NB_3 N11
VDDCR_NB_4 N13
VDDCR_NB_5 N17
VDDCR_NB_6 R11
VDDCR_NB_7 R13
VDDCR_NB_8 R17
VDDCR_NB_9 U13
VDDCR_NB_10 U17
VDDCR_NB_11 W13
VDDCR_NB_12 W17
VDDCR_NB_13 AA13
VDDCR_NB_14 AA17
VDDCR_NB_15 AC13
VDDCR_NB_16 AC17
VDDCR_NB_17 AE15
VDDCR_NB_18 AE17
VDDCR_NB_19 AE19
VDDCR_NB_20 AG17
VDDCR_NB_21 AG21

VDDIO_AZ_ALW_1

VDD_18_ALW_1

VDD_18_1

VDD_18_ALW_2

VDD_18_2

VDD_33_ALW_1

VDD_33_1

VDD_33_ALW_2

VDD_33_2
VDD_095_1

VDD_095_USB3_DUAL_2
VDD_095_USB3_DUAL_3
VDD_095_USB3_DUAL_4
VDD_095_ALW_1
VDD_095_ALW_2
VDD_095_ALW_3
VDD_095_ALW_4

VDD_095_GFX_2 W10

AN4

+APU_CORE_NB

+1.8VS

+3VS
+0.95VS

A8
A13
A23
A31
A35
A39
B8
B13
B23
B31
B39
C1
C2
C5
C7
C9
C11
C13
C15
C17
C19
C21
C23
C25
C27
C29
C31
C33
C35
C37
C39
C41
D9
D11
D13
E3
E4
E9
E11
E13
E27
E31
E35
E38
E39
G3
G7
G11
G13
G15
G17
G21
G25
G29
G35
G37
G39
G41
H11
H13
H23
H31

GND

VSS_1

VSS_63

VSS_2

VSS_64

VSS_3

VSS_65

VSS_4

VSS_66

VSS_5

VSS_67

VSS_6

VSS_68

VSS_7

VSS_69

VSS_8

VSS_70

VSS_9

VSS_71

VSS_10

VSS_72

VSS_11

VSS_73

VSS_12

VSS_74

VSS_13

VSS_75

VSS_14

VSS_76

VSS_15

VSS_77

VSS_16

VSS_78

VSS_17

VSS_79

VSS_18

VSS_80

VSS_19

VSS_81

VSS_20

VSS_82

VSS_21

VSS_83

VSS_22

VSS_84

VSS_23

VSS_85

VSS_24

VSS_86

VSS_25

VSS_87

VSS_26

VSS_88

VSS_27

VSS_89

VSS_28

VSS_90

VSS_29

VSS_91

VSS_30

VSS_92

VSS_31

VSS_93

VSS_32

VSS_94

VSS_33

VSS_95

VSS_34

VSS_96

VSS_35

VSS_97

VSS_36

VSS_98

VSS_37

VSS_99

VSS_38

VSS_100

VSS_39

VSS_101

VSS_40

VSS_102

VSS_41

VSS_103

VSS_42

VSS_104

VSS_43

VSS_105

VSS_44

VSS_106

VSS_45

VSS_107

VSS_46

VSS_108

VSS_47

VSS_109

VSS_48

VSS_110

VSS_49

VSS_111

VSS_50

VSS_112

VSS_51

VSS_113

VSS_52

VSS_114

VSS_53

VSS_115

VSS_54

VSS_116

VSS_55

VSS_117

VSS_56

VSS_118

VSS_57

VSS_119

VSS_58

VSS_120

VSS_59

VSS_121

VSS_60

VSS_122

VSS_61

VSS_123

VSS_62

VSS_124

J3
J7
J8
J39
K11
K13
K17
K19
K21
K23
K25
K27
K29
K31
L3
L7
L8
L10
L11
L15
L19
L31
L39
L41
M1
M2
N3
N7
N15
N19
N25
N29
N31
N39
P1
P2
R3
R7
R15
R19
R25
R29
R39
R41
U1
U2
U3
U7
U8
U11
U15
U19
U25
U29
U31
U39
W3
W5
W11
W15
W19
W25

W29
W39
W41
Y1
Y2
AA3
AA7
AA8
AA11
AA15
AA19
AA25
AA29
AA39
AC3
AC7
AC11
AC15
AC19
AC25
AC29
AC31
AC39
AC41
AE3
AE7
AE25
AE29
AE32
AE39
AG3
AG5
AG10
AG11
AG13
AG15
AG19
AG25
AG29
AG31
AG39
AG41
AH1
AH2
AJ3
AJ7
AJ15
AJ17
AJ19
AJ23
AJ25
AJ29
AJ31
AJ32
AJ39
AL3
AL8
AL15
AL17
AL19
AL25
AL29

VSS_188

VSS_127

VSS_189

VSS_128

VSS_190

VSS_129

VSS_191

VSS_130

VSS_192

VSS_131

VSS_193

VSS_132

VSS_194

VSS_133

VSS_195

VSS_134

VSS_196

VSS_135

VSS_197

VSS_136

VSS_198

VSS_137

VSS_199

VSS_138

VSS_200

VSS_139

VSS_201

VSS_140

VSS_202

VSS_141

VSS_203

VSS_142

VSS_204

VSS_143

VSS_205

VSS_144

VSS_206

VSS_145

VSS_207

VSS_146

VSS_208

VSS_147

VSS_209

VSS_148

VSS_210

VSS_149

VSS_211

VSS_150

VSS_212

VSS_151

VSS_213

VSS_152

VSS_214

VSS_153

VSS_215

VSS_154

VSS_216

VSS_155

VSS_217

VSS_156

VSS_218

VSS_157

VSS_219

VSS_158

VSS_220

VSS_159

VSS_221

VSS_160

VSS_222

VSS_161

VSS_223

VSS_162

VSS_224

VSS_163

VSS_225

VSS_164

VSS_226

VSS_165

VSS_227

VSS_166

VSS_228

VSS_167

VSS_229

VSS_168

VSS_230

VSS_169

VSS_231

VSS_170

VSS_232

VSS_171

VSS_233

VSS_172

VSS_234

VSS_173

VSS_235

VSS_174

VSS_236

VSS_175

VSS_237

VSS_176

VSS_238

VSS_177

VSS_239

VSS_178

VSS_240

VSS_179

VSS_241

VSS_180

VSS_242

VSS_181

VSSBG_DAC

VSS_182

VBURN

VSS_183

PSEN

AL39
AL41
AM11
AM27
AM31
AN3
AN7
AN39
AP31
AR3
AR13
AR17
AR21
AR25
AR29
AR39
AR41
AU1
AU2
AU3
AU15
AU19
AU23
AU27
AU39
AV9
AW3
AW7
AW13
AW15
AW17
AW19
AW21
AW23
AW25
AW27
AW31
AW33
AW35
AW37
AW39
AW41
AY13
AY15
AY18
AY30
BA2
BA7
BA13
BA15
BA18
BA21
BA25
BA31
BA35
BA39
A15
AL31
AM29

VSS_184
VSS_185
VSS_186

FT3 REV 0.51

FT3 REV 0.51

X4@

X4@

FT3_BGA769

FT3_BGA769

+0.95VS_APU_GFX

FT3_BGA769

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/04/22

2015/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

VSS_187

VSS_126

FT3 REV 0.51

Issued Date

VSS_125

VDD_095_GFX_3 AA10

VDDBT_RTC_G

X4@

VDD_18_ALW

AM15
AM17

AG23
VDD_095_2 AG27
VDD_095_3 AJ21
VDD_095_4 AJ27
VDD_095_5 AL21
VDD_095_6 AL23
VDD_095_7 AL27
VDD_095_8 AM23
VDD_095_9 AM25

VDD_095_USB3_DUAL_1

VDD_095_ALW

A2
A3
B3
C3

VDD_095_GFX_1 U10

+RTCBATT_R

+APU_CORE

VDDIO_AZ_ALW_2

VDD_18_4

C246

C250

C244

C160

C222

VDDIO_MEM_S_5

VDD_18_3

+1.8VALW

C219

C217

C220

C218

C221

C214

VDDIO_MEM_S_4

+3VALW_APU

C216

C938

C937

VDDIO_MEM_S_3

VDD_18

+1.8VS

+0.95VALW

VDDIO_MEM_S_2

VDDCR_NB_1

+0.95VALW

VDDCR_CPU_2 L23
VDDCR_CPU_3 L25
VDDCR_CPU_4 L27
VDDCR_CPU_5 L29
VDDCR_CPU_6 N21
VDDCR_CPU_7 N23
VDDCR_CPU_8 N27
VDDCR_CPU_9 R21
VDDCR_CPU_10 R23
VDDCR_CPU_11 R27
VDDCR_CPU_12 U21
VDDCR_CPU_13 U23
VDDCR_CPU_14 U27
VDDCR_CPU_15 W21
VDDCR_CPU_16 W23
VDDCR_CPU_17 W27
VDDCR_CPU_18 AA21
VDDCR_CPU_19 AA23
VDDCR_CPU_20 AA27
VDDCR_CPU_21 AC21
VDDCR_CPU_22 AC23
VDDCR_CPU_23 AC27
VDDCR_CPU_24 AE21
VDDCR_CPU_25 AE23
VDDCR_CPU_26 AE27

+1.8VALW/+1.8VS OF APU

C933

C203

L22
2
1
FBMA-L11-201209-121LMA50T_0805

VDDCR_CPU_1 L21

VDDIO_MEM_S_1

VDD_095_GFX

1U_0402_6.3V6K

1U_0402_6.3V6K

C255

C254

4.7U_0603_6.3V6K

C256

C161

UAPUG
GND

POWER

J35
L32
L37
N35
R31
R37
U32
U35
W31
W32
W37
AA31
AA35
AC32
AC37
AE31
AE35
AG32
AG37
AJ35
AL32
AL37
AR35

+1.5V

+1.5VS

C936

180P_0402_50V8J

180P_0402_50V8J

C259

180P_0402_50V8J

C258

C231

180P_0402_50V8J

C230

180P_0402_50V8J

180P_0402_50V8J
@

C207

180P_0402_50V8J

1U_0402_6.3V6K

C213

C260

1U_0402_6.3V6K

C206

1U_0402_6.3V6K

1U_0402_6.3V6K

C204

1U_0402_6.3V6K

C205

1U_0402_6.3V6K

10U_0603_6.3V6M

C199

+0.95VS_APU_GFX

VDD_095
C198

10U_0603_6.3V6M

C934

C935

+0.95VALW/+0.95VS OF APU
+0.95VS

180P_0402_50V8J

180P_0402_50V8J

C208

C210

0.1U_0402_16V7K

C211

0.1U_0402_16V7K

C932

C930

0.1U_0402_16V7K

C931

0.1U_0402_16V7K

0.1U_0402_16V7K

C929

C928

0.1U_0402_16V7K

C927

0.1U_0402_16V7K

C926

0.1U_0402_16V7K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C923

C949

C925

C924

VDDIO_AZ_ALW
(Could be S0 or S5 power rail)

VDDIO_MEM_S
1

1
0_0603_5%

VDD_33_ALW

PLANE SPLIT

+1.5V

1U_0402_6.3V6K

C253

VDD_33

+1.5V/+1.5VS OF APU

C252

180P_0402_50V8J

C257

1U_0402_6.3V6K

C249

180P_0402_50V8J

1U_0402_6.3V6K

C197

C194

1U_0402_6.3V6K

1U_0402_6.3V6K

C193

C191

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

C192

C202

1U_0402_6.3V6K

C201

C200

2
R582

FT3 PWR/GND
Rev
1.0

VAWGA/GB

Thursday, March 28, 2013

Sheet
E

of

37

+1.5V

DDRAB_SDQ16
DDRAB_SDQ17

DDRAB_SDQS4#
DDRAB_SDQS4

DDRAB_SDQS4#
DDRAB_SDQS4
DDRAB_SDQ34
DDRAB_SDQ35

DDRAB_SDQ40
DDRAB_SDQ41
DDRAB_SDM5
DDRAB_SDQ42
DDRAB_SDQ43
DDRAB_SDQ48
DDRAB_SDQ49
<4,9>
<4,9>

DDRAB_SDQS6#
DDRAB_SDQS6

DDRAB_SDQS6#
DDRAB_SDQS6
DDRAB_SDQ50
DDRAB_SDQ51
DDRAB_SDQ56
DDRAB_SDQ57
DDRAB_SDM7
DDRAB_SDQ58
DDRAB_SDQ59
R69
10K_0402_5%
1
2

+3VS

R70
+3VS
2

10K_0402_5%

C135
2.2U_0603_6.3V6K

C136
0.1U_0402_16V4Z

205

G1

G2

DDRAB_SMA6
DDRAB_SMA4

+1.5V

R65
20K_0402_1%

DDRAB_SMA2
DDRAB_SMA0

DDRA_ODT1

VREF for DIMM1,2


+1.5V

DDRA_SCS0#
DDRA_ODT0

DDRAB_SMA11
DDRAB_SMA7

DDRAB_SBS1#
DDRAB_SRAS#

4.7U_0603_6.3V6K

<4,9>
<4,9>

<4>

DDRA_CKE1

DDRAB_SMA15
DDRAB_SMA14

DDRA_CLK1
DDRA_CLK1#

0.1U_0402_16V4Z

DDRAB_SDQ32
DDRAB_SDQ33

C127

DDRAB_SMA13
DDRA_SCS1#

C126

DDRA_SCS1#

0.1U_0402_16V4Z

<4>

0.1U_0402_16V4Z

DDRAB_SWE#
DDRAB_SCAS#

DDRAB_SWE#
DDRAB_SCAS#

C123

<4,9>
<4,9>

DDRAB_SMA10
DDRAB_SBS0#

0.1U_0402_16V4Z

DDRAB_SBS0#

C122

<4,9>

DDRA_CLK0
DDRA_CLK0#

DDRA_CKE1

0.1U_0402_16V4Z

DDRA_CLK0
DDRA_CLK0#

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

C121

<4>
<4>

0.1U_0402_16V4Z

DDRAB_SMA3
DDRAB_SMA1

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

DDRAB_SDQ30
DDRAB_SDQ31

C120

DDRAB_SMA8
DDRAB_SMA5

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

<4,9>
<4,9>

DDRAB_SDQS3#
DDRAB_SDQS3

0.1U_0402_16V4Z

DDRAB_SMA12
DDRAB_SMA9

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

DDRAB_SDQS3#
DDRAB_SDQS3

C119

DDRAB_SBS2#

DDRAB_SDQ28
DDRAB_SDQ29

0.1U_0402_16V4Z

DDRAB_SBS2#

DDRA_CKE0

DDRAB_SDQ22
DDRAB_SDQ23

C118

DDRA_CKE0

<4,9>

+0.75VS

0.1U_0402_16V4Z

<4>
2

+1.5V

DDRAB_SDM2
C117

DDRAB_SDQ26
DDRAB_SDQ27

DDRAB_SDQ20
DDRAB_SDQ21

0.1U_0402_16V4Z

DDRAB_SDM3

+1.5V/+0.75VS OF DIMM1

0.1U_0402_16V4Z

DDRAB_SDQ24
DDRAB_SDQ25

<4,9>

MEM_MAB_RST#

DDRAB_SDQ14
DDRAB_SDQ15

C116

DDRAB_SDQ18
DDRAB_SDQ19

DDRAB_SDM1
MEM_MAB_RST#

C115

DDRAB_SDQS2#
DDRAB_SDQS2

DDRAB_SDQ12
DDRAB_SDQ13

C114

<4,9>
<4,9>

DDRAB_SDQS2#
DDRAB_SDQS2

<4,9>

DDRAB_SDQ6
DDRAB_SDQ7

DDRAB_SDQ10
DDRAB_SDQ11

<4,9>

DDRAB_SMA[0..15]

DDRA_CLK1
DDRA_CLK1#

<4>
<4>

DDRAB_SBS1#
DDRAB_SRAS#

<4,9>
<4,9>

DDRA_SCS0#
DDRA_ODT0

<4>
<4>

DDRA_ODT1

<4>

+VREF_DQ

R66
1K_0402_1%
+VREF_CA

DDRAB_SDQS1#
DDRAB_SDQS1

DDRAB_SMA[0..15]

<4,9>

DDRAB_SDQS1#
DDRAB_SDQS1

DDRAB_SDQS0#
DDRAB_SDQS0

DDRAB_SDQ[0..63]
DDRAB_SDM[0..7]

R67
20K_0402_1%

R68
1K_0402_1%
1

<4,9>
<4,9>

<4,9>
<4,9>

DDRAB_SDQ8
DDRAB_SDQ9

DDRAB_SDM[0..7]
DDRAB_SDQS0#
DDRAB_SDQS0

DDRAB_SDQ[0..63]

DDRAB_SDQ4
DDRAB_SDQ5

DDRAB_SDQ2
DDRAB_SDQ3

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

DDRAB_SDM0

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

15mil
+VREF_CA
DDRAB_SDQ36
DDRAB_SDQ37
DDRAB_SDM4
DDRAB_SDQ38
DDRAB_SDQ39
DDRAB_SDQ44
DDRAB_SDQ45
DDRAB_SDQS5#
DDRAB_SDQS5

C167

DDRAB_SDQ0
DDRAB_SDQ1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

C134

C142

C176

JDIMM1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

0.1U_0402_16V4Z

1000P_0402_50V7K

0.1U_0402_16V4Z

+1.5V

15mil

1000P_0402_50V7K

+VREF_DQ

1
3

DDRAB_SDQS5#
DDRAB_SDQS5

<4,9>
<4,9>

DDRAB_SDQS7#
DDRAB_SDQS7

<4,9>
<4,9>

MEM_MAB_EVENT#
APU_SDATA0
APU_SCLK0

<4,9>
<16,6,9>
<16,6,9>

DDRAB_SDQ46
DDRAB_SDQ47
DDRAB_SDQ52
DDRAB_SDQ53
DDRAB_SDM6
DDRAB_SDQ54
DDRAB_SDQ55
DDRAB_SDQ60
DDRAB_SDQ61
DDRAB_SDQS7#
DDRAB_SDQS7
DDRAB_SDQ62
DDRAB_SDQ63
MEM_MAB_EVENT#

+0.75VS
4

206

FOX_AS0A626-U8SN-7F
ME@

2012/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

DIMM_A H:8mm

2015/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

<Address: 00>

Date:

DDR3 SODIMM-I Socket


Rev
1.0

VAWGA/GB

Thursday, March 28, 2013

Sheet
E

of

37

+VREF_DQ

+1.5V

DDRAB_SDQS1#
DDRAB_SDQS1

DDRAB_SDQS1#
DDRAB_SDQS1
DDRAB_SDQ10
DDRAB_SDQ11
DDRAB_SDQ16
DDRAB_SDQ17

DDRAB_SDQ40
DDRAB_SDQ41
DDRAB_SDM5
DDRAB_SDQ42
DDRAB_SDQ43
DDRAB_SDQ48
DDRAB_SDQ49
<4,8>
<4,8>

DDRAB_SDQS6#
DDRAB_SDQS6

DDRAB_SDQS6#
DDRAB_SDQS6
DDRAB_SDQ50
DDRAB_SDQ51
DDRAB_SDQ56
DDRAB_SDQ57
DDRAB_SDM7
DDRAB_SDQ58
DDRAB_SDQ59
R71
10K_0402_5%
1
2

+3VS

1
R72

2
10K_0402_5%

205

G1

4.7U_0603_6.3V6K

DDRAB_SDQ34
DDRAB_SDQ35

0.1U_0402_16V4Z

DDRAB_SDQS4#
DDRAB_SDQS4

C158

DDRAB_SDQS4#
DDRAB_SDQS4

C175

<4,8>
<4,8>

0.1U_0402_16V4Z

DDRAB_SDQ32
DDRAB_SDQ33

0.1U_0402_16V4Z

DDRB_SCS1#

DDRAB_SMA13
DDRB_SCS1#

C172

<4>

DDRAB_SWE#
DDRAB_SCAS#

DDRAB_SWE#
DDRAB_SCAS#

DDRB_CKE1

0.1U_0402_16V4Z

<4,8>
<4,8>

DDRAB_SBS0#

DDRAB_SMA10
DDRAB_SBS0#

C171

<4,8>

DDRB_CLK0
DDRB_CLK0#

<4,8>
<4,8>

DDRAB_SDQS3#
DDRAB_SDQS3

DDRAB_SDQ30
DDRAB_SDQ31

0.1U_0402_16V4Z

<4>
<4>

DDRB_CLK0
DDRB_CLK0#

DDRAB_SDQS3#
DDRAB_SDQS3

C170

DDRAB_SMA3
DDRAB_SMA1

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

DDRAB_SDQ28
DDRAB_SDQ29

0.1U_0402_16V4Z

DDRAB_SMA8
DDRAB_SMA5

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

DDRAB_SDQ22
DDRAB_SDQ23

C169

DDRAB_SMA12
DDRAB_SMA9

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

+0.75VS

0.1U_0402_16V4Z

DDRAB_SBS2#

+1.5V

+1.5V

DDRAB_SDM2
C168

DDRAB_SBS2#

DDRB_CKE0

DDRAB_SDQ20
DDRAB_SDQ21

0.1U_0402_16V4Z

DDRB_CKE0

+1.5V/+0.75VS OF DIMM2

C165

<4,8>

<4,8>

MEM_MAB_RST#

DDRAB_SDQ14
DDRAB_SDQ15

0.1U_0402_16V4Z

<4>

DDRAB_SDM1
MEM_MAB_RST#

C162

DDRAB_SDQ26
DDRAB_SDQ27

<4,8>

0.1U_0402_16V4Z

DDRAB_SDM3

<4,8>

DDRAB_SMA[0..15]

DDRAB_SDQ12
DDRAB_SDQ13

0.1U_0402_16V4Z

DDRAB_SDQ24
DDRAB_SDQ25

DDRAB_SDM[0..7]

DDRAB_SDQ6
DDRAB_SDQ7

C132

DDRAB_SDQ18
DDRAB_SDQ19

DDRAB_SMA[0..15]

C155

DDRAB_SDQS2#
DDRAB_SDQS2

DDRAB_SDQS0#
DDRAB_SDQS0

C133

<4,8>
<4,8>

DDRAB_SDQS2#
DDRAB_SDQS2

<4,8>
<4,8>

1
C644

DDRAB_SDQ8
DDRAB_SDQ9

DDRAB_SDQ[0..63] <4,8>

DDRAB_SDM[0..7]
DDRAB_SDQS0#
DDRAB_SDQS0

+
2

220U_6.3V_M

DDRAB_SDQ2
DDRAB_SDQ3

DDRAB_SDQ[0..63]

DDRAB_SDQ4
DDRAB_SDQ5

<4>

DDRB_CKE1

DDRAB_SMA15
DDRAB_SMA14

DDRAB_SMA11
DDRAB_SMA7
DDRAB_SMA6
DDRAB_SMA4
DDRAB_SMA2
DDRAB_SMA0
DDRB_CLK1
DDRB_CLK1#
DDRAB_SBS1#
DDRAB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_ODT1

DDRB_CLK1
DDRB_CLK1#

<4>
<4>

DDRAB_SBS1#
DDRAB_SRAS#

<4,8>
<4,8>

DDRB_SCS0#
DDRB_ODT0

<4>
<4>

DDRB_ODT1

<4>

15mil
+VREF_CA
DDRAB_SDQ36
DDRAB_SDQ37
DDRAB_SDM4
DDRAB_SDQ38
DDRAB_SDQ39
DDRAB_SDQ44
DDRAB_SDQ45
DDRAB_SDQS5#
DDRAB_SDQS5

C174

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

C139

DDRAB_SDM0

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

0.1U_0402_16V4Z

DDRAB_SDQ0
DDRAB_SDQ1
C143

C177

+1.5V

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

1000P_0402_50V7K

<4,8>
<4,8>

1000P_0402_50V7K

0.1U_0402_16V4Z
1

JDIMM2

15mil

1
3

DDRAB_SDQS5#
DDRAB_SDQS5

<4,8>
<4,8>

DDRAB_SDQS7#
DDRAB_SDQS7

<4,8>
<4,8>

MEM_MAB_EVENT#
APU_SDATA0
APU_SCLK0

<4,8>
<16,6,8>
<16,6,8>

DDRAB_SDQ46
DDRAB_SDQ47
DDRAB_SDQ52
DDRAB_SDQ53
DDRAB_SDM6
DDRAB_SDQ54
DDRAB_SDQ55
DDRAB_SDQ60
DDRAB_SDQ61
DDRAB_SDQS7#
DDRAB_SDQS7
DDRAB_SDQ62
DDRAB_SDQ63
MEM_MAB_EVENT#

+0.75VS
4

206

G2

FOX_AS0A626-U4SN-7F
ME@

2012/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

DIMM_B H:4mm

2015/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

<Address: 10>

Date:

DDR3 SODIMM-II Socket


Rev
1.0

VAWGA/GB

Thursday, March 28, 2013

Sheet
E

of

37

+5V_Display
U73

+3VS
+5VS

OUT
1

C543
GND

<4>
<4>

DP2_TXP1
DP2_TXN1

<4>
<4>

DP2_TXP2
DP2_TXN2

<4>
<4>

DP2_TXP3
DP2_TXN3

HDMI_TX2P
HDMI_TX2N

DP2_TXP1
DP2_TXN1

C53 HDMI@ 1
C54 HDMI@ 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

HDMI_TX1P
HDMI_TX1N

DP2_TXP2
DP2_TXN2

C55 HDMI@ 1
C56 HDMI@ 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

HDMI_TX0P
HDMI_TX0N

DP2_TXP3
DP2_TXN3

C57 HDMI@ 1
C5888 HDMI@ 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

HDMI_CLKP
HDMI_CLKN

HDMI_CLKP

WCM-2012HS-900T
3
4
3

HDMI_CLKN

HDMI_TX0P

HDMI_TX0N

1
L30

HDMI_TX1N

2
3

HDMI_CLK-_CONN

HDMI_TX0-_CONN

2
3

2
EMIP@

JHDMI1
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

HDMI_DET_R
+5V_Display
HDMIDAT_R
HDMICLK_R

Close to HDMI connector

HDMI_CLK-_CONN
D1 ESDU@
HDMI_TX2+_CONN

HDMI_TX2+_CONN

HDMI_TX2-_CONN

HDMI_TX2-_CONN

HDMI_TX1+_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX1-_CONN

HDMI_CLK+_CONN
HDMI_TX0-_CONN
HDMI_TX0+_CONN
HDMI_TX1-_CONN
HDMI_TX1+_CONN
HDMI_TX2-_CONN

1
4

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKG1
CK_shield
G2
CK+
G3
D0G4
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+

20
21
22
23
C

SUYIN_100042GR019M23DZL
ME@

TVWDF1004AD0_DFN9

D2 ESDU@

L39
1

R1471 HDMI@
2.2K_0402_5%

HDMI_TX2+_CONN

HDMI_TX0+_CONN

1
L31

HDMI@ R1470
2.2K_0402_5%

WCM-2012HS-900T
3
4
3

EMIP@
HDMI_TX1P

2
EMIP@

HDMI_CLK+_CONN

@
R894
200K_0402_5%

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

HDMI@
R898
100K_0402_5%

C51 HDMI@ 1
C52 HDMI@ 1

HDMI_DET

DP2_TXP0
DP2_TXN0

1
2
150K_0402_5%

1
DP2_TXP0
DP2_TXN0

0.1U_0402_16V7K 2

AP2330W-7_SC59-3

1
3

2
B
E

<4>
<4>

HDMI@
R434

HDMI@ C
Q87
MMBT3904_NL_SOT23-3
<4>

IN

C544
0.1U_0402_16V7K 2

W=40mils

HDMI_TX0+_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX0-_CONN

HDMI_CLK+_CONN

HDMI_CLK+_CONN

HDMI_TX1+_CONN
HDMI_TX1-_CONN

HDMI_CLK-_CONN

HDMI_CLK-_CONN

R432 1 HDMI@ 2 499_0402_1%

HDMI_CLK+_CONN

R433 1 HDMI@ 2 499_0402_1%

HDMI_TX1-_CONN

R435 1 HDMI@ 2 499_0402_1%

HDMI_TX1+_CONN

R436 1 HDMI@ 2 499_0402_1%

HDMI_TX0-_CONN

R439 1 HDMI@ 2 499_0402_1%

HDMI_TX0+_CONN

R440 1 HDMI@ 2 499_0402_1%

HDMI_TX2-_CONN

R441 1 HDMI@ 2 499_0402_1%

HDMI_TX2+_CONN

R442 1 HDMI@ 2 499_0402_1%

HDMI_CLK-_CONN

WCM-2012HS-900T

HDMI_TX2N

2
3

2
3

1
4

HDMI_TX2+_CONN
TVWDF1004AD0_DFN9

HDMI_TX2-_CONN
HDMICLK_R

WCM-2012HS-900T

HDMIDAT_R
3

+3VS

HDMI CLK DATA Pull high


in Page 22 for 8P4R

HDMI_CLK

HDMI_CLK

<12,4>

HDMI_DATA

HDMI_DATA

HDMICLK_R

2
G

Q76
2N7002K_SOT23-3
HDMI@

<12,4>

+3VS

Q75A
HDMI@
DMN66D0LDW-7_SOT363-6
1

D69
L30ESDL5V0C3-2_SOT23-3
ESDU@

HDMI_TX2P

L40

EMIP@

HDMIDAT_R

Q75B
HDMI@
DMN66D0LDW-7_SOT363-6

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/04/22

Deciphered Date

2015/04/22

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

HDMI CONN
Document Number

Rev
1.0

VAWGA/GB
Monday, April 01, 2013

Sheet
1

10

of

37

LCD POWER CIRCUIT


CMOS Camera
+3VS
@

W=60mils

2
R694

+LCDVDD_CONN

W=60mils

1
0_0402_5%

U72

VOUT

+LCDVDD_CONN

GND

(40 MIL)

10U
1

R1458 CMOS@
150K_0402_5%
<18>

CMOS@
C1152
0.1U_0402_16V4Z

R02

@
C1153
10U_0603_6.3V6M

CMOS_ON#
1

APU_ENVDD
2

<4>

APL3512ABI-TRG_SOT23-5

(40 MIL)

+3VS_CMOS

EN

CMOS@
Q70
PMV65XP_SOT23-3
S

SS

1
C16
1500P_0402_50V7K

VIN

4.7U_0603_6.3V6K

C522

+3VS

C1155 CMOS@
0.1U_0402_16V4Z

R652
100K_0402_5%

VGA LCD/PANEL BD. Conn.


+LEDVDD

B+

C1158
680P_0402_50V7K
EMIU@

1
R813

2
0_0805_5%

C1159
4.7U_0805_25V6-K

JLVDS1

Add for protect BKOFF# damage

Use APU control for WIN8


<4>

APU_INVT_PWM

R1463 1

R1466 1

<4>
<4>

LVDS_ACLK
LVDS_ACLK#

<4>
<4>
<4>
<4>
<4>
<4>
<4>
<4>
+3VS

1
BKOFF#

R826
100K_0402_5%
1

BKOFF#

R899
10K_0402_5%

LVDS_A2
LVDS_A2#
LVDS_A1
LVDS_A1#
LVDS_A0
LVDS_A0#
EDID_DATA
EDID_CLK

1
680P_0402_50V7K
C1160 EMIU@

<5>
<5>

USB20_P3
USB20_N3

2 0_0402_5%
BKOFF#
INVT_PWM

2 0_0402_5%

<18>

+LCDVDD_CONN

(60 MIL)

+3VS
2

+3VS_CMOS

USB20_P3_R
USB20_N3_R

CMOS

0_0402_5%
2
1 R696
@
2
1 R695
@
0_0402_5%

USB20_P3
USB20_N3

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

USB20_P3_R
USB20_N3_R

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

31
32
33
34

G1
G2
G3
G4

ACES_88341-3001 ME@

L58 EMIU@

USB20_P3

USB20_N3

USB20_P3_R

USB20_N3_R

WCM-2012-900T_4P

2012/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2015/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

LVDS CONN / Camera


Document Number

Rev
1.0

VAWGA/GB
Thursday, March 28, 2013

Sheet
1

11

of

37

C1094
6P_0402_50V8

C1103
6P_0402_50V8

C1104
6P_0402_50V8

GREEN
1

BLUE

C1107
6P_0402_50V8

DAC_BLU
DAC_GRN
DAC_RED

1
2
3
4

RP22
8
7
6
5

RED

DAC_BLU

DAC_BLU

<4>

DAC_GRN

DAC_GRN

<4>

FCM1608CF-121T03 0603
2
EMIP@ 1
L36
FCM1608CF-121T03 0603
2
EMIP@ 1
L37
FCM1608CF-121T03 0603
2
EMIP@ 1
L38

DAC_RED

DAC_RED

<4>

C1105
6P_0402_50V8

C1106
6P_0402_50V8

150_0804_8P4R_1%

+3VS
2

RP1
<10,4>
<10,4>

1
2
3
4

HDMI_CLK
HDMI_DATA
CRT_DDC_DAT_CONN
CRT_DDC_CLK_CONN

HDMI_CLK
HDMI_DATA

+5V_Display

8
7
6
5
1

4.7K_8P4R_5%
ESDP@

+5VS

C600
1000P_0402_50V7K

+5V_Display

1
U10

+3VS

VCC_SYNC

7
1
C537
0.1U_0402_16V7K

<4>

CRT_DDC_DATA

<4>

CRT_DDC_CLK

<4>

CRT_VSYNC

<4>

CRT_HSYNC

10
11
13
15
6

BYP

VCC_VIDEO

VIDEO1

VCC_DDC

VIDEO2

DDC_IN1

VIDEO3

DDC_IN2

DDC_OUT1

SYNC_IN1

DDC_OUT2

SYNC_IN2

SYNC_OUT1

GND

SYNC_OUT2

1
C23

2
0.22U_0402_10V6K

JCRT1

RED

GREEN

CRT_DDC_DAT_CONN
GREEN

BLUE

JVGA_HS
BLUE

CRT_DDC_DAT_CONN

JVGA_VS

12

CRT_DDC_CLK_CONN

CRT_DDC_CLK_CONN

14

JVGA_VS_U

R106 1 EMIP@ 2 22_0402_5%

JVGA_VS

16

JVGA_HS_U

R107 1 EMIP@ 2 22_0402_5%

JVGA_HS

T58

R106 R107 for EMI

+3VS
4

R693 1

2 4.7K_0402_5%

CRT_DDC_DATA

R697 1

2 4.7K_0402_5%

CRT_DDC_CLK

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

T49

RED

@
C411

TPD7S019-15DBQR_SSOP16

2012/04/22

Deciphered Date

Compal Electronics, Inc.


2015/04/22

Title

Date:

16
17

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

G
G

CONTE_80431-5K1-152
ME@

Compal Secret Data

Security Classification
Issued Date

10P_0402_50V8J

C412

10P_0402_50V8J

C529
0.1U_0402_16V7K

CRT CONN
Document Number

Rev
1.0

VAWGA/GB
Thursday, March 28, 2013

Sheet
E

12

of

37

SATA HDD Conn.


JHDD1
<5>
<5>
<5>
<5>

0.01U_0402_25V7K 2
0.01U_0402_25V7K 2

SATA_ATX_DRX_P0
SATA_ATX_DRX_N0

SATA_DTX_C_ARX_N0 C596 1
SATA_DTX_C_ARX_P0 C597 1

SATA_DTX_C_ARX_N0
SATA_DTX_C_ARX_P0

1 C137
1 C138

1
2
3
4
5
6
7

SATA_ATX_C_DRX_P0
SATA_ATX_C_DRX_N0

2 0.01U_0402_25V7K
2 0.01U_0402_25V7K

SATA_DTX_ARX_N0
SATA_DTX_ARX_P0

GND
RX+
RXGND
TXTX+
GND

1
R551

+3VS

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

2
+3V_HDD
0_0805_5%
@

+5VS

1
R550

2
0_0805_5%

+5V_HDD

@
+5V_HDD
R02
1
EMIP@
2

10U

1
C598
1000P_0402_50V7K

1
C599
0.1U_0402_16V4Z

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
Reserved
GND
12V
12V
12V

GND
GND

23
24

SUYIN_127043FB022G278ZR
C602
10U_0603_6.3V6M

FOR 15"

SATA ODD FFC Conn.


JODD2

CAP in Small Board


<5>
<5>
<5>
<5>

SATA_ATX_DRX_P1
SATA_ATX_DRX_N1

SATA_DTX_C_ARX_N1
SATA_DTX_C_ARX_P1

1
2
3
4
5
6
7
8
9
10

SATA_ATX_DRX_P1
SATA_ATX_DRX_N1
SATA_DTX_C_ARX_N1
SATA_DTX_C_ARX_P1
1
2
R710 ZODD@ 0_0402_5%
<18>

ODD_DETECT#
+5V_ODD

ODD_DA#

ODD_DA#

R02

1
2
3
4
5
6
7
8
9
10
GND
GND

11
12

HB_A051020-SAHR21
ME@

Co-lay

ODD Power Control

J@ J6
1
+5VALW

+5VS

FOR 14"
JODD1

JUMP_43X79

+5V_ODD
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K

SATA_ATX_C_DRX_P1_14
SATA_ATX_C_DRX_N1_14

SATA_DTX_C_ARX_N114@ C614 1
SATA_DTX_C_ARX_P114@ C613 1

2 0.01U_0402_25V7K
2 0.01U_0402_25V7K

SATA_DTX_ARX_N1_14
SATA_DTX_ARX_P1_14

1
2
3
4
5
6
7

14@ C619 1
14@ C616 1

SATA_ATX_DRX_P1
SATA_ATX_DRX_N1

Q90
3

ZODD@

LP2301ALT1G_SOT23-3
2

R930
10K_0402_5%
R1110

ZODD@

ODD_EN

IN

<6>

GND

OUT

200K_0402_5%
ZODD@

2
2

C641
10U_0603_6.3V6M

ODD_DA#
R02

0.1U_0402_16V4Z
ZODD@

+3VS

DP
+5V
+5V
MD
GND
GND

1
R555 2
10K_0402_5%

GND
GND

15
14

ALLTO_C18518-11305-L
ME@

ZODD@

ZODD@

GND
A+
AGND
BB+
GND

8
9
10
11
12
13

ODD_DETECT#
+5V_ODD

C642
2

SATA ODD Conn.

Need OPEN

Q91
DTC124EKAT146_SC59-3

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/04/22

2015/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HDD/ODD/FAN/SCREW
Document Number

Date:

Rev
1.0

VAWGA/GB
Thursday, March 28, 2013
G

Sheet

13
H

of

37

+3V_LAN

+3VALW

+LX

Close together
J10

J@

LL2

1
2

<6>

APU_PCIE_RST#

CL6

CL5

UL1

8172@

+3V_LAN

2 4.7K_0402_5%
1

AR8172-AL3A-R

LAN_PERST#

CL10

2
0_0402_5%
UL1

<18>

2
3

LAN_WAKE#

25
26
28
27
7
8

LAN_XTALO
LAN_XTALI

TRXN0
TRXP0
TRXN1
TRXP1
TRXN2
TRXP2
TRXN3
TRXP3

RX_P
REFCLK_N
REFCLK_P
PERST#

Near
Pin13

Near
Pin19

Near
Pin6

0.1U_0402_16V7K

CL20

CL19

CL18

0.1U_0402_16V7K

0.1U_0402_16V7K

CL17

0.1U_0402_16V7K

+1.1_AVDDL
+1.1_AVDDL
+1.1_AVDDL
+1.1_AVDDL_L
+1.1_AVDDL

13
19
31
34
6
41

Place close to Pin16


12
11
15
14
18
17
21
20

MDI0MDI0+
MDI1MDI1+

SMCLK
SMDATA

RBIAS

10

LAN_RBIAS

<15>
<15>
<15>
<15>

MDI0MDI0+
MDI1MDI1+

Place Close to PIN1

NC
TESTMODE

VDD33
LX

XTLO
XTLI
CLKREQ#
DVDDL/PPS
DVDDL_REG/DVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL_REG/AVDDL

1
RL8

+3V_LAN

2
2.37K_0402_1%

Place Close to PIN1

+3V_LAN

40

+LX

+1.7_VDDCT

24
37

+LX_R

16
22
9

+3V_LAN
+2.7_AVDDH
+2.7_AVDDH

+LX
RL10
1

30K_0402_5%
2

+3V_LAN

10U

+2.7_AVDDH

AVDDH/AVDD33
AVDDH
AVDDH_REG

CL22

LAN_CLKREQ#

1U_0402_6.3V4Z
CL21

<6>
3

W AKE#

VDDCT/ISOLAN
4

RL12 if use LDO modue

CL16
10U_0603_6.3V6M

LAN_PERST#

AR8151/AR8161

RX_N

RL12
10K_0402_5%
2 LDO@ 1
mount

CL15
10U_0603_6.3V6M

32
33

TX_P

38
39
23

CL14
1U_0402_6.3V4Z

CLK_PCIE_LAN#
CLK_PCIE_LAN

LED_0
LED_1
LED_2

Atheros

CL13
0.1U_0402_16V7K

PCIE_ATX_C_DRX_P1

<5>
<5>

35

TX_N

CL12
1000P_0402_50V7K
1
2

<5>

30
36

PCIE_ATX_C_DRX_N1

GND
AR8162-AL3A-R_QFN40_5X5
8162@

Near
Pin9

Near
Pin31

Near
Pin22

1U_0402_6.3V4Z

PCIE_DTX_ARX_P1

29

CL25

2 0.1U_0402_16V7K

PCIE_DTX_ARX_N1

0.1U_0402_16V7K
CL26

2 0.1U_0402_16V7K

CL24

CL11 1

PCIE_DTX_C_ARX_P1
<5>

0.1U_0402_16V7K

<5>

CL9

PCIE_DTX_C_ARX_N1

1U_0402_6.3V4Z

<5>

0.1U_0402_16V7K
CL23

Place Close to Chip

Place close to Pin34

Close to
Pin40

RB751V-40TE17_SOD323-2
R577

SWR@SWR@SWR@

D4

1U_0402_6.3V4Z

RL4

10U
@
CL7
0.1U_0402_16V7K

LAN Chip Vendor recommand reserve the


PU resistor close LAN chip
AMD recommand reserve Diode

+3V_LAN

Note: Place Close to LAN chip


LL1 DCR< 0.15 ohm
Rate current > 1A

SWR@

4.7U_0603_6.3V6K

10K_0402_5%

CL8

LAN_PWR_ON#

LAN_PWR_ON#

0.1U_0402_16V7K

<18>

QL1
PMV65XP_SOT23-3~D

RL3

1U_0402_6.3V4Z

@
1

LL3

FBMA-L11160808601LMA10T_2P
FBMA-L11160808601LMA10T_2P
1
2
1
2
+1.1_AVDDL
+LX_R

+1.1_AVDDL_L
CL4

JUMP_43X79

LL1 SWR@
1
2 +LX
4.7UH_SIA4012-4R7M_20%

+LX_R

0.1U_0402_16V7K

10U_0603_6.3V6M
CL3

CL2

0.1U_0402_16V7K

CL1
1000P_0402_50V7K

Layout Notice : Place as close


chip as possible.

Near
Pin37

LAN_XTALI
LAN_XTALO

YL1

4
1

CL28
15P_0402_50V8J

NC
OSC

OSC
NC

3
2

1 25MHZ_20PF_FSX3M-25.M20FDO 1
CL29
15P_0402_50V8J
2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/04/22

2015/04/22

Deciphered Date

Title

LAN-AR8151

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Thursday, March 28, 2013
Date:

Rev
1.0

VAWGA/GB

Sheet
E

14

of

37

Place Close to TL1

ESDU@
DL1
AZC099-04S.R7G_SOT23-6
1
4
I/O1
I/O3

MDI1+

DL1
1'S PN:SC300001G00
2'S PN:SC300002E00

GND

VDD

I/O2

I/O4

Reserve gas tube for EMI go rural solution


MDI0+

5
1

MDI0-

MDI1RL14
1

CL30
1
2

CHASSIS1_GND
75_0805_5%
EMIP@
2

10P_0603_50V
EMIP@
1

TL1
<14>
<14>

MDI0+
MDI0-

<14>
CL31
<14>
0.01U_0402_25V7K

MDI1+
MDI1-

1
EMIP@
2

1
2
3
4
5
6
7
8

MDI0+
MDI0-

MDI1+
MDI1-

TD+
TDCT
NC
NC
CT
RD+
RD-

TX+
TXCT
NC
NC
CT
RX+
RX-

16
15
14
13
12
11
10
9

DLL1
BS4200N-C-LV_SMB-F2
EMIGASP@

MDO0+
MDO0MCT

Place Close to TL1

MCT
MDO1+
MDO1-

MHPC_NS681612A

EMIP@
2 0.1U_0603_50V7K
CL63 1
CL61 1

2 0.1U_0603_50V7K
EMIP@

CHASSIS1_GND
JLAN1

MDO0+

MDO0-

MDO1+

MCT

MCT

MDO1-

MCT

MCT

PR1+
PR1PR2+
PR3+
PR33

PR2PR4+

GND
GND

9
10

PR4SANTA_130456-121
ME@

ESDP@ C173
0.1U_0402_16V7K
CHASSIS1_GND

C178 ESDP@
0.1U_0402_16V7K

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/04/22

Deciphered Date

2015/04/22

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

LAN_Transformer
Document Number

Rev
1.0

VAWGA/GB
Thursday, March 28, 2013

Sheet
E

15

of

37

+3VS

1 TS@

@
2 100K_0402_5%
1

C1331
0.1U_0402_16V4Z
@

+3VS_TS

EC_TS_ON#

JTS1
0_0402_5%

<18>

R5583

R5581 1

+3VS_TS

Q156
PMV65XP_SOT23-3~D
@
2

<5>
<5>

USB20_N1
USB20_P1
EC_TS_ON#

R726 1

TS@ 2 0_0402_5% TS_RST#

8
7
6
5
4
3
2
1

0.1U_0402_16V4Z
C1322

GND
GND
6
5
4
3
2
1

ACES_50208-00601-P01
ME@

TS@

+1.5VS
+3VS_WLAN

Mini-Express Card(WLAN/WiMAX)
JWLN1
<6>
<6>

R1500 1

APU_PCIE_WAKE#

2 0_0402_5%

BT_DISABLE#
<6>
WLAN_CLKREQ#
<5>
<5>

APU_PCIE_WLAN_WAKE#

WLAN_CLKREQ#

CLK_PCIE_WLAN#
CLK_PCIE_WLAN

<5>
<5>

PCIE_DTX_C_ARX_N2
PCIE_DTX_C_ARX_P2

<5>
<5>

PCIE_ATX_C_DRX_N2
PCIE_ATX_C_DRX_P2
+3VS_WLAN

<18>
<18>

1
1

EC_TX
EC_RX

EC_TX
EC_RX

100_0402_1%
R1498
2
2
R1499
100_0402_1%

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND1

GND2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

<6>
<6>

WL_OFF#
APU_PCIE_RST#

APU_PCIE_RST#

+3VS

+3VS_WLAN

+3VS_WLAN
J7
APU_SCLK0_W R1496 1
APU_SDATA0_W R1497 1

2 @ 0_0402_5%
2 @ 0_0402_5%

APU_SCLK0
APU_SDATA0

USB20_N5
USB20_P5

<6,8,9>
<6,8,9>

J@
2

JUMP_43X79

<5>
<5>

USB20_N5
USB20_P5

54

BELLW_80003-8041
ME@

<6>

BT_OFF#

R1520

2 BT_OFF#_R
1K_0402_5%

For EC to detect
debug card insert.
R1501
100K_0402_5%

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

2012/04/22

Deciphered Date

2015/04/22

Title

MINI1 CARD (WLAN) / MINI2 CARD (Option)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number

Rev
1.0

VAWGA/GB
Thursday, March 28, 2013

Sheet
E

16

of

37

Right Ext.USB Conn.

USB20_N6

1 R567@ 2 U2DN0_L
0_0402_5%

<5>

USB20_P6

1 R569@ 2U2DP0_L
0_0402_5%

<5>

USB30_N8

1 R574
2
0_0402_5%

<5>

USB30_P8

1 R575
2
0_0402_5%

<5>

+5VALW

+USB_VCCB

R02
U36

1
2
3
4

C713 0.1U_0402_16V4Z
2
1
<18>

USB_ON#

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

RIGHT USB PORT X1

8
7
6
5

8
7

W=80mils

+USB_VCCB
EMIUSB2RU@
1
1 0_0402_5%
R900 2
1
USB20_N0
+ <5>
1 0_0402_5%
R896 2
<5>
USB20_P0
C715
EMIUSB2RU@
470P_0402_50V7K
2
2
EMIUSB2RP@
USB2R@
WCM-2012-900T_4P
L66
2 USB20_N0_C
USB20_N0 1
1
2

6
5
4
3
2
1

USB20_N0_C
USB20_P0_C

6.3 * 5.9
SF000001500

EMIP@

3
2

U2DN0

U2DP0

WCM-2012-900T_4P
1 R562
2
0_0402_5%
EMIU@

JUSB3 ME@

USB2R@

C714
USB2R@
220U_6.3V_M

L51
4
4

G547I2P81U_MSOP8

USB2R@

+USB_VCCB

EMIU@
1 R566
2
0_0402_5%

Colay with USB2.0 only

<6>

USB_OC0#

WCM-2012HS-900T

GND
GND

<5>

USB30_MRX_DTX_N0

6
5
4
3
2
1

<5>

USB30_MRX_DTX_P0

EMIP@

+USB3_VCCA
2

U3RXDN0

U3RXDP0

W=80mils

L50
U3TXDN0
U2DP0
U2DN0
U3RXDP0

ACES_88058-060N

<5> USB30_MTX_C_DRX_N0

C858
0.1U_0402_16V7K
1
2
U3TXDN0_L

WCM-2012HS-900T
1

U3RXDN0
2

U3TXDN0

U3TXDP0

USB20_P0_C

<5> USB30_MTX_C_DRX_P0
1

D25 ESDU@
PJDLC05_SOT23-3

U3TXDP0_L

C859
0.1U_0402_16V7K
1 R570@ 2 U2DN1_L
0_0402_5%

<5>

USB20_P7

1 R571@ 2U2DP1_L
0_0402_5%

2A/Active Low
+USB3_VCCA
U3RXDN0 9 10
C704
0.1U_0402_16V4Z
1
2

R02

U35

USB_ON#

1
2
3
4

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

W=80mils

8
7
6
5

<6>

USB_OC1#

ESDU@ D27
1

U3RXDN0

U3RXDP0 8

U3RXDP0

U3TXDN0 7

U3TXDN0

U3TXDP0 6

U3TXDP0

<5>

USB30_N9

1 R572
2
0_0402_5%

<5>

USB30_P9

1 R573
2
0_0402_5%

U2DP1

Colay with USB2.0 only

I/O4

GND

VDD

+5VALW

U3RXDN1 9 10
U3RXDP1 8

1
+USB3_VCCA

I/O1

I/O3

U2DN0

U2DN1

U2DP1

WCM-2012HS-900T
<5>

USB30_MRX_DTX_N1

<5>

USB30_MRX_DTX_P1

4
EMIP@
L54

+USB3_VCCA
2

U3RXDN1

U3RXDP1

W=80mils

U3RXDN1

U3RXDP1

U3TXDN1 7
U3TXDP1 6

7
6

ESDU@

I/O2

I/O4

GND

VDD

I/O1

I/O3

U2DN1
U3RXDP1

U3TXDN1

U3TXDP1

<5> USB30_MTX_C_DRX_N1
<5> USB30_MTX_C_DRX_P1

C856
0.1U_0402_16V7K
1
2 U3TXDN1_L

WCM-2012HS-900T

U3TXDP1_L

C857
0.1U_0402_16V7K

1
4
L53

U3RXDN1
2

U3TXDN1

U3TXDP1

LP2 Port1

JUSB2
U3TXDP1
U3TXDN1
U2DP1

ESDU@ D30
1

U2DN1

AZC099-04S.R7G_SOT23-6
D22

YSCLAMP0524P_SLP2510P8-10-9
2

EMIP@

ESDU@

I/O2

WCM-2012-900T_4P
1 R721
2
0_0402_5%
EMIU@

G547I2P81U_MSOP8
D34

EMIU@
1 R728
2
0_0402_5%
L55

+5VALW

10
11
12
13

GND
GND
GND
GND

L49 EMIP@

USB20_N7

<5>

SSTX+
VBUS
SSTXD+
GND
DSSRX+
GND
SSRX-

TAITW_PUBAU1-09FNLSCNN4H0
ME@

USB20_P0

LP1 Port0

JUSB1
9
1
8
3
7
2
6
4
5

U3TXDP0

9
1
8
3
7
2
6
4
5

SSTX+
VBUS
SSTXD+
GND
DSSRX+
GND
SSRX-

GND
GND
GND
GND

10
11
12
13

TAITW_PUBAU1-09FNLSCNN4H0
ME@

3
EMIP@

1
+
C736
220U_6.3V_M
SF000002Y00 2

2
1 C735

YSCLAMP0524P_SLP2510P8-10-9

+5VALW

U2DP0

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

470P_0402_50V7K
2

2012/04/22

Deciphered Date

2015/04/22

Title

USB2.0 / USB3.0 / BT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AZC099-04S.R7G_SOT23-6

Date:

Document Number

Rev
1.0

VAWGA/GB
Thursday, March 28, 2013

Sheet
1

17

of

37

KSI[0..7]

KSO[0..17]

<20>

KSI[0..7]

<20>

<24,25>
<24,25>
<19,4>
<19,4>

Pull high in APU side

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

77
78
79
80

<6>
<6>
<6>
<11>

Pull high in ODD side<13>


<23>
<19>
<14>
<16>
<16>
<6>
<20>

R836 1

RTC_CLK

SLP_S3#
SLP_S5#
EC_SMI#
CMOS_ON#

ODD_DA#
ADP_ID_CLOSE
EC_TACH
LAN_WAKE#
EC_TX
EC_RX
SYS_PWRGD_EC
NOVO#

ODD_DA#
ADP_ID_CLOSE
EC_TACH
LAN_WAKE#
EC_TX
EC_RX
SYS_PWRGD_EC
NOVO#

2 0_0402_5%

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

XCLKO

R1266
USB_ON# 1

CLK_PCI_EC
PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D

1
2

C1271
20P_0402_50V8

@
R1587
100K_0402_5%

KB9012QF-A3_LQFP128_14X14
Part Number = SA00004OB30

V
V
V

typ

V
V
V

VAD_BID
0 V
0.289
0.538
0.875

max
MP
PVT
DVT
EVT

V
V
V

+5VS

67

1
@

BATT_TEMP/AD0/GPIO38
AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
IMON/AD5/GPIO43

21
23
26
27
63
64
65
66
75
76

ADP_65
BEEP#
EC_FAN_PWM
ACOFF
BATT_TEMP
ADP_I
ADP_ID
BRDID
ENBKL

R1562
100K_0402_5%

TP_CLK

R1568 1

2 4.7K_0402_5%

TP_DATA

R1570 1

2 4.7K_0402_5%

ADP_65
BEEP#
EC_FAN_PWM
ACOFF

<24>
<21>
<19>
<25>
MP

BATT_TEMP

<24>

EC_FAN_PWM

R1561 1

ADP_I
ADP_ID

<24,25>
<23>

EC_TACH

R1581 1

EC_SMB_DA2

R1579 1

2 2.2K_0402_5%

ENBKL

<4>

EC_SMB_CK2

R1578 1

2 2.2K_0402_5%

ADP_90

<24>

GPIO0F
BEEP#/GPIO10
GPIO12
ACOFF/GPIO13

PWM Output
AD

DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
IREF/GPIO3E
CHGVADJ/GPIO3F

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT#_EC/GPXIOA06
VCOUT0_PH/GPXIOA07
GPO
BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
PCH_APWROK/GPXIOA10
SA_PGOOD/GPXIOA11

GPIO

AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
GPI
LID_SW#/GPXIOD04
SUSP#/GPXIOD05
GPXIOD06
PECI_KB9012/GPXIOD07
V18R

68
70
71
72

ADP_90

83
84
85
86
87
88

EC_MUTE#
USB_ON#
ADP_135

97
98
99
109

EC_TS_ON#

TP_CLK
TP_DATA

095VS_PWR_EN
NTC_V

119
120
126
128

EC_SPI_AISO
EC_SPI_AOSI
EC_SPI_CLK
EC_SPI_CS1#

73
74
89
90
91
92
93
95
121
127

APU_IMON
VGATE
LAN_PWR_ON#
BATT_CHG_LED#
CAPS_LED#
PWR_LED#
BATT_LOW_LED#
SYSON
VR_ON
095_18ALW_PWR_EN

100
101
102
103
104
105
106
107
108

EC_RSMRST#
EC_LID_OUT#
Turbo_V

110
112
114
115
116
117
118

ACIN
EC_ON
ON/OFF
LID_SW#
SUSP#

124

BKOFF#
PBTN_OUT#

EC_MUTE#
USB_ON#
ADP_135

<21>
<17>
<24>

TP_CLK
TP_DATA

<20>
<20>

EC_TS_ON#

<16>

095VS_PWR_EN
NTC_V

<22>
<24>

EC_SPI_AISO
EC_SPI_AOSI
EC_SPI_CLK
EC_SPI_CS1#

<5>
<5>
<5>
<5>

APU_IMON
VGATE
LAN_PWR_ON#
BATT_CHG_LED#
CAPS_LED#
PWR_LED#
BATT_LOW_LED#
SYSON
VR_ON
095_18ALW_PWR_EN

<29>
<29>
<14>
<20>
<20>
<20>
<20>
<22,27>
<29>
<27,28>

EC_RSMRST#
EC_LID_OUT#

<6>
<6>

BKOFF#
PBTN_OUT#

<11>
<6>

ACIN
EC_ON
ON/OFF

<25>
<26>
<20>

+3VS
BRDID

R1564
0_0402_5%

2 10K_0402_5%
2 10K_0402_5%

ESDP@
2

+V18R
1

+3V_EC
EC_SMB_DA1

R1577 1

2 2.2K_0402_5%

EC_SMB_CK1

R1574 1

2 2.2K_0402_5%
C

+3VALW

EC_MUTE#

R1565 1

2 10K_0402_5%

LAN_WAKE#

R1566 1

2 10K_0402_5%

LID_SW#

R344 1

2 47K_0402_5%

For share ROM need


1

2
100K_0402_5%

095_18ALW_PWR_EN 1
R1575

2
100K_0402_5%

2
100K_0402_5%

SYS_PWRGD_EC
R208

+3VLP
@

EC_RSMRST#
R1576

BATT_TEMP

2
100P_0402_50V8J
2
100P_0402_50V8J

C1265

<24>
<24>
<26>

Turbo_V
PROCHOT
MAINPWON

ACIN
C1266
1

ACIN

R1573

095VS_PWR_EN
R207

ENBKL

<20>

LID_SW#

R206

2
4.7K_0402_5%

2
100K_0402_5%
2
100K_0402_5%

C601
1000P_0402_50V7K
H_PROCHOT#

C823
4.7U_0603_6.3V6K
PROCHOT

20mil

R343
47K_0402_5%

1 <22,27>

SUSP#

2
G
Q82
2N7002H_SOT23-3

<24,29,4,6>

C1269
47P_0402_50V8J

ECAGND

2012/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2015/04/22

Title

EC ENE KB930/9012

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
1.0

VAWGA/GB

Date:

+3VALW

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
EC_MUTE#/GPIO4A
KSI4/GPIO34
USB_EN#/GPIO4B
KSI5/GPIO35
CAP_INT#/GPIO4C
PS2
Interface
KSI6/GPIO36
EAPD/GPIO4D
KSI7/GPIO37
TP_CLK/GPIO4E
KSO0/GPIO20
TP_DATA/GPIO4F
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
CPU1.5V_S3_GATE/GPXIOA00
KSO4/GPIO24
WOL_EN/GPXIOA01
KSO5/GPIO25 Int. K/B
ME_EN/GPXIOA02
KSO6/GPIO26 Matrix
VCIN0_PH/GPXIOD00
SPI
Device
Interface
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
SPIDI/GPIO5B
KSO10/GPIO2A
SPIDO/GPIO5C
SPI Flash ROM SPICLK/GPIO58
KSO11/GPIO2B
KSO12/GPIO2C
SPICS#/GPIO5A
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
ENBKL/AD6/GPIO40
KSO16/GPIO48
PECI_KB930/AD7/GPIO41
KSO17/GPIO49
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO
EC_SMB_CK1/GPIO44
PWR_LED#/GPIO54
EC_SMB_DA1/GPIO45
BATT_LOW_LED#/GPIO55
SM Bus
EC_SMB_CK2/GPIO46
SYSON/GPIO56
EC_SMB_DA2/GPIO47
VR_ON/GPIO57
PM_SLP_S4#/GPIO59

XCLKI/GPIO5D
XCLKO/GPIO5E

V AD_BID
0 V
0.250
0.503
0.819

10K_0402_5%

DA Output

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PWM/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A

min

GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC & MISC
LPC_AD0

<6>

SLP_S3#
SLP_S5#
EC_SMI#
CMOS_ON#

+3V_EC
+EC_VCCA

KSO[0..17]

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

VAD_BID
0 V
0.216
0.436
0.712

EC_SCI#
BATT_LEN#

12
13
37
20
38

+5VALW

AGND/AGND

LPC_CLK0_EC
LPC_RST#
EC_RST#
EC_SCI#
BATT_LEN#

LPC_RST#

1
2
3
4
5
7
8
10

C1254
100P_0402_50V8J

69

+3V_EC

<6>
1
47K_0402_5%
<6>
1
<24>
0.1U_0402_16V4Z

U44

GND/GND
GND/GND
GND/GND
GND/GND
GND0

GATEA20
KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

GATEA20
KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

LPC_CLK0_EC
2
R818
2
C819

@2

JUMP_43X79

C1259
1000P_0402_50V7K

R1560
2 EMIU@ 1
10_0402_5%

@2

C1261
1000P_0402_50V7K

EMIU@
1 22P_0402_50V8J

C1258
0.1U_0402_16V4Z

<5,6>

<6>
<6>
<5>
<5,6>
<5>
<5>
<5>
<5>

C1257
0.1U_0402_16V4Z

C1263

C1260
1000P_0402_50V7K

C1256
0.1U_0402_16V4Z

C1262
0.1U_0402_16V4Z
2 ECAGND
1
2
L43
FBM-11-160808-601-T_0603

+EC_VCCA

C1255
0.1U_0402_16V4Z

+3V_EC

+3V_EC

J@
2

9
22
33
96
111
125

JUMP_43X79

EC_VDD/AVCC

EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC

J12

J@

11
24
35
94
113

J11
1

L44
FBM-11-160808-601-T_0603
1
2
1

3.3V +/- 5%
Vcc
R1562 100K +/- 5%
Board ID
R1564
0
0
8.2K +/- 5%
1
18K +/- 5%
2
33K +/- 5%
3

+3VLP

+3VALW

Sheet

Thursday, March 28, 2013


1

18

of

37

+3VS

SMSC thermal sensor


placed near APU

C329
0.1U_0402_16V4Z
@

U9 THERMAL@
1
1
C587
2200P_0402_50V7K

REMOTE1+

REMOTE1-

@
2

1 R335

+3VS

VDD

SCLK

D+

SDATA

D-

ALERT#

THERM#

GND

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_CK2

<18,4>

EC_SMB_DA2

<18,4>

6
5

4.7K_0402_5%
EMC1402-2-ACZL-TR MSOP 8P

Address is 1001100xb

REMOTE1,2+/-:
Trace width/space:10/10 mil
Trace length:<8"

FD3

FD4

H_3P8

FD2

H_3P8

FD1

H_3P8

H18
HOLEA

HDD

H3
HOLEA

H2
HOLEA

CPU

H1
HOLEA

H_2P8

FAN1 Conn

C591
10U_0603_6.3V6M

1
2
3
4
G5
G6

H_2P8

H_2P8

H_2P8

H_2P8

H_2P8

H16
HOLEA

H17
HOLEA

1
2
3
4
5
6

H11
HOLEA

+5VS_FAN

H10
HOLEA

1 0_0603_5%
EC_TACH
EC_FAN_PWM

H8
HOLEA

2
<18>
<18>

H7
HOLEA

R581

H6
HOLEA

JFAN1

+5VS
@

ACES_85205-04001
ME@

H_3P0N

2P8 * 9 pcd

10U

H_2P5X3P5N

M/B

M/B

Issued Date

Compal Electronics,Ltd.

Compal Secret Data

Security Classification
2011/06/15

Deciphered Date

2012/07/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Fintek-Thermal IC/FAN/screw
Document Number

Date: Thursday, March 28, 2013

Rev
1.0

VAWGA/GB
Sheet
1

19

of

37

+3VLP

R643
100K_0402_5%

@
2 R630
1
0_0402_5%

<18>

JKB1
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
KSO16
KSO17

R642
100K_0402_5%
R701
100K_0402_5%

<18>

NOVO#

NOVO#

<18>

KSO[0..17]

+3VALW
+3VLP

SMT1-05_4P SWP0 @
1

KSI[0..7]

6
5

SMT1-05_4P SWP1 @
1

KSI[0..7]
KSO[0..17]

NOVO_BTN#

ON/OFF

6
5

D26
2

DAN202UT106_SC70-3
ON/OFF

<18>

ON/OFF

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

ME@
JKB2 ME@

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

26
25

31
32

GND
GND

GND2
GND1

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

ACES_88514-2401

ACES_88514-3001

WCM-2012-900T_4P
2
2

L67
USB20_N4

USB20_P4

1
4

EMICP@

USB20_N4_R

USB20_P4_R

+3VS

JCR1
<5>
<5>

R692 2 EMICU@1
EMICU@ 0_0402_5%
R687 2 EMICU@
EMICU@1 0_0402_5%

USB20_N4
USB20_P4

USB20_N4
USB20_P4

1
2
3
4

USB20_N4_R
USB20_P4_R

1
2
3
4
5
6

GND
GND

+5VS

CVILU_CF06041H0RB-NH
ME@
JTP1 ME@

+3VALW

C696

TP_CLK
TP_DATA
TP_3
TP_2
TP_1

TP_CLK
TP_DATA

6
5
4
3
2
1

6
5
4
3
2
1

ESDP@ C185
0.1U_0402_16V7K

JPWRB1

ACES_88058-060N

<18>

TP_3

LID_SW#

LED1 14@
<18>

2 R629
1 14@ TP_1
0_0402_5%

PWR_LED#

PWR_LED#

2 R623
1
649_0402_1%

7
8

ESDP@

+5VALW

D24

14@
19-213A-T1D-CP2Q2HY-3T_WHITE

VCC

VCC

SW5
14@
TJG-533-V-T/R_6P

CLK

CLK

DAT

DAT

GND

TP_3
1

TP_2
3

SW6
15@
TJG-533-V-T/R_6P

<18>

BATT_LOW_LED#

BATT_LOW_LED#

TP_2

2 R764
1
470_0402_5%

+3VALW
JLED1
+5VALW
+3VALW
+5VS

LID_SW#

LED5 14@

SW7
15@
TJG-533-V-T/R_6P

14@
HT-191UD5_AMBER

5
6

5
6

LED2 14@

L
2

GND
GND

ME@

14"

SW4
14@
TJG-533-V-T/R_6P

5
6

5
6
4

1
2
3
4
5
6

ACES_88058-060N
PJSOT24C 3P C/A SOT-23

15/17"

1
2
3
4
5
6

NOVO_BTN#
ON/OFF
3

15@
2 R628
1
0_0402_5%

<18>
<18>

GND
GND

8
7

0.1U_0402_16V4Z

<18>

BATT_CHG_LED#

BATT_CHG_LED#

2 R765
1
649_0402_1%

+5VALW

14@
19-213A-T1D-CP2Q2HY-3T_WHITE

PWR_LED#
BATT_LOW_LED#
BATT_CHG_LED#
CAPS_LED#

1
2
3
4
5
6
7
8
9
10
11
12

GND
LED6 14@
<18>

TP_1

CAPS_LED#

CAPS_LED#

2 R303
1
649_0402_1%

1
2
3
4
5
6
7
8
9
10
GND
GND
HB_A091020-SAHR21
ME@

+5VS

14@
19-213A-T1D-CP2Q2HY-3T_WHITE

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2012/04/22

Deciphered Date

2015/04/22

Title

BIOS, I/O Port & K/B CONN/TP CONN/PBTN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Document Number

Rev
1.0

VAWGA/GB
Thursday, March 28, 2013

Sheet

20

of

37

+VREF_1V65

CA3 vendor suggest


change to 2.2U

Sense resistors must be


connected same power
that is used for VAUX_3.3

0.1U_0402_16V7K

2.2U_0603_6.3V6K
CA4

CA3

CA1

0.1U_0402_16V7K

AVDD_3.3 pinis output of


internal LDO. NOT connect
to external supply.

CA15

RA7
RA8

+3VS

mount RA6 on the Jack Sense circuit


to configure Port-C for mono MIC.

10K_0402_1%
1

1
1

2 20K_0402_1%
2 39.2K_0402_1%

Don't support LINE_IN function


RA7 could be @

PLUG_IN

Layout Note:Path from +5VS to LPWR_5.0


RPWR_5.0 must be very low
resistance (<0.01 ohms)

0.1U_0402_16V7K

+MICBIASB
+MICBIASC
MICB_L
MICB_R

30
31
25
26

APPLE_MIC
NOKIA_MIC
HGNDA
HGNDB

22
23

HP_L
HP_R

4.7U_0603_6.3V6K
CA23

4.7U_0603_6.3V6K
EMIP@
EMIP@
EMIP@
EMIP@

APU_SPKR

SINGA_2SJ2352-000131F
ME@

Headphone

1
CA29

2
1U_0603_10V6K

MICB_L

RA17 1

2 100_0402_1%

MICB_R

RA18 1

2 100_0402_1%

RA20 1

2 3K_0402_5%

RA19 1

2 3K_0402_5%

+MICBIASB

CA36
1
2
2.2U_0402_6.3V6M
CA46
1
2
2.2U_0402_6.3V6M

1
2
33_0402_5%

EMIP@

LA1
0_0603_5%

LA2 EMIP@
0_0603_5%

EMIP@

LA3
0_0603_5%

LA4 EMIP@
0_0603_5%

HP_R

ESD

HPOUT_L

HPOUT_R

HPOUT_R

HGNDB

HGNDB

HGNDA

HGNDA

PC_BEEP

RA22
10K_0402_5%

HP_L

HPOUT_L

RA492

PLUG_IN

EMIU@
2 0.1U_0603_50V7K
CA66 1

4
3
1
2

LA1~LA4 vendor suggest mount 0 ohm first~


Bead reserve for EMI if needed

DA1

ESDP@

BEEP#

HGNDB
HGNDA
HPOUT_L
HPOUT_R

For Universal jack

CX20751-11Z_QFN40

1
2
CA37 0.1U_0402_16V7K
1
2
CA45 0.1U_0402_16V7K

2 2.2U_0402_6.3V6M
2 2.2U_0402_6.3V6M

21
19
20

CA28 1
CA27 1

100_0402_1%
100_0402_1%
15_0402_5%
15_0402_5%

DA2

AVEE
FLY_P
FLY_N

RIGHT+
RIGHT-

2
2
2
2

External MIC

LEFT+
LEFT-

41
<18>

<6>

1
1
1
1

CA30 vendor suggest


change to 2.2U

EC Beep
ICH Beep

RA16
RA12
RA13
RA14

Universal Jack

PC Beep
EMIU@
2 0.1U_0603_50V7K

0.1U_0402_16V7K
CA22

CA20
CA26

MUSIC_REQ/GPIO0/PORTC_L_MIC PORTA_L
GPIO1/PORTC_R_MIC
PORTA_R

using wide copper bridge


under codec (100 mils or more)

EMIU@
2 0.1U_0603_50V7K

0.1U_0402_16V7K
CA21

4.7U_0603_6.3V6K
CA19

27
28
24

29

PORTD_A_MIC
PORTD_B_MIC
DMIC_DAT/GPIO1
HGNDA
DMIC_CLK / MUSIC_REQ/GPIO0
HGNDB

32
33

APPLE_MIC
NOKIA_MIC
HP_L
HP_R

AZ5125-02S.R7G_SOT23-3

17
15

PORTB_L_LINE
PORTB_R_LINE

JSENSE

SPK_R2+
SPK_R1-

MICBIASB
MICBIASC

PC_BEEP
SPKR_MUTE#

38
34
35

12
14

JSENSE

GND

Internal SPEAKER

SPK_L2+
SPK_L1-

JHP1

BIT_CLK
SYNC
SDATA_IN
SDATA_OUT

36
37

MIC_IN

Internal analog MIC

HGNDA, HGNDB 80mils

AZ5125-02S.R7G_SOT23-3

1
40

Combo Jack
(Normal Open)

Please bypass caps very close to device.

100P_0402_50V8J

EC_MUTE#

100P_0402_50V8J
CA34
2
1

<18>

100P_0402_50V8J
CA33
2
1

10
39

PC_BEEP

100P_0402_50V8J
CA32
2
1

RESET#

13
16
11

CA31
2
1

RA9

5
8
6
4

HDA_BITCLK_AUDIO
HDA_SYNC_AUDIO
2 33_0402_5% HDA_SDIN0_R
HDA_SDOUT_AUDIO

2
1

2.2U_0603_6.3V6K

HDA_SYNC_AUDIO
HDA_SDIN0
HDA_SDOUT_AUDIO

HDA_RST#_AUDIO

LPWR_5.0
RPWR_5.0
CLASS-D_REF

CA30

HDA_BITCLK_AUDIO

+5VS

CA35

HDA_RST#_AUDIO

<6>

0.1U_0402_16V7K

<6>

AVDD_3.3
AVDD_5V
AVDD_HP

UA1

VREF_1.65V

EMIU@
1 RA21
2

3
7
2
18

FILT_1.8
VDD_IO
VDDO_3.3
DVDD_3.3

0.1U_0402_16V7K

CA18

10 mils
0.1U_0402_16V7K

22P_0402_50V8J 33_0402_5%

CA65 1

2 5.11K_0402_1%

+5VS

CA24

EMIU@
CA7

CA64 1

RA6

+LDO_1.8V

4.7U_0603_6.3V6K
CA25

0.1U_0402_16V7K

CA17

For EMI

RA5

0.1U_0402_16V7K

CA6

2 0_0402_5%

<6>
<6>
<6>

JSENSE

+3VS

0.1U_0402_16V7K

4.7U_0603_6.3V6K

CA16

RA4

CA9

CA8

Should be same supply rail as used for


PCH HDA bus controller section

+1.5VS

1U_0603_10V6K

+3VS

CA10

0_0402_5%

1U_0603_10V6K

RA10

4.7U_0603_6.3V6K

+3VALW

0.1U_0402_16V7K

+AVDD_HP

CA5

+3VLP

2 0_0402_5%

1U_0603_10V6K
CA2

+LDO_OUT_3.3V
RA11 1

ESDP@

+5VS

ESD

JSPK1

I/O1

LA1
LA2
LA3
LA4

1
2
EMIU@
FBMA-L11-160808-121LMT_0603
1
2
EMIU@
FBMA-L11-160808-121LMT_0603
1
2
EMIU@
FBMA-L11-160808-121LMT_0603
1
2
EMIU@
FBMA-L11-160808-121LMT_0603

wide 30MIL
vendor suggest
change to 1000p

SPK_L1-_CONN

AZC099-04S.R7G_SOT23-6

CA44
0.1U_0402_16V7K

1
2
3
4
5
6

SPK_R1-_CONN
SPK_R2+_CONN
SPK_L1-_CONN
SPK_L2+_CONN

1000P_0402_50V7K

MIC_IN_C

1U_0603_10V6K
2
MIC_IN

I/O3

SPK_R1SPK_R2+
SPK_L1SPK_L2+

GNDA
CA42
0.1U_0402_16V7K

1
2
WM-64PCY_2P
45@

CA41

GND

SPK_L2+_CONN

1000P_0402_50V7K
CA43
EMIP@

MIC1

SPK_R2+_CONN

VDD

1000P_0402_50V7K
CA40
EMIP@

5
RA23
2.2K_0402_5%

I/O2

CA38

+MICBIASC

I/O4

EMIP@

DA3
6

SPK_R1-_CONN

1000P_0402_50V7K
CA39
EMIP@

Place colose to Codec chip

ME@
ACES_85205-04001

ESDU@

CA41 vendor suggest


change to 1U

2011/06/15

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2012/07/11

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CX20751 Codec

Rev
1.0

VAWGA/GB

Date: Thursday, March 28, 2013

1
2
3
4
G5
G6

Sheet
1

21

of

37

+5VALW TO +5VS
+3VALW TO +3VS
Load switch

+5VALW

VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

1 C12

VL

SUSP#

6
7

+3VALW

VIN1
VIN1

VOUT1
VOUT1

ON1

CT1

VBIAS
ON2
VIN2
VIN2

GND
CT2
VOUT2
VOUT2
GPAD

14
13

+5VS
1

+5VS_LS

12

9
8

PAD-OPEN 4x4m 2
@ C13

C10
1

180P_0402_50V8J
2
@

C9
1

330P_0402_50V7K
2
@
J3V J@
1

11
10

+3VS_LS

15

1
+3VS
2

PAD-OPEN 4x4m 2
@ C14

1U_0402_6.3V6K

C11

+1.8VALW

<18>

VIN 1.8V and 0.95V (VBIAS=5V),IMAX(per channel)=6A,Rds=18mohm

1 C24

SUSP#

VL

2
095VS_PWR_EN

095VS_PWR_EN

5
6
7

+0.95VALW

+1.8VS
J18V J@

U1895P
1
2

VIN1
VIN1

VOUT1
VOUT1

ON1

CT1

VBIAS

GND

ON2

CT2

VIN2
VIN2

VOUT2
VOUT2
GPAD

14
13

+1.8VS_LS
C21
1

12

180P_0402_50V8J
2
@

PAD-OPEN 4x4m 2
@ C26

11
330P_0402_50V7K
2
@
J95V J@
1
+0.95VS_LS

C15
1

10
9
8
15

+0.95VS
2

PAD-OPEN 4x4m 2
@ C25

+1.5V
+1.5VS

Q20
1

R1461
220_0603_5%

R1627
470_0603_5%
@

1
2

0_0402_5%
Q26
2N7002K_SOT23-3

+RTCBATT_3V

1.5VS_GATE_R
1

+5VALW
R1636
100K_0402_5%

C462
0.1U_0402_25V6

R339
@

SUSP

@
R1638
100K_0402_5%
2

2
1

100K_0402_5%
R337
1.5VS_GATE

2 SUSP
G
Q23
2N7002K_SOT23-3

2 SUSP
G
Q95
2N7002K_SOT23-3
@

SYSON#

OUT
SYSON

SYSON

IN

R1640
100K_0402_5%

Q102
DTC124EKAT146_SC59-3
@

R1639 @
100K_0402_5%

<18,27>

IN

SUSP#
1

<18,27>

GND

OUT

Q101
DTC124EKAT146_SC59-3

GND

2 SYSON#
G
Q93
2N7002K_SOT23-3
@

SUSP# 2
G

+5VALW

R1629
470_0603_5%
@

C463
1U_0603_10V6K
2

1 2

@
C469
10U_0603_6.3V6M

1
LP2301ALT1G_SOT23-3

1 2

+0.75VS

Vgs=-4.5V,Id=-2.8A,Rds=110mohm
1

+1.5V

+1.5V to +1.5VS

C470
10U_0603_6.3V6M

1U_0402_6.3V6K

C22

0.1U_0402_10V7K

TPS22966DPUR_SON14_2X3
@

0.1U_0402_10V7K

1U_0402_6.3V6K

+1.8VALW TO +1.8VS
+0.95VALW TO +0.95VS
Load switch

0.1U_0402_10V7K

TPS22966DPUR_SON14_2X3
@

0.1U_0402_10V7K

1U_0402_6.3V6K

SUSP#

J5V J@

U35P
1
2
@

2012/04/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2015/04/22

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

DC Interface
Document Number

Rev
1.0

VAWGA/GB
Thursday, March 28, 2013

Sheet
E

22

of

37

VIN
JDCIN1
1
2
3
4
5

PF101
7A_24VDC_429007.WRML
1
2
APDIN1

PQ102A
2N7002KDW-2N_SOT363-6
1

100K_0402_1%
PR104

PC104
2
1

1000P_0402_50V7K

100P_0402_50V8J

PC103
2
1

PC102
2
1

<18>

ADP_ID_CLOSE

<18>

PQ102B
2N7002KDW-2N_SOT363-6

PR105

1
100K_0402_1%

VIN

ADP_ID

750_0402_1%

PC109
680P_0603_50VK

PC108
0.1U_0402_16V7K

PR102
2

100P_0402_50V8J

ACES_50312-00541-001
@

+3VALW

PL101
SMB3025500YA_2P
1
2
1000P_0402_50V7K

APDIN

PC101
2
1

1
2
3
4
5

+CHGRTC
PR103
1K_0603_5%
1
2

+RTCBATT_3V

Vin

AP2138N-1.5TRG1_SOT23-3

GND

PC111
0.1U_0603_25V7K

1
2

Vout

PC110
680P_0603_50VK

PD101
S SCH DIO BAS40CW SOT-323
2
+RTCBATT_3V 1
3

PU102
3

+RTCBATT

+3VLP

+CHGRTC_R
PR101
1K_0603_5%
1
2

JRTC1 @
1
2 1
3 2
4 GND
GND
ACES_50271-0020N-001

RTC Battery
Need use+3.3V transfer to +1.5V LDO to APU side for Kaibini

Compal Secret Data

Security Classification
Issued Date

2011/06/15

2012/07/11

Deciphered Date

Title

Compal Electronics, Inc.


PWR-DCIN / RTC Battery

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
1.0

VAWGA/B

Thursday, March 28, 2013

Sheet
1

23

of

37

VMB2
PF201
12A_65V_451012MRL
1
2

PL201
SMB3025500YA_2P
1
2

BATT+

2
1
PR204
100_0402_1%

PC203
0.01U_0402_25V7K

EC_SMB_CK1

<18>

EC_SMB_DA1

<18>

90W(DIS) : 6.65K 100W active 90W recovery


65W(UMA): 1.65K 70W active 65W recovery

PH201 under CPU botten side :


CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

20120314
Change to +EC_VCCA from +3VLP

+3VALW

+3VS

+EC_VCCA

<18,25>

2
ADP_OCP_1
G
S 2N7002KW_SOT323-3

Turbo_V

<18>

2
1
PR226
12.7K_0402_1%

PQ201

@ PR229
10K_0402_1%
1
2

PROCHOT

<18>

<18>

NTC_V

PR228
5.9K_0402_1%

PQ207
2N7002KW_SOT323-3

PR227
9.31K_0402_1%

2
1

1
1
2

PD203

1.5M_0402_5%

@ PU202
5

BATT_LEN#

1
1N4148WS-7-F_SOD323-2

@ PR223

PQ209
2N7002KW_SOT323-3

O
-

PR220
100K_0402_1%

PU201B
AS393MTR-E1 SO 8P OP

2
G

PQ205
2N7002KW_SOT323-3

+3V_LDO

GND

G9191-330T1U_SOT23-5
@PC211
@
PC211
1U_0402_16V6K

BYP

SHDN#

@ PC212
22U_0603_6.3V6M
2
1

@ PC210
0.068U_0402_16V7K~N
1
2
2
<18>
G

@ PC213
100P_0402_50V8J
2
1

@ PR208
75K_0402_1%

1
2

ECAGND

+3VLP

OUT

ECAGND

PC207
100P_0402_50V8J

IN

ECAGND

PQ202B
2N7002KDW-2N_SOT363-6

@ PR218
47K_0402_1%

@ PR217
100K_0402_1%

+5VALW

<18>

1N4148WS-7-F_SOD323-2
1.5M_0402_5%

+3V_LDO

PR222
100K_0402_1%

PR205

VMB

PH201
100K_0402_1%_TSM0B104F4251RZ

PD201

VL

1
2

PR213
100K_0402_1%

PU201A
AS393MTR-E1 SO 8P OP

2
G

ADP_135

<25>

P
G

<18>

2
PC208
0.068U_0402_16V7K

BATT_OUT

BATT_TEMP 3

PQ202A
2N7002KDW-2N_SOT363-6

2
G

ADP_90

BATT_OUT

100K_0402_1%
PR210
47K_0402_1%

<18>

6 1

0.01U_0402_25V7K
PR202
75K_0402_1%

100K_0402_1%

PQ208
2N7002KW_SOT323-3

2
PR211

PC202

PR214

VL

2
G

ADP_65

<18>

PQ206
2N7002KW_SOT323-3

+3VALW

VL

PR216
0_0402_5%
2
@

PROCHOT

PR225
25.5K_0402_1%

H_PROCHOT#

2
PR215

<18,29,4,6>

ADP_I

<18>

BATT_TEMP

PR221
8.45K_0402_1%

A/D

1
2
PR207
10K_0402_5%

100K_0402_1%

2
1
PR201
100_0402_1%

@
1
2
3
4
5
6
7
8
9

PC201
1000P_0402_50V7K

+3VLP

1
2
@ PR209
6.49K_0402_1%

JBATT2

SUYIN_200082GR007M229ZR

EC_SMCA
EC_SMDA

1
2
PR206
6.49K_0402_1%

1
2
3
4
5
6
7
GND
GND

VMB

@
JBATT1
1
1 2
2 3
3 4
4 5
5 6
6 7
7 8
GND 9
GND

SUYIN_200082GR007M229ZR

@ PC214
4.7U_0402_6.3V6M

Compal Secret Data

Security Classification
Issued Date

2011/06/15

2012/07/11

Deciphered Date

Title

Compal Electronics, Inc.


PWR-BATTERY CONN/OTP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
1.0

VAWGA/B

Thursday, March 28, 2013

Sheet
1

24

of

37

B+

P3
P2
PQ301
AO4407AL_SO8

PQ302
AO4423L_SO8
PR301
0.01_1206_1%

CHG_B+

1
2
3

PC319
2200P_0402_50V7K

PC316
10U_0805_25V6K

DISCHG_G

VIN

2
1

2ACOFF-1

1SS355_SOD323-2

DH_CHG

ILIM

BTST

17

PR320
PC317
2.2_0603_5%
0.047U_0603_16V7K
1
2
2
1

BST_CHG
PD301

16

REGN

4
1

15

14

13

2
1
PR318
10_0402_5%

11
6.8_0402_5%
1
12
PR317

RB751V-40_SOD323-2
PC312
1U_0603_25V6K

CHG1

SRP

BATT+

SRN

1
PC305
0.1U_0402_25V6

@
2

PACIN

DL_CHG

PC306
0.1U_0402_25V6
2
1

BQ24737VDD

SCL

124737_SN
2

18

2
G
S

PL302
PR324
10UH_PCMB104T-100MS_6A_20% 0.01_1206_1%

LX_CHG
HIDRV

PR316
100K_0402_1%

3
2
1

1U_0603_25V6K

19

PR323
4.7_1206_5%

PHASE

PU301
BQ24727RGRR_VQFN20_3P5X3P5

5
6
7
8

SDA

2N7002KW _SOT323-3

PC322
10U_0805_25V6K
2
1

3
2
0_0402_5%

PQ309
MDS1525URH 1N SO8

ACN

5
6
7
8

PR319
10_1206_5%
2

2
ACP

3
CMPOUT

IOUT

BM

+3VALW

10

BQ24737VCC

PQ313
D

PC320
680P_0603_50V7K

PR315
316K_0402_1%
1
2

20

PQ310
MDS1521URH 1N SO8

EC_SMB_CK1

PR311
1

3
2
1

<24>
3

21

PC314

LODRV

EC_SMB_DA1

3
1

PQ314
2N7002KW _SOT323-3
2
G

TP

GND

100P_0402_50V8J
8

10K_0402_1%

BATT_OUT

P2

VCC

SRP

0.1U_0402_25V6

CMPIN

5
PC304
1
2

ACDET

SRN

PC303
1
2

<18>

ACOK

1
PR309

392K_0402_1%

ACOFF

ADP_I

PR308
<18,24>
64.9K_0402_1%
1
2

<18>

2ACOFF-1 2
<18>

VIN

PR313
1

PD303
1SS355_SOD323-2
PC324
0.1U_0402_25V6
2
1

1
PQ305
DTC115EUA_SC70-3

PR305
150K_0402_1%

2
3

P2-2
1

0.1U_0402_25V6
2

PR325
200K_0402_1%

PC308

2N7002KDW-2N_SOT363-6

PQ307B

PR303
47K_0402_1%
1
2

PACIN

1 2

3
6
1
C

0.1U_0402_25V6

PQ306
2N7002KW _SOT323-3
2
BATT_OUT
G

ACPRN

PR306
20K_0402_1%

PQ311
DTC115EUA_SC70-3

DTC115EUA_SC70-3

PC311

PD302

1DISCHG_G-1
1

PC307

0.1U_0402_25V6

P2-1

PR321
47K_0402_1%

ACN

PQ307A
2N7002KDW -2N_SOT363-6

PR322
200K_0402_1%
1
2

ACP

PQ303

8
7
6
5

PC323
10U_0805_25V6K
2
1

PC301
5600P_0402_25V7K

2
1

PC302
0.1U_0603_25V7K
2
1
PR304
200K_0402_1%

DTA144EUA_SC70-3

1
PR302
47K_0402_5%

PQ304

PQ312
AO4407AL_SO8

PC315
10U_0805_25V6K
1
2

2
PL301
1UH_PCMB061H-1R0MS_7A_20%

PC313
@ 10U_0805_25V6K

8
7
6
5

PC310
@ 10U_0805_25V6K

1
2
3

1
2
3

8
7
6
5

VIN

PC309
0.1U_0402_25V6

PR314
10K_0402_1%
1
2

BQ24737VDD

PR310
10K_0402_1%

<18>

PQ308
1

2N7002KW _SOT323-3

PR312
2

2
G
3

ACPRN

ACIN

PACIN

PR307
47K_0402_1%

12K_0402_1%

Compal Secret Data

Security Classification
2011/06/15

Issued Date

2012/07/11

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Compal Electronics, Inc.


PWR-CHARGER
Document Number

Rev
1.0

VAWGA/B
Sheet

Thursday, March 28, 2013


1

25

of

37

PC432
0.047U_0402_25V6
2
1

3V5V_EN_R

3V5V_EN

PR402
499K_0402_1%
2
1

PR414
0_0402_5%
@ PR415
2
1
0_0402_5%
PU401
3

PR401
0_0402_5%

LDO

+3VLP

PC414
4.7U_0603_6.3V6M
1 ENLDO_3V5V

PC436
1
2

PR413
1

1K_0402_5%

PU402
3V5V_EN
PC421
0.1U_0603_25V7K
1
2

PR405
0_0402_5%

LDO

VL
1

+5VALWP
1
+

2@

PC438
470P_0402_50V8J

PG

SY8208CQNC_QFN10_3X3

1.5UH_PCMC063T-1R5MN_9A_20%

OUT

PL404
1

LX_5V

PC429 @
PR406 @
2
1 5V_SN
2
1

VCC

10

680P_0603_50V7K 4.7_1206_5%

LX

PC430
4.7U_0603_6.3V6M

5
2

PC422
4.7U_0603_6.3V6M

5V_VCC

GND

PC437
470P_0402_50V8J
2
1

PC433
150U_D2_6.3VY_R15M

BST_5V

PC428 @
22U_0805_6.3V6M

PC427 @
22U_0805_6.3V6M
2
1

PC426
22U_0805_6.3V6M
2
1

BS

PC425
22U_0805_6.3V6M
2
1

EN2

PC424
22U_0805_6.3V6M
2
1

EN1

IN

6800P_0402_25V7K
PC418
0.1U_0402_25V6
2
1

PC417
2200P_0402_50V7K
2
1

PC416
10U_0805_25V6K
2
1

5V_VIN

PC420
10U_0805_25V6K
2
1

PC419
68P_0402_50V8J
2
1

PL403
HCB2012KF-121T50_0805
1
2

PR412

+3VALWP

B+

+3VALWP

PC423
22U_0805_6.3V6M
2
1

+3VLP

2
1
PR410
100K_0402_1%

2
1
PR417
100K_0402_1%

SY8208BQNC_QFN10_3X3

1.5UH_PCMC063T-1R5MN_9A_20%

PC435
470P_0402_50V8J

PG

PC434
470P_0402_50V8J
2
1

OUT

PC413 @
22U_0805_6.3V6M
2
1

GND

PL402
1

LX_3V

PC412 @
22U_0805_6.3V6M
2
1

1K_0402_5%

0.1U_0603_25V7K

10

@
1

0.01U_0402_25V7K

0_0402_5%

LX

SPOK

PC410
22U_0805_6.3V6M
2
1

1
BST_3V

PR416
2

PC409
22U_0805_6.3V6M
2
1

PC402
1
2

BS

PC439
1
2

EN2

3V5V_EN_R

PC408
22U_0805_6.3V6M
2
1

IN

PC415 @
PR404
2
13V_SN
2

EN1

<27>

PC406
10U_0805_25V6K
2
1

PC405
10U_0805_25V6K
2
1

PC404
2200P_0402_50V7K
2
1

PC403
0.1U_0402_25V6
2
1

PC401
68P_0402_50V8J
2
1

3V_VIN

IN

680P_0603_50V7K
4.7_1206_5%

PL401
HCB2012KF-121T50_0805
1
2

B+

PC407
1U_0603_25V6K
2
1

2 ENLDO_3V5V
PR403
150K_0402_1%
2
1

B+

PR411
10K_0402_1%

PC411
22U_0805_6.3V6M
2
1

@PJ401
@
PJ401
1

+3VALWP

<18>

EC_ON

<18>

MAINPWON

EC_ON
MAINPWON

PR407
2.2K_0402_5%
2
1
1

+3VALW

JUMP_43X118

@PJ402
@
PJ402
1

+5VALWP

PR408
0_0402_5%

+5VALW

JUMP_43X118

1
2

PR409
1M_0402_1%

PC431
4.7U_0402_6.3V6M

3V5V_EN

Compal Secret Data

Security Classification
2011/06/15

Issued Date

2012/07/11

Deciphered Date

Title

Compal Electronics, Inc.


PWR-3VALWP/5VALWP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
1.0

VAWGA/GB

Thursday, March 28, 2013

Sheet
E

26

of

37

PL502
1
2
HCB2012KF-121T50_0805

UG_1.5V

Off
LX_1.5V
PR503
0_0402_5%

BST_1.5V

PC513
2200P_0402_50V7K

+1.5VP

@
PC517
680P_0603_50V7K

PC521

PC522

330U_2.5V_M 2

2 220U_6.3V_M

5
12
11

2
1
PR514
5.1_0603_5%

+3VALW

10

PGOOD

3
2
1

PHASE

16

17

BOOT

UGATE

S5

S3

7
S3_1.5V

+5VALW

+1.5VP
OCP min 20A
OVP min 1.65V

PC511
1U_0603_10V6K

PGOOD_1.5V

PR507
5.6K_0402_1%
2
1

PJ504
2
@

PR511
6.65K_0402_1%
2
1

PR515
4.7_1206_5%

0_0402_5%
@ PC508
0.1U_0402_16V7K

PJ505
2

+1.5VP
PR506
5.76K_0402_1%

JUMP_43X118

@ PC526
1
2

13

PR509
887K_0402_1%
2
1 1.5V_B+
1

<18,22>
PC503
0.1U_0402_16V6K

VDD

LG_1.5V

14

S5_1.5V

<18,22>

TON

VDDQ
FB

VDDP

PR505

SYSON

CS

RT8207MZQW _W QFN20_3X3

VTTREF

PGND

6
PR502
49.9K_0402_1%
1
2

SUSP#

PL501
1UH_PCMB104T-1R0MH_18A_20%
2
1
1

GND

PC506
0.033U_0402_16V7K

18

VTTSNS

+1.5VP

LGATE

15

VTTGND

+VTT_REFP

VLDOIN

PAD

19

20

PU501
21

VTT

PC505
10U_0805_25V6K

PC504
10U_0805_25V6K

+0.75VSP

PR501
PC512
2.2_0603_5%
0.1U_0603_25V7K
1
2 BST_1.5V-1
1
2

Note: S3 - sleep ; S5 - power off

3
2
1

Off

B+

Off

PC510
1U_0603_10V6K
2
1

Lo

2
1
PR510
10K_0402_5%

Lo

S4/S5
1

PC509
0.1U_0402_25V6

+1.5VP

On
Off
(Hi-Z)

On

On

On

On

Hi

Hi

Lo

Hi

S3

S0

0.75VSP

PC501
10U_0805_25V6K

VTT_REFP

1.5VP

PQ501
MDU1516URH_POWERDFN56-8-5

S5

PQ502
MDU1511RH_POWERDFN56-8-5

S3

STATE

PC520
4.7U_0805_25V6-K

1.5V_B+

68P_0402_50V8J

+1.5V

JUMP_43X118

PJ506
2

+0.75VSP

+0.75VS

JUMP_43X79
@
3

PU502
SY8033BDBC_DFN10_3X3

2
2

095_18ALW_PWR_EN
<18>

PC524
0.1U_0402_10V7K

PC519
0.1U_0402_25V6

1
2

PC518
68P_0402_50V8J

1
2

PC516
2200P_0402_50V7K

PC515
22U_0805_6.3VAM

1
2

PC514
22U_0805_6.3VAM

PG

PR512
20K_0402_1%

PC525
68P_0402_50V8J
2
1

PR508
4.7_1206_5%

1
1 2

NC

+1.8VALWP

PJ507
+1.8VALW P

+1.8VALW

@ JUMP_43X79

1.8VSP_FB
1

PR504
1M_0402_5%
PR611

FB=0.6Volt

11

<26,28>

FB
EN

PC523
680P_0603_50V7K

0_0402_5%

EN_1.8VSP

PC507 @
0.1U_0402_10V7K

@ PR516
1

SPOK

LX

SVIN

TP

PVIN

1.8VSP_LX

PC502
22U_0805_6.3VAM

LX

@ JUMP_43X79

PVIN

NC

10

1.8VSP_VIN

PL503
1UH_PH041H-1R0MS_3.2A_20%
1
2

PJ502
2

+3VALW

0_0402_5%

PR513
10K_0402_1%
4

Compal Secret Data

Security Classification
Issued Date

2011/06/15

Deciphered Date

2012/07/11

Title

Compal Electronics, Inc.


PWR-+1.5VP/+1.8VALWP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
1.0

VAWGA/GB

Thursday, March 28, 2013


D

Sheet

27

of

37

PL601
HCB2012KF-121T50_0805
1
2

3
2
1
DH_0.95V

0.95V_RF

EN

SW

VFB

V5IN

LX_0.95V

RF

DRVL
TP

7
6
11

+5VALW
DL_0.95V

PC608
1U_0603_10V6K
4

TPS51212DSCR_SON10_3X3

VFB=0.7V
3
2
1

3.48K_0402_1%
PR608
10K_0402_1%

PC605
2
1

PC604
2
1

1
+

PC607
220U_6.3V_M

+0.95VALWP OCP(min)=15.6A

+0.95VALWP

PR604
4.7_1206_5%

DRVH

0.95V_FB

TRIP

PL661
1UH_PCMC063T-1R0MN_12A_20%
1
2

0.95V_EN

PR606 2

PR602
PC606
2.2_0603_5%
0.22U_0603_16V7K
1
2BST_0.95V-11
2
BST_0.95V

470K_0402_1%

PR607

1
2

@ PC601
.1U_0402_16V7K

@ PR605
47K_0402_5%

PR605 reserve

0.95V_TRIP

VBST

PC609
680P_0603_50V7K

SPOK

PGOOD

5
6
7
8

@ PR601
0_0402_5%
1
2

10

PU601
1

PR603

40.2K_0402_1%

PQ602
MDS1521URH 1N SO8

2
0_0402_5%

<27>

PR610
1

095_18ALW_PWR_EN
<18>

B+

2200P_0402_50V7K

2
0_0402_5%

0.1U_0402_25V6

PR609
1

PC603
10U_0805_25V6K
2
1

PQ601
MDS1525URH 1N SO8

5
6
7
8

PC602
10U_0805_25V6K
2
1

0.95V_B+

PJ602
2
@
+0.95VALWP

JUMP_43X118
PJ603

2
@

+0.95VALW
1

JUMP_43X118

Compal Secret Data

Security Classification
Issued Date

2011/06/15

Deciphered Date

2012/07/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title
Size
C
Date:

Compal Electronics, Inc.


PWR-+0.95VALWP

Document Number

Rev
1.0

VAWGA/B
Thursday, March 28, 2013

Sheet
1

28

of

37

0_0402_5%

PHASE_NB1

680P_0603_50V7K
2
1 2

PR929
100K_0402_1%

PC6601
1000P_0402_50V7K

PR955
UGATE1
<18>

0_0402_5%

3
2
1

VGATE

PR932

ISEN2
PHASE1

PC1032
2200P_0402_50V7K
2
1

PC1030
0.1U_0402_25V5K
2
1

PC1052
2200P_0402_50V7K
2
1

PC1029
10U_0805_25V6K
2
1

CPU_B+

PC1051
0.1U_0402_25V5K
2
1

+3VS

PC1050
10U_0805_25V6K
2
1

BOOT1

PC1048
10U_0805_25V6K
2
1

UGATE1

21

PGOOD

COMP

PHASE1

20

19

FB
18

RTN
17

16

15

NTC

VSEN

BOOT1
ISUMN

IMON

23
22

PC1049
10U_0805_25V6K
2
1

UGATE1

PQ903
MDU1516URH_POWERDFN56-8-5

PWROK

PHASE1

LGATE1

ENABLE

LGATE1

3
2
1

10

SVT

24

PQ907
MDU1516URH_POWERDFN56-8-5

PR924
2
1
1_0603_5%

25

VDD

+5VALW

27

VDDP

ISL62771HRTZ-T_TQFN40_5X5

VDDIO

28

26

PC1046
1U_0603_25V6K

LGATE2

+5VS

PH903
470K_0402_5%_TSM0B474J4702RE
2
1

PR912
3.65K_0402_1%
1
VSUMP_NB 2
@ PC1040
PR914
1_0402_1%
1
VSUMN_NB 2

30

32

31
BOOT_NB

UGATE_NB

34

35

33
PHASE_NB

LGATE_NB

PGOOD_NB

37

36

38

PHASE2

VR_HOT_L
SVD

FB_NB

SVC

11

1 PR931

+APU_CORE_NB

29

20K_0402_1%
PR930 27.4K_0402_1%
2
1

2012/10/30
Load Line:VDD-->4m
VDDNB-->4.0m

PC1045
1U_0603_25V6K

ISUMP

2
1

PC1073
1
2

0.1U_0402_25V6

ISEN1

APU_SVC

ISEN2

<4>
H_PROCHOT#

UGATE2

14

100K_0402_1% @ PR922
<4>
APU_SVD
2
1
+3VS
1 PR953 2
+1.8VS
0_0402_5%
2
1
1
+1.5VS
<4>
APU_SVT
@ PR952
PC1044
0_0402_5% <18>
VR_ON
APU_IMON
PC6602 1000P_0402_50V7K 0.1U_0402_25V6
2
1 PR951 2
<4>
APU_PWRGD
0_0402_5%
1 PR928 2
133K_0402_1%
PC1047
1000P_0402_50V7K
1
2

BOOT2

IMON_NB

13

NTC_NB

2
0_0402_5%
2 SVC
0_0402_5%
2
0_0402_5%
2 SVD
0_0402_5%
2 VDDIO
0_0402_5%
2 SVT
0_0402_5%
2 ENABLE
0_0402_5%
2 PWROK

COMP_NB

1
PR918
1
PR920
1
PR921
1
PR923
1
PR925
1
PR926
1
PR927
1

VSEN_NB

470K_0402_5%_TSM0B474J4702RE
PH902

ISUMN_NB

41

PU901

40

39

PC1043
1000P_0402_50V7K
2
1

PR919
133K_0402_1%
<18,24,4,6>

BOOT_NB1

PR917

UGATE_NB1

TP

@ PR910
4.7_1206_5%

20K_0402_1%

ISUMP_NB

27.4K_0402_1%
2
1

12

PR916

+ PC1031
220U_25V_M

LGATE_NB1

B+

PL902
0.36UH_VMPI1004AR-R36M-Z03_30A_20%

PR913
324_0402_1%
2
1

2011/10/21
NTC near NB_CORE H/S mos

LGATE_NB1

@ PC1042
@ PR915
100_0402_1% 220P_0402_50V7K
2
1
2
1

PC1041
0.1U_0603_50V7K

3
2
1

PC1039
0.15U_0603_16V7K

2
1

PC1038
0.022U_0402_25V7K
1
2

1
2
PR911
11K_0402_1%

PL901
HCB2012KF-121T50_0805
1
2

SH00000N900 (DCR 1.1+-5%)

PR908
PC1036
2.2_0603_1% 0.22U_0603_25V7K
2
1 2
1
BOOT_NB1

PC1037
0.01U_0402_50V7K

VSUMN_NB

PH901
10K_0402_5%_ERTJ0ER103J
2
12
1
PR909
2.61K_0402_1%

VSUMP_NB

PHASE_NB1

PQ906
MDU1511RH_POWERDFN56-8-5

2011/10/21
NTC near phase 1 choke

PC1035
47P_0402_50V8J
2
1

PR906
PC1034
PR907
0_0402_5% 1000P_0402_50V7K 499_0402_1%
1
2
2
1
2
1

PC1028
10U_0805_25V6K
2
1

PC1027
10U_0805_25V6K
2
1

3
2
1

PR903
1.54K_0402_1%
2
1

PQ902
MDU1511RH_POWERDFN56-8-5

PR902
10_0402_5%
2
1

+APU_CORE_NB

PR954
UGATE_NB1

150P_0402_50V8J
PC1033
PR904
@ PR905
267K_0402_1%
41.2K_0402_1%
2
1
2
1
2
1

3
2
1

APU_VDDNB_SEN

PQ901
MDU1516URH_POWERDFN56-8-5

PC901
PR901
330P_0402_50V7K 2K_0402_1%
2
1
2
1
<4>

3
2
1

PQ905
MDU1516URH_POWERDFN56-8-5

CPU_B+

SH00000GH00 (DCR 1.25+-7%)


PL903
0.36UH_FDUE1030D-H-R36M=P3_32A_20%

+APU_CORE

0_0402_5%

LGATE1

PR945
487_0402_1%
2
1

PR946
10_0402_5%
2
1

PC1063@
@ PR948
820P_0402_50V7K
100_0402_1%
2
1
2
1

PR947
0_0402_5%
1
2

2011/10/21
NTC near phase 1 choke

PR949
0_0402_5%
1
2
PR950
10_0402_5%
2
1

3
2
1

PR944
PC1061
2K_0402_1% 330P_0402_50V7K
2
1
2
1

1 2
2

PR940
PC1058
267K_0402_1% 150P_0402_50V8J
2
1
2
1

@ PR935
4.7_1206_5%
VSUM+

PQ904
MDU1511RH_POWERDFN56-8-5

PR939
1.54K_0402_1%
2
1

PR938 @
32.4K_0402_1%
2
1

3
2
1

PC1055
47P_0402_50V8J
2
1

PQ908
MDU1511RH_POWERDFN56-8-5

2
PC1060
0.15U_0603_16V7K

2
1

PC1059
0.01U_0402_50V7K
1
2

2
1
PR943
11K_0402_1%

PC1062
0.1U_0603_50V7K

PC1054
PR937
1000P_0402_50V7K 499_0402_1%
2
1
2
1

VSUM-

VSUM+
PH904
10K_0402_5%_ERTJ0ER103J
2
12
1
PR942
2.61K_0402_1%

2011/10/21
NTC near CPU_CORE H/S mos

PC1056
330P_0402_50V7K

PR933
PC1053
2.2_0603_1%
0.22U_0603_25V7K
1
2
1
BOOT12

ISEN1

1
PR934
10K_0402_1%

PC1064
0.01U_0402_50V7K

@ PC1057
680P_0603_50V7K
VSUM-

PR936
3.65K_0402_1%
2
1

PR941
1_0402_1%
2
1

+APU_CORE

APU_VDD_SEN

<4>

APU_VDD_RUN_FB_L <4>

Compal Secret Data

Security Classification
Issued Date

2011/07/08

Deciphered Date

2015/07/08

Title

Compal Electronics, Inc.


APU_CORE/APU_CORE_NB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
1.0

VAWGA/B

Thursday, March 28, 2013


1

Sheet

29

of

37

10U_0603 *3

PC1019
2
1

1
PC1071
1
PC1072
1
PC1069
1
PC1070

1
PC1013
1
PC1014
1
PC1015
1
PC1016

2
22U_0603_6.3V6M
2
22U_0603_6.3V6M
2
22U_0603_6.3V6M
2
22U_0603_6.3V6M

2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M

0.01U_0402_25V7K~N

1
PC1009
1
PC1010
1
PC1011
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M
2
10U_0603_6.3V6M

0.01U_0402_25V7K~N

PC1020
2
1

0.1U_0402_25V7K~N

1
PC1067
1
PC1068
1
PC1065
1
PC1066
2
22U_0603_6.3V6M
2
22U_0603_6.3V6M
2
22U_0603_6.3V6M
2
22U_0603_6.3V6M

2
1
22U_0603_6.3V6MPC1005
2
1
22U_0603_6.3V6MPC1006
2
1
22U_0603_6.3V6MPC1007
2
1
22U_0603_6.3V6MPC1008

1
PC1001
1
PC1002
1
PC1003
1
PC1004
PC1018
2
1

+APU_CORE_NB

0.1U_0402_25V7K~N

10U_0603 * 4

2
22U_0603_6.3V6M
2
22U_0603_6.3V6M
2
22U_0603_6.3V6M
2
22U_0603_6.3V6M
PC1017
2
1

+APU_CORE

1
+
2

1
+
2

1
+
2

1
+

PC1026
330U_D2_2V_Y

PC1025
330U_D2_2V_Y

PC1024
330U_D2_2V_Y

PC1023
330U_D2_2V_Y

PC1022
330U_D2_2V_Y

PC1021
330U_D2_2V_Y

2@

2011/07/08

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2015/07/08

Deciphered Date

Title

PWR-PROCESSOR DECOUPLING

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
1.0

VAWGA/B

Date:

Thursday, March 28, 2013

Sheet
E

30

of

37

Version change list (P.I.R. List)


Item

Page 1 of 1
for PWR

Reason for change

PG#

Modify List

Date

Phase

1
D

2
3
4
5
6
7
8
C

9
10
11
12
13

14
B

15
16
17
A

2011/06/15

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2012/07/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PIR (PWR)
Rev

C38-G series Chief River Schematic1.0

Date:

Thursday, March 28, 2013

Sheet
1

31

of

37

Version change list (P.I.R. List)


Item

Page 1 of 1
for PWR

Reason for change

PG#

Modify List

Date

Phase

1
D

2
3
4
5
6
7
8
C

9
10
11
12
13

14
B

15
16
17
A

2011/06/15

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2012/07/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PIR (PWR)
Rev

C38-G series Chief River Schematic1.0

Date:

Thursday, March 28, 2013

Sheet
1

32

of

37

Version change list (P.I.R. List)

Page 1 of 1
for HW

Item

Reason for change

PG#

Modify List

Date

Phase

For share rom

18

Change SYS_PWRGD_EC from pin 86 to pin 32

12/17

DVT

For 095VS_PWR_EN pull down

18

Add R207

12/17

DVT

For VBIAS first raise up

Change U1895V, U35P, U1895P VBIAS from +5VALW to VL

12/17

DVT

For follow VIWGP design

17

Change JUSB3 pin define

12/18

DVT

For Audio Precision

21

Change CA36, CA46 from 1U to 2.2U

12/21

DVT

For SYS_PWRGD_EC pull down

18

Add R208

12/24

DVT

For share rom

18

Change R1575, R1576 to 100K

12/24

DVT

For reserve EC +3VL

18
05

Add J11, J12 and modify +3VALW to +3V_EC

12/24

DVT

For share ROM

05

modify ROM net-name & resistor value

12/24

DVT

10

For common VIWGP design

12

modify R106, R107 to 22ohm

12/24

DVT

11

For power S3 reduction

18

Change EC_INVT_PWM to ADP_ID_CLOSE

12/25

DVT

12

For common VIWGP design

13

Change JODD1 symbol

12/27

DVT

13

For reserve wake on wlan function

16

Add R1500

12/27

DVT

14

For 1.5VS discharge

22

Change R339 to 0ohm, mount Q23 & R1461

12/29

DVT

15

For AMD suggest

Change R576 to 0ohm

12/29

DVT

16

For +3VALW APU Power Consumption

Add R582

01/03

DVT

17

For ESD request

12
18
29

Add C600, C601, PC6601, PC6602

01/03

DVT

18

For no support DC wake & LID function

18

Pull high only SMB & RST use +3V_EC, other use +3VALW

01/04

DVT

19

For reserve cost down experiment

20

Add R630, R643

01/04

DVT

20

For Common VIWGP

20

Change SW4,SW5,SW6,SW7 footprint

01/04

DVT

21

For instant plug/unplug AC has beep sound 21

@RA22

01/04

DVT

22

For Crystal Capactance fine tune

Modify C794,C795,C682,C686 value

01/09

DVT

22

5
6

2011/06/15

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2012/07/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PIR (PWR)
Rev

C38-G series Chief River Schematic1.0

Date:

Thursday, March 28, 2013

Sheet
1

33

of

37

Version change list (P.I.R. List)


Item

Page 1 of 1
for HW

Reason for change

PG#

For EMI request

20

Change L67 to EMICP@, Change R692,R687 to EMICU@

02/02

PVT

For Share ROM recoverable solution as


original method

05

Add RP12

02/02

PVT

For ZiZi noise

21

Change AVDD_HP from +3VS to +3VLP

02/02

PVT

For follow KABINI latest CRB

04

@ R576,C164,C342

02/02

PVT

For APU control PWM only

11

Delete R1465

02/02

PVT

For Corret Net-name to prevet confuse

04
11

Change TL_INVT_PWM, TL_ENVDD to APU_INVT_PWM, APU_ENVDD

02/02

PVT

For Reserve DDC CLK DATA pull high

12

Add R693, R697

02/02

PVT

For Common Intel project

20

Change R623,R765,R303 to 620ohm

02/02

PVT

For Common Intel project

13

Reserve R551

02/02

PVT

10

For reduce BOM

21

Delete RA3, and Change RA4 to short-pad

02/05

PVT

11

For reduce BOM

16

Change R1498,R1499 from 0 ohm to 100 ohm

02/05

PVT

12

For reduce BOM

11

Change R1463 from 0 ohm to short-pad

02/06

PVT

13

For better audio precision performance

21

Change CA27,CA28 from 1U to 2.2U

02/08

PVT

14

For reduce BOM & layout concern

07

Delete C195

02/16

PVT

15

For test point request

12

Add T49, T58 on JCRT1

02/18

PVT

16

For ESD request

15

Add C173, C178

02/18

PVT

17

For reduce BOM

05

Change R116, R119, R125, R126 to short-pad

02/18

PVT

18

For Crystal timming

06

Change C682 from 18P to 22P

02/20

PVT

19

For ESD request

20

Change D24 from ESDU@ to ESDP@, Part number from SCA00000E00


to SCA00001G00

02/23

PVT

20

For EMI request

Change L58,L51,L55,L66,L67 from SM070000K00 to SM070000Z00

02/23

PVT

Modify List

Date

Phase

11
17
20

21
22
23
A

2011/06/15

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2012/07/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PIR (PWR)
Rev

C38-G series Chief River Schematic1.0

Date:

Thursday, March 28, 2013

Sheet
1

34

of

37

Version change list (P.I.R. List)


Item

Page 1 of 1
for PWR

Reason for change

PG#

Modify List

Date

Phase

For Common Intel project

20

Change R623,R765,R303 to 649ohm

03/05

PreMP

For Reduce BOM

05

Change R103, R104 to short-pad

03/11

PreMP

For Reduce BOM

11

Change R696, R695, R813 to short-pad

03/11

PreMP

For Reduce BOM

13

Change R550 to short-pad

03/11

PreMP

For Reduce BOM

18

Change R1564 to short-pad

03/11

PreMP

For Reduce BOM

19

Change R581 to short-pad

03/11

PreMP

For Reduce BOM

21

Change RA11 to short-pad

03/11

PreMP

For Reduce BOM

22

Change R339 to short-pad

03/11

PreMP

For Reduce BOM

07

Change R582 to short-pad

03/11

PreMP

10

For ESD require

20

Add C185

03/25

PreMP

11

For Module Design

12

Change R693, R697 from 10k to 4.7k

03/25

PreMP

12

For ESD require

04

Add C195

03/26

PreMP

13

For Reduce BOM

04

@ RP11

03/26

PreMP

14

For Board ID

18

@ R1562 and change R1564 to 0ohm

03/28

PreMP

15
16
17
A

2011/06/15

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2012/07/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PIR (PWR)
Rev

C38-G series Chief River Schematic1.0

Date:

Thursday, March 28, 2013

Sheet
1

35

of

37

EC_ON

B+

+3VLP

PU401
SY8208BQKC

+3VALW
+EC_VCCA
LAN_PWR_ON#

+3V_LAN

P-CHANNEL
PMV65XP
1

SUSP#

U35P
TPS22966DPUR

+3VS

SPOK

PU502
SY8033BDBC

+1.8VALW
SUSP#

U1895P
TPS22966DPUR

+1.8VS

EC_ON

+VL

PU402
SY8208CQKC

+5VALW
SUSP#

U35P
TPS22966DPUR

+5VS

SUSP# / SYSON

+0.75VS

PU501
RT8207MZQW

+1.5V
SUSP#

P-CHANNEL
LP2301ALT1G

+1.5VS

SPOK

PU601
TPS51212DSCR

+0.95VALW
SUSP#

U1895P
TPS22966DPUR

+0.95VS

VR_ON

+APU_CORE

PU901
ISL62771HRTZ

+APU_CORE_NB

SPOK

PQ204
TP0610K

+VSB

Security Classification
Issued Date

Compal Secret Data


Title

Deciphered Date

Compal Electronics, Inc.


Power Map

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
1.0

VAWGA/GB

Thursday, March 28, 2013

Sheet
E

36

of

37

+3VALW

+5VALW

B+

+3VS / +1.8VS / +1.5VS / +0.95VS

+3VALW

+APU_CORE / +APU_CORE_NB
+RTCBATT

EC

095_18ALW_PWR_EN

V V

4A
B+

B+
3B
3A

PU402
+5VALW / VL

APU

KBRST#

10

3B
SYS_PWRGD_EC

14

LPC_RST#

16

EC_ON

APU_PCIE_RST#

15

APU_PWRGD

+3VS

ON/OFF
1B

B+
095VS_PWR_EN

+3V_LAN

+3VALW
+3VALW +5VALW

+5VALW

BATT+

+3VALW
+5VALW

PU501
+0.75VS

Security Classification
Issued Date

COMPAL CONFIDENTIAL
5

+0.95VALW +5VALW

B+

MODEL NAME:
PCB NAME:
REVISION:
DATE: 2011/11/23

U1895P
+1.8VS

+1.8VALW +5VALW

+1.5V

Q20
+1.5VS

18

PU501
+1.5V

PU301
B+

PU102
+RTCBATT

U35P
+3VS

VIN

LAN_PERST#

U35P
+5VS

B+
+CHGRTC_R +3VLP

LAN

SUSP#

VGATE

RTC Battery
+CHGRTC_R
+5VALW

11

13

SYSON

PU901
+APU_CORE /
+APU_CORE_NB

D4
Diode

12

VR_ON

15
APU_PWRGD

+5VALW

WLAN / WiMAX
Mini-Express Card
C

+5VS / +3VS / +1.8VS

AC MODE
VIN

BATT MODE
BATT+

+1.5VS

V V

ACIN

17

2B

4A

SLP_S3# / SLP_S5#

1A

SPOK

PU401
+3VALW/+3VLP
2A

EC_RSMRST#
PBTN_OUT#

3B

V V

3A

V V

PU601
+0.95VALW

+3VALW / +1.8VALW / +1.5VALW / +0.95VALW


+3VLP

PU502
+1.8VALW

U1895P
+0.95VS

Compal Secret Data


Title

Deciphered Date

Compal Electronics, Inc.


Power sequence

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
1.0

Date:

Sheet
1

of

www.s-manuals.com

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