MOSFET

METAL OXIDE
SEMICONDUCTOR FIELD
EFFECT TRANSISTOR

Review of MOSFET

Two types of unipolar transistors have been

developed, the junction field effect transistor
(JFET) and the metal-oxide-semiconductor field
effect transistor (MOSFET). The digital logic
families built with field effect transistors use the
MOSFET, while the JFET is used primarily in
analog circuits. Since our concern is with digital
systems design, we will not consider JFET's any
further.

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Structure of MOSFET
The region identified as the gate (not to be confused with the term gate as it
is used for a logic device) was originally made of metal (aluminum). MOSFET's
used in integrated circuits use a polysilicon material (a conductor with
somewhat more resistance than metal) for the gate.
The material just below the gate is an oxide insulator that prevents the gate
from making electrical contact with the semiconductor material beneath it. It
is this sandwich of metal, oxide, and semiconductor for which MOS transistors
are named.

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Structure of MOSFET
The voltage between the gate and the substrate
will control the flow of current between the drain
and source.
When the gate voltage is positive with respect to
the substrate, the resulting electric field will
force positive charge carriers out of the region
between the source and drain, turning it into Ntype material as shown in Fig.b. This effectively
connects the source and drain, allowing current
to flow, so that the transistor acts as a closed
switch in this state. This induced conducting
region is called a channel, and since it is N-type
material, the transistor is called an N-channel
FET. When the electric field is absent or
negative, the P-type material between the
source and drain forms two back-to-back PN
junctions giving the equivalent circuit shown in
Fig. c.
Since diodes will only allow significant current to
flow from their anode to their cathode, and any
current flowing in one diode must also flow in
the other, the circuit blocks almost all current
flow between the source and drain terminals and
acts as an open switch.
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Structure of MOSFET
It is also possible to reverse the N- and P-type materials as
shown in Fig. d. This transistor is called a P-channel FET
because a negative voltage on the gate (relative to the
substrate) will induce a channel of P-type material between
the source and drain.

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Types of MOSFET

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MOS Technology

Metal Oxide Semiconductor Field Effect

Transistors (MOSFETs)

Simple and cheap to fabricate

Consume very little power
More circuit elements are possible
Susceptible to static electricity damage

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MOS Technology

Two general types of MOSFETs, i.e. depletion

and enhancement. MOS digital ICs use
enhancement type.
Schematic symbols for P and N channel
enhancement MOSFETs.

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MOSFET Technology

Digital circuits with MOSFETs can be

grouped into 3 categories :

PMOS use only p-channel enhancement

MOSFET
NMOS - use only n-channel enhancement
MOSFET
CMOS - use both p-channel and n-channel
enhancement MOSFET

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MOS Technology

MOSFET as a resistor requires less space

DS

Enhancement-type

Depletion-type

RON = 100K (typical value)

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MOS Technology

The basic MOSFET switch

D-S bias

VGS

(needed for
conduction)

RON ()

ROFF ()

P-channel

Negative

More negative than

-1.5 V (typical)

1K (typical)

1010

N-channel

Positive

More positive than

+1.5 V (typical)

1K (typical)

1010

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NMOS gates (inverter)

Q1 is a load and acts as load
resistance for Q2.
Q1 is always ON since G is
connected to VDD.
When HIGH is applied to input,
Q2 conduct, and the output is
LOW.
Typically, RON (Q1) i.e. 100K >
RON (Q2) i.e. 1K

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NMOS gates (NAND)

Q3 acts as a resistor to
limit current.
When a LOW is applied
to one or both inputs, at
least one of the
transistors (Q1 or Q2) is
OFF, and the output is
pulled up to HIGH level
near VCC.
When HIGH is applied
to both inputs, both Q1
and Q2 conduct, and the
output is LOW.
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NMOS gates (NOR)

Q3 acts as a resistor to
limit current.
When a HIGH is applied
on either input, turns Q1
or Q2 ON, pulling the
output LOW.
When LOW is applied to
both inputs, both Q1 and
Q2 are OFF, and the
output is pulled up to a
HIGH level.

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PMOS gates
inverter

NOR

NAND

-VDD

Q1

output

Q2
A

Q3
B

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CMOS Technology

Complementary, or CMOS, circuits use both nchannel and p-channel enhancement-type

MOSFETs in the same circuit.
Due to very low power consumption, CMOS
circuits are commonly used in ICs.

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CMOS Inverter
When a LOW is applied to
input, Q2 will be OFF, since VGS =
0V but Q1 is ON, since its VGS is a
large negative value (-5.0V).
Therefore, Q1 presents only a
small resistance between VDD
and the output will be HIGH.

input

Q1

Q2

output

0.0 (L)

ON

OFF

5.0 (H)

5.0 (H)

OFF

ON

0.0 (L)

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When HIGH is applied to input,

Q2 conducts, since VGS is a large
positive value (+5.0V), but Q1 is
OFF, since its VGS = 0V. Thus, Q2
presents a small resistance
between the output and ground,
and the output will be LOW.

CMOS NAND gate

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CMOS NOR gate

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