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A Simple Low Voltage, High Output Impedance

Resistor Based Current Mirror with Extremely Low


Input and Output Voltage Requirements
Leila Safari1* and Shahram Minaei2*
1

Independent Researcher, Tehran, Iran


Department of Electronics and Communications Engineering, Dogus University, Acibadem, Turkey
Email: leilasafari@yahoo.com, sminaei@dogus.edu.tr

AbstractA New CMOS resistor based current mirror with


extremely low voltage requirement at input (in the range of a few
mV) and output voltage requirement of about one Vds is
presented. The proposed structure combines the advantages of
wide input swing, wide output swing, large output impedance,
low input impedance and high linearity altogether, which make it
attractive for high performance low-voltage and low power
applications. Pspice simulations show a very low THD of -42.2dB
from a single 0.9V supply in 0.18m, input impedance of 239,
output impedance of 1.2M and power dissipation of only
180W. Interestingly, the input and output voltage requirements
are only 10mV and 0.1V respectively.

voltage requirements, very low input impedance, high output


impedance and high current copying accuracy. The proposed
CM has a very simple structure and employs only 3 transistors
in its core structure. It is based on a simple control circuitry
which increases current copying accuracy and boosts output
impedance. Interestingly, the proposed CM, can provide a
high output voltage swing while maintaining cascode-type
precision and output impedance.

KeywordsCurrent mirror; Current Output Stage; Low


voltage; Low input impedance; High output impedance.

Conceptual schematic of the proposed CM is shown in


Fig.2. It is based on 2 grounded resistors, transistor M 1 and a
control circuitry which keeps the voltage across R1 and R2
equal. Therefore, current of R1 is copied to R2. The detail
operation of the proposed CM is as follows. At the input side,
input current Iin applied to the input node A, is pumped into R 1
and produces a voltage at the input port, i.e. node A. The
control circuitry, keeps the voltage at node B, equal to voltage
at node A by establishing a negative feedback loop. As a
result, voltage across R1 and R2 will be forced to be equal and
a current signal is produced in R2. Then, the produced current
across R2, is provided to the output node by M1 if the input
and output dc currents of the control circuitry are equal.
Therefore, the proposed CM performs as a high performance
current mirror and copies Iin to the output node.

I.

II.

INTRODUCTION

Obviously current mirrors (CM) are one of the most


widely used building blocks in analog signal processing both
current mode and voltage mode ones [1-7]. They can be
utilized either individually, as a part of other circuits to copy
current signals, as current source for biasing purposes, and in
general where a current copying is needed. In the past, the
widely used CMs were the cascode CM, the Wilson CM and
the regulated cascode CM. However, they are not suitable for
modern VLSI circuits because of their high input and output
voltage requirements. Even the input voltage requirement of
simple CM (Fig.1[8]) is VGS (Gate-Source voltage) which is
very high and not tolerable in low voltage applications.
Especially, in applications such as VLSI test circuits which
employ current sensing techniques, CMs with very low input
voltage are required [2]. CM structures with reduced input
voltage requirements based on level shifters have been
reported [1]. Although their required input voltage is reduced
from VGS to Vds (Vds is the drain-source voltage of MOS
transistor), but the required output voltage is still high and
equal to 2Vds. Other techniques used to reduce the input and
supply voltage requirements of CMs suffer from several
drawbacks. Some needs fabrication requirements [4-5] and
some employ high gain amplifiers which limit CM's
bandwidth, complicate the design and cause stability problems
[6-7].

THE PROPOSED RESISTOR BASED CM

VDD

IB

Iout
Control
Circuirty

Iout

Iin

R1

M1

M1

Iin
B

R2

M2

Fig.1. Simple CM [8]

Fig.2. Conceptual schematic of


the proposed Resistor based CM

In this article, a new low voltage low power resistor based


CM is presented which exhibits very low input and output

978-1-5090-1288-6/16/$31.00 2016 IEEE

254

TSP 2016

As it is seen, the proposed CM does not provide the usual


mode of operation as simple CM of Fig.1, where the gate
voltages of input and output transistors are kept equal. Instead,
the voltage across R2 follows the voltage across R1 and
therefore input current is reproduced in R2. It does this task
indirectly by forcing VR1 = VR2. Control circuitry is be
implemented as is shown in Fig. 3-a using only two transistors
of M2-M3. A simple DC analysis shows that for IB1=IB2, the
DC bias current of M1 is equal to IB. Due to the internal
negative feedback established by control circuitry, the
proposed CM exhibits high output impedance. Using the small
signal equivalent circuit shown in Fig.3-b and assuming that
gm1ro1>>1, gm3ro3>>1 and 1/gm2<<roIB2, the transfer function,
output and input impedances of the proposed CM are found
as:

I out R1
|
I in
R2

VDD

VDD

VDD
Iout=Iin+IB
IB2

IB1

IB

M1
Iin

M3

M2

B
R2

R1

(a)

Iout

(1)

ro1
gm1(V2-Vo1)
V2

routgm1ro1 gm3(ro3||roIB1)R2
rinR1

roIB1

(2)

ro3

(3)

R1

roIB2

R2

(b)
Fig. 3 Proposed CM, a) Complete schematic b) Equivalent circuit with
grounded load

proposed CM is shown in Fig. 4. It is seen that for different


values of input current ranging from 60A to +60A, the
input voltage varies only from 10mV to 40mV. This result
proves the extremely low voltage requirement of the proposed
CM. Current transfer characteristic of the proposed CM is
shown in Fig.5. It can be observed that there is an excellent
current tracking between input and output branches. The I-V
characteristic of the proposed CM is shown in Fig.6. As it is
seen, the output voltage requirement of the proposed CM is
only 0.1V. The frequency response of the proposed current
mirror is shown in Fig.7 which shows a high -3dB bandwidth
of 78MHz for a grounded load. The input and output
impedances are 239 and 1.2M respectively. The power
dissipation is only 180W. Transient analysis is carried out by
applying a sinusoidal input current with peak to peak value of
60A and frequency of 1MHz. The input current and the
resulted output current are shown in Fig. 8. The total harmonic
distortion is -42.2dB which proves excellent linearity of the
proposed CM. Monte Carlo simulation is carried out by
considering 3% mismatch in VTH of all transistors and values
of resistors in 50 runs. The maximum, minimum and mean
values of the proposed CM parameters are given in Table-1
which shows its robust performance against mismatches. A
comparison between the proposed CM , simple current mirror
of Fig.1 (simulated in the equal conditions with the proposed
CM) and other structures is shown in Table 2 which proves
superiority of the proposed CM. As an application, the
proposed CM is used as tail current source of a differential
pair. Compared to a differential pair with a simple CM as tail
current source, it shows 28dB higher CMRR.

(4)

If the values of R1 and (IB+IB1) are set at 250 and 60A


respectively, the input voltage requirement will be only 15mV
the lowest possible value so far. At the output branch, the
voltage drop on R2 is negligible and therefore, output voltage
requirements will be about 1Vds . Hence, the proposed CM
exhibits characteristics of a cascode CM (Eq.1) while require
negligible voltage at input and output nodes. Despite resistor
based current mirrors of [7],[9] which use high gain
complicated auxiliary amplifiers and have complex circuit
suffering from low bandwidth, high power/area consumption,
the proposed CM is extremely simple and does not suffer from
those mentioned disadvantages. Other interesting feature of
the proposed CM is that it can function with low supply
voltage of about VGS+Vds.
III.

V1

Vin

Iin

where gmi, roi are transconductance and output impedance of


corresponding transistors respectively and roIB1 is output
impedance of IB1 current source. The input impedance is also
found as: According to Eq.2, it is not needed to employ any
technique at the input of the proposed CM to reduce input
impedance. Low input impedance can be simply achieved by
selecting low value for R1. The input voltage requirement is
also found as:
Vin=R1(IB+IB1)

Vo1
1/gm2

gm3(V1-Vin)

SIMULATION RESULTS

The proposed circuit of Fig.3 is simulated using 0.18m


TSMC CMOS model parameters with DC supply voltage of
0.9V. The value of IB and IB1=IB2 are 60A and 40A
respectively and they are implemented with simple CMs. The
values of R1 and R2 are 250. The (W/L) ratios of M 1 and
M2-M3 are 72/0.54 and 54/0.27 respectively and they all
operate in saturation region. The input characteristics of the

255

TABLE 1. Monte Carlo simulation results


Parameter

Max

Min

Mean

Rin()

249

242

248

Rout(M)

10000

0.830

1.45

BW(MHz)

140

21.7

80

TABLE2 . A COMPARISON BETWEEN PROPOSED AND SIMPLE


CM

Fig. 4. Input voltage for different values of Iin

Parameter

[4]

[5]

S1

P2

Rin()

1160

NA

800

239

Rout(M)

0.175

71.2

0.043

1.2

Vin(V)

NA

NA

0.5

0.01

Vout(V)

0.11

0.3

0.2

0.1

VDD-VSS(V)

0.3

0-0.9

0-0.9

Simple, Proposed,

IV.

Fig. 5. Current transfer characteristic of the proposed CM

0.75

CONCLUTION

In this paper a novel resistor based current mirror with low


input impedance, high output impedance, high linearity and
extremely low input and output voltage requirements are
introduced. The proposed CM enjoys a very simple structure
and is suitable for low voltage low power applications. It can
operate with the lowest possible input voltage of a few mV.
RERFENCES
[1]
Fig. 6. I-V characteristic of the proposed CM for different values of Iin

[2]
[3]

[4]

[5]

[6]

Fig. 7. Frequency response of the proposed CM

[7]

[8]

[9]

Fig. 8. Iin and Iout in time domain

256

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