Introduction to 8051 Microcontroller

Dr. M. Gopikrishna

Syllabus
Introduction to microcontrollers and Embedded systems - comparison of microprocessors and microcontrollers - The 8051 architecture - Register set - of 8051 - important operational features - I/O pins, ports and
circuits - external memory - counters and timers interrupts - Instruction set of 8051 - Basic programming
concepts - Applications of microcontrollers - (basic ideas) Embedded systems(basic ideas)

1 Embedded Systems
An embedded system is a system that has embedded software and computer hardware which makes it
a system dedicated for an application(s) or specific part of an application or product or part of a larger
system.
1. It embeds hardware similar to a computer. Its software is usually embedded in the ROM or Flash memory.
2. It embeds main application software. The application software may concurrently perform a series of
tasks or processes or threads.
3. It embeds a real-time operating system (RTOS) that supervises the application software running on hardware and organizes access to a resource according to the priorities of tasks in the system. It provides a
mechanism to let the processor run a process as scheduled and context switch between the various processes.
4. The heart of an embedded system is the processor used. Microprocessor and Microcontrollers are widely
used in embedded system products
Figure 1 shows the schematic of an embedded system.

2 Microprocessor
A microprocessor, as the term has come to be known, is a general purpose digital computer central processing unit (CPU). Although popularly known as a computer on chip, the microprocessor is in no sense a
complete digital computer.
The block diagram of a microprocessor CPU is shown in Figure 3(a). It comprises of a ALU, a program
counter (PC), a stack pointer (SP), some working registers, a clock timing circuit and interrupt circuit.
Dr. M. Gopikrishna
Dept. of Physics, Maharajas College, Ernakulam 682 011, e-mail: gopiikrishna@gmail.com

Fig. 1 Schematic of an embedded system.

Fig. 2 Applications of embedded systems.

Fig. 3 Schematic of a (a) microprocessor (b) microcontroller.

Dr. M. Gopikrishna

Introduction to 8051 Microcontroller

The prime use of a microprocessor is to read data, perform extensive calculations on the data and store
those calculations in a mass storage device or display the results for human use. To make a complete
microcomputer, one must add, to the above configuration, memory (ROM and RAM), memory decoders,
an oscillator and a number of I/O devices such as parallel and serial data ports. In addition, special purpose
devices such as interrupt handlers and counters may be added to relieve the CPU from time consuming
counting or chores.

3 Microcontroller
Figure 3(b) shows a typical microcontroller, which is a true computer on a chip. The design incorporates
all of the features found in a microprocessor CPU: ALU, PC, SP and registers. It also has added the other
features needed to make a complete computer: ROM, RAM, parallel I/O, Serial I/O, counters and a clock
circuit.
Like a microprocessor, a microcontroller is a general purpose device, but one that is meant to read data,
perform limited calculations on the data and control its environment based on those calculations. The prime
use of a microcontroller is to control the operation of a machine using a fixed program that is stored in ROM
and that does not change over the lifetime of the system.
Microprocessor
Microcontroller
Microprocessor is a general purpose device which A dedicated chip which is also called a single chip
is called a CPU
computer
Do not contain on-chip I/O ports, timers, memo- Includes RAM, ROM, serial and parallel interface,
ries etc.
timers, interrupt circuitry (in addition to CPU) in
a single chip
Most commonly used as CPU in computer sys- Used in small minimum component designs pertems
forming control oriented operations
Microprocessor instructions are mainly nibble or Both bit addressable as well as byte addressable
byte addressable
Instruction sets are mainly intended for catering to Have instructions sets catering to the control of
large volumes of data
inputs and outputs

4 8051 Microcontroller
The 8051 is a very popular 8-bit microcontroller introduced by Intel in the year 1981 and it has become almost the academic standards now-a-days. The 8051 is based on 8-bit CISC core with Harvard architecture.
Its 8-bit architecture is optimized for control applications with extensive Boolean processing. It is available
as a 40 pin DIP chip and works at +5V DC. Figure 4 shows the usual CPU components of 8051: ALU,
Program Counter and Working Registers.

4.1 8051 features

The 8051 architecture consists of the following specific features.
8-bit CPU with registers A (the accumulator) and B

Dr. M. Gopikrishna

Fig. 4 8051 architecture

16-bit Program Counter (PC) and Data Pointer (DPTR)

8-bit Program Status Word (PSW)
8-bit Stack Pointer (SP)
Internal ROM or EPROM of up to 4k
Internal RAM of 128 bytes
Four Register banks, each containing 8 registers
16-bytes, which may be addressed at the bit level
8-bytes of general purpose data memory

32 I/O pins arranged as four 8-bit ports P0 P3

Two 16-bit Timer / Counters : T0 and T1
Full duplex serial data receivers/ transmitter : SBUF
Control registers: TCON, TMOD, SCON, PCON, IP (Interrupt Priority) and IE (Interrupt Enable)
Two external and three internal interrupt sources
Oscillator and Clock circuits.

4.2 Memory and Register organization

The 8051 has a separate memory space for code (programs) and data. We will refer here to on-chip memory
and external memory as shown in Figure 5. In an actual implementation the external memory may, in fact,
be contained within the microcomputer chip. However, we will use the definitions of internal and external
memory to be consistent with 8051 instructions which operate on memory. Note, the separation of the code
and data memory in the 8051 architecture is a little unusual. The separated memory architecture is referred
to as Harvard architecture whereas Von Neumann architecture defines a system where code and data can
share common memory.

Introduction to 8051 Microcontroller

Fig. 5 8051 Memory representation.

4.2.1 External code memory

The executable program code is stored in this code memory. The code memory size is limited to 64KBytes
(in a standard 8051). The code memory is read-only in normal operation and is programmed under special
conditions e.g. it is a PROM or a Flash RAM type of memory.

4.2.2 External RAM Data Memory

This is read-write memory and is available for storage of data. Up to 64 KBytes of external RAM data
memory is supported (in a standard 8051).

4.2.3 Internal memory

The 8051s on-chip memory consists of 256 memory bytes organized as follows:
First 128 bytes:

Next 128 bytes:

00h to 1Fh Register Banks

20h to 2Fh Bit Addressable RAM
30 to 7Fh General Purpose RAM
80h to FFh Special Function Registers

The first 128 bytes of internal memory is organized as shown in Figure 6, and is referred to as Internal
RAM, or IRAM.

4.2.4 Register Banks: 00H to 1FH

The 8051 uses 8 general-purpose registers R0 through R7 (R0, R1, R2, R3, R4, R5, R6, and R7). These
registers are used in instructions such as:
ADD A, R2 ; adds the value contained in R2 to the accumulator
Note since R2 happens to be memory location 02h in the Internal RAM the following instruction has the
same effect as the above instruction.
ADD A, 02h
Now, things get more complicated when we see that there are four banks of these general-purpose registers defined within the Internal RAM. For the moment we will consider register bank 0 only. Register banks
1 to 3 can be ignored when writing introductory level assembly language programs.

Dr. M. Gopikrishna

Fig. 6 Organization of Internal RAM (IRAM) memory.

4.2.5 Bit Addressable RAM: 20H to 2FH

The 8051 supports a special feature which allows access to bit variables. This is where individual memory
bits in Internal RAM can be set or cleared. In all there are 128 bits numbered 00h to 7Fh. Being bit variables any one variable can have a value 0 or 1. A bit variable can be set with a command such as SETB and
cleared with a command such as CLR. Example instructions are:
SETB 25h ; sets the bit 25h (becomes 1)
CLR 25h ; clears bit 25h (becomes 0)
Note, bit 25h is actually bit b5 of Internal RAM location 24h. The Bit Addressable area of the RAM is
just 16 bytes of Internal RAM located between 20h and 2Fh. So if a program writes a byte to location 20h,
for example, it writes 8 bit variables, bits 00h to 07h at once. Note bit addressing can also be performed on
some of the SFR registers, which will be discussed later on.

4.2.6 General Purpose RAM: 30H to 7FH

These 80 bytes of Internal RAM memory are available for general-purpose data storage. Access to this
area of memory is fast compared to access to the main memory and special instructions with single byte
operands are used. However, these 80 bytes are used by the system stack and in practice little space is left
for general storage. The general purpose RAM can be accessed using direct or indirect addressing modes.
Examples of direct addressing:

Introduction to 8051 Microcontroller

MOV A, 6Ah ; reads contents of address 6Ah to accumulator

Examples for indirect addressing (use registers R0 or R1):
MOV R1, #6Ah ; move immediate 6Ah to R1
MOV A, @R1 ; move indirect: R1 contains address of Internal RAM which contains data that is moved
to A.
These two instructions have the same effect as the direct instruction above.

4.2.7 SFR Registers

The SFR registers are located within the Internal Memory in the address range 80h to FFh, as shown in
Figure 7. Not all locations within this range are defined. Each SFR has a very specific function. Each SFR
has an address (within the range 80h to FFh) and a name which reflects the purpose of the SFR. Although
128 byes of the SFR address space is defined only 21 SFR registers are defined in the standard 8051.
Undefined SFR addresses should not be accessed as this might lead to some unpredictable results. Note
some of the SFR registers are bit addressable. SFRs are accessed just like normal Internal RAM locations.

Fig. 7 SFR register layout.

Dr. M. Gopikrishna

4.2.8 Port Register SFR

The standard 8051 has four 8 bit I/O ports: P0, P1, P2 and P3.
For example Port 0 is a physical 8 bit I/O port on the 8051. Read (input) and write (output) access to this
port is done in software by accessing the SFR P0 register which is located at address 80h. SFR P0 is also
bit addressable. Each bit corresponds to a physical I/O pin on the 8051.
Example access to port 0:
SETB P0.7 ; sets the MSB bit of Port 0
CLR P0.7 ; clears the MSB bit of Port 0
The operand P0.7 uses the dot operator and refers to bit 7 of SFR P0. The same bit could be addressed
by accessing bit location 87h. Thus the following two instructions have the same meaning:
CLR P0.7
CLR 87h

4.2.9 PSW (Program Status Word)

PSW, the Program Status Word is at address D0h and is a bit-addressable register.

Introduction to 8051 Microcontroller

4.2.10 Stack Pointer

The Stack Pointer, SP, is an 8-bit SFR register at address 81h. The small address field (8 bits) and the limited space available in the Internal RAM confines the stack size and this is sometimes a limitation for 8051
programmes. The SP contains the address of the data byte currently on the top of the stack. The SP pointer
in initialized to a defined address. A new data item is pushed on to the stack using a PUSH instruction which
will cause the data item to be written to address (SP + 1). Typical instructions, which cause modification to
the stack are: PUSH, POP, LCALL, RET, RETI etc.. The SP SFR, on start-up, is initialised to 07h so this
means the stack will start at 08h and expand upwards in Internal RAM. If register banks 1 to 3 are to be
used the SP SFR should be initialised to start higher up in Internal RAM. The following instruction is often
used to initialise the stack:
MOV SP, #2Fh

4.2.11 Data Pointer

The Data Pointer, DPTR, is a special 16-bit register used to address the external code or external data
memory. Since the SFR registers are just 8-bits wide the DPTR is stored in two SFR registers, where DPL
(82h) holds the low byte of the DPTR and DPH (83h) holds the high byte of the DPTR. For example, if
you wanted to write the value 46h to external data memory location 2500h, you might use the following
instructions:
MOV A, #46h

; Move immediate 8 bit data 46h to A (accumulator)

MOV DPTR, #2504h ; Move immediate 16 bit address value 2504h to A.

; Now DPL holds 04h and DPH holds25h.
MOVX @DPTR, A ; Move the value in A to external RAM location 2500h.
Uses indirect addressing.
Note the MOVX (Move X) instruction is used to access
external memory.

4.2.12 Accumulator
This is the conventional accumulator that one expects to find in any computer, which is used to the hold
result of various arithmetic and logic operations. Since the 8051 microcontroller is just an 8-bit device, the
accumulator is, as expected, an 8 bit register.
The accumulator, referred to as ACC or A, is usually accessed explicitly using instructions such as:
INC A ; Increment the accumulator
However, the accumulator is defined as an SFR register at address E0h. So the following two instructions
have the same effect:
MOV A, 52h ; Move immediate the value 52h to the accumulator
MOV E0h, 52h ; Move immediate the value 52h to Internal RAM location E0h, which is, in fact, the
accumulator SFR register.
Usually the first method, MOV A, 52h, is used as this is the most conventional (and happens to use less
space, 2 bytes as oppose to 3 bytes!)

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Dr. M. Gopikrishna

4.2.13 B Register
The B register is an SFR register at addresses F0h which is bit-addressable. The B register is used in two
instructions only: i.e. MUL (multiply) and DIV (divide). The B register can also be used as a generalpurpose register.

4.2.14 Program Counter

The PC (Program Counter) is a 2 byte (16 bit) register which always contains the memory address of
the next instruction to be executed. When the 8051 is reset the PC is always initialized to 0000h. If a 2
byte instruction is executed the PC is incremented by 2 and if a 3 byte instruction is executed the PC is
incremented by three so as to correctly point to the next instruction to be executed. A jump instruction (e.g.
LJMP) has the effect of causing the program to branch to a newly specified location, so the jump instruction
causes the PC contents to change to the new address value. Jump instructions cause the program to flow in
a non-sequential fashion.

4.3 Counters and Timers

Many microcontroller applications require the counting of external events, such as the frequency of a pulse
train or the generation of precise internal time delays between computer actions. The 8051 has two timers:
Timer 0 and Timer 1. Both Timer 0 and Timer 1 is 16 bit wide. Since the 8051 has 8 bit architecture, each
16 bit timer is accessed as two separate registers of low and high byte.

4.3.1 Timer 0 Register

The 16 bit register of Timer 0 is accessed as low byte and high byte. The low byte register is called TL0
and the high byte is called TH0. These registers can be accessed like any other register such as A, B, R0,
R1, R2 etc.
MOV TL0 , #4FH

; Moves the value 4FH in to TL0, the low byte of Timer 0

MOV R5, TH0

; Contents of TH0 are moved to R5

4.3.2 Timer 1 Register

Timer 1 is also 16 bit, and its 16 bit register is split in to two bytes, referred to as TL1 and TH1. These
registers are accessible in the same way as the register Timer 0.

4.3.3 TMOD (Timer MOD) Register

Both Timer 0 and 1 use the same register, called TMOD, to set the various timer operation modes. TMOD
is an 8 bit register in which the lower 4 bits are set aside for Timer 0 and the upper 4 bits are set aside for
Timer 1. In each case, the lower two bits are used to set the timer mode and the upper two bits to specify
the operation.
M0, M1: Selects the timer mode. The following table shows the various operational modes according to
the bit conditions of M0 and M1.
C/T (Clock / Timer) : This bit in the TMOD register is used to decide whether the timer used is a delay
generator or an event counter. If C/T = 0, it is used as a timer for time delay generation. The clock source

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for the time delay is the crystal frequency of the 8051. When C/T = 1, the counter is set to count pulses
from external input pins (T1 or T0)

GATE : Every timer has a means of starting and stopping. Some timers do this by software, some by
hardware and some have both software and hardware.
The start and stop of the timer are controlled by way of software by the TR (Timer Start) bit TR0 and
TR1 in the TCON (Timer Control) register. The SETB instruction starts it and is stopped by CLR instruction.
Eg:

SETB TR1
CLR TR1
SETB TR0
CLR TR0
These instructions start and stop the timers as long as GATE = 0 in the TMOD register. The hardware
way of starting and stopping the timer by an external source is achieved by making GATE = 1 in the TMOD
register.

4.3.4 TCON (Timer Control Register)

The Timer Control SFR is used to configure and modify the way in which 8051s two timers operate. This
SFR controls whether each of tw timers is running or stopped and contains a flag to indicate that each timer
has overflowed.

TCON is an 8 bit register. The upper four bits are used to store the TF (Timer / Counter Overflow) and
TR (Timer start) bits for both Timer 0 and Timer 1. The lower four bits are set aside for controlling the

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Dr. M. Gopikrishna

interrupt bits. TCON register is a bit addressable register. i.e., instead of using instructions such as SETB
TR1 and CLR TR1, we could use SETB TCON.6 and CLR TCON.6.
TF1 - is the Timer / Counter overflow flag. When the Timer/ Counter overflow, TF1 goes to logic 1.
TR1 - Timer 1 run control bit. Set/ cleared by software to turn timer / counter ON/ OFF.
TF0 - Timer 0 overflow flag. Set by hardware when the timer/ counter 0 overflows.
TR0 - Timer 0 run control bit. Set/ cleared by software to run timer/ control ON/ OFF.
IE1 External Interrupt 1 Edge Flag. Set by hardware when the external interrupt edge is detected.
Cleared by hardware when the interrupt is processed.
IT1 - External Interrupt 1 signal type control bit. Set/ cleared by software. Specified by falling edge/ low
level triggered external interrupt.
IE0 External Interrupt 0 Edge Flag. Set by hardware when external interrupts edge is detected. Cleared
by hardware when the interrupt is processed.
IT0 - External Interrupt 0 signal type control bit. Set/ cleared by software. Specified by falling edge/ low
level triggerd external interrupt.

4.4 Interrupts
A computer program has only two ways to determine the conditions that exist in internal and external circuits. One method uses software instructions that jump to subroutines on the states of flags and port pins.
The second method responds to hardware signals, called interrupts that force the program to call a subroutine. Software techniques uses up processor time that could be devoted to other tasks. Interrupts take
processor time only when action by the program is needed.
Interrupts may be generated by internal chip operations or provided by external sources. Five interrupts
are provided in the 8051. Three of these are generated automatically by internal operations; Timer Flag 0,
timer Flag 1 and the serial port interrupt (RI or TI). Two interrupts are triggered by external signals provided
by circuitry that is connected to pins INT 0 and INT 1 (port pins P3.2 and P3.3)
All interrupt functions are under the control of the program. The programmer is able to alter the control
bits in the Interrupt Enable (IE) register, the Interrupt Priority (IP) register and the TCON register.
Bits in the IE register are set to 1 if the corresponding interrupt source is to be enabled and set to 0 to
disable interrupt source.
Register IP bits determine if any interrupt is to have a high or low priority. Bits set to 1 give the accompanying interrupt a high priority; a 0 assigns a low priority. Interrupts with high priority can interrupt another
interrupt with low priority; the lower priority interrupt continues after the higher is finished.

4.5 Serial Data Input/Output

Serial ports are used in computers to communicate with other computers. The 8051 has a serial data communication circuit that uses register SBUF to hold data. Register SCON controls data communication, register
PCON controls data rates and pins P3.0 (RxD) and P3.1 (TxD) to connect to the serial data network.

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4.5.1 SBUF
For a byte of data to be transferred via the TxD line, it must be placed in the SBUF register. Similarly,
SBUF holds the byte of the data when it is received by the 8051s RxD line. SBUF can be accessed like any
other register in the 8051. The moment a byte is written in to SBUF, it is framed with the start and stop bits
and transferred serially via the TxD pin. Similarly, when the bits are received serially via RxD, the 8051
deframes it by eliminating the stop and start bits, making bits out of the data received and then placing it in
the SBUF.

4.5.2 SCON (Serial Control) Register

The SCON register is an 8-bit register used to program the start bit, stop bit and data bits of data among
other things.