2-Polution Detection

A
PROJECT REPORT
ON
Pollution detection system with intelligent

alerting system
Submitted
In partial fulfillment
A
MAIN PROJECT REPORT ON
TITLE
SUBMITTED TO
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY,

HYDERABAD, A.P
IN PARTIAL FULFILLMENT OF THE REQUIREMENTS
FOR THE AWARD OF THE DEGREE OF
BACHELOR OF TECHNOLOGY
IN
ELECTRONICS AND COMMUNICATION ENGINEERING

By
E.HEMALATHA
(13EK1A0404)
S.ALEKHYA
(13EK1A0418)
P.VINAY
(13EK1A0417)
K.SUSHMA
(14EK5A0406)
Under the esteemed guidance of
(Internal Guide Name), Asst. Professor

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
ABDUL KALAM INSTITUTE OF TECHNOLOGICAL SCIENCES

(Approved by AICTE New Delhi, Affiliated to JNTU, Hyderabad)
Vepalagadda,Bhadhradi Kothagudem Dt.
2016
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
ABDUL KALAM INSTITUTE OF TECHNOLOGICAL

SCIENCES
(Approved by AICTE New Delhi, Affiliated to JNTU, Hyderabad)
Vepalagadda, Kothagudem, Khammam Dt.
(Affiliated to J.N.T.U)
CERTIFICATE
This is to certify that this dissertation entitled PROJECT TITLE is a bonafide
work done by
NAME1
(HT NO1)
NAME2
(HT NO2)
NAME3
(HT NO3)
NAME4
(HT NO4)
In partial fulfillment of the requirements for the award of the Degree of Bachelor of
Technology in Electronics and Communication Engineering from Jawaharlal Nehru
Technological University Hyderabad, (JNTUH) during the Academic year 2009-2013.
Internal Guide
Head of the Department
External examiner
DECLARATION
We hereby declare that the project report entitled PROJECT TITLESubmitted
to ABDUL KALAM
INSTITUTE OF TECHNOLOGICAL SCIENCESin partial
fulfillment of the requirement for the award of degree of Bachelor of Technology in

Electronics and Communication Engineering by JNTUH, the project is done by us and
not has been submitted to any other institute or university for the award of any degree or
equivalent.
Place: KOTHAGUDEM
Date:
PROJECT ASSOCIATES
NAME1
(HT NO1)
NAME2
(HT NO2)
NAME3
(HT NO3)
NAME4
(HT NO4)
ii
ACKNOWLEDGEMENT
We would like to express my gratitude to all the people behind the screen who
helped me to transform an idea into a real application.
We would like to express my heart-felt gratitude to my parents without whom we
would not have been privileged to achieve and fulfill my dreams. We are grateful to our
principal, Dr. M.JANARDHAN who most ably run the institution and has had the major
hand in enabling me to do my project.
We profoundly thank Sri. G.RAJAIAH , Head of the Department of
Electronics and Communication Engineering who has been an excellent guide and also a
great source of inspiration to my work.

We would like to thank my internal guide Mr(Name of guide) for his technical
guidance, constant encouragement and support in carrying out my project.
The satisfaction and euphoria that accompany the successful completion of the task
would be great but incomplete without the mention of the people who made it possible with
their constant guidance and encouragement crowns all the efforts with success. In this
context, I would like thank all the other staff members, both teaching and non-teaching,
which have extended their timely help and eased my task.
PROJECT ASSOCIATES
NAME1
(HT NO1)
NAME2
(HT NO2)
NAME3
(HT NO3)
NAME4
(HT NO4)
For the award of the degree of

Bachelor of Technology
In Department of Electronics & Communication Engineering
Submitted By:
Ritika Arora (0838131030)
Shubhashish Dixit (0838131031)
Humaira Anam (0838131409)
Rishabh Singh (0838131029)
Department of Electronics & Communication Engineering
Krishna Institute of Management & Technology

Moradabad
Rampur Road, NH-24, Moradabad-244001(U.P)
A
PROJECT REPORT
ON
Pollution detection system with intelligent alerting system
submitted
In partial fulfillment
For the award of the degree of
Bachelor of Technology
In Department of Electronics & Communication Engineering
Submitted By:
Department of Electronics & Communication Engineering
Krishna Institute of Management & Technology Moradabad
PROJECT REPORT
ON
Pollution detection system with intelligent alerting system
By

Prof. R.K.Yadav
Mr. Akhilesh Sharma
Mr. Ajay Kumar
Ms. Sonali Gupta
PROJECT GUIDE
Mr. P.K.Raghav
PROJECT
INCHARGE
DEPARTMENT OF ELECTRONICS & COMMUNICATION

ENGG.
Krishna Institute of Management & Technology Moradabad
DEPARTMENT OF ELECTRONICS & COMMUNICATION
ENGG.
CERTIFICATE
This is to certify that the project entitled "Pollution detection system

with intelligent alerting system
" has been carried out by RITIKA ARORA, SHUBHASHISH
DIXIT, RISHABH SINGH and HUMAIRA ANAM under my
guidance in partial fulfillment of the degree of Bachelor of
Technology in Electronics & Communication Engineering of
Gautam Buddh technical University Lucknow during the academic
year 2011-2012. To the best of my knowledge and belief this work
has not been submitted elsewhere for the award of any other degree.
Project Incharge
Examiner
Project Guide
ACKNOWLEDGEMENT
We would like to place on record my deep sense of gratitude to Prof.
R.K.Yadav, HoD. of Electronics and Communication Engineering,
Krishna Institute of Management & Technology(KIMT), Moradabad,
India. Mr. Akhilesh Sharma, Associate Professor Department of
Electronics & Communication Engineering , KIMT, Moradabad for
their generous guidance, help and useful suggestions.
We express my sincere gratitude to Mr. Ajay Kumar, Senior
Lecturer; Department of Electronics & Communication Engineering,
KIMT, Moradabad Prof. Mr. P.K. Raghav, Senior Lecturer; Ms.
Sonali Gupta, Department of Electronics & Communication
Engineering, KIMT, Moradabad, India, for his stimulating guidance,
continuous encouragement and supervision throughout the course of

present work.
We also wish to extend my thanks to Mr. Amit Sharma, Ms. Neha
Goyal, Mr. Amit Chaudhary & all faculty members & college staff
for their insightful comments and constructive suggestions to
improve the quality of this research work.
B.Tech Final Year
Electronics & Communication
PAGE INDEX
S. No.
CONTENTS
Page no.
i
Certificate I
ii
Acknowledgement II
Iii List of Tables VIII
iv List of Figures IX
v
List of Symbols XI
vi Abstract XII
1
INTRODUCTION 1
1.1 General Introduction 1
1.2 Organization Of Project 3
1. 3 Project Statement 7
2
CIRCUIT STRUCTURE 9
2.1 GENERAL THEORY 9
2.2 PRIMARY COMPONENTS 9
2.2.1 AT89C51 MICRO CONTROLLER

10
2.2.2 SENSOR BOARD 10
2.3 LED ARRAY
12
2.4 DRIVER CIRCUIT
12
2.5 MQ-6 GAS SENSOR 12
2.5.1 CHARACTERISTICS
12
2.5.2 APPLICATIONS
12
2.5.3 STRUCTURE AND CONFIGURATION 13
2.5.4 BASIC TEST LOOP 13
2.5.5 CONDITIONS THAT MUST BE AVOIDED
13
2.6 RESET CIRCUIT 15
2.7 ALARM
15
2.8 RELAY
15
2.9 EXHAUST FAN 16
2.10 CRYSTAL OSCILLATOR 16
2.11 AUTO DIALER 16
2.12 POWER SUPPLY
17
2.13 IC 7805
17
2.13.1 PIN DIAGRAM
17
2.13.2 PIN DESCRIPTION:
18
2.14 DIGITAL VOICE PROCESSOR USING APR 9600
18
2.14.1 MESSAGE MANAGEMENT 19
2.15 IC 555 AS MONOSTABLE MULTIVIBRATOR 19
2.15.1 MONOSTABLE MULTIVIBRATOR CIRCUIT
DETAILS 20
2.15.2 555 IC MONOSTABLE MULTIVIBRATOR
OPERATIONS 20
2.15.3 MONOSTABLE MULTIVIBRATOR DESIGN USING
555 TIMER IC 21
2.16 GENERAL FUNCTIONAL DESCRIPTION 21
2.17 FULL CIRCUIT STRUCTURE & EXPLANATION
22
3
MICROCONTROLLER AT89C51
25
3.1 AT89C51 MICROCONTROLLER 25
3.1.1 FEATURES
25
3.1.2 DESCRIPTION 25
3.2 ARCHITECTURE OF 8951 FAMILY 26

3.2.1 PIN DESCRIPTION 26
3.2.1 VCC 27
3.2.2 GND28
3.2.3 PORT 0 28
3.2.4 PORT 1 28
3.2.5 PORT 2 28
3.2.6 PORT 3 30
3.2.7 RST 30
3.2.8 PORT PIN ALTERNATE FUNCTIONS
31
3.2.9 ALE/PROG
31
3.2.10 PSEN
32
3.2.11 EA/VPP 32
3.2.12 XTAL 1 32
3.2.13 XTAL 2 32
3.2.14 OSCILLATOR CHARACTERISTICS
32
3.2.15 IDLE MODE 33
3.2.16 STATUS OF EXTERNAL PINS DURING IDLE AND
POWER-DOWN MODES 34
3.2.17 POWER DOWN MODE 34
3.2.18 PROGRAMMING THE FLASH
35
3.2.19 PROGRAM MEMORY LOCK BITS 36
3.2.20 LOCK BIT PROTECTION MODES 36
3.3 PROGRAMMING ALGORITHM 37
3.3.1 DATA POLLING
37
3.3.2 READY/BUSY 37
3.3.3 PROGRAM VERIFY 37
3.3.4 CHIP ERASE 38
3.3.5 READING THE SIGNATURE BYTES
38
3.4 PROGRAMMING INTERFACE 38
3.5 SPECIAL FUNCTION REGISTER (SFR) ADDRESSES
39
3.6 MCS-51 FAMILY INSTRUCTION SET 46
4
COMPUTER AIDED INSTRUCTION
72
4.1 INTRODUCTION
73
4.2 CONCEPT OF COMPILER 74
4.3 CONCEPT OF CROSS COMPILER
74
4.3.1 WHY DO WE NEED CROSS COMPILER? 75

4.4 INSTALLING SDCC 75
4.5 INSTALLING SiLABS IDE 76
4.5.1 CONFIGURING SiLABS IDE WITH SDCC
76
4.6 CREATING A PROJECT
76
4.6.1 COMPILING A PROJECT 77
4.6.2 EXECUTING THE PROGRAM ON THE C8051F120
77
4.6.3 ASCII TERMINAL PROGRAMS
78
4.6.4 IDE FILE LOCATION REQUIREMENT 78
4.7 PROGRAMMING HINT
78
4.8 8051 PROJECT DEVELOPMENT CYCLE 78
4.9 INSTRUCTION DEFINITION
79
4.10 SOFTWARE LOGIC OF THE PROJECT
86
5
APR9600 RE-RECORDING VOICE IC
91
5.1 APR 9600
91
5.1.1 FEATURES
91
5.2 GENERAL DESCRIPTION 92
5.3 FUNCTIONAL DESCRIPTION 92
5.4 MESSAGE MANAGEMENT
93
5.4.1 MESSAGE MANAGEMENT GENERAL
DESCRIPTION 93
5.4.2 RANDOM ACCESS MODE
95
5.4.2.1 FUNCTIONAL DESCRIPTION OF RECORDING IN
RANDOM ACCESS MODE
95
5.4.2.2 FUNCTIONAL DESCRIPTION OF PLAYBACK
RANDOM ACCESS MODE
96
5.4.3 TAPE MODE 96
5.4.3.1 FUNCTION DESCRIPTION OF RECORDING IN
TAPE MODE USING THE AUTO REWIND OPTION 96
5.4.3.2 FUNCTION DESCRIPTION OF PLAYBACK IN
TAPE MODE USING AUTO REWIND OPTION 97
TAPE MODE USING THE NORMAL OPTION 98
5.4.3.4 FUNCTIONAL DESCRIPTION OF PLAYBACK IN
TAPE MODE USING THE NORMAL OPTION 99
5.5 MICROPROCESSOR CONTROLLED MESSAGE

MANAGEMENT
100
5.6 SIGNAL STORAGE 101
5.7 SAMPLING RATE & VOICE QUALITY
101
5.8 AUTOMATIC GAIN CONTROL (AGC)
102
5.9 SAMPLING APPLICATION
102
5.10 FIGURES OF MODES
103
5.11 PIN DESCRIPTION 106
5.12 ELECTRICAL CHARACTERISTICS 108
5.13 APPLICATION TIPS
TIPS FOR BETTER SOUND REPLAY QUALITY
110
6
CONCLUSION AND FUTURE ENHANCEMENT
111
6.1 CONCLUSION 111
6.2 RESULT
112
6.3 LIMITATIONS 112
6.4 FUTURE SCOPE 113
BIBLIOGRAPHY
115
LIST OF TABLES
Tables
Page No.
Table 2.1 Pin Description of IC 7805 18
Table 3.1 Pin Diagram of AT89C51
30
Table 3.2 Port 3 Functions 31
Table 3.3 Status of External Pins during Idle and Power-Down
Modes
34
Table 3.4 Flash Programming Mode Signature Codes 35
Table 3.5 Lock Bit Protection Modes 36
Table 3.6 Signature Bytes 38
Table 3.7 SFR Addresses 39
Table 3.8 Modes of Operation
40
Table 3.9 PSW Register Details 41
Table 3.10 PCON Register 42
Table 3.11 Baud Rate Comparison for XTAL = 11.0592 MHZ42

Table 3.12 TCON Register 43
Table 3.13 SCON Register 43
Table 3.14 Modes of SCON Register 44
Table 3.15 TMOD Register 44
Table 3.16 Modes of TMOD
44
Table 3.17 IE Register45
Table 3.18 IP Register 45
Table 3.19 T2CON Register46
Table 5.1 Mode selection 95
Table 5.2 Input Bandwidth & Duration 101
Table 5.3 Pin Description of APR 9600108
Table 5.4 Absolute Maximum Ratings 109
Table 5.5 DC Characteristics
109
Table 5.6 Analog Characteristics 109
LIST OF FIGURES
Figures
Page No.
Fig 2.1 Gas & Fire Sensor using 555 IC
11
Fig 2.2 Structure & Configuration of Gas Sensor MQ-6 13
Fig 2.3 Basic Test Loop
14
Fig 2.4 Basic Relay Block with Handsfree 16
Fig 2.5 Pin Diagram of IC 7805 17
Fig 2.6 555-Timer-Monostable-Multivibrator
20
Fig 2.7 555 Monostable-Multivibrator-Operation 20
Fig 2.8 Complete Circuit structure of Gas & Heat Sensor with auto
dial up logic
24
Fig 3.1 Basic Architecture of AT89C51 Microcontroller 26
Fig 3.2 Pin Diagram of Micro controller 8951
27
Fig 3.3 Oscillator connection
33
Figure 3.4 External Clock Drive Configuration 34
Fig 3.5 TMOD Register
39
Fig 3.6 PSW Register 41
Fig 3.8 Arithmetic Operation
47
Fig 3.9 Logic Operation

49
3.10 Data Transfer Operation
49
Fig 3.11 Boolean Manipulation & Program & Machine Control
Operation 50
Fig 4.1 Load New File in 8051 IDE 82
Fig 4.2 Auto Dial Up Coding
83
Fig 4.3 8951 Selection
84
Fig 4.4 Loading Flash Buffer
85
Fig 4.5 Gas Sensor with MCU 88
Fig 4.6 Gas Sensor with MCU 89
Fig 5.1 Pin Diagram of APR 9600 IC 93
Figure 5.2 APR9600 Block Diagram 94
Fig 5.3 APR9600 Experimental board 100
Figure 5.4 Tape Mode, Normal Option 103
Figure 5.5 Tape Mode, Auto Rewind Option 104
Figure 5.6 Random Access Mode 105
LIST OF SYMBOLS
Symbols Meaning
LED Light Emitting Diode
IC Integrated Chip
GSMGlobal System Module
PC Personal Computer
DIP Dual In-line Package
RAM
Random Access Memory
ROM
Read Only Memory
I/O Input Output
VCC Level 1 Voltage
GNDGround
XTAL
Crystal
Ppm Parts per million
MCU
Micro Controller Unit
APR Auto Pre Recording
CMOS
UART
AGC Automatic Gain Control

Complementary Metal Oxide Semiconductor
MHz Mega Hertz
AC Alternating Current
DC Direct Current
Universal Asynchronous Receiver-Transmitter
CPU Central Processing Unit
BIT Binary Unit
CLK Clock
ANAAnalogue
ABSTRACT
Security is primary concern for everyone. This Project describes a
design of effective security alarm system that can monitor an
industry with different sensors. Gas detection and fire detection can
be monitored by the status of each individual sensor and is indicated
with an LED, Buzzer Voice Recording & Playback Device and dial
up logic. These all shows whether the sensor has been activated and
whether the wiring to the sensor is in order. In this project we show
that how we use the telephone as a electronics eye. With the help of
any phone we can know the position of the house. In this logic we
attach some sensor with the telephone and if there is any
mishappening at home then telephone is automatic on and then
circuit press the redial button of the telephone and then telephone
dial the pre-dialed number and sense the voice message to the
received end.
The detection alarm is built around the AT89C51 microcontroller
from Atmel. This microcontroller provides all the functionality of the
detection alarm. It also takes care of filtering of the signals at the
inputs. A fire sensor can be connected to the gas sensor alarm. These
sensors need to have their contacts closed when in the inactive state
(i.e. normally closed). In addition, each sensor needs to have its
tamper connection wired as well. A power supply voltage of +5 VDC
is available for each sensor at the corresponding wiring terminals.

LEDs indicate the status of the corresponding sensors. When the
alarm has been activated, the LED of the sensor that caused the
alarm will light up and pre recorded message starts to play.
The uniqueness of this project is not only alerting the neighbors by
siren, it also dials a mobile number which is already programmed
into the system. A mobile number or a land line number can be
programmed into the system. As this system works on existing
telephone line, it can dial the number even the subscriber is out of
station.
This project uses regulated 5V, 500mA power supply. 7805 three
terminal voltage regulator is used for voltage regulation. Bridge type
full wave rectifier is used to rectify the ac output of secondary of
230/12V step down transformer.
CHAPTER - 1
INTRODUCTION
1.1 GENERAL INTRODUCTION
Engineering is not only a theoretical study but it is a implementation
of all we study for creating something new and making things more
easy and useful through practical study. It is an art which can be
gained with systematic study, observation and practice. In the college
curriculum we usually get the theoretical knowledge of industries,
and a little bit of implementation knowledge that how it is works?
But how can we prove our practical knowledge to increase the
productivity or efficiency of the industry????
Don't take the chance of becoming victim of carelessness, which is
often accompanied by serious accident. Protect our family and
valuables with this microcontroller based security system that will let
us rest our head knowing that there is anything like gas leakage or
fire existing into our home.
The motivation is to facilitate the users to know the state of their
homes having ubiquitous access. The system provides availability
due to development of a low cost system. This system is low cost but
very useful for users to know their home state wherever are located.
Home security has been a major issue where temperature starts
raising day by day and everybody wants to take proper measures to
prevent intrusion. There was need to prevent fires and gas leaks no
matter when they are in the house or outside. By using GSM
technology via Dial-Up logic we can help users to supervise their
home against intruders, gas leak and fire only at one product with a
low cost.
The security is what a person expects from a home, this project was
designed keeping this particular aspect in mind. The security system
is made fool proof to the maximum extent possible. In this project
we make use of a microcontroller as the main controller to control
the input and the output that reach the controller. There is a large
scope in the future enhancements that can be provided along with
this project like actuating a fire detection alarm or sensing a leakage
of gas etc.
Generally in any industry, there are several blocks and there is an
administrative block which controls all blocks. If any problem is
created in any one of the blocks, at first the persons in that particular
block has to inform to the administrative block and then the action
will be taken. So if we consider a fire accident in any one of the
blocks the person on that incident generally they makes a call to the
administrative block or security block as took over and they has to
call the ambulance, fire station etc. It will be a long time process, so
in the mean the damage may increase in gigantic extent. The most
basic fire protection methods include fire prevention, detection and
control. Buildings should be constructed using fire rated walls,
doors, ceilings and floors. The use of combustible materials in
interior furnishing should be kept to a minimum. There are several
types of detection devices. Automatic fire detection systems, when
combined with other elements of an emergency response and
evacuation plan, can significantly reduce property damage, personal
injuries, and loss of life from fire in the work place. Their main
function is to quickly identify a developing fire and alert building
occupants and emergency response personnel before extensive
damage transpire. Automatic fire detection systems do this by using
electronic sensors to detect the smoke, heat or flames and providing

an early warning. Heat detectors which respond to heat generated in
the flame stage of a fire and smoke detectors which respond to the
particles of cumbers ion produced in a fire.
A fire alarm control panel, normally referred to as a panel within the
active fire protection industry is central control device for detecting,
reporting and acting on occurrences of fire with in a building. There
are two types of panel's fallen conventional panels and analogue
addressable panels. In a conventional panel, fire detection devices
including, but not limited to smoke detectors, heat detectors and
manual call points are joined up with a number connected to the
circuit. When a device on the circuit is activated the panel recognizes
an alarm on that circuit and could be setup to take a number of
actions including directly calling the fire department via an alarm
transportation system. An addressable panel is a more modern type
of panel and has a greater flexibility than a conventional panel. An
addressable panel has a number of loops where a number of devices
are to be connected, each with its own address. Bad experiences with
early systems have left the police reluctant to allow domestic
security system to call for assistance directly, except on high risk
situations. Security systems can now be configured to call telephones
in the event of an alarm so that the occupants are nominated care
takers can be alerted before calling the police.
Business and industry today requires security systems that are the
fact of life. Your company simply must have them to protect your
employees, your equipment and sky scrapers themselves. There is
only one thing more important than the selection of the security
systems to protect your facilities. That is why you should consider
reliable fire equipment for your security system requirements.
Security and fire protection are closely related to energy
management in so far as they present tractable goals for automated
systems. It has been considered relatively easy for machine based
systems to recognize anomalous activity around the home which
could be interpreted as possible security breaches, accidents or fires.
Fire damage, however can be permanent and involves the entire life
of human. Much can be done to minimize the chance of a fire stating
or spreading. Progress in fire technologies has been substantial over
last decade due to advances in sensor, microelectronics and

information technologies, as well as a greater understanding of fire
physics. This paper provides a review of progress in fire detection
technologies over the last decades some problems & a future
research efforts related to current fire detection technologies are
discussed.
1.2 ORGANIZATION OF PROJECT
This project design makes use of 8951 microcontroller for
interfacing to various hardware interfaces. Technology today is
seeing its heights in all the areas, especially in the area of Embedded
Systems. It is true that every electronic gadget that is used in daily
life right from a PC keyboard to a refrigerator is an Embedded
System. These all itself shows how vastly the technology is
expanding. This design is also one of such application.
The Micro controller which we are using in our Project is 8951
manufactured by ATMEL Corporation. It is a 40 pin DIP plastic
packaging CMOS technology having inbuilt ROM of 4K, RAM of
128 bytes, 32 I/O pins (of which two I/O pins P3.0 and P3.1 can be
used for serial communication i.e., pins 10 & 11), 2 Timers and 6
Interrupts. It has an inbuilt Crystal Oscillator generating 12 MHz
connected to 18 & 19 pins which is indicated for speed of 8051.
When the Micro Controller is at initial condition or got switched
ON, the I/O pins are at high indicating as input pins. The 40th pin is
given Vcc supply of +5V and 20th to GND.
Gas sensors work by detecting amounts of specific gases in ppm, or
parts per million. Ppm is a unit of concentration in the immediate
surrounding area. You can calculate percent from ppm by dividing
the ppm by 1,000,000 and multiplying by 100. So if you can detect
800ppm of oxygen in the air, the air is 8% oxygen. (Our atmosphere
is more than 20% Oxygen, but this is just an example). The sensing
element for gas sensors is coated with a metal oxide, and the Figaro
models interested in use Tin oxide specifically (SnO2). When the
heating element receives power, the SnO2 becomes oxidized and
donates electrons to the Oxygen yielding positively charged SnO2
molecules on the coating of the sensing element. This situation
causes a barrier to electron flow, increasing resistance of the sensor.
When a deoxidizing gas is introduced in the equation (such as

ethanol, or C2H5OH), the amount of available oxygen decreases.
This means that there is less oxygen to accept the donor electrons
from the SnO2 coating, which reduces the resistance of the sensor
due to the SnO2 not being as positively charged. Reduce resistance
cause flow of current and thus output signal goes high.
Security is the condition of being protected against danger or loss. In
the general sense, security is a concept similar to safety. The nuance
between the two is an added emphasis on being protected from
dangers that originate from outside. Individuals or actions that
encroach upon the condition of protection are responsible for the
breach of security. The word "security" in general usage is
synonymous with "safety," but as a technical term "security" means
that something not only is secure but that it has been secured. One of
the best options for providing good security is by using a technology
named EMBEDDED SYSTEMS. When people become more and
more attach importance to the quality of life, the security and service
is important. Security has arguably become the prime mover of
global politics today. It is the basic common denominator for any
successful society all over the world. Now days the security system
can identify potential hazards to protect human. A typical intelligent
security system consists of intruders, fire, gas, environment sensors
and more variety sensors to be installed.
Monitoring of the security system ensures an effective response to an
electronic activation or in times of personal duress. The response
opinions are customized to suit the individual risk security
requirements in cost effective manner. Monitoring is done through a
telephone line and depending on the security task it will involve a
basic digital dialer or a security interface. The most common method
of monitoring is achieved via the basic dialer. This is for low to
medium security risk and is connected to the existing telephone line
through a special socket. The system will communicate when an
alarm condition needs to be reported or when a call is made to test
the system. This test is made as often as required to ensure more or
less security. The security interface provides the same service but it
involves a scanning of the existing telephone line by the telephone
company to ensure greater security. Should the telephone line be
damaged accidentally or on purpose the monitoring station will

detect the alarm condition within seconds????
Nowadays trend in network communication leads to replacing the
cables, providing mobility and freedom of movement for the user's.
The utilization of wireless techniques has spread its scope on to
different application fields. One of such spheres is industry with the
addition of wireless connectivity to most embedded designs; zones
of security will be needed around each critical system MCU, in
addition to the one traditionally surrounding the gateway to the
broader network.
(Source: Atmel)."Beyond the huge cost savings incurred by
eliminating wires, are the continuing costs in maintenance that will
be eliminated, as well as the flexibility that gives the manufacturer
who wants to recognize the factory floor, add new systems and
eliminate others. No wires to connect and disconnect eliminates a lot
of costs and will make the factory floor a much more dynamic
environment".
This Project describes a design of effective security alarm system
that can monitor an industry with two different sensors. Fire accident
and gas detection can be monitored by the status of each individual
sensor and is indicated with an LED. This LED shows whether the
sensor has been activated and whether the wiring to the sensor is in
order. Obviously, this alarm also has an input to 'arm' the alarm to
control a siren and Auto dialing system.
The gas sensor and fire sensor alarm is built around the AT89C51
micro controller from Atmel. This micro controller provides all the
functionality of the detection alarm. It also takes care of filtering of
the signals at the inputs. Only after an input has remained unchanged
for 30 milliseconds, is this new signal level passed on for processing
by the micro controller program. This time can be varied by adopting
small changes in the source code.
A maximum of 8 sensors can be connected to the 8951but here we
only connected 2 sensors. These sensors need to have their contacts
closed when in the inactive state (i.e. Normally Closed). In addition,
each sensor needs to have its tamper connection wired as well. A
power supply voltage of +5 VDC is available for each sensor at the
corresponding wiring terminals. LEDs indicate the status of the
corresponding sensors. When the alarm has been activated, the LED
of the sensor that caused the alarm will light up, or flash in the event
of a cable failure.
When the alarm is armed, the LED 'alarm armed' will flash during
the exit-delay. After the exit-delay, the LED will light continuously.
The LED 'alarm triggered LED' flashes during the entry-delay and
will turn on continuously once an actual alarm has been generated.
'Alarm triggered LED' turns off only when the alarm is switched off
with key switch Sw1. When an alarm has taken place, it can be
determined afterwards which sensor (or tamper input) caused the
alarm to trigger. The LED 'tamper' lights up when the tamper input is
opened. This LED will also continue to be on until the alarm is
switched off.
siren, it also redials a mobile number which is already in dial list. A
mobile number or a land line number can be fixed for it. As this
system works on existing mobile, it can dial the number even the
subscriber is out of station. Another important feature that is
connected to circuit is Single-Chip Voice Recording & Playback
Device. An IC APR9600 is implemented for it. The APR9600 device
offers true single-chip voice recording, non-volatile storage, and
playback capability for 40 to 60 seconds. The device supports both
random and sequential access of multiple messages. Sample rates are
user-selectable, allowing designers to customize their design for
unique quality and storage time needs. Integrated output amplifier,
microphone amplifier, and AGC circuits greatly simplify system
design. The device is ideal for use in portable voice recorders, toys,
and many other consumer and industrial applications. APLUS
integrated achieves these high levels of storage capability by using
its proprietary analog/multilevel storage technology implemented in
an advanced Flash non-volatile memory process, where each
memory cell can store 256 voltage levels. This technology enables
the APR9600 device to reproduce voice signals in their natural form.
It eliminates the need for encoding and compression, which often
introduce distortion.
terminal voltage regulator is used for voltage regulation. Bridge type
full wave rectifier is used to rectify the ac output of secondary of

230/12V step down transformer.
As the operation of microcontroller-based system is inherently based
on the stored program control concept, the software plays a very
crucial role. The relationship between the hardware and software is
similar to the relation between body and soul. One has not a
meaningful existence without the other. The hardware is the body,
which is used as the medium of software. In order to develop the
software for microcontroller based system, one must acquire
knowledge about the set of instructions which are used as a building
blocks in writing a program and learn the art of program that is the
tools and techniques of putting instructions together in a logic
manner to form a program implementing the desired operations. The
8051 IDE Assembler + Compiler development tools are designed to
solve the complex problems facing embedded software developed.
1. 3 PROJECT STATEMENT
Nowadays, most couples leave for work early in the morning and get
back only in the evening. Most people also have to travel to other
cities for their work. When they are away, their house is empty.
Therefore case like leakage of LPG and short circuitry fire or else is
easy to occur because the home owners are not in the house. Our
Country India has many such cases and still going ascending day by
day. The based solution is to develop home security system using a
wireless to keeps your house safe from such accidents and enables
you to work in peace.
Based on the events above, the project can be developing to make
our home secure and safe. We never anxious and worried anymore
even we leave the house. So this project is to design and develop a
home security system that can provide security against gas leak, fire
and other emergency situation by alarm via calling to the home
owner as there is something suspicious at home. Today there are a
many wireless home security alarm system available in the market.
Some are designed for very high security level protection and some
are basic type. Most of the alarm systems are very expensive and
therefore not affordable by poor or middle class families. Some
systems which cheaper in cost do not provide reliable features like
status checking. To provide the public with a cost effective wireless

security system, it is important to design a low cost system with
advanced features which ease the residents' life and benefits the
public and also will decrease the accident rate of India. Besides that,
to develop the system that can monitor gas leakage and fire detector
including control appliances in our home is a good matter. It is
important because the system can be help people through the
realization of fully automated home protections. So this project wills
develops and design the home security system that can control the
lamp in the house.
CHAPTER - 2
CIRCUIT STRUCTURE
This chapter deals with the general introduction of all the
components used in this project. So we can have a general idea about
all the components. We also have some computer aided instructions
and their operation which will discussed in next chapter.
2.1 GENERAL THEORY
An embedded system can be defined as a computing device that does
a specific focused job. Appliances such as the air-conditioner, VCD
player, DVD player, printer, fax machine, mobile phone etc. are
examples of embedded systems. Each of these appliances will have a
processor and special hardware to meet the specific requirement of
the application along with the embedded software that is executed by
the processor for meeting that specific requirement. The embedded
software is also called "firm ware". The desktop/laptop computer is a
general purpose computer. You can use it for a variety of applications
such as playing games, word processing, accounting, software
development and so on. In contrast, the software in the embedded
systems is always fixed listed below:
Embedded system does a very specific task; they cannot be
programmed to do different things. Embedded systems have very
limited resources, particularly the memory. Generally, they do not
have secondary storage devices such as the CDROM or the floppy

disk. Embedded systems have to work against some deadlines. A
specific job has to be completed within a specific time. In some
embedded systems, called real-time systems, the deadlines are
stringent. Missing a deadline may cause a catastrophe-loss of life or
damage to property. Embedded systems are constrained for power.
As many embedded systems operate through a battery, the power
consumption has to be very low.
2.2 PRIMARY COMPONENTS
Primary components of the electro circuit are as follows which will
describe serially.
"
"
AT89C51 Micro controller

Gas & Fire Sensor board
"
LED array
"
555 IC
"
Reset circuit
"
ALARM
"
Relays
"
Crystal oscillator
"
Auto dialer
"
Power supply

8051 is one of the most popular micro controllers in use today. Many
derivative micro controller have since been developed that are based
on and compatible with the 8051.Thus, the ability to program an
8051 is an important skill for anyone who plans to develop products
that will take advantage of micro controller. P89C51 is same as the
INTEL 8051 except that 89C51 has internal flash ROM, which can
be programmed more than 1000 times.
The AT89C51 is a low-power, high-performance CMOS 8-bit
microcomputer with 4K bytes of Flash Programmable and Erasable
Read Only Memory (PROM). The device is manufactured using
Atmel's high density nonvolatile memory technology and is
compatible with the industry standard MCS-51 instruction set and

pin out. The on-chip Flash allows the program memory to be
reprogrammed in-system or by a conventional nonvolatile memory
programmer. By combining a versatile 8-bit CPU with Flash on a
monolithic chip, the ATMEL AT89C51 is a powerful microcomputer
which provides a highly flexible and cost effective solution to many
embedded control applications. The AT89C51 provides the following
standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O
lines, two 16-bit timer/counters, five vector two-level interrupt
architecture, a full duplex serial port, and on-chip oscillator and
clock circuitry.[2][9]
2.2.2 SENSOR BOARD
The different sensors used in this project are as follows:
"
Gas Sensor
"
Fire & Heat Sensor
In this sensor unit we connect 2 sensors, now it is our choice how
many sensors' we use.
In the fire sensor we use bimetallic plates to sense fire, when fire
touch the bimetallic plates then plates join together and immediate
provide a signal to the controller. Fire sensor is attached to the IC
555. Here IC 555 work as a mono stable timer and output signal is
available on the pin 3 this signal is connected to the
microcontroller .When fire is on then sensor detect the logic and
immediate provide a signal to the controller.
Gas sensor is a special sensor when gas sensor sense the gas then gas
sensor again provides a small signal to the microcontroller via IC
555.
In the gas sensor interface we use gas sensor as a input logic. We
attach one IC 555 as with this sensor. Here IC 555 works as a
monostable multivibrator timer. Sensor output is connected to the IC
555 pin no 2 via NPN transistor. Pin no 2 is a negative triggered IC.
When sensor activate then positive output is available and this
positive output is converted into negative with the help of the NPN
transistor. Output of the NPN transistor is now connected to the pin
no 2 of the IC 555. Pin no 4 and 8 of the IC 555 is connected to the
positive supply. Pin no 1 is connected to the ground pin. Pin no 7 is

the output pin. Pin no 6 and 7 is the time constant pin. Pin no 6 and 7
provide a time constant option. When IC 555 works then output is
available on the pin no 3. Now this output is switching by the further
NPN transistor. One LED is also connected to the transistor circuit.
Output of the NPN transistor is available on the collector point. This
output from the collector of NPN is now connected to the
microcontroller pin no 1 which is port p1.0. Pin no 40 of the
controller is connected to the positive supply. We supply a 5 volt for
supply.
These sensors' firstly connected with the monostable circuit and then
connected to the microcontroller interface. In the monostable circuit
we use IC 555 as a monostable circuit.

Output of the IC 555 is connected to the microcontroller circuit.
Here we use ATMEL microcontroller. In the ATMEL series many
controllers are available and the entire controllers are compatible
with each other. Here we use IC 89s51 or 89c2051 controller. IC
89c2051 is a 20 pin controller and 89c51 is a 40 pin controller. So
we use AT89c51 microcontroller for multi function.
2.3 LED ARRAY
Light-emitting diodes are elements for light signalization in
electronics. They are manufactured in different shapes, colors and
sizes. For their low price, low consumption and simple use, they
have almost completely pushed aside other light sources- bulbs at
first place. They perform similar to common diodes with the
difference that they emit light when current flows through them.
2.4 DRIVER CIRCUIT
A driver circuit is used for driving the LEDs. An open-drain output
can drive an LED. If either of the input to the driver circuit is LOW,
the corresponding n-channel transistors are off and the LED is off.
When both the inputs are High, both transistors are ON. Then the
output is LOW.
2.5 MQ-6 GAS SENSOR
Sensitive material of MQ-6 gas sensor is SnO2, which with lower
conductivity in clean air. When the target combustible gas exist, the
sensor's conductivity is higher along with the gas concentration
rising. Please use simple electro circuit, Convert change of
conductivity to correspond output signal of gas concentration. MQ-6
gas sensor has high sensitivity to Propane, Butane and LPG, also
response to Natural gas. The sensor could be used to detect different
combustible gas, especially Methane; it is with low cost and suitable
for different application.[7]
"
Good sensitivity to Combustible gas in wide range
"
High sensitivity to Propane, Butane and LPG
"
Long life and low cost
"
Simple drive circuit
2.5.2 APPLICATIONS
"
Domestic gas leakage detector
"
Industrial Combustible gas detector
"
Portable gas detector
2.5.3 STRUCTURE AND CONFIGURATION
Structure and configuration of MQ-6 gas sensor is shown as Fig. 3,
sensor composed by micro AL2O3 ceramic tube, Tin Dioxide
(SnO2) sensitive layer, measuring electrode and heater are fixed into
a crust made by plastic and stainless steel net. The heater provides
necessary work conditions for work of sensitive components. The
enveloped MQ-4 has 6 pin, 4 of them are used to fetch signals, and
other 2 are used for providing heating current.
Fig 2.2 Structure & Configuration of Gas Sensor

MQ-6
2.5.4 BASIC TEST LOOP
Below fig 2.3 is basic test circuit of the sensor. The sensor needs to
be put 2 voltage, heater voltage (VH) and test voltage (VC). VH used
to supply certified working temperature to the sensor, while VC used
to detect voltage (VRL) on load resistance (RL) whom is in series
with sensor. The sensor has light polarity, VC need DC power. VC
and VH could use same power circuit with precondition to assure
performance of sensor. In order to make the sensor with better
performance, suitable RL value is needed.
"
"
Power of Sensitivity body (Ps): PS=Vc2Rs/ (RS+RL) 2

Resistance of Sensor (RS): RS = (VCC/VRL-1) RL.

"
Water Condensation
Indoor conditions, slight water condensation will affect sensors
performance lightly. However, if water condensation on sensors
surface and keep a certain period, sensor' sensitivity will be
decreased.
"
Used in high gas concentration
No matter the sensor is electrified or not, if long time placed in high
gas concentration, if will affect sensors characteristic.
"
Long time storage
The sensors resistance produce reversible drift if it's stored for long
time without electrify, this drift is related with storage conditions.
Sensors should be stored in airproof without silicon jell bag with
clean air. For the sensors with long time storage but no electrify, they
need long aging time for stability before using.
"
Long time exposed to adverse environment
No matter the sensors electrified or not, if exposed to adverse
environment for long time, such as high humidity, high temperature,
or high pollution etc, it will affect the sensors performance badly.
"
Vibration
Continual vibration will result in sensors down-lead response then
rupture. In transportation or assembling line, pneumatic
screwdriver/ultrasonic welding machine can lead this vibration.
"
Concussion
If sensors meet strong concussion, it may lead its lead wire
disconnected.
"
Usage
For sensor, handmade welding is optimal way. If use wave crest
welding should meet the following conditions:
"
Soldering flux: Rosin soldering flux contains least chlorine

"
Speed: 1-2 Meter/ Minute
"
Warm-up temperature?10020?
"
Welding temperature?25010?
"
1 time pass wave crest welding machine.
If disobey the above using terms, sensors sensitivity will be reduced.
2.6 RESET CIRCUIT
For proper system operation, the hardware design of a state machine
should ensure that it enters a known initial state on power-up. Most
systems have a RESET signal that is asserted during power-up. If a
state machine is built using discrete flip-flops with asynchronous
preset and clear inputs, the RESET signal can be applied to these
inputs to force the machine in to the desired initial state.
2.7 ALARM
An ALARM is used to indicate detection in home as well as in

industry. When Gas is detected by the heat detector and the buzzer is
activated. Same as in case of heat or fire, when heat is detected by
the heat detector and the buzzer is activated.
2.8 RELAY
A relay is an electrically controllable switch widely used in industrial
controls, automobiles and appliances. A relays are widely used
electronics circuits as remote control LED mechanical switches turn
a sequence of events ON and OFF. Relays are provided some
mechanical contacts and with their help they control operation of
other circuits. The terminology of both relays and switches is
identical that is similar to switches. Output of the controller is
connected to the relay driver circuit. Relay driver circuit basically
provide a ON OFF signal in single pulse. We connect these pulses to
the hands free of the cell phone. When hands free of the telephone is
activate through the microcontroller then phone is automatic on and
last redial number is dialed. When last number is redialed then after
call voice processor is on automatically and voice signal is transfer
to the mobile phone through mike.
To drive a relay we use two transistor circuits. One is NPN and
second is PNP transistor. Output from the controller is connected to
the base point of the PNP transistor through 1k ohm resistor. Emitter
of the PNP transistor is connected to the positive supply. Collector is
connected to the base of the NPN transistor. Collector of the NPN
transistor is connected to the relay coil. This relay coil presses the
hands free coil and redials the last number directly. User can treat it
as a warning message to go to home or industry if owner is out of
station. Once the call is activate then sound is transfer from the voice
processor to the mobile phone. Here we use IC APR 9600. With the
help of this IC we produce up to 6 sounds and it is possible to send a
different sound on different application with the help of the mobile
phone. When the relay is on and activates the last number redial the
after few second voice processor pin is on and play a voice message
this message is transfer to the phone automatically.
Fig 2.4 Basic Relay Block with Handsfree

2.9 EXHAUST FAN
There is also an exhaust fan installed in the circuitry, which is
activated by the IC 555 monostable IC. If there is too much
concentration of gas in premises, and gas sensor detects it,
microcontroller also give command to activate exhaust fan so that
the room get reduce concentration of the Gas before the concerned
authorities arrive there. However in case of Fire/Heat Sensor, it will
remain in its idle state of OFF.
2.10 CRYSTAL OSCILLATOR
To stabilize the frequency of the internal oscillator we have to add an
external oscillator of frequency 11.0592 MHZ. Certain crystalline
materials, namely Rochelle salt, quartz and tourmaline exhibit the
piezoelectric effects are called piezoelectric crystals. Of the various
piezoelectric crystals, quartz is more commonly used because it is
inexpensive and readily available in nature.
2.11 AUTO DIALER
A telephone is used in the system in order to convey the alert
message to the concerned authorities. In the system, telephone plays
a vital role, because even if the alarm is not heard by anyone present
in the vicinity of the system, the message can be intimated to the
required destination by the number which is already stored in it. This
helps to improve out security level by use of electro circuit.
2.12 POWER SUPPLY
The input to the circuit is applied from the regulated power supply.
The AC input i.e., 230V from the mains supply is step down by the
transformer to 12V and is fed to a rectifier. The output obtained from
the rectifier is a pulsating DC voltage. So in order to get a pure DC
voltage, the output voltage from the rectifier is fed to a filter to
remove any AC components present even after rectification. Now,
this voltage is given to a voltage regulator 7805 to obtain a pure
constant dc voltage.
2.13 IC 7805
7805 is a voltage regulator integrated circuit. It is a member of 78xx
series of fixed linear voltage regulator ICs. The voltage source in a
circuit may have fluctuations and would not give the fixed voltage
output. The voltage regulator IC maintains the output voltage at a
constant value. The xx in 78xx indicates the fixed output voltage it is
designed to provide. 7805 provides +5V regulated power supply.
Capacitors of suitable values can be connected at input and output
pins depending upon the respective voltage levels.[8]
2.13.1 PIN DIAGRAM
Fig 2.5 Pin Diagram of IC 7805?

Table 2.1 shows the pin description of IC 7805.
Pin No Function Name

1
Input voltage (5V-18V)
Input
2
Ground (0V)
Ground
Regulated output; 5V (4.8V-5.2V)
Output
Table 2.1 Pin Description of IC 7805

Digital voice recording chips with different features and coding
technology for speech compression and processing are available on
the market from a number of semiconductor manufacture. Advanced
chips such as Texas instrument TMS320C31 can implement various
voice processing algorithms including code-excited linear prediction,
adaptive differential pulse code modulation. A law (specified by
California Council for international trade), micro law (specified by
Bell telephone) and vector sum excited linear prediction. On the
other hand APR 9600 single chip voice recorder and playback
device from APLUS integrated circuits makes use of a proprietary
analogue storage technique implemented using flash non-volatile
memory process in which each cell is capable of storing up to 256

voltage levels. This technology enables the APR9600 to reproduce
voice signals in the natural form. The APR 9600 is a good stand lone
voice recorder or playback IC with non volatile storage and playback
capability from 5 to 60 seconds. It can record and play multiple
messages at random or in sequential mode. The user can select
sample rates with consequent quality and recording time trade off.
Microphone amplifier, automatic gain control (AGC) circuits,
internal anti aliasing filter, integrated output amplifier and message
management are some of the features of the APR 9600. Complete
chip management is accomplished through the device control and
message control blocks. Voice signal from the microphone is fed into
the chip through a differential amplifier. It is further amplified by
connecting Analogue-Out (pin 21) to Analogue in (pin 20) via an
external DC blocking capacitor C1. A bias signal is applied to the
microphone and to save power during playback, the ground return of
this bias network can be connected to the normally open side of the
record switch. Both Mike in and Mike Ref (pins 18 and 19) must be
coupled to the microphone network through capacitors. Recording
signal from the external source can also be fed directly into the chip
using Ana-In (pin 20), but the connection between Ana-in ( pin 20)
and Ana-out (pin 21) is still required for playback. An internal antialiasing filter automatically adjusts its response according to the
sampling frequency selected. Then the signal is processed into the
memory array through a combination of the sample and hold circuits
and analogue read/write circuit. The incoming voice signals are
sampled and the instantaneous voltage samples are stored in the nonvolatile flash memory cells in the 8 bit binary encoded format.
During playback, the stored signals are retrieved from the memory,
smoothed to form a continuous signal level at the speaker terminals
SP+ and SP- ( pins 14 and 15 respectively) is at about 12mw power
into 16 ohm impedance. The output from pin 14 (SP+) is further
amplified by the low power amplifier using LM386 (IC2) as shown
in the figure. The recorded message is reproduced into speaker LS1.
An internal oscillator provides sampling clock to the APR 9600. The
frequency of the oscillator and sampling rate depend on the value of
resistor R12 connected across the OSCR (pin 7) of the chip and the
ground.[6][12]
2.14.1 MESSAGE MANAGEMENT
The APR9600 chip supports the following message modes. Random
access mode with 2, 4, 8 message within the total recording time.
Tape mode with two options: Auto rewind and Normal operation.
The modes are defined by pins 24, 25 and 9 cannot be mixed. An
important feature of the APR9600 chip is indication of changes in
the device status through beeps superimposed on the device output:
for example, the start of recording is indicated by a beep, so the
person can now start speaking into the microphone. This feature is
enabled by making pin 11 high.
2.15 IC 555 AS MONOSTABLE MULTIVIBRATOR
A monostable multivibrator (MMV) often called a one-shot
multivibrator, is a pulse generator circuit in which the duration of the
pulse is determined by the R-C network, connected externally to the
555 timer. In such a vibrator, one state of output is stable while the
other is quasi-stable (unstable). For auto-triggering of output from
quasi-stable state to stable state energy is stored by an externally
connected capacitor C to a reference level. The time taken in storage
determines the pulse width. The transition of output from stable state
to quasi-stable state is accomplished by external triggering. The
schematic of a 555 timer in monostable mode of operation is shown
in figure 2.6.[1][3]
Fig2.6 555-Timer-Monostable-Multivibrator
2.15.1 MONOSTABLE MULTIVIBRATOR CIRCUIT DETAILS
Pin 1 is grounded. Trigger input is applied to pin 2. In quiescent
condition of output this input is kept at + VCC. To obtain transition
of output from stable state to quasi-stable state, a negative-going
pulse of narrow width (a width smaller than expected pulse width of
output waveform) and amplitude of greater than + 2/3 VCC is
applied to pin 2. Output is taken from pin 3. Pin 4 is usually

connected to + VCC to avoid accidental reset. Pin 5 is grounded
through a 0.01 u F capacitor to avoid noise problem. Pin 6
(threshold) is shorted to pin 7. A resistor RA is connected between
pins 6 and 8. At pins 7 a discharge capacitor is connected while pin 8
is connected to supply VCC.
2.15.2 555 IC MONOSTABLE MULTIVIBRATOR OPERATIONS
Fig2.7 555 Monostable-Multivibrator-Operation

For explaining the operation of timer 555 as a monostable
multivibrator, necessary internal circuitry with external connections
are shown in figure
The operation of the circuit is explained below:
Initially, when the output at pin 3 is low i.e. the circuit is in a stable
state, the transistor is on and capacitor- C is shorted to ground. When
a negative pulse is applied to pin 2, the trigger input falls below +1/3
VCC, the output of comparator goes high which resets the flip-flop
and consequently the transistor turns off and the output at pin 3 goes
high. This is the transition of the output from stable to quasi-stable
state, as shown in figure. As the discharge transistor is cutoff, the
capacitor C begins charging toward +VCC through resistance RA
with a time constant equal to RAC. When the increasing capacitor
voltage becomes slightly greater than +2/3 VCC, the output of
comparator 1 goes high, which sets the flip-flop. The transistor goes
to saturation, thereby discharging the capacitor C and the output of
the timer goes low, as illustrated in figure 2.7.
Thus the output returns back to stable state from quasi-stable state.
The output of the Monostable Multivibrator remains low until a
trigger pulse is again applied. Then the cycle repeats. Trigger input,
output voltage and capacitor voltage waveforms are shown in figure.
2.15.3 MONOSTABLE MULTIVIBRATOR DESIGN USING 555
TIMER IC
The capacitor C has to charge through resistance RA. The larger the
time constant RAC, the longer it takes for the capacitor voltage to
reach +2/3VCC.
In other words, the RC time constant controls the width of the output
pulse. The time during which the timer output remains high is given
as:
tp =1.0986RAC,
where RA is in ohms and C is in farads.
The pulse width of the circuit may range from micro-seconds to
many seconds. This circuit is widely used in industry for many
different timing applications.
2.16 GENERAL FUNCTIONAL DESCRIPTION
On power up, pin 23 is pulled low through resistor R7 to enable the
device for operation. Toggling this pin by switch S9 also resets
several message management features. Pin no 27 is pulled low to
enable recording and it is pulled high for playback. To start recording
playback switch the appropriate trigger pin as described in the
circuit. Glowing of the LED indicates that the device is busy and no
commands can be currently accepted. The LED is driven by PNP
transistor T1 which is connected to pin 10 of the chip. LED2
indicates recording in each individual memory segment. It is driven
by pin 22 through transistor.
Below the Fig 2.8 shows the final implemented electro circuit of Gas
& Heat Sensor along with auto dial up logic and voice recording and
playback device APR. The complete explained description of circuit
is as follows:
Firstly we ON the Power supply of 230V AC to provide to the
circuit. The AC is then step down by transformer to 12V, which is
then used for circuit. The 12V AC is rectified using bridge rectifier
to 9V DC supply. Now as per the requirement we certainly use 9V
and 5V DC supply. To remove out the ripples came during
rectification we applied filter circuit which block ripples to move in
forward direction. For 9V supply we use direct after filter circuit &
for the 5V we add the IC 7805 as voltage regulator. After IC 7805 we
again filter ripples present if any. Now the power circuitry is
completed.
Before starting from any one test we will reset the whole circuit last
configuration for better results. Let us take Gas Sensor firstly, if we
place sensor in the place of leakage the inner circuit of MQ-6 sensor
will short circuit by the concentration level above than 8 ppm, which
as the result give trigger input to IC 555. Trigger input is applied to
pin 2. In quiescent condition of output this input is kept at + VCC.
To obtain transition of output from stable state to quasi-stable state, a
negative-going pulse of narrow width (a width smaller than expected
pulse width of output waveform) and amplitude of greater than +
2/3 VCC is applied to pin 2. Output is taken from pin 3, which is
applied to Microcontroller 8951 IC. At the same time a exhaust fan is
given ON signal by IC 555 for Gas Sensor & fan starts exhausting
gas from ambient place. Microcontroller port 3.3 is for Gas Sensor
output. As 8951 is coded for it, it then sends signal to the relay
circuitry & APR for play recording message. Relay that already
connected to hands free will redial the last call or concerned
authorities of home, industry, hotel etc. APR will play pre recorded
message so the information is sent to owner & if within time limit
someone approaches there, chances of accident can be easily
eliminated. Along with dial up logic & message management, there's
implementation of Buzzer & LED in the circuit which will ON as
there is any type of detection so the person nearby can watch & hear
& safe lives by an unexpected mishaps.
Talking about Heat Sensor now, in case of short circuits at
homes, industries etc there arise high flames of fire and also there is
some places where excess of heat is too dangerous. Heat sensor
element senses it n give signal to triggered input IC 555. The IC 555
output is now connected to port 3.2 of IC 8951. The main difference
here is that the exhaust fan will not work during heat sensing case.
The rest working of Microcontroller will be the same. As
Microcontroller 8951 is coded for it, it then sends signal to the relay
circuitry & APR for play recording message. Relay that already
connected to hands free will redial the last call or concerned
someone approaches there, chances of accident can be easily
eliminated.
This is all about how stuff works. !!
CHAPTER - 3
"
3.1 AT89C51 MICROCONTROLLER

3.1.1 FEATURES
"
Compatible with MCS-51 Products
4K Bytes of In-System Reprogrammable Flash Memory
"
Endurance: 1,000 Write/Erase Cycles
"
RAM is 128 bytes.
"
2.7V to 6V Operating Range.
"
Fully Static Operation: 0 Hz to 24 MHz
"
128*8-bit Internal RAM.
"
32 Programmable I/O Lines.
"
Two 16-bit Timer/Counters.
"
Six Interrupt Sources.
"
Programmable Serial UART Channel.
"
Low power Idle and Power-down Modes
"
Three Level Program Memory Lock
3.1.2 DESCRIPTION
microcomputer with 4K bytes of Flash Programmable and Erasable
Read Only Memory (PROM). The device is manufactured using
Atmel's high density nonvolatile memory technology and is
compatible with the industry standard MCS-51 instruction set and
pin out. The on-chip Flash allows the program memory to be
reprogrammed in-system or by a conventional nonvolatile memory
programmer. By combining a versatile 8-bit CPU with Flash on a
monolithic chip, the ATMEL AT89C51 is a powerful microcomputer

which provides a highly flexible and cost effective solution to many
embedded control applications. The AT89C51 provides the following
standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O
lines, two 16-bit timer/counters, five vector two-level interrupt
architecture, a full duplex serial port, and on-chip oscillator and
clock circuitry.
In addition, the AT89C51 is designed with static logic for operation
down to zero frequency and supports two software selectable power
saving modes. The idle mode stops the CPU while allowing the
RAM, timer/counters, serial port and interrupt system to continue
functioning. The Power down Mode saves the RAM contents but
freezes the oscillator disabling all other chip functions until the next
hardware reset.
3.2 ARCHITECTURE OF 8951 FAMILY
Figure 3.1 shows the architecture of AT89C51 Microcontroller
Fig 3.1 Basic Architecture of AT89C51 Microcontroller

3.2.1 PIN DESCRIPTION
AT89C51 is an 8-bit microcontroller and belongs to Atmel's 8051
family. ATMEL 89C51 has 4KB of Flash programmable and erasable
read only memory (PEROM) and 128 bytes of RAM. It can be
erased and program to a maximum of 1000 times.
In 40 pin AT89C51, there are four ports designated as P1, P2,
P3 and P0. All these ports are 8-bit bi-directional ports, i.e., they can
be used as both input and output ports. Except P0 which needs
external pull-ups, rest of the ports have internal pull-ups. When 1s
are written to these port pins, they are pulled high by the internal
pull-ups and can be used as inputs. These ports are also bit
addressable and so their bits can also be accessed individually.
Port P0 and P2 are also used to provide low byte and high byte
addresses, respectively, when connected to an external memory. Port
3 has multiplexed pins for special functions like serial
communication, hardware interrupts, timer inputs and read/write

operation from external memory. AT89C51 has an inbuilt UART for
serial communication. It can be programmed to operate at different
baud rates. Including two timers & hardware interrupts, it has a total
of six interrupts.

3.2.1 VCC
Pin 40 provides supply voltage to the chip. The voltage source is
+5V.
3.2.2 GND
Pin 20 of 8951 is connected to ground.
3.2.3 PORT 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port
each pin can sink eight TTL inputs. When 1s are written to port 0
pins, the pins can be used as high impedance inputs. Port 0 may also
be configured to be the multiplexed low order address/data bus
during accesses to external program and data memory. In this mode
P0 has internal pull-ups. Port 0 also receives the code bytes during
Flash programming, and outputs the code bytes during program
verification.
External pull-ups are required during program verification.
3.2.4 PORT 1
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The
Port 1 output buffers can sink/source four TTL inputs. When 1s are
written to Port 1 pins they are pulled high by the internal pull-ups
and can be used as inputs. As inputs, Port 1 pins that are externally
being pulled low will source current (IIL) because of the internal
pull-ups. Port 1 also receives the low-order address bytes during
flash programming and verification.
3.2.5 PORT 2
being pulled low will source current (IIL) because of the internal
pull-ups. Port 2 emits the high-order address byte during fetches
from external program memory and during accesses to external data
memory that uses 16-bit addresses (MOVX @ DPTR). In this
application it uses strong internal pull-ups when emitting 1s. During
accesses to external data memory that uses 8-bit addresses (MOVX
@ RI); Port 2 emits the contents of the P2 Special Function Register.
Port 2 also receives the high order address bits and some control
signals during Flash programming and verification.
Pin No
Function Name
1
8 bit input/output port (P1) pins P1.0
2
P1.1
3
P1.2
4
P1.3
5
P1.4
6
P1.5
7
P1.6
8
P1.7
9
Reset pin; Active high Reset
10 Input (receiver) for serial communication Rx D 8 bit
input/output port (P3) pins P3.0
11 Output (transmitter) for serial communication
Tx D
P3.1
12 External interrupt 1 Int0
P3.2
13 External interrupt 2 Int1
P3.3
14 Timer1 external input T0
P3.4
15 Timer2 external input T1
P3.5
16 Write to external data memory. Write
P3.6
17 Read from external data memory.Read
P3.7
18 Quartz crystal oscillator (up to 24 MHz).
Crystal 2
19
Crystal 1
20 Ground (0V). Ground

21 8 bit input/output port (P2) pins
High-order address bits when interfacing with external memory.
22
23
24
25
26
27
28
29
31
P2.0/ A8
P2.1/ A9
P2.2/ A10
P2.3/ A11
P2.4/ A12
P2.5/ A13
P2.6/ A14
P2.7/ A15
Program store enable; Read from external program memory.

PSEN
30 Address Latch Enable ALE
Program pulse input during Flash programming Prog
External Access Enable; VCC for internal program executions
EA
Programming enable voltage; 12V (during Flash programming)
VPP
32 8 bit input/output port (P0) pins.
Low-order address bits when interfacing with external memory.

P0.7/ AD7
33
P0.6/ AD6
34
P0.5/ AD5
35
P0.4/ AD4
36
P0.3/ AD3
37
P0.2/ AD2
38
P0.1/ AD1
39
P0.0/ AD0
40 Supply Voltage; 5V (up to 6.6V) Vcc
3.2.6 PORT 3

being pulled low will source current (IIL) because of the pull-ups.
Port 3 also serves the functions of various special features of the
AT89C51 as listed below:
Port 3 also receives some control signals for Flash programming and
verification.
3.2.7 RST
Reset input. A high on this pin for two machine cycles while the
oscillator is running resets the device.
The alternate functions of port 3 of 8951 are as follows in table 3.2
Port Pin
Alternate Functions
P3.0 RXD (serial input port)

P3.1 TXD (serial output port)
P3.2 INT 0 (external interrupt 0)
P3.3 INT 1 (external interrupt 1)
P3.4 T0 (timer 0 external input)
P3.5 T1 (timer 1 external input)
P3.6 WR (external data memory write strobe)
P3.7 RD (external data memory read strobe)
Table 3.2 Port 3 Functions
3.2.9 ALE/PROG
Address Latch Enable output pulse for latching the low byte of the
address during accesses to external memory. This pin is also the
program pulse input (PROG) during Flash programming. In normal
operation ALE is emitted at a constant rate of 1/6 the oscillator
frequency, and may be used for external timing or clocking purposes.
Note, however, that one ALE pulse is skipped during each access to
external Data Memory. If desired, ALE operation can be disabled by
setting bit 0 of SFR location 8EH. With the bit set, ALE is active
only during a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no effect if the
microcontroller is in external execution mode.
3.2.10 PSEN
Program Store Enable is the read strobe to external program
memory.
This is an output pin. PSEN stands for "program store enable." In an
8031-based system in which an external ROM holds the program
code, this pin is connected to the OE pin of the ROM
When the AT89C51 is executing code from external program
memory, PSEN is activated twice each machine cycle, except that
two PSEN activations are skipped during each access to external
data memory.
3.2.11 EA/VPP
External Access Enable. EA must be strapped to GND in order to
enable the device to fetch code from external program memory
locations starting at 0000H up to FFFFH. Note, however, that if lock
bit 1 is programmed, EA will be internally latched on reset. EA
should be strapped to VCC for internal program executions. This pin
also receives the 12-volt programming enable voltage (VPP) during
Flash programming, for parts that require 12-volt VPP.
3.2.12 XTAL 1
Input to the inverting oscillator amplifier and input to the internal
clock operating circuit.
3.2.13 XTAL 2
Output from the inverting oscillator amplifier.
XTAL 1 and XTAL 2 are the input and output, respectively, of an
inverting amplifier which can be configured for use as an on-chip
oscillator, as shown in Figure 1. Either a quartz crystal or ceramic
resonator may be used. To drive the device from an external clock
source, XTAL2 should be left unconnected while XTAL1 is driven
as shown in Figure 3.4.There are no requirements on the duty cycle
of the external clock signal, since the input to the internal clocking
circuitry is through a divide-by-two flip-flop, but minimum and
maximum voltage high and low time specifications must be
observed.
3.2.15 IDLE MODE
In idle mode, the CPU puts itself to sleep while all the on chip
peripherals remain active. The mode is invoked by software. The
content of the on-chip RAM and all the special functions registers
remain unchanged during this mode. The idle mode can be
terminated by any enabled Interrupt or by hardware reset. It should
be noted that when idle is terminated by a hard
Hardware reset, the device normally resumes program execution,
from where it left off, up to two machine cycles before the internal
reset algorithm takes control. On-chip hardware inhibits access to
internal RAM in this event, but access to the port pins is not
inhibited. To eliminate the possibility of an unexpected write to a
port pin when Idle is terminated by reset, the instruction following
the one that invokes Idle should not be one that writes to a port pin
or to external memory.

3.2.16 STATUS OF EXTERNAL PINS DURING IDLE AND
POWER-DOWN MODES
During the 2 modes, idle & power, the status of external pins
are described in table 3.3.
Mode
Program Memory
ALE
PORT1
PORT2
PORT3
PSEN
Idle Internal
Idle External
1
1
PORT0
Data Data Data Data
Float Data Address
Data
Power-down
Internal
Data Data Data Data
Power-down
External
Float Data Data Data

Modes
Figure 3.4 External Clock Drive Configuration

3.2.17 POWER DOWN MODE
In the power down mode the oscillator is stopped, and the instruction
that invokes power down is the last instruction executed. The onchip RAM and Special Function Registers retain their values until
the power down mode is terminated. The only exit from power down
is a hardware reset. Reset redefines the SFRs but does not change the
on-chip RAM. The reset should not be activated before VCC is
restored to its normal operating level and must be held active long
enough to allow the oscillator to restart and stabilize.
The AT89C51 is normally shipped with the on-chip Flash memory
array in the erased state (that is, contents = FFH) and ready to be
programmed. The programming interface accepts either a highvoltage (12-volt) or a low-voltage (VCC) program enable signal. The
low-voltage programming mode provides a convenient way to
program the AT89C51 inside the user's system, while the highvoltage programming mode is compatible with conventional thirdparty Flash or EPROM programmers.
The AT89C51 is shipped with either the high-voltage or low-voltage
programming mode enabled. The respective top-side marking and
device signature codes are listed in the following table 3.4.
The AT89C51 code memory array is programmed byte-by-byte in
either programming mode. To program any non-blank byte in the onchip Flash Memory, the entire memory must be erased using the
Chip Erase Mode.
VPP = 12V
VPP = 5V
Top-side Mark AT89C51 AT89C51
xxxx
xxxx-5
Yyww
yyww
Signature (030H)
= 1EH
(030)= 1EH
(031H)
= 51H
(031)= 51H
(032H)
=F FH
(032)= 05H
Table 3.4 Flash Programming Mode Signature Codes

3.2.19 PROGRAM MEMORY LOCK BITS
On the chip are three lock bits which can be left un-programmed (U)
or can be programmed (P) to obtain the additional features listed in
the table below:
When lock bit 1 is programmed, the logic level at the EA pin is
sampled and latched during reset. If the device is powered up
without a reset, the latch initializes to a random value, and holds that
value until reset is activated. It is necessary that the latched value of
EA be in agreement with the current logic level at that pin in order
for the device to function properly.
3.2.20 LOCK BIT PROTECTION MODES
Program Lock Bits
MODE
LB1 LB2 LB3 Protection Type
1
2
U
U
No program lock features
U MOVC instructions executed from external

program memory are disabled from
fetching code bytes from internal memory, EA
is sampled and latched on reset,
and further programming of the Flash is
disabled
P
Same as mode 2, also verify is disabled
Same as mode 3, also external execution is

disabled
Table 3.5 Lock Bit Protection Modes

The above figure 3.5 signifies the lock bit protection modes of 8951.
3.3 PROGRAMMING ALGORITHM
Before programming the AT89C51, the address, data and control
signals should be set up according to the Flash programming mode
table and Figures. To program the AT89C51, take the following
steps.
"
Input the desired memory location on the address lines.
"
Input the appropriate data byte on the data lines.
"
Activate the correct combination of control signals.
"
Raise EA/VPP to 12V for the high-voltage programming mode.
"
Pulse ALE/PROG once to program a byte in the Flash array or
the lock bits
The byte-write cycle is self-timed and typically takes no more than
1.5 ms. Repeat steps 1 through 5, changing the address and data for
the entire array or until the end of the object file is reached.
3.3.1 DATA POLLING
The AT89C51 features Data Polling to indicate the end of a write
cycle. During a write cycle, an attempted read of the last byte written
will result in the complement of the written datum on PO.7. Once the
write cycle has been completed, true data are valid on all outputs,
and the next cycle may begin. Data Polling may begin any time after
a write cycle has been initiated.
3.3.2 READY/BUSY
The progress of byte programming can also be monitored by
the RDY/BSY output signal. P3.4 is pulled low after ALE goes high
during programming to indicate BUSY. P3.4 is pulled high again
when programming is done to indicate READY.
3.3.3 PROGRAM VERIFY
If lock bits LB1 and LB2 have not been programmed, the
programmed code data can be read back via the address and data
lines for verification. The lock bits cannot be verified directly.
Verification of the lock bits is achieved by observing that their
features are enabled.
3.3.4 CHIP ERASE
The entire Flash array is erased electrically by using the proper
combination of control signals and by holding ALE/PROG low for
10 ms. The code array is written with all "1"s. The chip erase
operation must be executed before the code memory can be reprogrammed.
The signature bytes are read by the same procedure as a normal
verification of locations 030H, 031H, and 032H, except that P3.6
and P3.7 must be pulled to a logic low. The values returned are as
following table 3.6.
(030H) = 1EH indicates manufactured by Atmel
(031H) = 51H indicates 89C51
(032H) = FFH indicates 12V programming
(032H) = 05H indicates 5V programming
Table 3.6 Signature Bytes
3.4 PROGRAMMING INTERFACE
Every code byte in the Flash array can be written and the entire array
can be erased by using the appropriate combination of control
signals. The write operation cycle is self timed and once initiated,
will automatically time itself to completion. All major programming

vendors offer worldwide support for the Atmel microcontroller
series.
Figure 3.7 shows the addresses of Special Function Register.
ACC ACCUMULATOR 0E0H
B
B REGISTER 0F0H
PSW PROGRAM STATUS WORD 0D0H
SP STACK POINTER 81H
DPTR
DATA POINTER 2 BYTES
DPL LOW BYTE OF DPTR
82H
DPH HIGH BYTE OF DPTR
83H
P0 PORT0
80H
P1 PORT1
90H
P2 PORT2
0A0H
P3 PORT3
0B0H
TMOD
TIMER/COUNTER MODE CONTROL
89H
TCON
TIMER COUNTER CONTROL 88H
TH0 TIMER 0 HIGH BYTE
8CH
TLO TIMER 0 LOW BYTE
8AH
TH1 TIMER 1 HIGH BYTE
8DH
TL1 TIMER 1 LOW BYTE
8BH
SCON
SERIAL CONTROL 98H
SBUF
SERIAL DATA BUFFER 99H
PCON
POWER CONTROL
Table 3.7 SFR Addresses
3.5.1 TMOD (TIMER MODE) REGISTER
Both timers are the 89c51 share the one register TMOD. 4 LSB bit
for the timer 0 and 4 MSB for the timer 1. In each case lower 2 bits
set the mode of the timer, Upper two bits set the operations.
3.5.1.1 GATE
Gating control when set. Timer/counter is enabled only while the
INTX pin is high and the TRx control pin is set. When cleared, the
timer is enabled whenever the TRx control bit is set
3.5.1.2 C/T
Timer or counter selected cleared for timer operation (input from
internal system clock)
M1 Mode bit 1
M0 Mode bit 0
M1 M0 MODE
OPERATING MODE
0
0
0
13 BIT TIMER/MODE
0
1
1
16 BIT TIMER MODE
1
0
2
8 BIT AUTO RELOAD
1
1
3
SPLIT TIMER MODE
3.5.2 PSW (PROGRAM STATUS WORD)
Below are the contents of PSW in figure 3.6 & details in table 3.9
Fig 3.6 PSW Register

CY PSW.7
CARRY FLAG
AC PSW.6
AUXILIARY CARRY
F0
PSW.5
AVAILABLE FOR THE USER FRO GENERAL

PURPOSE
RS1 PSW.4
REGISTER BANK SELECTOR BIT 1
RS0 PSW.3
REGISTER BANK SELECTOR BIT 0
0V PSW.2
OVERFLOW FLAG
-PSW.1
USER DEFINABLE BIT
PSW.0
PARITY FLAG SET/CLEARED BY HARDWARE
Table 3.9 PSW Register Details
3.5.3 PCON - POWER CONTROL REGISTER
Address: 87H (not bit addressable)
SMOD - Serial mode bit used to determine the baud rate with Timer
1.
Baud Rate
If SMOD = 0 then N = 384. If SMOD = 1 then N = 192. TH1 is the

high byte of timer 1 when it is in 8-bit auto reload mode.
GF1 and GF0 are General purpose flags not implemented on the
standard device PD is the power down bit. Not implemented on the
standard device IDL activate the idle mode to save power. Not
implemented on the standard device.
D7 D6 D5 D4 D3 D2 D1 D0
SMOD
X
x
x
GF1 GF0 PD IDL
Table 3.10 PCON Register
There are two ways to increase the baud rate of data transfer in the
8051
"
To use a higher frequency crystal
"
To change a bit in the PCON register
PCON register is an 8 bit register. Of the 8 bits, some are unused,
and some are used for the power control capability of the 8051. The
bit which is used for the serial communication is D7, the SMOD bit.
When the 8051 is powered up, D7 (SMOD BIT) OF PCON register
is zero. We can set it to high by software and thereby double the
baud rate. Table 3.11 shows the Baud Rate comparison for XTAL
TH1 (DECIMAL) HEX SMOD =0 SMOD =1
-3 FD 9600 19200
-6 FA 4800 9600
-12 F4 2400 4800
-24 E8 1200 2400
Table 3.11 Baud Rate Comparison for XTAL = 11.0592 MHZ
3.5.4 TCON - TIMER CONTROL REGISTER
Table 3.12 shows the TCON register.
D7 D6 D5 D4 D3 D2 D1 D0
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
Table 3.12 TCON Register
Address: 88H (bit addressable)
TF1 - Timer 1 overflow flag
TR1 - Timer 1 run control bit
TR0 - Timer 0 run control bit
IE1 - External interrupt 1 edge flag. Set to 1 when edge detected.
IT1 - Edge control bit for external interrupt 1. 1 = edge, 0 = level
IE0 - External interrupt 0 edge flag. Set to 1 when edge detected
IT0 - Edge control bit for external interrupt 0. 1 = edge, 0 = level
3.5.5 SCON - SERIAL CONTROL REGISTER
Table 3.13 shows the SCON register.
D7 D6 D5 D4 D3 D2 D1
SM0 SM1 SM2 REN TB8 RB8 TI
D0
RI
Table 3.13 SCON Register

SM2 - Enables multiprocessor communication in modes 2 and 3.
REN - Receiver enable
TB8 - Transmit bit 8. This is the 9th bit transmitted in modes 2 and
3.
RB8 - Receive bit 8. This is the 9th bit received in modes 2 and 3.
TI - Transmit interrupt flag. Set at end of character transmission.
Cleared in software.
RI - Receive interrupt flag. Set at end of character reception. Cleared
in software.
0
0
1
1
SM0
SM1
Operation Baud rate
0
Shift register
Osc/12
1
8-bit UART
Set by timer
0
9-bit UART
Osc/12 or Osc/64
1
9-bit UART
Set by timer
Table 3.14 Modes of SCON Register

3.5.6 TMOD - TIMER MODE CONTROL REGISTER
D7 D6 D5 D4 D3 D2 D1 D0
Gate C/T M1 M0 Gate C/T M1 M0
Timer 1
Timer 0
Table 3.15 TMOD Register
M1 M0 Mode
0
0
13-bit mode for compatibility to 8048 family
0
1
16- bit Timer/Counter. User must reload in software
1
0
8-bit autoreload. TLx is automatically reloaded from THx
1
1
TL0 is 8-bit counter controlled by Timer0 control bits.
TH0 is 8-bit counter controlled by Timer1 control bits. Timer 1 is
stopped
3.5.7 IE - INTERRUPT ENABLE REGISTER
Table 3.17 represents the IE register.
D7 D6 D5 D4 D3 D2 D1 D0
EA X
ET2 ES ET1 EX1 ET0 EX0
Table 3.17 IE Register
Address: 0A8H (bit addressable)
EA - Global interrupt enable
x - Not defined
ET2 - Timer 2 interrupt enable
ES - Serial port interrupt enable
EX1 - External interrupt 1 enable
EX0 - External interrupt 0 enable
3.5.8 IP - INTERRUPT PRIORITY REGISTER
Table 3.18 represents the IP register.
D7 D6 D5 D4 D3 D2 D1 D0
x
x
PT2 PS PT1 PX1 PT0 PX0
Table 3.18 IP Register
Address: 0B8H (bit addressable)
x - Not defined
PT2 - Priority for timer 2 interrupt
PS - Priority for serial port interrupt
PX1 - Priority for external interrupt 1
PX0 - Priority for external interrupt 0

3.5.9 T2CON - TIMER 2 CONTROL REGISTER
Address: 0C8H (bit addressable)
EXF2 - Timer 2 external flag.
D7
TF2 EXF2
D6 D5 D4 D3 D2 D1 D0
RCLK
TCLK
EXEN2 TR2 C/T2 CP/
RL2
Table 3.19 T2CON Register
RCLK - Receive clock. When set causes the serial port to use timer 2
for reception.
TCLK - Transmit clock. When set causes the serial port to use timer
2 for transmission.
C/ T2 - Counter/Timer select.if 0 use internal timer if 1 use external
pin
CP/ RL2 - Capture/reload flag.
3.6 MCS-51 FAMILY INSTRUCTION SET
The instruction set is divided in to 5 categories. They are as follows:
1.
Arithmetic instructions
2.
Logic instructions.
3.
Data transfer instructions.
4.
Boolean variable manipulation instruction.
5.
Program and machine control instruction.
We have listed all the instructions of microcontroller with
description, Bytes, & Cycles, which is figured out and described by
next page.

Operation
Instructions are explained in alphabetical order.
3.6.1 ACALL TARGET ADDRESS
Function: Absolute call
Flags: None
Description: ACALL unconditionally calls a subroutine located at
the indicated address. The instruction increments the PC twice to
obtain the address of the following instruction, then pushes the 16-bit
result onto the stack (low-order byte first) and increments the stack
pointer twice. The destination address is obtained by successively
concatenating the five high-order bits of the incremented PC, op
code bits 7-5, and the second byte of the instruction.
The subroutine called must therefore start within the same 2K block
of program memory as the first byte of the instruction following
ACALL. No flags are affected.
Example: Initially SP equals 07H. The label "SUBRTN" is at
program memory location 0345H. After executing the instruction
ACALL SUBRTN at location 0123H, SP will contain 09H, internal
RAM location 08H and 09H will contain 25H and 01H, respectively,
and the PC will contain 0345H.
Operation: ACALL
(PC) ? (PC) + 2
(SP) ? (SP) + 1
((SP)) ? (PC7-0)
(SP) ? (SP) + 1
((SP)) ?(PC15-8)
(PC10-0) ? page address
Bytes: 2
Cycles: 2
3.6.2 ADD A, SOURCEBYTE
Function: Add
Flags: OV, AC, CY
Description: ADD adds the byte variable indicated to the
accumulator, leaving the result in the accumulator. The carry and
auxiliary carry flags are set, respectively, if there is a carry out of bit
7 or bit 3, and cleared otherwise. When adding unsigned integers, the
carry flag indicates an overflow occurred. OV is set if there is a carry
out of bit 6 but not out of bit 7, or a carry out of bit 7 but not out of
bit 6; otherwise OV is cleared. When adding signed integers, OV
indicates a negative number produced as the sum of two positive
operands, or a positive sum from two negative operands. Four source
operand addressing modes are allowed: register, direct, register
indirect, or immediate.
Example:
MOV A,#45H ; A = 45H
ADD A,#4FH
Result: A = 94H, CY = 0.
The following addressing modes are supported for the ADD
instruction.
1. Immediate: ADD A, #data
Example: ADD A,#40H
2. Register: ADD A, Rn
Example: ADD A,R1
3. Direct: ADD A, direct
Example: ADD A, 20H ;Add data in RAM location 20H to A
4. Register-indirect: ADD A,@Ri
Example: ADD A,@R0 ;Add to A data pointed by R0
3.6.3 ADDC A,SOURCEBYTE
Function: Add with carry
Flags: OV, AC, CY
Description: ADDC simultaneously adds the byte variable indicated,

the carry flag and the accumulator contents, leaving the result in the
accumulator. The carry and auxiliary carry flags are set, respectively,
if there is a carry out of bit 7 or bit 3, and cleared otherwise. When
adding unsigned integers, the carry flag indicates an overflow
occurred.
OV is set if there is a carry out of bit 6 but not out of bit 7, or a carry
out of bit 7 but not out of bit 6; otherwise OV is cleared. When
adding signed integers, OV indicates a negative number produced as
the sum of two positive operands or a positive sum from two
negative operands.
Four source operand addressing modes are allowed: register, direct,
register indirect, or immediate.
Example:
mov a, #0C3H ; (A) ? 0C3H
mov R0,#0AAH ; (R0) ? 0AAH assume (CY) = 1
ADDC A,R0
Result : (A) = 6EH with (AC) = 0, (CY) = 1, (OV) = 1.
The addressing modes for ADDC are same as for ADD A,byte.
3.6.4 AJMP TARGET ADDRESS
Function: Absolute jump
Flags: None
Description: AJMP transfers program execution to the indicated
address, which is formed at runtime by concatenating the high-order
five bits of the PC (after incrementing the PC twice), op code bits 75, and the second byte of the instruction. The destination must
therefore be within the same 2K block of program memory as the
first byte of the instruction following AJMP.
Example: The label"JMPADR" is at program memory location
0123H. The instruction AJMP JMPADR is at location 0345H and
will load the PC with 0123H.
3.6.5 ANL DEST-BYTE, SRC-BYTE
Function: Logical AND for byte variables
Flags: None
Description: ANL performs the bitwise logical AND operation

between the variables indicated and stores the results in the
destination variable. No flags are affected. The two operands allow
six addressing mode combinations. When the destination is a
accumulator, the source can use register, direct, register-indirect, or
immediate addressing; when the destination is a direct address, the
source can be the accumulator or immediate data.
Note: When this instruction is used to modify an output port, the
value used as the original port data will be read from the output data
latch, not the input pins.
Example:
If the accumulator holds 0C3H (11000011B) and register 0 holds
0AAH (10101010B) then the instruction ANL A,R0 will leave 81H
(10000001B) in the accumulator.
For an ANL instruction there are a total of six addressing modes.
1. Immediate: ANL A, #data
Example: ANL A,#30H
2. Register: ANL A, Rn
Example: ANL A, R5
3. Direct: ANL A,direct
Example: ANL A,20H ; AND A with data in RAM location 20H
4. Register-indirect: ANL A, @Ri
Example: ANL A,@R1; AND A with data pointed by R0
In the next two addressing modes the destination is direct address
while the source is either A or immediate data.
5. ANL direct,A
Example: ANL 20H, A
6. ANL direct, #data
Example: ANL 40H, #30H
3.6.6 ANL C, SRC-BIT
Function: Logical AND for bit variables
Flags: CY
Description: In this instruction the carry flag bit is ANDed with a
source bit and the result is placed in carry. If the Boolean value of
the source bit is a logic 0 then clear the carry flag; otherwise leave
the carry flag in its current state. Only direct bit addressing is
allowed for the source operand. A slash ("/") preceding the operand
in the assembly language indicates that the logical complement of
the addressed bit is used as the source value, but the source bit itself
is not affected.
3.6.7 CJNE DEST-BYTE, SRC-BYTE, TARGET
Function: Compare and jump if not equal
Flags: CY
Description: CJNE compares the magnitudes of the first two
operands, and branches if their values are not equal. The branch
destination is computed by adding the signed relative displacement
in the last instruction byte to the PC, after incrementing the PC to the
start of the next instruction. The carry flag is set if the unsigned
integer value of dest-byte is less than the unsigned integer value of
src-byte; otherwise, the carry is cleared. Neither operand is affected.
The first two operands allow four addressing mode combinations:
the accumulator may be compared with any directly addressed byte
or immediate data, and any indirect RAM location or working
register can be compared with an immediate constant.
Example:
1. Immediate: CJNE A, #data, target
Example: CJNE A, #40,GO ; JUMP if A is not 40
2. Direct: CJNE A, direct, target
Example: CJNE A, 20H,GO ; JUMP if A !=(20H)
3. Register: CJNE Rn,#data,target
Example: CJNE R5,#70,GO ; jump if R5 is not 70
In the fourth addressing mode, any RAM location can be destination.
The RAM location is held by register R0 or R1.
4. Register-indirect: CJNE @Ri,#data,target
Example: CJNE @R1,#40,GO ;Jump if RAM location whose
address is held by R1 is not equal to 40.
3.6.8 CLR A
Function: Clear accumulator
Flags: None are affected
Description: The accumulator is cleared (all bits set to zero).
Example: The accumulator contains 5CH. The instruction CLR A

will leave the accumulator set to 00H.
3.6.9 CLR BIT
Function: Clear bit
Description: The indicated bit is cleared (reset to zero). CLR can
operate on the carry flag or any directly addressable bit.
Example: Port 1 has previously been written with 5DH (01011101B).
The instruction CLR P1.2 will leave the port set to 59H
(01011001B).
3.6.10 CPL A
Function: Complement accumulator
Description: Each bit of the accumulator is logically complemented
(one's complement). Bits which previously contained a one are
changed to zero and vice versa.
Example: The accumulator contains 5CH (01011100B). The
instruction CPL A will leave the accumulator set to 0A3H (10100011
B).
3.6.11 CPL BIT
Function: Complement bit
Description: The bit variable specified is complemented. A bit which
had been a one is changed to zero and vice versa. CPL can operate
on the carry or any directly addressable bit.
The instruction sequence
CPL P1.1
CPL P1.2
Will leave the port set to 5BH (01011011B).
3.6.12 DA A
Function: Decimal adjust accumulator after addition
Flags: CY
Description: DA A adjusts the eight-bit value in the accumulator
resulting from the earlier addition of two variables (each in packed
BCD format), producing two four-bit digits. Any ADD or ADDC
instruction may have been used to perform the addition. If
accumulator bits 3-0 are greater than nine (1010-1111), or if the AC
flag is one, six is added to the accumulator producing the proper
BCD digit in the low order nibble. This internal addition would set
the carry flag if a carry-out of the low order four-bit field propagated
through all high-order bits, but it would not clear the carry flag
otherwise. If the carry flag is now set, or if the four high-order bits
now exceed nine (1010-1111), these high-order bits are incremented
by six, producing the proper BCD digit in the high-order nibble.
Again, this would set the carry flag if there was a carryout of the
high-order bits, but wouldn't clear the carry. The carry flag thus
indicates if the sum of the original two BCD variables is greater than
100, allowing multiple precision decimal additions. OV is not
affected. All of this occurs during the one instruction cycle.
Essentially; this instruction performs the decimal conversion by
adding 00H, 06H, 60H, or 66H to the accumulator, depending on
initial accumulator and PSW conditions.
Note: DA A cannot simply convert a hexadecimal number in the
accumulator to BCD notation, nor does DA A apply to decimal
subtraction.
Example:
MOV A, #47H
ADD A, #38H
DA A
Result:
47H
+ 38H
---7FH
(invalid BCD)
06H
(after DA A)
---85H
(valid BCD)
----
In the above instruction, since the lower nibble was greater than 9,
DA added 6 to A. If the lower nibble is less than 9 but AC=1, it also
adds 6 to the lower nibble.
3.6.13 DEC BYTE
Function: Decrement
Flags: None
Description: The variable indicated is decremented by 1. An original
value of 00H will underflow to 0FFH. Four operand addressing
modes are allowed:
1. Accumulator: DEC A
2. Register: DEC Rn
3. Direct: DEC direct
4. Register-indirect: DEC @Ri
3.6.14 DIV AB
Function: Divide
Flags: CY and OV
Description: DIV AB divides the unsigned eight-bit integer in the
accumulator by the unsigned eight-bit integer in register B. The
accumulator receives the integer part of the quotient; register B
receives the integer remainder. The carry and OV flags will be
cleared.
Exception: If B had originally contained 00H, the values returned in
the accumulator and B register will be undefined and the overflow
flag will be set. The carry flag is cleared in any case.
Example:
MOV A,#35
MOV B,#10
DIV AB
Result: A=3 and B=5
3.6.15 DJNZ BYTE,TARGET
Function: Decrement and jump if not zero
Flags: None
Description: DJNZ decrements the location indicated by 1, and
branches to the address indicated by the second operand if the
resulting value is not zero. An original value of 00H wills underflow

to 0FFH. The branch destination would be computed by adding the
signed relative-displacement value in the last instruction byte to the
PC, after incrementing the PC to the first byte of the following
instruction.
The following two formats are supported by this instruction.
1. Register: DJNZ Rn, target
Example: DJNZ R3, HERE
2. Direct: DJNZ direct, target
3.6.16 INC BYTE
Function: Increment
Flags: None
Description: INC increments the indicated variable by 1. An original
value of 0FFH will overflow to 00H.
Four operand addressing modes are allowed:
1. Accumulator: INC A
2. Register: INC Rn
3. Direct: INC direct
4. Register-indirect: INC @Ri
3.6.17 INC DPTR
Function: Increment data pointer
Flags: None
Description: Increment the 16-bit data pointer by 1. A 16-bit
increment (modulo 216) is performed; an overflow of the low-order
byte of the data pointer (DPL) from 0FFH to 00H will increment the
high- order byte (DPH). This is the only 16-bit register which can be
incremented.
Example:
MOV DPTR, #16FFH
DPTR=16FFH
INC DPTR
Result: DPTR=1700H
3.6.18 JB BIT,TARGET
Function: Jump if bit is set
Flags: None
Description: If the indicated bit is a one, jump to the target address
indicated; otherwise proceed with the next instruction. The branch
destination is computed by adding the signed relative-displacement
in the third instruction byte to the PC, after incrementing the PC to
the first byte of the next instruction. The bit tested is not modified.
Example:
SETB P1.2; Make P1.2 an input port
HERE: JB P1.2,HERE ; stay here as long as P1.2=1
MOV P2,#20H ; Since P1.2=0 send 55H to P2
3.6.19 JBC BIT,TARGET
Function: Jump if bit is set and clear bit.
Flags: None
Description: If the indicated bit is one, branch to the target address
while at the same time clear the designated bit. The branch
destination is computed by adding the signed relative displacement
the first byte of the next instruction.
Note: When this instruction is used to test an output pin, the value
used as the original data will be read from the output data latch, not
the input pin.
3.6.20 JC TARGET
Function: Jump if carry is set
Flags: None
Description: If the carry flag is set, branch to the target address
indicated; otherwise proceed with the next instruction.
3.6.21 JMP @A + DPTR
Function: Jump indirect
Flags: None
Description: The JMP instruction is an unconditional jump to a target
address. The target address provided by the total sum of register A
and the DPTR register.
3.6.22 JNB BIT,TARGET

Function: Jump if bit is not set
Flags: None
Description: If the indicated bit is a zero, branch to the target
address; otherwise proceed with the next instruction. The branch
destination is computed by adding the signed relative-displacement
the first byte of the next instruction. The bit tested is not modified.
Example:
HERE: JNB P1.2,HERE; stay here as long as P1.2=0
MOV P2,#20H; Since P1.2=1 send 55H to P2
3.6.23 JNC TARGET
Function: Jump if carry is not set
Flags: None
Description: If the carry flag is a zero, branch to the target address;
otherwise proceed with the next instruction. The branch destination
is computed by adding the signed relative-displacement in the
second instruction byte to the PC, after incrementing the PC twice to
point to the next instruction. The carry flag is not modified.
3.6.24 JNZ TARGET
Function: Jump if accumulator is not zero
Flags: None
Description: If any bit of the accumulator is a one, branch to the
indicated address; otherwise proceed with the next instruction. The
branch destination is computed by adding the signed relativedisplacement in the second instruction byte to the PC, after
incrementing the PC twice. The accumulator is not modified.
3.6.25 JZ TARGET
Function: Jump if accumulator is zero
Flags: None
Description: If all bits of the accumulator are zero, branch to the
address indicated; otherwise proceed with the next instruction. The
branch destination is computed by adding the signed relativedisplacement in the second instruction byte to the PC, after
incrementing the PC twice. The accumulator is not modified. No
flags are affected.
3.6.26 LCALL 16-BIT ADDR
Function: Long call
Flags: None
Description: LCALL calls a subroutine located at the indicated
address. The instruction adds three to the program counter to
generate the address of the next instruction and then pushes the 16bit result onto the stack (low byte first), incrementing the stack
pointer by two. The high-order and low-order bytes of the PC are
then loaded, respectively, with the second and third bytes of the
LCALL instruction. Program execution continues with the
instruction at this address. The subroutine may therefore begin
anywhere in the full 64 Kbyte program memory address space.
Example: Initially the stack pointer equals 07H. The
label"SUBRTN" is assigned to program memory location 1234H.
After executing the instruction LCALL SUBRTN at location 0123H,
the stack pointer will contain 09H, internal RAM locations 08H and
09H will contain 26H and 01H, and the PC will contain 1234H.
3.6.27 LJMP 16-BIT ADDR
Function: Long jump
Flags: None
Description: LJMP causes an unconditional branch to the indicated
address, by loading the high order and low-order bytes of the PC
(respectively) with the second and third instruction bytes. The
destination may therefore be anywhere in the full 64K program
memory address space.
Example: The label"JMPADR" is assigned to the instruction at
program memory location 1234H. The instruction LJMP JMPADR at
location 0123H will load the program counter with 1234H.
3.6.28 MOV DEST-BYTE, SRC-BYTE
Function: Move byte variable
Flags: None
Description: The byte variable indicated by the second operand is
copied into the location specified by the first operand. The source
byte is not affected. No other register or flag is affected.
There are fifteen possible combinations for this instruction. They are
as follows:
Examples:
(a) Register A as the destination. This can have the following
formats.
1. MOV A, #data
Example: MOV A,#10H
2. MOV A, Rn
Example: MOV A,R5
3. MOV A, direct
Example: MOV A,50H
4. MOV A, @Ri
Example: MOV A,@R0
(b) Register A is the source. This can have the following formats.
1. MOV Rn, A
2. MOV direct, A
3. MOV @Ri, A
(c) Rn is the destination
1. MOV Rn, #immediate
2. MOV Rn, A
3. MOV Rn, direct
(d) The destination direct address
1. MOV direct, #data
2. MOV direct, @ri
3. MOV direct, A
4. MOV direct, Rn
(e) Destination is an indirect address held by R0 and R1.
1. MOV @Ri, #data
2. MOV @Ri, A
3. MOV @Ri, direct
3.6.29 MOV DEST-BIT, SRC-BIT
Function: Move bit data
Flags: None
Description: The Boolean variable indicated by the second operand
is copied into the location specified by the first operand. One of the
operands must be the carry flag; the other may be any directly
addressable bit. No other register or flag is affected.
Example: MOV P1.2,C ;copy carry bit to port bit P1.2
3.6.30 MOV DPTR, #DATA16
Function: Load data pointer with a 16-bit constant
Flags: None
Description: The data pointer is loaded with the 16-bit constant
indicated. The 16 bit constant is loaded into the second and third
bytes of the instruction. The second byte (DPH) is the high-order
byte, while the third byte (DPL) holds the low-order byte. This is the
only instruction which moves 16 bits of data at once.
Example: MOV DPTR, #434FH ;DPTR=434FH
3.6.31 MOVC A, @A + BASE-REG
Function: Move code byte
Flags: None
Description: The MOVC instructions load the accumulator with a
code byte, or constant from program memory. The address of the
byte fetched is the sum of the original unsigned eight-bit
accumulator contents and the contents of a sixteen-bit base register,
which may be either the data pointer or the PC. In the latter case, the
PC is incremented to the address of the following instruction before
being added to the accumulator; otherwise the base register is not
altered. Sixteen-bit addition is performed so a carry-out from the
low-order eight bits may propagate through higher-order bits.
Example:
MOVC A, @A + DPTR ; mov data at A+DPTR into A
MOVC A, @A + PC ; mov data at A+PC into A
3.6.32 MOVX DEST-BYTE, SRC-BYTE
Function: Move external
Flags: None
Description: The MOVX instructions transfer data between the

accumulator and a byte of external data memory, hence the"X"
appended to MOV. This instruction allows us to access externally
connected memory. There are two types of instructions, differing in
whether they provide an eight bit or sixteen-bit indirect address to
the external data RAM as explained bellow.
(a) The 16-bit external memory address is held by the DPTR register.
MOVX A,@DPTR
This moves into the accumulator a byte from external memory
whose address is pointed by DPTR.
MOVX @DPTR, A
This moves the content of accumulator to the external memory
location whose address is held by DPTR.
(b) The 8-bit address of external memory is held by R0 or R1
MOVX A,@Ri
This moves to the accumulator a byte from external memory whose
8-bit address is pointed by R0 or R1.
MOVX @Ri,A
This moves a byte from register A to an external memory whose 8bit address is held by R0 or R1.
3.6.33 MUL AB
Function: Multiply
Flags: OV, CY
Description: MUL AB multiplies the unsigned eight-bit integers in
the accumulator and register B. The low-order byte of the sixteen-bit
product is left in the accumulator, and the high-order byte in B. If the
product is greater than 255 (0FFH) the overflow flag is set;
otherwise it is cleared. The carry flag is always cleared.
Example:
MOV A,#5
MOV B,#7
MUL AB
Result: A=35=23H, B=0
3.6.34 NOP
Function: No operation
Flags: None
Description: This performs no operation and execution continues
with the next instruction. It is sometimes used for timing delays to
waste clock cycles. This instruction only updates the PC to point to
the next instruction following NOP.
3.6.35 ORL DEST-BYTE, SRC-BYTE
Function: Logical OR for byte variables
Flags: None
Description: ORL performs the bitwise logical OR operation
between the indicated variables, storing the results in the destination
byte.
The two operands allow six addressing mode combinations. When
the destination is the accumulator, the source can use register, direct,
register-indirect, or immediate addressing; when the destination is a
direct address, the source can be the accumulator or immediate data.
Example: If the accumulator holds 0C3H (11000011B) and R0 holds
55H (01010101B) then the instruction ORL A,R0 will leave the
accumulator holding the value 0D7H (11010111B).
Different types of addressing modes are as follows.
1. Immediate: ORL A, #data
Example: ORL A,#30h
2. Register: ORL A, Rn
Example: ORL A, R5
3. Direct: ORL A,direct
Example: ORL A,20H; OR A with data in RAM location 20H
4. Register-indirect: ORL A, @Ri
Example: ORL A,@R1; OR A with data pointed by R0.
3.6.36 ORL C, SRC-BIT
Function: Logical OR for bit variables
Flags: CY
Description: In this instruction the carry flag bit is ANDed with a
source bit and the result is placed in carry. If the Boolean value of
the source bit is logic 0 then clear the carry flag; otherwise leave the
carry flag in its current state. Only direct bit addressing is allowed
for the source operand. A slash ("/") preceding the operand in the
assembly language indicates that the logical complement of the
addressed bit is used as the source value, but the source bit itself is
not affected. No other flags are affected.
3.6.37 POP DIRECT
Function: Pop from stack
Flags: None
Description: This copies the byte pointed by SP to the location
whose direct address indicated, and decrements SP by 1. Notice that
this instruction supports only direct addressing mode. Therefore,
instruction such as POP A, POP R3 is illegal.
Example:
POP 0E0H; Where E0H is the RAM address belonging to Register
A.
Operation:
(direct) ? ((SP))
(SP) ? (SP) - 1
3.6.38 PUSH DIRECT
Function: Push onto stack
Flags: None
Description: This copies the indicated byte onto the stack increments
SP by 1. Notice that this instruction supports only direct addressing
mode. Therefore, instruction such as PUSH A, PUSH R3 is illegal.
Example:
PUSH 0E0H; Where E0H is the RAM address belonging to Register
A.
Operation:
(SP) ? (SP) + 1
((SP)) ? (direct)
3.6.39 RET
Function: Return from subroutine
Flags: None
Description: This instruction is used to return from a subroutine.

RET pops the high and low-order bytes of the PC successively from
the stack, decrementing the stack pointer by two. Program execution
continues at the resulting address, generally the instruction
immediately following an ACALL or LCALL.
3.6.40 RETI
Function: Return from interrupt
Flags: None
Description: This instruction is used to return from an interrupt
service routine. RETI pops the high and low-order bytes of the PC
successively from the stack, and restores the interrupt logic to accept
additional interrupts at the same priority level as the one just
processed. The stack pointer is left decremented by two. The PSW is
not automatically restored to its pre-interrupt status. Program
execution continues at the resulting address, which is generally the
instruction immediately after the point at which the interrupt request
was detected. If a lower or same-level interrupt is pending when the
RETI instruction is executed, that one instruction will be executed
before the pending interrupt is processed.
3.6.41 RL A
Function: Rotate accumulator left
Flags: None
Description: The eight bits in the accumulator are rotated one bit to
the left. Bit 7 is rotated into the bit 0 position.
Example: The accumulator holds the value 0C5H (11000101B). The
instruction RL A leaves the accumulator holding the value 8BH
(10001011B) with the carry unaffected.
3.6.42 RLC A
Function: Rotate accumulator left through carry flag
Flags: CY
Description: The eight bits in the accumulator and the carry flag are
together rotated one bit to the left. Bit 7 moves into the carry flag;
the original state of the carry flag moves into the bit 0 position.
Example: The accumulator holds the value 0C5H (11000101B), and

the carry is zero. The instruction
RLC A leaves the accumulator holding the value 8AH (10001010B)
with the carry set.
3.6.43 RR A
Function: Rotate accumulator right
Flags: None
Description: The eight bits in the accumulator are rotated one bit to
the right. Bit 0 is rotated into the bit 7 position.
instruction RR A leaves the accumulator holding the value 0E2H
(11100010B) with the carry unaffected.
3.6.44 RRC A
Function: Rotate accumulator right through carry flag
Flags: CY
Description: The eight bits in the accumulator and the carry flag are
together rotated one bit to the right. Bit 0 moves into the carry flag;
the original value of the carry flag moves into the bit 7 position.
Example: The accumulator holds the value 0C5H (11000101B), the
carry is zero. The instruction
RRC A leaves the accumulator holding the value 62H (01100010B)
with the carry set.
3.6.45 SETB BIT
Function: Set bit
Flags: None
Description: SETB sets the indicated bit to one. SETB can operate
on the carry flag or any directly addressable bit of a port, register, or
RAM location.
Example:
SETB P1.2
SETB ACC.2
SETB C ; carry flag CY=1
3.6.46 SJMP TARGET
Function: Short jump

Flags: None
Description: Program control branches unconditionally to the
address indicated. The branch destination is computed by adding the
signed displacement in the second instruction byte to the PC, after
incrementing the PC twice. Therefore, the range of destinations
allowed is from 128 bytes preceding this instruction to 127 bytes
following it.
Example: The label" RELADR" is assigned to an instruction at
program memory location 0123H. The instruction SJMP RELADR
will assemble into location 0100H. After the instruction is executed,
the PC will contain the value 0123H.
3.6.47 SUBB A, SRC-BYTE
Function: Subtract with borrow
Flags: OV, AC, CY
Description: SUBB subtracts the src-byte and the carry flag together
from the accumulator, leaving the result in the accumulator. The
steps for subtraction perform by the internal hardware of the CPU
are as follows:
"
Take 2?s complement of the src-byte.
"
Add this to register A.
"
Invert the carry.
This instruction sets the carry flag according to the following.
CY
If dest>source
0
the result is positive
If dest=source
0
the result is 0
If dest < source
1
the result is negative in 2?s compliment
1. Immediate: SUBB A, #data
Example: SUBB A,#30h ; A = A - 30H - CY
2. Register: SUBB A, Rn
Example: SUBB A, R5 ; A = A - R5 - CY
3. Direct: SUBB A,direct
Example: SUBB A,20H ; A - data at (20H) - CY
4. Register-indirect: SUBB A, @Ri
Example: SUBB A,@R1 ; A - data at (R1) - CY
3.6.48 SWAP A
Function: Swap nibbles within the accumulator
Flags: None
Description: SWAP A interchanges the low and high-order nibbles
(four-bit fields) of the accumulator (bits 3-0 and bits 7-4). The
operation can also be thought of as a four bit rotate instruction.
Example:
MOV A, #25H
SWAP A
Result: A = 52H
3.6.49 XCH A, BYTE
Function: Exchange accumulator with byte variable
Flags: None
Description: This instruction swaps the content of register A and the
source byte. The source byte can be any register or RAM location.
Example:
MOV A, #49H; A = 49H
MOV R2, #30H; R2 = 30H
XCH A,R2
Result: A=30H, R2=49H
1. Register: XCH A, Rn
Example: XCH A, R5
2. Direct: XCH A, direct
Example: XCH A, 20H
3. Register-indirect: XCH A, @Ri
Example: XCH A,@R1
3.6.50 XCHD A,@Ri
Function: Exchange digit
Flags: None
Description: XCHD exchanges the low-order nibble of the
accumulator (bits 30), with that of the internal RAM location
indirectly addressed by the specified register. The high-order nibbles
(bits 7-4) of each register are not affected.
Example: R0 contains the address 20H. The accumulator holds the

value 36H. Internal RAM location 20H holds the value 75H. The
instruction XCHD A, @ R0 will leave RAM location 20H holding
the value 76H and 35H in the accumulator.
3.6.51 XRL DEST-BYTE, SRC-BYTE
Function: Logical Exclusive OR for byte variables
Flags: None
Description: XRL performs the bitwise logical Exclusive OR
operation between the indicated variables, storing the results in the
destination.
Example:
MOV A, #28H
XRL A, #08H
Result: A = 20H
For XRL instruction there are total of 6 addressing modes. In four of
them the accumulator must be the destination. They are as follows:
1. Immediate: XRL A, #data
Example: XRL A,#30h
2. Register: XRL A, Rn
Example: XRL A, R5
3. Direct: XRL A,direct
Example: XRL A,20H ; XOR A with data in RAM location 20H
4. Register-indirect: XRL A, @Ri
Example: XRL A,@R1 ; XOR A with data pointed by R0
In the next two addressing modes the destination is direct address
while the source is either A or immediate data.
5. XRL direct,A
Example: XRL 20H, A
6. XRL direct, #data
Example: XRL 40H, #30H
CHAPTER - 4
4.1 INTRODUCTION
In MPS we you will be developing code for the C8051F120 EVB
(evaluation board). This board is from Silicon Laboratories (SiLabs).
For that purpose, you will be using a x86 based PC (your laptop, a
desktop, or co processor card in a Sun Ultra 10 workstation) to write
and compile the controller programs. This type of development is
called Cross Platform Development. After generating the machine
code for the target environment and before you can run it you must
download it to the C8051F120.
When doing cross platform development, extra knowledge of the
target environment is needed. It is important to be able to answer the
following questions:
o What memory resources does the execution environment have?
128 Kbytes of FLASH ROM that extends from 00000 to 1FFFFH
and 8 Kbytes of RAM. The compiler - and more specifically the
linker - has been configured to make use of this memory address
space.
o Are we dealing with only hardware or is there an interface program
we have to go through?
All communication to the C8051F120 evaluation board is currently
through the IDE (integrated development environment) from Silicon
Laboratories running on the PC.
The SiLabs IDE is a convenient way to edit, compile, and download
source code written for the microcontroller. While SiLabs provides a
nice interface for making source code changes and easily
downloading them to the development boards, it lacks the actual
compiler portion which converts C code to hex files, the common
format used by the 8051. To do this, a free and widely used open
source tool called Small Device C Compiler (SDCC) is used. SDCC
compiles the C code written, and automatically optimizes and
converts it to hex. Due to its popularity, support for SDCC in the
SiLabs IDE comes standard, making it easy and convenient to use.
4.2 CONCEPT OF COMPILER

Compilers are programs used to convert a High Level Language to
object code. Desktop compilers produce an output object code for
the underlying microprocessor, but not for other microprocessors. I.E
the programs written in one of the HLL like 'C' will compile the code
to run on the system for a particular processor like x86 (underlying
microprocessor in the computer). For example compilers for Dos
platform is different from the Compilers for UNIX platform.
So if one wants to define a compiler then compiler is a program that
translates source code into object code. The compiler derives its
name from the way it works, looking at the entire piece of source
code and collecting and reorganizing the instruction. See there is a
bit little difference between compiler and an interpreter. Interpreter
just interprets whole program at a time while compiler analyzes and
execute each line of source code in succession, without looking at
the entire program.
The advantage of interpreters is that they can execute a program
immediately. Secondly programs produced by compilers run much
faster than the same programs executed by an interpreter. However
compilers require some time before an executable program emerges.
Now as compilers translate source code into object code, which is
unique for each type of computer, many compilers are available for
the same language.
A cross compiler is similar to the compilers but we write a program
for the target processor (like 8051 and its derivatives) on the host
processors (like computer of x86)
It means being in one environment you are writing a code for
another environment is called cross development. And the compiler
used for cross development is called cross compiler
So the definition of cross compiler is a compiler that runs on one
computer but produces object code for a different type of computer.
Cross compilers are used to generate software that can run on
computers with a new architecture or on special-purpose devices that
cannot host their own compilers. Cross compilers are very popular
for embedded development, where the target probably couldn't run a

compiler. Typically an embedded platform has restricted RAM, no
hard disk, and limited I/O capability. Code can be edited and
compiled on a fast host machine (such as a PC or UNIX workstation)
and the resulting executable code can then be downloaded to the
target to be tested. Cross compilers are beneficial whenever the host
machine has more resources (memory, disk, I/O etc) than the target.
8051 SDCC Compiler is one such compiler that supports a huge
number of host and target combinations. It supports as a target to 8
bit microcontrollers like Atmel and Motorola etc.
4.3.1 WHY DO WE NEED CROSS COMPILER?
There are several advantages of using cross compiler. Some of them
are described as follows
"
By using this compilers not only can development of complex
embedded systems be completed in a fraction of the time, but
reliability is improved, and maintenance is easy.
"
Knowledge of the processor instruction set is not required.
"
A rudimentary knowledge of the 8051's memory architecture is
desirable but not necessary.
"
Register allocation and addressing mode details are managed
by the compiler.
"
The ability to combine variable selection with specific
operations improves program readability.
"
Keywords and operational functions that more nearly resemble
the human thought process can be used.
"
Program development and debugging times are dramatically
reduced when compared to assembly language programming.
"
The library files that are supplied provide many standard
routines (such as formatted output, data conversions, and floatingpoint arithmetic) that may be incorporated into your application.
"
Existing routine can be reused in new programs by utilizing the
modular programming techniques available with C.
"
The C language is very portable and very popular. C compilers
are available for almost all target systems. Existing software
investments can be quickly and easily converted from or adapted to
other processors or environments.
4.4 INSTALLING SDCC

To install SDCC, follow the simple instructions below:
1.
Download the latest snapshot under the Windows package with

installer section. A copy can also be obtained from the course
website.
2.
Open the executable that was just downloaded and allow the
installation wizard to step you through the process of installing
SDCC on your computer. It is recommended that you leave all of the
configuration options and installation paths the same as suggested by
the installation wizard, so that it will be easier to assist you should
problems arise.
3.
To ensure SDCC was properly installed, click on: Start Menu?
All Programs and ensure that SDCC shows up on your programs list.
If it does, you have successfully installed SDCC.
4.5 INSTALLING SiLABS IDE
To ensure SDCC was properly installed, click on: Start Menu?All
Programs and ensure that Silicon Laboratories shows up on your
programs list. If it does, you have successfully installed the SiLabs
IDE.
To configure SDCC as the compiler in the SiLabs IDE, follow the
instructions below:
1.
Click on: Start?All Programs?Silicon Laboratories?Silicon
Laboratories IDE
2.
Once open, click on: Projects?Tool Chain Integration
3. You will see a Select Tool Vendor dropdown box. Select SDCC
from this menu.
4.
Next, you will notice that the Assembler tab is selected by
default. Click on Browse to tell SiLabs where SDCC is installed. If
you kept all the paths to the default as recommended, the path should
be: C:\Program Files\SDCC\bin\asx8051.exe
5.
After the assembler path is configured, you will need to
configure the compiler path. To do this, click on the Compiler tab.
Once again, click Browse and select the path to where SDCC is
installed. If you kept all the paths to the default, the full path should
be: C:\Program Files\SDCC\bin\sdcc.exe
6.
Finally, to configure the linker, select the Linker tab. Click
Browse and select the path where SDCC is installed. The full path
for a default installation should be: C:\Program
Files\SDCC\bin\sdcc.exe
7.
Once you have made these changes, click OK. It is very
important that you not change anything outside of what has been
mentioned above, especially the command line flags passed to
SDCC.
8.
You have successfully set up SiLabs IDE to use SDCC!
1.
To create a new project, click on: Project?New. This will create
an empty project.
2.
Add a new C file to the project by clicking on: Project?Add
Files to Project. Give your new file a name, such as myprog.c.
3.
The file will now be part of the project, and can be compiled.
Save the project by clicking on: Project?Save Project.
4.6.1 COMPILING A PROJECT
You will be using the SDCC 2.7 cross compiler. The compiler
generates executable files with the extension .exe from the C source
files.
To create an executable program that runs on the C8051F120
processor from C code, there are three steps that must be taken. First
the compiler takes the C source file (.c) and creates an object file
(.hex). A linker takes the object file from the compiler and adds in
the language library routines to create a link file. Finally a hex
converter (or loader) takes the link file and generates a downloadable
executable file that can be passed to the C8051F120 by the IDE. The
IDE program downloads the .out file into the C8051F120 for
execution.
Fortunately there are menu items that will perform all these
operations. For a C source file in an opened IDE Project, the menu
commands to generate the .exe download file are:
1.
To compile your project, first verify that all of your code is
correct. If it's not, don't worry, the compiler will catch your mistakes.
2.
Click on: Project?Assemble/Compile File (<Ctrl><F7> or
icon) this will compile your project source code. The window at the
bottom of the IDE will alert you of any errors or warnings it finds in
your code. If there are errors, correct them first before moving on to
the next step. If there are warnings, you may or may not want to
correct them, depending on the nature of the warning.
3.
Next click on: Project?Build/Make Project(<F7> or icon) This
will link your compiled file. Any errors detected by the linker will be
displayed.
Transferring the Executable Machine Code to the C8051F120
4.
After successfully building your project, you will want to
download it to the development board. Before doing this, you will
need to configure the adapter used to download the source code and
establish the connection. To do this, click on: Options?Connection
Options Once the window opens, select the USB Debug Adapter and
click OK.
5.
To establish the connection to the 8051 you must click on:
Debug?Connect This will connect the IDE to the development board
through the USB Debug Adapter.
6.
Click on: Debug?Download Object File (<Alt><D> or icon)
Select the file you just compiled, and click Download. This will
download the code to the development board.
Finally, to execute your code on the C8051F120, click on: Debug?
Go
We have two packages through which the C8051F120 board may

communicate with the PC using the RS232 UART ports HyperTerminal and ProComm Plus. To begin the process, start either
HyperTerminal or ProComm Plus as a dumb terminal to the EVB.
Run the program HYPERTRM.EXE from Program Files?
Accessories? HyperTerminal.
Create a new connection configured for a direct connection to
COM1 (no modem) with 115200 bits per second, 8 data bits, no
(none) parity, 1 stop bit, and no (none) flow control (handshaking).
Connect a DB-9 serial cable from the PC card serial port to the serial
port on the EVB.
4.6.4 IDE FILE LOCATION REQUIREMENT
In order to work correctly, your project files must be in the
C:\MPSfiles directory. The header files (.h) are in C:\Program
Files\SDCC\include and the compiler (sdcc.exe), linker and make
file (makebin.exe) are located
in C:\Program Files\SDCC\bin.
Normal termination of a program occurs when the last line in main()
is executed. This is done at the end of a program by calling the
function: return;
at which point the program will stop but the Halt button in the IDE
must still be selected.
4.8 8051 PROJECT DEVELOPMENT CYCLE
These are the steps to develop 8051 project using Keil
1.
Create source files in C or assembly.
2.
Compile or assemble source files.
3.
Correct errors in source files.
4.
Link object files from compiler and assembler.
5. Test linked application.
Now let us start how to work with Keil.
Compilers produce hex files that we download in to the ROM of the

micro controller. The size of the hex file produced by the compiler is
one of the main concerns of micro controller programmers for two
reasons:
1.
Micro controllers have limited on-chip ROM
2.
The code space for the 8051 is limited to 64k bytes.
While assembly language produces a hex file that is much smaller
than C. Programming in assembly language is tedious and time
consuming. C programming, on the other hand, is less time
consuming and much easier to write. One statement in C belongs to
several statements in assembly language. However if we learn easily
instructions we can easily deal with C programming. Some of the
assembly instructions are discussed below.[5]
ACALL addr11
Description: ACALL unconditionally calls a subroutine located at
the indicated address. The instruction increments the PC twice to
obtain the address of the following instruction, then pushes the 16-bit
result on to the stack(low-order byte first) and increments the stack
pointer twice. The destination address is obtained by successively
concatenating the five high-order bits of the incremented PC, epode
bits 7-5, and the second byte of the instruction. The subroutine called
must therefore start within the same 2K block of the program
memory as the first byte of the instruction following ACALL. No
flags are affected.
CLR A
Function: clear accumulator
Description: The accumulator is cleared (all bits reset to zero). No
flags are affected.
CPL A
Function: Complement accumulator.
Description: Each bit of the accumulator is logically complemented

(one's complemented). Bits which previously contained a one are
changed to a zero and vice-versa. No flags are affected.
DJNZ <byte>, <rel-addr>
Function: Decrement and jump if not zero.
Description: DJNZ decrements the location indicated by 1, and
branches to the address indicated by the second operand if the
resulting value is not zero. An original value of 00H wills underflow
to 0FFH. No flags are affected. The branch destination would be
computed by adding the signed relative-displacement value in the
last instruction byte to the PC, after incrementing the PC to the firs-t
byte of the following instruction. The location decremented may be a
register or directly addressed byte.
JB bit,rel
Function: jump if bit set
Description: If the indicated bit is one, jump to the address indicated;
is computed by adding the signed relative-displacement in the third
instruction byte to the PC, after incrementing the PC to the first byte
of the next instruction. The bit tested is not modified. No flags are
affected.
JNB bit,rel
Function: jump if bit not set
Description: If the carry bit is zero, branch to the indicated address;
is computed by adding the signed relative-displacement in the third
instruction byte to the PC, after incrementing the PC to the first byte
of the next instruction. The bit tested is modified. No flags are
affected.
LJMP addr16
Function: Long jump
Description: LJMP causes an unconditional branch to the indicated
address, by loading the high order and low-order bytes of the PC
(respectively) with the second and third instruction bytes. The

destination may therefore be anywhere in the full 64K program
memory address space. No flags are affected.
MOV <dest-byte>, <src-byte>
Description: The byte variable indicated by the second operand is
copied into the location specified by the first operand. The source
byte is not affected. No other register or flag is affected. This is by
far the most flexible operation. Fifteen combinations of source and
destination addressing modes are allowed.
RET
Description: RET pops the high and low-order bytes of the PC
successively from the stack, decrementing the stack pointer by two.
Program execution continues at the resulting address, generally the
instruction immediately following an ACALL or LCALL. No flags
are affected.
SETB <bit>
Function: set bit
Description: SETB sets the indicated bit to one. SETB can operate
on the carry flag or any directly addressable bit. No other flags are
affected.
SJMP rel
Function: short jump
Description: program control branches unconditionally to the address
indicated. The branch destination is computed by adding the signed
displacement in the second instruction byte to the PC, after
incrementing the PC twice. Therefore, the range of destinations
allowed is from 128 bytes preceding this instruction to 127 bytes
following it.
4.9 ASSEMBLER & COMPILER
Software is to be written in the assembly code in the assembler. For

this project we use 8051 IDE assembler + compiler. The Various
process for assembling, compiling and simulating are shown below
by series of figures.
Fig 4.1 Load New File in 8051 IDE

?

MAIN:
KEYCHECK:
JNB P3.0,OK
JNB P3.4,WRONG
JNB P3.5,WRONG
JNB P3.7,WRONG
JNB P3.1,WRONG
JNB P3.2,WRONG
JNB P3.3,WRONG
SJMP KEYCHECK
OK:
ACALL DELAY1
;
JNB
P3.0,WRONG
JNB P3.1,OK1 ;
JNB
P3.2,WRONG ;
JNB P3.3,WRONG
JNB
P3.4,WRONG
JNB P3.5,WRONG
JNB
P3.7,WRONG
SJMP OK
OK1:
JNB
P3.0,WRONG
JNB P3.1,WRONG
JNB P3.2,OK2
JNB P3.3,WRONG
JNB P3.4,WRONG
JNB
P3.5,WRONG
JNB P3.7,WRONG
SJMP OK1
OK2:
JNB P3.2,$
ACALL DELAY
;
JNB
P3.0,WRONG ;
JNB P3.1,WRONG ;
JNB P3.2,WRONG
JNB P3.3,OK3
JNB P3.4,WRONG
JNB P3.5,WRONG
JNB P3.7,WRONG OK3:
CLR P1.3
; BUZZER
CLR P1.0
SETB P1.1
ACALL
DELAY1
SETB P1.3
; BUZZER OFF
SETB
P1.0
SETB P1.1
ACALL DELAY1
SETB P1.0
CLR P1.1
ACALL DELAY1
SETB P1.0
SETB
P1.1
LJMP MAIN DELAY1:
MOV R3,#00
MOV R2,#00
MOV R1,#12 DELAY:
DJNZ
R3,DELAY
DJNZ R2,DELAY
DJNZ R1,DELAY RET
WRONG:
ACALL DELAY
CLR BUZ
CLR
RELAY
ACALL DELAY
SETB RELAY
ACALL DELAY
CLR RELAY
ACALL
DELAY
SETB RELAY
In the Gas sensor, we use IC 555 along with sensor as a main
component. Pin no 4 and pin no 8 is connected to the positive supply.
Pin no 1 is connected to the negative voltage. One capacitor is
grounded from the pin no 5 for noise cancellation. Output is
available on the pin no 3. Sensor is connected to the pin no 2. In the
case of Gas sensor, Pin no 2 is negative bias through the 33k ohm
resistor and pin no 3 is positively biased. Infrared LED is directly
connected to the positive and negative supply through the 470 ohm
resistor.
Fig 4.5 Gas Sensor with MCU
In normal stage when Gas is detected by sensor then pin no 2 is

positively biased. If pin no 2 is positive then negative output is
available on the pin no 3. Now when gas concentration rises then pin
no. 2 is now gets its voltage from only 33 k ohm resistor. If pin no 2
is become negative then output is shifted to the pin no 3. When
positive output is available on the pin no 3 and with the help of this
voltage NPN transistor is ON and NPN transistor provide a negative
voltage as a pulse to the microcontroller. Microcontroller allows the
auto dial up using the relay and starts an exhaust fan to fan out
excess gas concentration. It also allows sending an ON signal to
APR 9600 which will start to play recording message in few seconds
for Gas. In that mid time hands free dials last redialed number of the
mobile phone which provides info to the concerned people.
In the case of Fire sensor, we use IC 555 along with Heat sensor as a
main component. Pin no 4 and pin no 8 is connected to the positive
supply. Pin no 1 is connected to the negative voltage. One capacitor
is grounded from the pin no 5 for noise cancellation. Output is
available on the pin no 3. Sensor is connected to the pin no 2. In the
heat sensor, Pin no 2 is negative bias through the 33k ohm resistor
and pin no 3 is positively biased. Infrared LED is directly connected
to the positive and negative supply through the 470 ohm resistor.
Fig 4.6 Fire Sensor with MCU
In normal stage heat is detected by sensor then pin no 2 is positively
biased. If pin no 2 is positive then negative output is available on the
pin no 3. Now when temperature rises above the nominal room
temperature then pin no. 2 is now gets its voltage from only 33 k
ohm resistor. If pin no 2 is become negative then output is shifted to
the pin no 3. When positive output is available on the pin no 3 and
with the help of this voltage NPN transistor is ON and NPN
transistor provide a negative voltage as a pulse to the
microcontroller. Microcontroller allows the auto dial up using the
relay and it also allows sending an ON signal to APR 9600 which
will start to play recording message in few seconds for Gas. In that
mid time hands free dials last redialed number of the mobile phone
which provides info to the concerned people. Note that exhaust fan
will remain in its idle state of OFF in case of heat/fire detection &
prevention.
Note that microcontroller sense only negative input to the
microcontroller.
CHAPTER - 5
5.1 APR 9600

Digital voice processing chips with different features and coding
techniques for speech compression and processing are available on
the market from a number of semiconductor manufacturers.
Advanced chips such as Texas instruments' TMS320C31 can
implement various voice-processing algorithms including codeexcited linear prediction, adaptive differential pulse-code
modulation, A law (specified by California Council for International
Trade), ? law (specified by Bell Telephone) and vector sum-excited
linear prediction. On the other hand, APR9600 single chip voice
recorder and playback device from Aplus Integrated Circuits makes
use of a proprietary analogue storage technique implemented using
flash nonvolatile memory process in which each cell is capable of
storing up to 256 voltage levels. This technology enables the
APR9600 to reproduce voice signals in their natural form. The
APR9600 is a good standalone voice recorder or playback IC with
nonvolatile storage and playback capability for 5 to 60 seconds. It
can record and play multiple messages at random or in sequential
mode. The user can select sample rates with consequent quality and
recording time trade-off. Microphone amplifier, automatic gain
control (AGC) circuits, internal anti-aliasing filter, integrated output
amplifier and messages management are some of the features of the

APR9600 chip.
5.1.2 FEATURES
"
Single-chip, high-quality voice recording & playback solution
"
No external ICs required
"
Minimum external components
"
Non-volatile Flash memory technology
"
No battery backup required
"
User-Selectable messaging options
"
Random access of multiple fixed-duration messages
"
Sequential access of multiple variable-duration messages
"
User-friendly, easy-to-use operation
"
Programming & development systems not required
"
Level-activated recording & edge-activated play back switches
"
Low power consumption
"
Operating current: 25 mA typical
"
Standby current: 1 uA typical
"
Automatic power-down
"
Chip Enable pin for simple message expansion
5.2 GENERAL DESCRIPTION
The APR9600 device offers true single-chip voice recording, nonvolatile storage, and playback capability for 5 to 60 seconds. The
device supports both random and sequential access of multiple
messages. Sample rates are user-selectable, allowing designers to
customize their design for unique quality and storage time needs.
Integrated output amplifier, microphone amplifier, and AGC circuits
greatly simplify system design. The device is ideal for use in
portable voice recorders, toys, and many other consumer and
industrial applications.
APLUS integrated achieves these high levels of storage capability by
using its proprietary analog/multilevel storage technology
implemented in an advanced Flash non-volatile memory process,
where each memory cell can store 256 voltage levels. This
technology enables the APR9600 device to reproduce voice signals
in their natural form. It eliminates the need for encoding and

compression, which often introduce distortion.
5.3 FUNCTIONAL DESCRIPTION
APR9600 block diagram is included in order to describe the devices
internal architecture. At the left hand side of the diagram are the
analog inputs. A differential microphone amplifier, including
integrated AGC, is included on-chip for applications requiring use.
The amplified microphone signals fed into the device by connecting
the ANA_OUT pin to the ANA_IN pin through an external DC
blocking capacitor. Recording can be fed directly into the ANA_IN
pin through a DC blocking capacitor, however, the connection
between ANA_IN and ANA_OUT is still required for playback. The
next block encountered by the input signal is the internal antialiasing filter. The filter automatically adjusts its response according
to the sampling frequency selected so Shannon's Sampling Theorem
is satisfied. After anti-aliasing filtering is accomplished the signal is
ready to be clocked into the memory array. This storage is
accomplished through a combination of the Sample and Hold circuit
and the Analog Write/Read circuit. These circuits are clocked by
either the Internal Oscillator or an external clock source. When
playback is desired the previously stored recording is retrieved from
memory, low pass filtered, and amplified as shown on the right hand
side of the diagram. The signal can be heard by connecting a speaker
to the SP+ and SP- pins. Chip-wide management is accomplished
through the device control block shown in the upper right hand
corner. Message management is provided through the
Fig 5.1 Pin Diagram of APR 9600 IC
message control block represented in the lower center of the block
diagram. More detail on actual device application can be found in
the Sample Application section. More detail on sampling control can
be found in the Sample Rate and Voice Quality section. More detail
on Message management and device control can be found in the
Message Management section.
5.4
MESSAGE MANAGEMENT
5.4.1 MESSAGE MANAGEMENT GENERAL DESCRIPTION

Playback and record operations are managed by on-chip circuitry.
There are several available messaging modes depending upon
desired operation. These message modes determine message
management style, message length, and external parts count.
Therefore, the designer must select the appropriate operating mode
before beginning the design. Operating modes do not affect voice
quality; for information on factors affecting quality refer to the
Sampling Rate & Voice Quality section. The device supports five
message management modes (defined by the MSEL1, MSEL2
and /M8_OPTION pins shown in Figures 1 and 2):
Figure 5.2 APR9600 Block Diagram
"
Random access mode with 2, 4, or 8 fixed-duration messages
"
Tape mode, with multiple variable-duration messages, provides
two options:
Auto rewind
Normal
Modes cannot be mixed. Switching of modes after the device has
recorded an initial message is not recommended. If modes are
switched after an initial recording has been made some unpredictable
message fragments from the previous mode may remain present, and
be audible on playback, in the new mode. These fragments will
disappear after a Record operation in the newly selected mode. Table
1 defines the decoding necessary to choose the desired mode.
An important feature of the APR9600 Message management
capabilities is the ability to audibly prompt the user to change in the
device's status through the use of "beeps" superimposed on the
device's output. This feature is enabled by asserting a logic high
level on the BE pin.
Table 5.1 Mode selection

Random access mode supports 2, 4, or 8 Message segments of fixed
duration. As suggested recording or playback can be made randomly
in any of the selected messages. The length of each message segment
is the total recording length available (as defined by the selected
sampling rate) divided by the total number of segments enabled (as
decoded in Table1). Random access mode provides easy indexing to
message segments.
RANDOM ACCESS MODE
On power up, the device is ready to record or playback in any of the
enabled message segments. To record,/CE must be set low to enable
the device and /RE must be set low to enable recording. You initiate
recording by applying a low level on the message trigger pin that
represents the message segment you intend to use. The message
trigger pins are labeled /M1_MESSAGE - /M8_OPTION on pins 1-9
(excluding pin 7) for message segments 1-8 respectively. Note:
Message trigger pins of M1_MESSAGE,/M2_NEXT, /M7_END,
and /M8_OPTION, have expanded names to represent the different
functionality that these pins assume in the other modes. In random
access mode these pins should be considered purely message trigger
pins with the same functionality as /M3, /M4, /M5, and /M6. For a
more thorough explanation of the functionality of device pins in
different modes please refer to the pin description table that appears
later in this document. When actual recording begins the device
responds with a single beep (if the BE pin is high to enable the beep
tone) at the speaker outputs to indicate that it has started recording.
Recording continues as long as the message pin stays low. The rising
edge of the same message trigger pin during record stops the
recording operation (indicated with a single beep).If the message
trigger pin is held low beyond the end of the maximum allocated
duration, recording stops automatically (indicated with two beeps),
regardless of the state of the message trigger pin. The chip then
enters low-power mode until the message trigger pin returns high.
After the message trigger pin returns to high, the chip enters standby
mode. Any subsequent high to low transition on the same message

trigger pin will initiate recording from the beginning of the same
message segment. The entire previous message is then overwritten
by the new message, regardless of the duration of the new message.
Transitions on any other message trigger pin or the /RE pin during
the record operation are ignored until after the device enters standby
mode.
5.4.2.2 FUNCTIONAL DESCRIPTION OF PLAYBACK
RANDOM ACCESS MODE
On power up, the device is ready to record or playback, in any of the
enabled message segments. To playback,/CE must be set low to
enable the device and RE must be set high to disable recording &
enable playback. You initiate playback by applying a high to low
edge on the message trigger pin that represents the message segment
you intend to playback. Playback will continue until the end of the
message is reached. If a high to low edge occurs on the same
message trigger pin during playback, playback of the current
message stops immediately. If a different message trigger pin pulses
during playback, playback of the current message stops immediately
(indicated by one beep) and playback of the new message segment
begins. A delay equal to 8,400 cycles of the sample clock will be
encountered before the device starts playing the new message. If a
message trigger pin is held low, the selected message is played back
repeatedly as long as the trigger pin stays low. A period of silence, of
duration equal to 8,400 cycles of the sampling clock, will be inserted
during looping as an indicator to the user of the transition between
the end and the beginning of the message.
5.4.3 TAPE MODE
Tape mode manages messages sequentially much like traditional
cassette tape recorders. Within tape mode two options exist, auto
rewind and normal. Auto rewind mode configures the device to
automatically rewind to the beginning of the message immediately
following recording or playback of the message. In tape mode, using
either option, messages must be recorded or played back
sequentially, much like a traditional cassette tape recorder
5.4.3.1 FUNCTION DESCRIPTION OF RECORDING IN TAPE

MODE USING THE AUTO REWIND OPTION
On power up, the device is ready to record or playback, starting at
the first address in the memory array. To record, /CE must be set low
to enable the device and /RE must be set low to enable recording. A
falling edge of the /M1_MESSAGE pin initiates voice recording
(indicated by one beep).A subsequent rising edge of the
/M1_MESSAGE pin during recording stops the recording (also
indicated by one beep). If the M1_MESSAGE pin is held low
beyond the end of the available memory, recording will stop
automatically (indicated by two beeps). The device will then assert a
logic low on the /M7_END pin until the /M1 Message pin is
released. The device returns to standby mode when the
/M1_MESSAGE pin goes high again. After recording is finished the
device will automatically rewind to the beginning of the most
recently recorded message and wait for the next user input. The auto
rewind function is convenient because it allows the user to
immediately playback and review the message without the need to
rewind. However, caution must be practiced because a subsequent
record operation will overwrite the last recorded message unless the
user remembers to pulse the /M2_Next pin in order to increment the
device past the current message. A subsequent falling edge on the
/M1_Message pin starts a new record operation, overwriting the
previously existing message. You can preserve the previously
recorded message by using the /M2_Next input to advance to the
next available message segment. To perform this function, the
/M2_NEXT pin must be pulled low for at least 400 cycles of the
sample clock. The auto rewind mode allows the user to record over
the just recorded message simply by initiating a record sequence
without first toggling the /M2_NEXT pin. To record over any other
message however requires a different sequence. You must pulse
the /CE pin low once to rewind the device to the beginning of the
voice memory. The /M2_NEXT pin must then be pulsed low for the
specified number of times to move to the start of the message you
wish to overwrite. Upon arriving at the desired message a record
sequence can be initiated to overwrite the previously recorded
material. After you overwrite the message it becomes the last

available message and all previously recorded messages following
this message become inaccessible. If during a record operation all of
the available memory is used, the device will stop recording
automatically,(double beep) and set the /M7_END pin low for a
duration equal to 1600 cycles of the sample clock. Playback can be
initiated on this last message, but pulsing the /M2_Next pin will put
the device into an "overflow state". Once the device enters an
overflow state any subsequent pulsing of /M1_MESSAGE or
/M2_NEXT will only result in a double beep and setting of the
/M7_END pin low for a duration equal to 400 cycles of the sample
clock. To precede from this state the user must rewind the device to
the beginning of the memory array. This can be accomplished by
toggling the /CE pin low or cycling power. All inputs, except the /CE
pin, are ignored during recording.
5.4.3.2 FUNCTION DESCRIPTION OF PLAYBACK IN TAPE
MODE USING AUTO REWIND OPTION
On power-up, the device is ready to record or playback, starting at
the first address in the memory array. Before you can begin
playback, the /CE input must be set to low to enable the device
and /RE must be set to high to disable recording and enable
playback. The first high to low going pulse of the /M1_MESSAGE
pin initiates playback from the beginning of the current message; on
power up the first message is the current message. When the
/M1_MESSAGE pin pulses low the second time, playback of the
current Message stops immediately. When the /M1_MESSAGE pin
pulses low a third time, playback of the current message starts again
from its beginning. If you hold the /M1_MESSAGE pin low
continuously the same message will play continuously in a looping
fashion. A 1,540ms period of silence is inserted during looping as an
indicator to the user of the transition between the beginning and end
of the message. Note that in auto rewind mode the device always
rewinds to the beginning of the current message. To listen to a
subsequent message the device must be fast forwarded past the
current message to the next message. This function is accomplished
by toggling the /M2_NEXT pin from high to low. The pulse must be
low for least 400 cycles of the sampling clock. After the device is
incremented to the desired message the user can initiate playback of
the message with the playback sequence described above. A special
case exists when the /M2_NEXT pin goes low during playback.
Playback of the current message will stop, the device will beep,
advance to the next message and initiate playback of the next
message. (Note that if /M2 Next goes low when not in playback
mode, the device will prepare to play the next message, but will not
actually initiate playback).
If the /CE pin goes high during playback, playback of the current
message will stop, the device will beep, reset to the beginning of the
first message, and wait for a subsequent playback command. When
you reach the end of the memory array, any subsequent pulsing
of /M1_MESSAGE or /M2_NEXT will only result in a double beep.
To precede from this state the user must rewind the device to the
beginning of the m memory array. This can be accomplished by
toggling the /CE pin low or cycling power.
5.4.3.3 FUNCTIONAL DESCRIPTION OF RECORDING IN TAPE
MODE USING THE NORMAL OPTION
On power-up, the device is ready to record or playback, starting at
the first address in the memory array. Before you can begin
recording, the /CE input must be set to low to enable the device
and /RE must be set to low to enable recording. On a falling edge of
the /M1_MESSAGE pin the device will beep once and initiate
recording. A subsequent rising edge on the /M1 Message pin will
stop recording and insert a single beep. If the /M1_ MESSAGE pin
is held low beyond the end of the available memory, recording Stops
automatically, and two beeps are inserted; regardless of the state of
the /M1_MESSAGE pin. The device returns to the standby mode
when the /M1_MESSAGE pin is returned high. A subsequent falling
edge on the /M1_MESSAGE pin starts a new record operation in the
memory array immediately following the last recorded message, thus
preserving the last recorded message. To record over all previous
messages you must pulse the /CE pin low once to reset the device to
the beginning of the first message. You can then initiate a record
sequence, as described above, to record a new message. The most
recently recorded message will become the last recorded message

and all previously recorded messages following this message will
become inaccessible. If you wish to preserve any current messages it
is recommend that the Auto Rewind option be used instead of the
Normal option. If the Normal option is necessary the following
sequence can be used. To preserve current messages you must fast
forward past the messages you want to keep before you can record a
new message. To fast forward when using the Normal option you
must switch to play mode and listen to messages sequentially until
you arrive at the beginning of the message you wish to overwrite. At
this stage you should switch back to record mode and overwrite the
desired message. The most recently recorded message will become
the last recorded message and all previously recorded messages
following this message will become inaccessible. All inputs,
except /CE, are ignored during recording.
5.4.3.4 FUNCTIONAL DESCRIPTION OF PLAYBACK IN TAPE
On power-up or after a low to high transition on /RE the device is
ready to record or playback starting at the first address in the
memory array. Before you can begin playback of messages, the /CE
input must be set to low to enable the device and /RE must be set to
high to enable playback. The first high to low going pulse of the
/M1_MESSAGE pin initiates playback from the beginning of the
current message. When the /M1_MESSAGE pin pulses from high to
low a second time, playback of the current message stops
immediately. When the /M1_MESSAGE pin pulses from high to low
a third time, playback of the next message starts again from the
beginning. If you hold the /M1_MESSAGE pin low continuously,
the current message and subsequent messages play until the one of
the following conditions is met: the end of the memory array is
reached, the last message is reached, the /M1_message pin is
released. If the last recorded message has already played, any further
transitions on the /M1_MESSAGE pin will initiate a double beep for
warning and the /M7_END pin will go low. To exit this state you
must pulse the /CE pin high and then low once during standby to
reset the pointer to the beginning of the first message.
Fig 5.3 APR9600 Experimental board

5.5 MICROPROCESSOR CONTROLLED MESSAGE
MANAGEMENT
The APR9600 device incorporates several features design help
simplify microprocessor controlled message management When
controlling messages the microprocessor essentially toggles pins as
described in the message management sections described previously.
The /BUSY, /STROBE, and /M7_END pins are included to simplify
handshaking between the microprocessor and the APR9600.The
/BUSY pin, when low, indicates to the host processor that the device
is busy and that No commands can be accepted. When this pin is
high the device is ready to accept and execute commands from the
host. The /STROBE pin pulses low each time a memory segment is
used. Counting pulses on this pin enables the host processor too
accurately determine how much recording time has been used, and
how much recording time remains. The APR9600 has a total of
eighty memory segments. The /M7_END pin is used as an indicator
that the device has stopped its current record or playback operation.
During recording a low going pulse indicates that all memory has
been used. During playback a low pulse indicates that the last
message has played. Microprocessor control can also be used to link
several APR9600 devices together in order to increase total available
recording time. In this application both the speaker and microphone
signals can be connected in parallel. The microprocessor will then
control which device currently drives the speaker by enabling or
disabling each device using its respective /CE pins. A continuous
message cannot be recorded in multiple devices however because the
transition from one device to the next will incur a delay that is
noticeable upon playback. For this reason it is recommended that
message boundaries and device boundaries always coincide.
5.6 SIGNAL STORAGE
The APR9600 samples incoming voice signals and stores the
instantaneous voltage samples in non-volatile FLASH memory cells.
Each memory cell can support voltage ranges from 0 to 256 levels.
These 256 discrete voltage levels are the equivalent of 8-bit
(28=256) binary encoded values. During playback the stored signals
are retrieved from memory, smoothed to form a continuous signal,
and then amplified before being fed to an external speaker.
According to Shannon's sampling theorem, the highest possible
frequency component introduced to the input of a sampling system
must be equal to or less than half the sampling frequency if aliasing
errors are to be eliminated. The APR9600 automatically filters its
input, based on the selected sampling frequency, to meet this
requirement. Higher sampling rates increase the bandwidth and
hence the voice quality, but they also use more memory cells for the
same length of recording time. Lower sampling rates use fewer
memory cells and effectively increase the duration capabilities of the
device, but they also reduce incoming signal bandwidth. The
APR9600 accommodates sampling rates as high as 8 kHz and as low
as 4 kHz. You can control the quality/duration trade off by
controlling the sampling frequency. An internal oscillator provides
the APR9600 sampling clock. Oscillator frequency can be changed
by changing the resistance from the OscR pin to GND. Table 5.2
summarizes resistance values and the corresponding sampling
frequencies, as well as the resulting input bandwidth and duration.
Resistance
(k ohm) Sampling
Frequency(kHz)
Input
Bandwidth (kHz)
Duration(sec)
84 4.2 2.1 60
38 6.4 3.2 40
34 8
4
32
Table 5.2 Input Bandwidth & Duration

The APR9600 device has an integrated AGC. The AGC affects the
microphone input but does not affect the ANA_IN input. The AGC
circuit insures that the input signal is properly amplified. The AGC
works by applying maximum gain to small input signals and
minimum gain to large input signals. This assures that inputs of
varying amplitude are recorded at the optimum signal level. The
AGC amplifier is designed to have a fast attack time and a slow
decay time. This timing is controlled by the RC network connected
to pin 19. A value of 220K and 4.7uF has been found to work well
for the English language. Be aware that different languages, speakers
from different countries, and music may all require modification of
the recommended values for the AGC RC network.
The following reference schematics are included as examples of how
a recording system might be designed. Each reference schematic
shows the device incorporated in one of its three main modes:
Random Access, Tape mode - Normal option, and Tape mode - Auto
Rewind option. Note that in several of the applications either one or
all of the /BUSY, /STROBE, or /M7_END pins are connected to
LEDs as indicators of device status. This is possible because all of
these pins and signals were designed to have timing compatible with
both microprocessor interface and manual LED indication. A bias
must be applied to the electrets microphone in order to power its
built-in circuitry. The ground return of this bias network is connected
to the /Busy. This configuration saves power when record mode.
Both pins 18 and 19, MicIn and MicRef, must be AC coupled to the
microphone network in order to block the DC biasing voltage. Figure
3 shows the device configured in random access mode. The device is
using eight Message segments, the maximum available, in this mode.
Note that message trigger pins that are not used, for modes with less
than eight segments, can be left unconnected with the exception of
pin /M8_OPTION which should be pulled to VCC through a 100k
resistor.

Figure 5.4 Tape Mode, Normal Option
Figure 5.5 Tape Mode, Auto Rewind Option
Figure 5.6 Random Access Mode
5.11 PIN DESCRIPTION

Table 5.3 shows the Pin Description & Functionality of APR 9600 in
different modes.
5.12 ELECTRICAL CHARACTERISTICS
The following table 5.4 , 5.5, 5.5 list Absolute Maximum Ratings,
DC Characteristics, and Analog Characteristics for the APR9600
device.
Table 5.4 Absolute Maximum Ratings
Table 5.6 Analog Characteristics

"
Use a good quality 8 Ohm speaker with a cavity such as
speakers for computer sound systems. Do not use a bare speaker
which gives you degraded sound.
"
For better sound replay quality, speak with a distance to the onboard microphone and speak clearly. Also keep the background noise
as low as possible.
"
For even better sound replay quality, use microphone input or
Audio Line In input. If Audio Line In is used, the amplitude of input
signal should be < 100 mV p-p.
CHAPTER - 6
6.1 CONCLUSION
Sensor technologies are developing fast with time and innovative
technology. This field is one of the most interesting areas to be
discovered continuously. So many new sensor designs will come out
and develop in future hence increasing the competitiveness between
researchers. This project is a minor contribution to instill the interest
of people. It also gives a very basic understanding which will be a
good learning process to the beginner. The hardware and software
part of this project is working based on the objectives mentioned
before and based on the conduct test or experiments held towards the
end this project, the results are stable and working as it should be.
This project can be concluded that the target to develop the security
system based
GSM has achieved. GSM technology capable solution has proved to
be controlled remotely, provide home security and is cost effective as
compared to the previously existing systems without Gas sensor and

Fire sensor in one product or circuit.
designed keeping this particular aspect in mind. The security system
is made fool proof to the maximum extent possible. In this project
we make use of a microcontroller as the main controller to control
the input and the output that reach the controller. There is a large
scope in the future enhancements that can be provided along with
this project like actuating a fire detection alarm or sensing a leakage
of gas etc.
We conclude that we have 100% successfully fulfilled our project
and we have confidence that our project will provide full security for
Industries, Hotels, Restaurants, Homes. Hence we can conclude that
the required goals and objectives of Interactive Dial up based Home
Security System have been achieved. The security system with 3
combinations function has been implemented. This project will
benefit all the people in monitoring their property even when they
are away from home with low cost of home security system. It is
most advantageous as compared to other alternatives available for
providing security since it is an integrated system. In this project
security plays an important role with low cost and with many
advantages. The system is simple, secure, reliable and fast. It can be
operated by anyone who knows nothing about its software and
effective.
So, our project will help a lot everywhere because of its security and
alertness. We will still develop and extend our project to maximum
level to safeguard the places and extend the service with good
response.
6.2 RESULT
This project is microcontroller based project. A Gas sensor is used to
detect dangerous gas leaks in the home kitchen, large scale
industries, manufacturing plants, skyscrapers, lodge, hotels etc.
Mainly since it's a small unit we can ideally implement to detect
dangerous gas leaks in the kitchen. For large scale, we have to
implement complex circuitry with same logic. The sensor can also
sense LPG leak in your car or in a service station, storage tank
environment. This unit can be easily incorporated into an alarm unit,

to sound an alarm. The sensor has excellent sensitivity combined
with a quick response time. When GAS leakage is detected above 8
ppm, the sensor sends electrical signal to microcontroller which in
turn sends ON signal exhaust fan, alarm, auto dial up and APR. So
the four systems start working simultaneously to enhance security &
preserve accidents. First the exhaust fan will start that will try to
reduce the concentration of the gas so that any incident can be
avoided; secondly the alarm will start and will warn the people of
surrounding areas. Lastly, the auto dial up will start working and will
call to the to the authorized person using cellular network called
GSM specifically to the last called number or stored number of the
mobile telephony, and lastly the APR with the help of speaker will
give the message of gas leakage to the called person.
Another feature that we added to our project is a fire sensor. A fire
sensor will start working in case if there occurred fire due to some
sparking or blazes elements present there, then fire sensor will do the
same work as done by gas sensor. It will send signals to the
microcontroller which in turn will give signal to alarm and the alarm
will start. Also it will give signal to the APR and auto dial up system.
The auto dial up system as said above will call the last caller and the
speaker connected to APR will give the message about the fire.
6.3 LIMITATION
"
Only Detection, not Blockage
The major limitation of the project is that it can only detect the gas
leakage and can alert about it but it can't stop the leakage.
"
High Sensitivity of Heat Sensor
The fire sensor that we used is highly sensitive, in case of normal
heat in the kitchen or industry it will start working and alarm will be
on.
Beside these limitations there are some limitations of gas sensor
used. There are some conditions that must be prohibited while using
gas sensor. They are as follows:
"
Exposure to Organic Silicon Steam
Organic silicon steam cause sensors invalid, sensors must be avoid

exposing to silicon bond, fixture, silicon latex, putty or plastic
contain silicon environment.
"
High Corrosive Gas
If the sensors exposed to high concentration corrosive gas (such as
H2Sz, SOXCl2, HCl etc), it will not only result in corrosion of
sensors structure, also it cause sincere sensitivity attenuation.
"
Alkali, Corrosive Alkali Metals Salt, Halogen Pollution
The sensors performance will be changed badly if sensors be sprayed
polluted by alkali metals salt especially brine, or be exposed to
halogen such as florin.
"
Touch Water
Sensitivity of the sensors will be reduced when spattered or dipped
in water.
"
Freezing
Do avoid icing on sensor's surface, otherwise sensor would lose
sensitivity.
"
Applied Voltage Higher
Applied voltage on sensor should not be higher than stipulated value,
otherwise it cause down-line or heater damaged, and bring on
sensors' sensitivity characteristic changed badly.
6.4 FUTURE SCOPE
"
A relay contact may be used to operate a camera when it
detects an intruder which helps in finding the intruder's identity
easily.
"
As the system is flexible to dial any previously stored number,
this system can be used in any places wherever security is needed
like industries, hotels, houses, and shops, restaurants etc.
"
A more advancement can be brought to the system using the
computer control, so the entire process can be analyzed effectively.
"
By adding LCD display and with slight changes, we can update
information, which was dumped in microcontroller.
"
Entry faces identification with web camera.
"
A water sprinkling system can also be connected to it.
"
More dial up option up to 25 last redial list are available which

can be implemented for better security results.
BIBLIOGRAPHY
[1] Adel S. Sedra, Kenneth Carless Smith, "Microelectronic Circuits

, Volume 1, Oxford University Press, 2004
[2] Muhammad Ali Mazidi, Rolin McKinley, Janice Gillispie
Mazidi, "The 8051 Microcontroller and Embedded Systems Using
Assembly and C", Second edition, Pearson Education India, 2007
[3] U.A.Bakshi and A.P.Godse, "Linear Integrated Circuits",
Technical Publications Pune, First Edition 2010.
[4] M. Gopal, I.J. Nagrath, "Control Systems Engineering" 4/e, New
Age Publications (Academic), India
[5] Dogan Ibrahim, "Microcontroller Projects in C for the 8051",
Newnes (June 2000)
[6] "Datasheet Catalog", www.datasheetcatalog.com
[7] "All Datasheet", www.alldatasheet.com/
[8] "Fairchild Semiconductor", www.fairchildsemi.com
[9] "Atmel Technology", http://www.atmel.com/
[10] "Electronic for You", www.electronicsforu.com
[11] "How Stuff Works", http://www.howstuffworks.com
[12] "Aplus Integrated Circuit Inc.", http://www.aplusinc.com.tw/
[13] "Google Books", books.google.co.in
PROJECT REPORT
ON

alerting system
By
Ms. Sonali Gupta

PROJECT GUIDE
Prof. R.K.Yadav
Mr. Akhilesh Sharma
Mr. Ajay Kumar
Mr. P.K.Raghav
PROJECT INCHARGE
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGG.
Krishna Institute of Management & Technology

Moradabad
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGG.
CERTIFICATE
This is to certify that the project entitled

alerting system
has been carried out by RITIKA ARORA, SHUBHASHISH DIXIT,
RISHABH SINGH and HUMAIRA ANAM under my guidance in
partial fulfillment of the degree of Bachelor of Technology in
Electronics & Communication Engineering of Gautam Buddh
technical University Lucknow during the academic year 20112012. To the best of my knowledge and belief this work has not
been submitted elsewhere for the award of any other degree.
Project Incharge
Examiner
Project Guide
ACKNOWLEDGEMENT
We would like to place on record my deep sense of gratitude to Prof.
R.K.Yadav, HoD. of Electronics and Communication Engineering, Krishna
Institute of Management & Technology(KIMT), Moradabad, India.
Mr.
Akhilesh Sharma, Associate Professor Department of Electronics &

Communication Engineering , KIMT, Moradabad for their generous guidance,
help and useful suggestions.
We express my sincere gratitude to Mr. Ajay Kumar, Senior Lecturer;
Department of Electronics & Communication Engineering, KIMT, Moradabad
Prof. Mr. P.K. Raghav, Senior Lecturer; Ms. Sonali Gupta, Department of
Electronics & Communication Engineering, KIMT, Moradabad, India, for his
stimulating guidance, continuous encouragement and supervision throughout
the course of present work.
We also wish to extend my thanks to Mr. Amit Sharma, Ms. Neha
Goyal, Mr. Amit Chaudhary & all faculty members & college staff for their
insightful comments and constructive suggestions to improve the quality of
this research work.
B.Tech Final Year
Electronics & Communication
PAGE INDEX
S. No.
CONTENTS
Page no.
i
ii
Iii
iv
v
vi
Certificate
Acknowledgement
List of Tables
List of Figures
List of Symbols
Abstract
I
II
VIII
IX
XI
XII
INTRODUCTION
1.1 General Introduction
1.2 Organization Of Project
1. 3 Project Statement
CIRCUIT STRUCTURE
2.1 GENERAL THEORY

2.2.2 SENSOR BOARD
2.3 LED ARRAY
2.4 DRIVER CIRCUIT
2.5 MQ-6 GAS SENSOR
2.5.2 APPLICATIONS
2.6 RESET CIRCUIT
2.7 ALARM
2.8 RELAY
2.9 EXHAUST FAN
2.11 AUTO DIALER
9
9
10
10
12
12
12
12
12
13
13
13
15
15
15
16
16
16
1
3
7
2.12 POWER SUPPLY

2.13 IC 7805
2.13.1 PIN DIAGRAM
2.14 DIGITAL VOICE PROCESSOR USING APR
9600
2.15.1
MONOSTABLE
MULTIVIBRATOR
CIRCUIT DETAILS
2.15.2 555 IC MONOSTABLE MULTIVIBRATOR
OPERATIONS
2.15.3 MONOSTABLE MULTIVIBRATOR DESIGN
USING 555 TIMER IC
2.17
FULL
CIRCUIT
STRUCTURE
&
EXPLANATION
17
17
17
18
18
25

3.1.1 FEATURES
3.1.2 DESCRIPTION
3.2.1 VCC
3.2.2 GND
3.2.3 PORT 0
3.2.4 PORT 1
3.2.5 PORT 2
3.2.6 PORT 3
3.2.7 RST
3.2.9 ALE/PROG
3.2.10 PSEN
3.2.11 EA/VPP
3.2.12 XTAL 1
3.2.13 XTAL 2
25
25
25
26
26
27
28
28
28
28
30
30
31
31
32
32
32
32
19
19
20
20
21
21
22

3.2.15 IDLE MODE
3.2.16 STATUS OF EXTERNAL PINS DURING
IDLE AND POWER-DOWN MODES
3.3.1 DATA POLLING
3.3.2 READY/BUSY
3.3.4 CHIP ERASE
3.5 SPECIAL FUNCTION REGISTER (SFR)
ADDRESSES
32
33
34
72
4.1 INTRODUCTION
4.4 INSTALLING SDCC
4.6.2 EXECUTING THE PROGRAM ON THE
C8051F120
73
74
74
75
75
76
76
76
77
77

34
35
36
36
37
37
37
37
38
38
38
39
46
78
78
78
78
79
86
91
5.1 APR 9600

5.1.1 FEATURES
5.4.1 MESSAGE MANAGEMENT GENERAL
DESCRIPTION
5.4.2.1 FUNCTIONAL DESCRIPTION OF
RECORDING IN RANDOM ACCESS MODE
PLAYBACK RANDOM ACCESS MODE
5.4.3 TAPE MODE
5.4.3.1 FUNCTION DESCRIPTION OF
RECORDING IN TAPE MODE USING THE AUTO
REWIND OPTION
5.4.3.2 FUNCTION DESCRIPTION OF
PLAYBACK IN TAPE MODE USING AUTO
REWIND OPTION
RECORDING IN TAPE MODE USING THE
NORMAL OPTION
PLAYBACK IN TAPE MODE USING THE
NORMAL OPTION
5.5 MICROPROCESSOR CONTROLLED
MESSAGE MANAGEMENT
5.6 SIGNAL STORAGE
91
91
92
92
93
93
103

106
108
110
95
95
96
96
96
97
98
99
100
101
101
102
102
CONCLUSION
ENHANCEMENT
AND
FUTURE 111
6.1 CONCLUSION
6.2 RESULT
6.3 LIMITATIONS
6.4 FUTURE SCOPE
111
112
112
113
BIBLIOGRAPHY
115
LIST OF TABLES
Tables
Modes
Table 3.11 Baud Rate Comparison for XTAL = 11.0592 MHZ
Page No.
18
30
31
34
35
36
38
39
40
41
42
42
43
43
44
44
44
45
45
46
95
101
108
109
109
109
LIST OF FIGURES
Figures
Fig 2.2 Structure & Configuration of Gas Sensor MQ-6
Fig 2.4 Basic Relay Block with Handsfree
Fig 2.5 Pin Diagram of IC 7805
Fig 2.6 555-Timer-Monostable-Multivibrator
Fig 2.7 555 Monostable-Multivibrator-Operation
Fig 2.8 Complete Circuit structure of Gas & Heat Sensor with
auto dial up logic
Operation
Page No.
11
13
14
16
17
20
20
24
26
27
33
34
39
41
47
49
49
50
82
83
84
85
88
89
93
94
100
103
104
105
LIST OF SYMBOLS
Symbols
Meaning
LED
IC
GSM
PC
DIP
RAM
ROM
I/O
VCC
GND
XTAL
Ppm
MCU
APR
AGC
CMOS
MHz
AC
DC
UART
CPU
BIT
CLK
ANA
Light Emitting Diode

Integrated Chip
Global System Module
Personal Computer
Dual In-line Package
Random Access Memory
Read Only Memory
Input Output
Level 1 Voltage
Ground
Crystal
Parts per million
Micro Controller Unit
Auto Pre Recording
Automatic Gain Control
Complementary Metal Oxide Semiconductor
Mega Hertz
Alternating Current
Direct Current
Universal Asynchronous Receiver-Transmitter
Central Processing Unit
Binary Unit
Clock
Analogue
ABSTRACT
Security is primary concern for everyone. This Project describes a
design of effective security alarm system that can monitor an industry with
different sensors. Gas detection and fire detection can be monitored by the
status of each individual sensor and is indicated with an LED, Buzzer Voice
Recording & Playback Device and dial up logic. These all shows whether the
sensor has been activated and whether the wiring to the sensor is in order. In
this project we show that how we use the telephone as a electronics eye. With
the help of any phone we can know the position of the house. In this logic we
attach some sensor with the telephone and if there is any mishappening at
home then telephone is automatic on and then circuit press the redial button of
the telephone and then telephone dial the pre-dialed number and sense the
voice message to the received end.
The detection alarm is built around the AT89C51 microcontroller from
Atmel. This microcontroller provides all the functionality of the detection
alarm. It also takes care of filtering of the signals at the inputs. A fire sensor
can be connected to the gas sensor alarm. These sensors need to have their
contacts closed when in the inactive state (i.e. normally closed). In addition,
each sensor needs to have its tamper connection wired as well. A power
supply voltage of +5 VDC is available for each sensor at the corresponding
wiring terminals. LEDs indicate the status of the corresponding sensors.
When the alarm has been activated, the LED of the sensor that caused the
alarm will light up and pre recorded message starts to play.
siren, it also dials a mobile number which is already programmed into the
system. A mobile number or a land line number can be programmed into
the system. As this system works on existing telephone line, it can dial the
number even the subscriber is out of station.
terminal voltage regulator is used for voltage regulation. Bridge type full wave
rectifier is used to rectify the ac output of secondary of 230/12V step down
transformer.
CHAPTER - 1
INTRODUCTION
1.1 GENERAL INTRODUCTION
Engineering is not only a theoretical study but it is a implementation of
all we study for creating something new and making things more easy and
useful through practical study. It is an art which can be gained with systematic
study, observation and practice. In the college curriculum we usually get the
theoretical knowledge of industries, and a little bit of implementation
knowledge that how it is works? But how can we prove our practical
knowledge to increase the productivity or efficiency of the industry????
Dont take the chance of becoming victim of carelessness, which is
often accompanied by serious accident. Protect our family and valuables with
this microcontroller based security system that will let us rest our head
knowing that there is anything like gas leakage or fire existing into our home.
The motivation is to facilitate the users to know the state of their homes having
ubiquitous access. The system provides availability due to development of a
low cost system. This system is low cost but very useful for users to know
their home state wherever are located. Home security has been a major issue
where temperature starts raising day by day and everybody wants to take
proper measures to prevent intrusion. There was need to prevent fires and gas
leaks no matter when they are in the house or outside. By using GSM
technology via Dial-Up logic we can help users to supervise their home against
intruders, gas leak and fire only at one product with a low cost.
designed keeping this particular aspect in mind. The security system is made
fool proof to the maximum extent possible. In this project we make use of a
microcontroller as the main controller to control the input and the output that
reach the controller. There is a large scope in the future enhancements that can
be provided along with this project like actuating a fire detection alarm or
sensing a leakage of gas etc.
Generally in any industry, there are several blocks and there is an
administrative block which controls all blocks. If any problem is created in any
one of the blocks, at first the persons in that particular block has to inform to
the administrative block and then the action will be taken. So if we consider a
fire accident in any one of the blocks the person on that incident generally they
makes a call to the administrative block or security block as took over and they
has to call the ambulance, fire station etc. It will be a long time process, so in
the mean the damage may increase in gigantic extent. The most basic fire
protection methods include fire prevention, detection and control. Buildings
should be constructed using fire rated walls, doors, ceilings and floors. The use
of combustible materials in interior furnishing should be kept to a minimum.
There are several types of detection devices. Automatic fire detection systems,
when combined with other elements of an emergency response and evacuation
plan, can significantly reduce property damage, personal injuries, and loss of
life from fire in the work place. Their main function is to quickly identify a
developing fire and alert building occupants and emergency response
personnel before extensive damage transpire. Automatic fire detection systems
do this by using electronic sensors to detect the smoke, heat or flames and
providing an early warning. Heat detectors which respond to heat generated in
the flame stage of a fire and smoke detectors which respond to the particles of
cumbers ion produced in a fire.
A fire alarm control panel, normally referred to as a panel within the
active fire protection industry is central control device for detecting, reporting
and acting on occurrences of fire with in a building. There are two types of
panel's fallen conventional panels and analogue addressable panels. In a
conventional panel, fire detection devices including, but not limited to smoke
detectors, heat detectors and manual call points are joined up with a number
connected to the circuit. When a device on the circuit is activated the panel
recognizes an alarm on that circuit and could be setup to take a number of
actions including directly calling the fire department via an alarm
transportation system. An addressable panel is a more modern type of panel
and has a greater flexibility than a conventional panel. An addressable panel
has a number of loops where a number of devices are to be connected, each
with its own address. Bad experiences with early systems have left the police
reluctant to allow domestic security system to call for assistance directly,
except on high risk situations. Security systems can now be configured to call
telephones in the event of an alarm so that the occupants are nominated care
takers can be alerted before calling the police.
Business and industry today requires security systems that are the fact of
life. Your company simply must have them to protect your employees, your
equipment and sky scrapers themselves. There is only one thing more
important than the selection of the security systems to protect your facilities.
That is why you should consider reliable fire equipment for your security
system requirements. Security and fire protection are closely related to energy
management in so far as they present tractable goals for automated systems. It
has been considered relatively easy for machine based systems to recognize
anomalous activity around the home which could be interpreted as possible
security breaches, accidents or fires. Fire damage, however can be permanent
and involves the entire life of human. Much can be done to minimize the
chance of a fire stating or spreading. Progress in fire technologies has been
substantial over last decade due to advances in sensor, microelectronics and
information technologies, as well as a greater understanding of fire physics.

This paper provides a review of progress in fire detection technologies over the
last decades some problems & a future research efforts related to current fire
detection technologies are discussed.
1.2 ORGANIZATION OF PROJECT

This project design makes use of 8951 microcontroller for interfacing to
various hardware interfaces. Technology today is seeing its heights in all the
areas, especially in the area of Embedded Systems. It is true that every
electronic gadget that is used in daily life right from a PC keyboard to a
refrigerator is an Embedded System. These all itself shows how vastly the
technology is expanding. This design is also one of such application.
The Micro controller which we are using in our Project is 8951
manufactured by ATMEL Corporation. It is a 40 pin DIP plastic packaging
CMOS technology having inbuilt ROM of 4K, RAM of 128 bytes, 32 I/O pins
(of which two I/O pins P3.0 and P3.1 can be used for serial communication
i.e., pins 10 & 11), 2 Timers and 6 Interrupts. It has an inbuilt Crystal
Oscillator generating 12 MHz connected to 18 & 19 pins which is indicated for
speed of 8051. When the Micro Controller is at initial condition or got
switched ON, the I/O pins are at high indicating as input pins. The 40 th pin is
given Vcc supply of +5V and 20th to GND.
Gas sensors work by detecting amounts of specific gases in ppm, or
parts per million. Ppm is a unit of concentration in the immediate surrounding
area. You can calculate percent from ppm by dividing the ppm by 1,000,000
and multiplying by 100. So if you can detect 800ppm of oxygen in the air, the
air is 8% oxygen. (Our atmosphere is more than 20% Oxygen, but this is just
an example). The sensing element for gas sensors is coated with a metal oxide,
and the Figaro models interested in use Tin oxide specifically (SnO 2). When
the heating element receives power, the SnO 2 becomes oxidized and donates
electrons to the Oxygen yielding positively charged SnO2 molecules on the
coating of the sensing element. This situation causes a barrier to electron flow,
increasing resistance of the sensor. When a deoxidizing gas is introduced in the
equation (such as ethanol, or C2H5OH), the amount of available oxygen
decreases. This means that there is less oxygen to accept the donor electrons
from the SnO2 coating, which reduces the resistance of the sensor due to the
SnO2 not being as positively charged. Reduce resistance cause flow of current
and thus output signal goes high.
Security is the condition of being protected against danger or loss. In the
general sense, security is a concept similar to safety. The nuance between the
two is an added emphasis on being protected from dangers that originate from
outside. Individuals or actions that encroach upon the condition of protection
are responsible for the breach of security. The word "security" in general usage
is synonymous with "safety," but as a technical term "security" means that
something not only is secure but that it has been secured. One of the best
options for providing good security is by using a technology named
EMBEDDED SYSTEMS. When people become more and more attach
importance to the quality of life, the security and service is important. Security
has arguably become the prime mover of global politics today. It is the basic
common denominator for any successful society all over the world. Now days
the security system can identify potential hazards to protect human. A typical
intelligent security system consists of intruders, fire, gas, environment sensors
and more variety sensors to be installed.
Monitoring of the security system ensures an effective response to an
electronic activation or in times of personal duress. The response opinions are
customized to suit the individual risk security requirements in cost effective
manner. Monitoring is done through a telephone line and depending on the
security task it will involve a basic digital dialer or a security interface. The
most common method of monitoring is achieved via the basic dialer. This is
for low to medium security risk and is connected to the existing telephone line
through a special socket. The system will communicate when an alarm
condition needs to be reported or when a call is made to test the system. This
test is made as often as required to ensure more or less security. The security
interface provides the same service but it involves a scanning of the existing
telephone line by the telephone company to ensure greater security. Should the
telephone line be damaged accidentally or on purpose the monitoring station
will detect the alarm condition within seconds????
Nowadays trend in network communication leads to replacing the
cables, providing mobility and freedom of movement for the users. The
utilization of wireless techniques has spread its scope on to different
application fields. One of such spheres is industry with the addition of wireless
connectivity to most embedded designs; zones of security will be needed
around each critical system MCU, in addition to the one traditionally
surrounding the gateway to the broader network.
(Source: Atmel)."Beyond the huge cost savings incurred by eliminating
wires, are the continuing costs in maintenance that will be eliminated, as well
as the flexibility that gives the manufacturer who wants to recognize the
factory floor, add new systems and eliminate others. No wires to connect and
disconnect eliminates a lot of costs and will make the factory floor a much
more dynamic environment".
This Project describes a design of effective security alarm system that
can monitor an industry with two different sensors. Fire accident and gas
detection can be monitored by the status of each individual sensor and is
indicated with an LED. This LED shows whether the sensor has been activated
and whether the wiring to the sensor is in order. Obviously, this alarm also has
an input to 'arm' the alarm to control a siren and Auto dialing system.
The gas sensor and fire sensor alarm is built around the AT89C51 micro
controller from Atmel. This micro controller provides all the functionality of
the detection alarm. It also takes care of filtering of the signals at the inputs.
Only after an input has remained unchanged for 30 milliseconds, is this new
signal level passed on for processing by the micro controller program. This
time can be varied by adopting small changes in the source code.
A maximum of 8 sensors can be connected to the 8951but here we only
connected 2 sensors. These sensors need to have their contacts closed when in
the inactive state (i.e. Normally Closed). In addition, each sensor needs to have
its tamper connection wired as well. A power supply voltage of +5 VDC is
available for each sensor at the corresponding wiring terminals. LEDs indicate
the status of the corresponding sensors. When the alarm has been activated, the
LED of the sensor that caused the alarm will light up, or flash in the event of a
cable failure.
When the alarm is armed, the LED 'alarm armed' will flash during the
exit-delay. After the exit-delay, the LED will light continuously. The LED
'alarm triggered LED' flashes during the entry-delay and will turn on
continuously once an actual alarm has been generated. 'Alarm triggered LED
turns off only when the alarm is switched off with key switch Sw1. When an
alarm has taken place, it can be determined afterwards which sensor (or tamper
input) caused the alarm to trigger. The LED 'tamper' lights up when the tamper
input is opened. This LED will also continue to be on until the alarm is
switched off.
siren, it also redials a mobile number which is already in dial list. A mobile
number or a land line number can be fixed for it. As this system works on
existing mobile, it can dial the number even the subscriber is out of station.
Another important feature that is connected to circuit is Single-Chip Voice
Recording & Playback Device. An IC APR9600 is implemented for it. The
APR9600 device offers true single-chip voice recording, non-volatile storage,
and playback capability for 40 to 60 seconds. The device supports both
random and sequential access of multiple messages. Sample rates are userselectable, allowing designers to customize their design for unique quality and
storage time needs. Integrated output amplifier, microphone amplifier, and
AGC circuits greatly simplify system design. The device is ideal for use in
portable voice recorders, toys, and many other consumer and industrial
applications. APLUS integrated achieves these high levels of storage capability
by using its proprietary analog/multilevel storage technology implemented in
an advanced Flash non-volatile memory process, where each memory cell can
store 256 voltage levels. This technology enables the APR9600 device to
reproduce voice signals in their natural form. It eliminates the need for
encoding and compression, which often introduce distortion.
terminal voltage regulator is used for voltage regulation. Bridge type full wave
rectifier is used to rectify the ac output of secondary of 230/12V step down
transformer.
As the operation of microcontroller-based system is inherently based on
the stored program control concept, the software plays a very crucial role. The
relationship between the hardware and software is similar to the relation
between body and soul. One has not a meaningful existence without the other.
The hardware is the body, which is used as the medium of software. In order to
develop the software for microcontroller based system, one must acquire
knowledge about the set of instructions which are used as a building blocks in
writing a program and learn the art of program that is the tools and techniques
of putting instructions together in a logic manner to form a program
implementing the desired operations. The 8051 IDE Assembler + Compiler
development tools are designed to solve the complex problems facing
embedded software developed.
1. 3 PROJECT STATEMENT
Nowadays, most couples leave for work early in the morning and get
back only in the evening. Most people also have to travel to other cities for
their work. When they are away, their house is empty. Therefore case like
leakage of LPG and short circuitry fire or else is easy to occur because the
home owners are not in the house. Our Country India has many such cases and
still going ascending day by day. The based solution is to develop home
security system using a wireless to keeps your house safe from such accidents
and enables you to work in peace.
Based on the events above, the project can be developing to make our
home secure and safe. We never anxious and worried anymore even we leave
the house. So this project is to design and develop a home security system that
can provide security against gas leak, fire and other emergency situation by
alarm via calling to the home owner as there is something suspicious at home.
Today there are a many wireless home security alarm system available in the
market. Some are designed for very high security level protection and some
are basic type. Most of the alarm systems are very expensive and therefore not
affordable by poor or middle class families. Some systems which cheaper in
cost do not provide reliable features like status checking. To provide the public
with a cost effective wireless security system, it is important to design a low
cost system with advanced features which ease the residents' life and benefits
the public and also will decrease the accident rate of India. Besides that, to
develop the system that can monitor gas leakage and fire detector including
control appliances in our home is a good matter. It is important because the
system can be help people through the realization of fully automated home
protections. So this project wills develops and design the home security system
that can control the lamp in the house.
CHAPTER 2
CIRCUIT STRUCTURE
This chapter deals with the general introduction of all the components
used in this project. So we can have a general idea about all the components.
We also have some computer aided instructions and their operation which
will discussed in next chapter.
2.1 GENERAL THEORY

An embedded system can be defined as a computing device that does
a specific focused job. Appliances such as the air-conditioner, VCD player,
DVD player, printer, fax machine, mobile phone etc. are examples of
embedded systems. Each of these appliances will have a processor and special
hardware to meet the specific requirement of the application along with the
embedded software that is executed by the processor for meeting that specific
requirement. The embedded software is also called firm ware. The
desktop/laptop computer is a general purpose computer. You can use it for a
variety of applications such as playing games, word processing, accounting,
software development and so on. In contrast, the software in the embedded
systems is always fixed listed below:
Embedded system does a very specific task; they cannot be
programmed to do different things. Embedded systems have very limited
resources, particularly the memory. Generally, they do not have secondary
storage devices such as the CDROM or the floppy disk. Embedded systems
have to work against some deadlines. A specific job has to be completed
within a specific time. In some embedded systems, called real-time systems,
the deadlines are stringent. Missing a deadline may cause a catastrophe-loss of
life or damage to property. Embedded systems are constrained for power. As
many embedded systems operate through a battery, the power consumption
has to be very low.

Primary components of the electro circuit are as follows which will describe
serially.
AT89C51 Micro controller

Gas & Fire Sensor board
LED array
555 IC
Reset circuit
ALARM
Relays
Crystal oscillator
Auto dialer
Power supply

8051 is one of the most popular micro controllers in use today. Many
derivative micro controller have since been developed that are based on and
compatible with the 8051.Thus, the ability to program an 8051 is an
important skill for anyone who plans to develop products that will take
advantage of micro controller. P89C51 is same as the INTEL 8051 except that
89C51 has internal flash ROM, which can be programmed more than 1000
times.
microcomputer with 4K bytes of Flash Programmable and Erasable Read Only
Memory (PROM). The device is manufactured using Atmels high density
nonvolatile memory technology and is compatible with the industry standard
MCS-51 instruction set and pin out. The on-chip Flash allows the program
memory to be reprogrammed in-system or by a conventional nonvolatile
memory programmer. By combining a versatile 8-bit CPU with Flash on a
monolithic chip, the ATMEL AT89C51 is a powerful microcomputer which
provides a highly flexible and cost effective solution to many embedded
control applications. The AT89C51 provides the following standard features:
4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters,
five vector two-level interrupt architecture, a full duplex serial port, and onchip oscillator and clock circuitry.[2][9]
2.2.2 SENSOR BOARD

The different sensors used in this project are as follows:
Gas Sensor
Fire & Heat Sensor
In this sensor unit we connect 2 sensors, now it is our choice how many
sensors we use.
In the fire sensor we use bimetallic plates to sense fire, when fire touch the
bimetallic plates then plates join together and immediate provide a signal to
the controller. Fire sensor is attached to the IC 555. Here IC 555 work as a
mono stable timer and output signal is available on the pin 3 this signal is
connected to the microcontroller .When fire is on then sensor detect the logic
and immediate provide a signal to the controller.
Gas sensor is a special sensor when gas sensor sense the gas then gas
sensor again provides a small signal to the microcontroller via IC 555.
In the gas sensor interface we use gas sensor as a input logic. We attach one IC
555 as with this sensor. Here IC 555 works as a monostable multivibrator
timer. Sensor output is connected to the IC 555 pin no 2 via NPN transistor.
Pin no 2 is a negative triggered IC. When sensor activate then positive output
is available and this positive output is converted into negative with the help of
the NPN transistor. Output of the NPN transistor is now connected to the pin
no 2 of the IC 555. Pin no 4 and 8 of the IC 555 is connected to the positive
supply. Pin no 1 is connected to the ground pin. Pin no 7 is the output pin. Pin
no 6 and 7 is the time constant pin. Pin no 6 and 7 provide a time constant
option. When IC 555 works then output is available on the pin no 3. Now this
output is switching by the further NPN transistor. One LED is also connected
to the transistor circuit. Output of the NPN transistor is available on the
collector point. This output from the collector of NPN is now connected to the
microcontroller pin no 1 which is port p1.0. Pin no 40 of the controller is
connected to the positive supply. We supply a 5 volt for supply.
These sensors firstly connected with the monostable circuit and then
connected to the microcontroller interface. In the monostable circuit we use IC
555 as a monostable circuit.
Output of the IC 555 is connected to the microcontroller circuit. Here

we use ATMEL microcontroller. In the ATMEL series many controllers are
available and the entire controllers are compatible with each other. Here we
use IC 89s51 or 89c2051 controller. IC 89c2051 is a 20 pin controller and
89c51 is a 40 pin controller. So we use AT89c51 microcontroller for multi
function.
2.3 LED ARRAY

Light-emitting diodes are elements for light signalization in
electronics. They are manufactured in different shapes, colors and sizes. For
their low price, low consumption and simple use, they have almost completely
pushed aside other light sources- bulbs at first place. They perform similar to
common diodes with the difference that they emit light when current flows
through them.
2.4 DRIVER CIRCUIT
A driver circuit is used for driving the LEDs. An open-drain output can
drive an LED. If either of the input to the driver circuit is LOW, the
corresponding n-channel transistors are off and the LED is off. When both the
inputs are High, both transistors are ON. Then the output is LOW.
2.5 MQ-6 GAS SENSOR
Sensitive material of MQ-6 gas sensor is SnO2, which with lower
conductivity in clean air. When the target combustible gas exist, the sensors
conductivity is higher along with the gas concentration rising. Please use
simple electro circuit, Convert change of conductivity to correspond output
signal of gas concentration. MQ-6 gas sensor has high sensitivity to Propane,
Butane and LPG, also response to Natural gas. The sensor could be used to
detect different combustible gas, especially Methane; it is with low cost and
suitable for different application.[7]
Good sensitivity to Combustible gas in wide range
High sensitivity to Propane, Butane and LPG
Long life and low cost
Simple drive circuit
2.5.2 APPLICATIONS
Domestic gas leakage detector
Industrial Combustible gas detector
Portable gas detector

Structure and configuration of MQ-6 gas sensor is shown as Fig. 3,
sensor composed by micro AL2O3 ceramic tube, Tin Dioxide (SnO2) sensitive
layer, measuring electrode and heater are fixed into a crust made by plastic and
stainless steel net. The heater provides necessary work conditions for work of
sensitive components. The enveloped MQ-4 has 6 pin, 4 of them are used to
fetch signals, and other 2 are used for providing heating current.
Fig 2.2 Structure & Configuration of

Gas Sensor MQ-6
Below fig 2.3 is basic test circuit of the sensor. The sensor needs to be put 2
voltage, heater voltage (VH) and test voltage (VC). VH used to supply certified
working temperature to the sensor, while VC used to detect voltage (VRL) on
load resistance (RL) whom is in series with sensor. The sensor has light
polarity, VC need DC power. VC and VH could use same power circuit with
precondition to assure performance of sensor. In order to make the sensor with
better performance, suitable RL value is needed.
Power of Sensitivity body (Ps): PS=Vc2Rs/ (RS+RL) 2

Resistance of Sensor (RS):
RS = (VCC/VRL-1) RL.

Water Condensation
Indoor conditions, slight water condensation will affect sensors
performance lightly. However, if water condensation on sensors surface and
keep a certain period, sensor sensitivity will be decreased.

Used in high gas concentration
No matter the sensor is electrified or not, if long time placed in high gas
concentration, if will affect sensors characteristic.
Long time storage
The sensors resistance produce reversible drift if its stored for long time
without electrify, this drift is related with storage conditions. Sensors should
be stored in airproof without silicon jell bag with clean air. For the sensors
with long time storage but no electrify, they need long aging time for stability
before using.
Long time exposed to adverse environment
No matter the sensors electrified or not, if exposed to adverse
environment for long time, such as high humidity, high temperature, or high
pollution etc, it will affect the sensors performance badly.
Vibration
Continual vibration will result in sensors down-lead response then
rupture. In transportation or assembling line, pneumatic
screwdriver/ultrasonic welding machine can lead this vibration.
Concussion
If sensors meet strong concussion, it may lead its lead wire disconnected.
Usage
For sensor, handmade welding is optimal way. If use wave crest welding
should meet the following conditions:
Soldering flux: Rosin soldering flux contains least chlorine
Speed: 1-2 Meter/ Minute

Warm-up temperature10020
Welding temperature25010
1 time pass wave crest welding machine.
If disobey the above using terms, sensors sensitivity will be reduced.
2.6 RESET CIRCUIT
For proper system operation, the hardware design of a state machine
should ensure that it enters a known initial state on power-up. Most systems
have a RESET signal that is asserted during power-up. If a state machine is
built using discrete flip-flops with asynchronous preset and clear inputs, the
RESET signal can be applied to these inputs to force the machine in to the
desired initial state.
2.7 ALARM
An ALARM is used to indicate detection in home as well as in industry.
When Gas is detected by the heat detector and the buzzer is activated. Same as
in case of heat or fire, when heat is detected by the heat detector and the
buzzer is activated.
2.8 RELAY
A relay is an electrically controllable switch widely used in industrial
controls, automobiles and appliances. A relays are widely used electronics
circuits as remote control LED mechanical switches turn a sequence of events
ON and OFF. Relays are provided some mechanical contacts and with their
help they control operation of other circuits. The terminology of both relays
and switches is identical that is similar to switches. Output of the controller is
connected to the relay driver circuit. Relay driver circuit basically provide a ON
OFF signal in single pulse. We connect these pulses to the hands free of the cell
phone. When hands free of the telephone is activate through the microcontroller
then phone is automatic on and last redial number is dialed. When last number is
redialed then after call voice processor is on automatically and voice signal is
transfer to the mobile phone through mike.
To drive a relay we use two transistor circuits. One is NPN and second is
PNP transistor. Output from the controller is connected to the base point of the
PNP transistor through 1k ohm resistor. Emitter of the PNP transistor is
connected to the positive supply. Collector is connected to the base of the NPN
transistor. Collector of the NPN transistor is connected to the relay coil. This
relay coil presses the hands free coil and redials the last number directly. User
can treat it as a warning message to go to home or industry if owner is out of
station. Once the call is activate then sound is transfer from the voice processor
to the mobile phone. Here we use IC APR 9600. With the help of this IC we
produce up to 6 sounds and it is possible to send a different sound on different
application with the help of the mobile phone. When the relay is on and activates
the last number redial the after few second voice processor pin is on and play a
voice message this message is transfer to the phone automatically.
Fig 2.4 Basic Relay Block with

Handsfree
2.9 EXHAUST FAN
There is also an exhaust fan installed in the circuitry, which is activated
by the IC 555 monostable IC. If there is too much concentration of gas in
premises, and gas sensor detects it, microcontroller also give command to
activate exhaust fan so that the room get reduce concentration of the Gas before
the concerned authorities arrive there. However in case of Fire/Heat Sensor, it
will remain in its idle state of OFF.
To stabilize the frequency of the internal oscillator we have to add
an external oscillator of frequency 11.0592 MHZ. Certain crystalline
materials, namely Rochelle salt, quartz and tourmaline exhibit the
piezoelectric effects are called piezoelectric crystals. Of the various
piezoelectric crystals, quartz is more commonly used because it is inexpensive
and readily available in nature.
2.11 AUTO DIALER
A telephone is used in the system in order to convey the alert message to
the concerned authorities. In the system, telephone plays a vital role, because
even if the alarm is not heard by anyone present in the vicinity of the system,
the message can be intimated to the required destination by the number which
is already stored in it. This helps to improve out security level by use of electro
circuit.
2.12 POWER SUPPLY
The input to the circuit is applied from the regulated power supply. The
AC input i.e., 230V from the mains supply is step down by the transformer
to 12V and is fed to a rectifier. The output obtained from the rectifier is a
pulsating DC voltage. So in order to get a pure DC voltage, the output voltage
from the rectifier is fed to a filter to remove any AC components present
even after rectification. Now, this voltage is given to a voltage regulator 7805
to obtain a pure constant dc voltage.
2.13 IC 7805
7805 is a voltage regulator integrated circuit. It is a member of 78xx
series of fixed linear voltage regulator ICs. The voltage source in a circuit may
have fluctuations and would not give the fixed voltage output. The voltage
regulator IC maintains the output voltage at a constant value. The xx in 78xx
indicates the fixed output voltage it is designed to provide. 7805 provides +5V
regulated power supply. Capacitors of suitable values can be connected at
input and output pins depending upon the respective voltage levels.[8]
2.13.1 PIN DIAGRAM
7805
Fig 2.5 Pin Diagram of IC

Table 2.1 shows the pin description of IC 7805.
Pin
No
1
2
3
Function
Name
Input voltage (5V-18V)

Ground (0V)
Regulated output; 5V (4.8V-5.2V)
Input
Ground
Output

Digital voice recording chips with different features and coding
technology for speech compression and processing are available on the market
from a number of semiconductor manufacture. Advanced chips such as Texas
instrument TMS320C31 can implement various voice processing algorithms
including code-excited linear prediction, adaptive differential pulse code
modulation. A law (specified by California Council for international trade),
micro law (specified by Bell telephone) and vector sum excited linear
prediction. On the other hand APR 9600 single chip voice recorder and
playback device from APLUS integrated circuits makes use of a proprietary
analogue storage technique implemented using flash non-volatile memory
process in which each cell is capable of storing up to 256 voltage levels. This
technology enables the APR9600 to reproduce voice signals in the natural
form. The APR 9600 is a good stand lone voice recorder or playback IC with
non volatile storage and playback capability from 5 to 60 seconds. It can
record and play multiple messages at random or in sequential mode. The user
can select sample rates with consequent quality and recording time trade off.
Microphone amplifier, automatic gain control (AGC) circuits, internal anti
aliasing filter, integrated output amplifier and message management are some
of the features of the APR 9600. Complete chip management is accomplished
through the device control and message control blocks. Voice signal from the
microphone is fed into the chip through a differential amplifier. It is further
amplified by connecting Analogue-Out (pin 21) to Analogue in (pin 20) via an
external DC blocking capacitor C1. A bias signal is applied to the microphone
and to save power during playback, the ground return of this bias network can
be connected to the normally open side of the record switch. Both Mike in and
Mike Ref (pins 18 and 19) must be coupled to the microphone network
through capacitors. Recording signal from the external source can also be fed
directly into the chip using Ana-In (pin 20), but the connection between Ana-in
( pin 20) and Ana-out (pin 21) is still required for playback. An internal antialiasing filter automatically adjusts its response according to the sampling
frequency selected. Then the signal is processed into the memory array
through a combination of the sample and hold circuits and analogue read/write
circuit. The incoming voice signals are sampled and the instantaneous voltage
samples are stored in the non-volatile flash memory cells in the 8 bit binary
encoded format. During playback, the stored signals are retrieved from the
memory, smoothed to form a continuous signal level at the speaker terminals
SP+ and SP- ( pins 14 and 15 respectively) is at about 12mw power into 16
ohm impedance. The output from pin 14 (SP+) is further amplified by the low
power amplifier using LM386 (IC2) as shown in the figure. The recorded
message is reproduced into speaker LS1. An internal oscillator provides
sampling clock to the APR 9600. The frequency of the oscillator and sampling
rate depend on the value of resistor R12 connected across the OSCR (pin 7) of
the chip and the ground.[6][12]
The APR9600 chip supports the following message modes. Random
access mode with 2, 4, 8 message within the total recording time. Tape mode
with two options: Auto rewind and Normal operation. The modes are defined
by pins 24, 25 and 9 cannot be mixed. An important feature of the APR9600
chip is indication of changes in the device status through beeps superimposed
on the device output: for example, the start of recording is indicated by a beep,
so the person can now start speaking into the microphone. This feature is
enabled by making pin 11 high.
A monostable multivibrator (MMV) often called a one-shot
multivibrator, is a pulse generator circuit in which the duration of the pulse is
determined by the R-C network, connected externally to the 555 timer. In such
a vibrator, one state of output is stable while the other is quasi-stable
(unstable). For auto-triggering of output from quasi-stable state to stable state
energy is stored by an externally connected capacitor C to a reference level.
The time taken in storage determines the pulse width. The transition of output
from stable state to quasi-stable state is accomplished by external triggering.
The schematic of a 555 timer in monostable mode of operation is shown in
figure 2.6.[1][3]
Fig2.6 555-Timer-MonostableMultivibrator
2.15.1 MONOSTABLE MULTIVIBRATOR CIRCUIT DETAILS
Pin 1 is grounded. Trigger input is applied to pin 2. In quiescent
condition of output this input is kept at + VCC. To obtain transition of output
from stable state to quasi-stable state, a negative-going pulse of narrow width
(a width smaller than expected pulse width of output waveform) and
amplitude of greater than + 2/3 VCC is applied to pin 2. Output is taken from
pin 3. Pin 4 is usually connected to + VCC to avoid accidental reset. Pin 5 is
grounded through a 0.01 u F capacitor to avoid noise problem. Pin 6
(threshold) is shorted to pin 7. A resistor RA is connected between pins 6 and 8.
At pins 7 a discharge capacitor is connected while pin 8 is connected to supply
VCC.
2.15.2 555 IC MONOSTABLE MULTIVIBRATOR OPERATIONS
Operation
Fig2.7 555 Monostable-Multivibrator-
For explaining the operation of timer 555 as a monostable multivibrator,

necessary internal circuitry with external connections are shown in figure
The operation of the circuit is explained below:
Initially, when the output at pin 3 is low i.e. the circuit is in a stable
state, the transistor is on and capacitor- C is shorted to ground. When a
negative pulse is applied to pin 2, the trigger input falls below +1/3 VCC, the
output of comparator goes high which resets the flip-flop and consequently the
transistor turns off and the output at pin 3 goes high. This is the transition of
the output from stable to quasi-stable state, as shown in figure. As the
discharge transistor is cutoff, the capacitor C begins charging toward
+VCC through resistance RA with a time constant equal to RAC. When the
increasing capacitor voltage becomes slightly greater than +2/3 VCC, the output
of comparator 1 goes high, which sets the flip-flop. The transistor goes to
saturation, thereby discharging the capacitor C and the output of the timer goes
low, as illustrated in figure 2.7.
Thus the output returns back to stable state from quasi-stable state.
The output of the Monostable Multivibrator remains low until a trigger pulse is
again applied. Then the cycle repeats. Trigger input, output voltage and
capacitor voltage waveforms are shown in figure.
2.15.3 MONOSTABLE MULTIVIBRATOR DESIGN USING 555 TIMER IC
The capacitor C has to charge through resistance RA. The larger the time
constant RAC, the longer it takes for the capacitor voltage to reach +2/3VCC.
In other words, the RC time constant controls the width of the output pulse.
The time during which the timer output remains high is given as:
tp =1.0986RAC,
where RA is in ohms and C is in farads.
The pulse width of the circuit may range from micro-seconds to many
seconds. This circuit is widely used in industry for many different timing
applications.

On power up, pin 23 is pulled low through resistor R7 to enable the
device for operation. Toggling this pin by switch S9 also resets several
message management features. Pin no 27 is pulled low to enable recording and
it is pulled high for playback. To start recording playback switch the

appropriate trigger pin as described in the circuit. Glowing of the LED
indicates that the device is busy and no commands can be currently accepted.
The LED is driven by PNP transistor T1 which is connected to pin 10 of the
chip. LED2 indicates recording in each individual memory segment. It is
driven by pin 22 through transistor.

Below the Fig 2.8 shows the final implemented electro circuit of
Gas & Heat Sensor along with auto dial up logic and voice recording and
playback device APR. The complete explained description of circuit is as
follows:
Firstly we ON the Power supply of 230V AC to provide to the
circuit. The AC is then step down by transformer to 12V, which is then
used for circuit. The 12V AC is rectified using bridge rectifier to 9V DC
supply. Now as per the requirement we certainly use 9V and 5V DC
supply. To remove out the ripples came during rectification we applied
filter circuit which block ripples to move in forward direction. For 9V
supply we use direct after filter circuit & for the 5V we add the IC 7805
as voltage regulator. After IC 7805 we again filter ripples present if any.
Now the power circuitry is completed.
Before starting from any one test we will reset the whole circuit last
configuration for better results. Let us take Gas Sensor firstly, if we place
sensor in the place of leakage the inner circuit of MQ-6 sensor will short
circuit by the concentration level above than 8 ppm, which as the result
give trigger input to IC 555. Trigger input is applied to pin 2. In quiescent
condition of output this input is kept at + VCC. To obtain transition of
output from stable state to quasi-stable state, a negative-going pulse of
narrow width (a width smaller than expected pulse width of output
waveform) and amplitude of greater than + 2/3 VCC is applied to pin 2.
Output is taken from pin 3, which is applied to Microcontroller 8951 IC.
At the same time a exhaust fan is given ON signal by IC 555 for Gas
Sensor & fan starts exhausting gas from ambient place. Microcontroller
port 3.3 is for Gas Sensor output. As 8951 is coded for it, it then sends
signal to the relay circuitry & APR for play recording message. Relay
that already connected to hands free will redial the last call or concerned
someone approaches there, chances of accident can be easily eliminated.
Along with dial up logic & message management, theres implementation

of Buzzer & LED in the circuit which will ON as there is any type of
detection so the person nearby can watch & hear & safe lives by an
unexpected mishaps.
Talking about Heat Sensor now, in case of short circuits at homes,
industries etc there arise high flames of fire and also there is some places
where excess of heat is too dangerous. Heat sensor element senses it n
give signal to triggered input IC 555. The IC 555 output is now connected
to port 3.2 of IC 8951. The main difference here is that the exhaust fan
will not work during heat sensing case. The rest working of
Microcontroller will be the same. As Microcontroller 8951 is coded for it,
it then sends signal to the relay circuitry & APR for play recording
message. Relay that already connected to hands free will redial the last
call or concerned authorities of home, industry, hotel etc. APR will play
pre recorded message so the information is sent to owner & if within time
limit someone approaches there, chances of accident can be easily
eliminated.
This is all about how stuff works. !!
CHAPTER 3
3.1.1 FEATURES
Compatible with MCS-51 Products

4K Bytes of In-System Reprogrammable Flash Memory
Endurance: 1,000 Write/Erase Cycles
RAM is 128 bytes.
2.7V to 6V Operating Range.
Fully Static Operation: 0 Hz to 24 MHz
128*8-bit Internal RAM.
32 Programmable I/O Lines.
Two 16-bit Timer/Counters.
Six Interrupt Sources.
Programmable Serial UART Channel.
Low power Idle and Power-down Modes
Three Level Program Memory Lock
3.1.2 DESCRIPTION
microcomputer with 4K bytes of Flash Programmable and Erasable Read Only
Memory (PROM). The device is manufactured using Atmels high density
nonvolatile memory technology and is compatible with the industry standard
MCS-51 instruction set and pin out. The on-chip Flash allows the program
memory to be reprogrammed in-system or by a conventional nonvolatile
memory programmer. By combining a versatile 8-bit CPU with Flash on a
monolithic chip, the ATMEL AT89C51 is a powerful microcomputer which
provides a highly flexible and cost effective solution to many embedded
control applications. The AT89C51 provides the following standard features:
4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters,
five vector two-level interrupt architecture, a full duplex serial port, and onchip oscillator and clock circuitry.
In addition, the AT89C51 is designed with static logic for operation
down to zero frequency and supports two software selectable power saving
modes. The idle mode stops the CPU while allowing the RAM, timer/counters,
serial port and interrupt system to continue functioning. The Power down
Mode saves the RAM contents but freezes the oscillator disabling all other
chip functions until the next hardware reset.

Figure 3.1 shows the architecture of AT89C51 Microcontroller

AT89C51 is an 8-bit microcontroller and belongs to Atmel's 8051
family. ATMEL 89C51 has 4KB of Flash programmable and erasable read
only memory (PEROM) and 128 bytes of RAM. It can be erased and program
to a maximum of 1000 times.
In 40 pin AT89C51, there are four ports designated as P1, P2, P3 and P0.
All these ports are 8-bit bi-directional ports, i.e., they can be used as both input
and output ports. Except P0 which needs external pull-ups, rest of the ports
have internal pull-ups. When 1s are written to these port pins, they are pulled
high by the internal pull-ups and can be used as inputs. These ports are also bit
addressable and so their bits can also be accessed individually.
Port P0 and P2 are also used to provide low byte and high byte addresses,
respectively, when connected to an external memory. Port 3 has multiplexed
pins for special functions like serial communication, hardware interrupts, timer
inputs and read/write operation from external memory. AT89C51 has an inbuilt
UART for serial communication. It can be programmed to operate at different
baud rates. Including two timers & hardware interrupts, it has a total of six
interrupts.
3.2.1 VCC
Pin 40 provides supply voltage to the chip. The voltage source is +5V.
3.2.2 GND
Pin 20 of 8951 is connected to ground.
3.2.3 PORT 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port
each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins
can be used as high impedance inputs. Port 0 may also be configured to be the
multiplexed low order address/data bus during accesses to external program
and data memory. In this mode P0 has internal pull-ups. Port 0 also receives
the code bytes during Flash programming, and outputs the code bytes during
program verification.
External pull-ups are required during program verification.
3.2.4 PORT 1
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1
output buffers can sink/source four TTL inputs. When 1s are written to Port 1
pins they are pulled high by the internal pull-ups and can be used as inputs. As
inputs, Port 1 pins that are externally being pulled low will source current (IIL)
because of the internal pull-ups. Port 1 also receives the low-order address
bytes during flash programming and verification.
3.2.5 PORT 2
inputs, Port 2 pins that are externally being pulled low will source current (IIL)
because of the internal pull-ups. Port 2 emits the high-order address byte
during fetches from external program memory and during accesses to external
data memory that uses 16-bit addresses (MOVX @ DPTR). In this application
it uses strong internal pull-ups when emitting 1s. During accesses to external
data memory that uses 8-bit addresses (MOVX @ RI); Port 2 emits the
contents of the P2 Special Function Register. Port 2 also receives the high
order address bits and some control signals during Flash programming and
verification.
Pin
No
1
2
3
4
5
6
7
8
9
10
Input
Function
Name
8 bit input/output port (P1) pins
Reset pin; Active high

(receiver) for serialRx D
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
Reset
bitP3.0
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
communication
Output (transmitter) for serial
Tx D
communication
External interrupt 1
Int0
External interrupt 2
Int1
Timer1 external input
T0
Timer2 external input
T1
Write to external data memory. Write
Read from external data
Read
memory.
P3.1
P3.2
input/output P3.3
port (P3) pins P3.4
P3.5
P3.6
P3.7
Crystal 2
Crystal 1
Ground (0V).
Ground
P2.0/ A8
P2.1/ A9
8 bit input/output port (P2) pins
High-order address bits when interfacing with external P2.2/ A10
memory.
P2.3/ A11
P2.4/ A12
P2.5/ A13
P2.6/ A14
Quartz crystal oscillator (up to 24 MHz).
P2.7/ A15
Program store enable; Read from external program
PSEN
memory.
Address Latch Enable
ALE
Program pulse input during Flash programming
Prog
External Access Enable; VCC for internal program
EA
executions
Programming enable voltage; 12V (during Flash
VPP
programming)
8 bit input/output port (P0) pins.
P0.7/ AD7
P0.6/ AD6
Low-order address bits when interfacing with external P0.5/ AD5
memory.
P0.4/ AD4
36
37
38
39
40
Supply Voltage; 5V (up to 6.6V)
P0.3/ AD3
P0.2/ AD2
P0.1/ AD1
P0.0/ AD0
Vcc
3.2.6 PORT 3
inputs, Port 3 pins that are externally being pulled low will source current (I IL)
because of the pull-ups. Port 3 also serves the functions of various special
features of the AT89C51 as listed below:
Port 3 also receives some control signals for Flash programming and
verification.
3.2.7 RST
Reset input. A high on this pin for two machine cycles while the
oscillator is running resets the device.

The alternate functions of port 3 of 8951 are as follows in table 3.2
Port Pin
Alternate Functions
P3.0
RXD (serial input port)
P3.1
TXD (serial output port)
P3.2
INT 0 (external interrupt 0)
P3.3
INT 1 (external interrupt 1)
P3.4
T0 (timer 0 external input)
P3.5
T1 (timer 1 external input)
P3.6
WR (external data memory write strobe)
P3.7
RD (external data memory read strobe)
3.2.9 ALE/PROG
Address Latch Enable output pulse for latching the low byte of the
address during accesses to external memory. This pin is also the program pulse
input (PROG) during Flash programming. In normal operation ALE is emitted
at a constant rate of 1/6 the oscillator frequency, and may be used for external
timing or clocking purposes. Note, however, that one ALE pulse is skipped
during each access to external Data Memory. If desired, ALE operation can be
disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active
only during a MOVX or MOVC instruction. Otherwise, the pin is weakly
pulled high. Setting the ALE-disable bit has no effect if the microcontroller is
in external execution mode.
3.2.10 PSEN
Program Store Enable is the read strobe to external program memory.

This is an output pin. PSEN stands for program store enable. In an 8031based system in which an external ROM holds the program code, this pin is
connected to the OE pin of the ROM
When the AT89C51 is executing code from external program memory,
PSEN is activated twice each machine cycle, except that two PSEN activations
are skipped during each access to external data memory.
3.2.11 EA/VPP
External Access Enable. EA must be strapped to GND in order to enable
the device to fetch code from external program memory locations starting at
0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will
be internally latched on reset. EA should be strapped to VCC for internal
program executions. This pin also receives the 12-volt programming enable
voltage (VPP) during Flash programming, for parts that require 12-volt VPP.
3.2.12 XTAL 1
Input to the inverting oscillator amplifier and input to the internal clock
operating circuit.
3.2.13 XTAL 2
Output from the inverting oscillator amplifier.
XTAL 1 and XTAL 2 are the input and output, respectively, of an inverting
amplifier which can be configured for use as an on-chip oscillator, as shown in
Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the
device from an external clock source, XTAL2 should be left unconnected while
XTAL1 is driven as shown in Figure 3.4.There are no requirements on the duty
cycle of the external clock signal, since the input to the internal clocking
circuitry is through a divide-by-two flip-flop, but minimum and maximum
voltage high and low time specifications must be observed.
3.2.15 IDLE MODE
In idle mode, the CPU puts itself to sleep while all the on chip
peripherals remain active. The mode is invoked by software. The content of
the on-chip RAM and all the special functions registers remain unchanged
during this mode. The idle mode can be terminated by any enabled Interrupt or
by hardware reset. It should be noted that when idle is terminated by a hard
Hardware reset, the device normally resumes program execution, from where
it left off, up to two machine cycles before the internal reset algorithm takes
control. On-chip hardware inhibits access to internal RAM in this event, but
access to the port pins is not inhibited. To eliminate the possibility of an

unexpected write to a port pin when Idle is terminated by reset, the instruction
following the one that invokes Idle should not be one that writes to a port pin
or to external memory.
3.2.16 STATUS OF EXTERNAL PINS DURING IDLE AND POWERDOWN MODES

During the 2 modes, idle & power, the status of external pins are
described in table 3.3.
Mode
Program
Memory
ALE
Idle
Internal
Data
Data
Data
Idle
External
Float
Data
Address Data
PSEN PORT0
PORT1 PORT2 PORT3

Data
Power-down Internal
Data
Data
Data
Data
Power-down External
Float
Data
Data
Data
Table 3.3 Status of External Pins during Idle and PowerDown Modes

In the power down mode the oscillator is stopped, and the instruction
that invokes power down is the last instruction executed. The on-chip RAM
and Special Function Registers retain their values until the power down mode
is terminated. The only exit from power down is a hardware reset. Reset
redefines the SFRs but does not change the on-chip RAM. The reset should not
be activated before VCC is restored to its normal operating level and must be
held active long enough to allow the oscillator to restart and stabilize.
The AT89C51 is normally shipped with the on-chip Flash memory array
in the erased state (that is, contents = FFH) and ready to be programmed. The
programming interface accepts either a high-voltage (12-volt) or a low-voltage
(VCC) program enable signal. The low-voltage programming mode provides a
convenient way to program the AT89C51 inside the users system, while the
high-voltage programming mode is compatible with conventional third-party
Flash or EPROM programmers.
The AT89C51 is shipped with either the high-voltage or low-voltage

programming mode enabled. The respective top-side marking and device
signature codes are listed in the following table 3.4.
The AT89C51 code memory array is programmed byte-by-byte in either
programming mode. To program any non-blank byte in the on-chip Flash
Memory, the entire memory must be erased using the Chip Erase Mode.

On the chip are three lock bits which can be left un-programmed (U) or
can
be
programmed
VPP = 12V
VPP = 5V
(P)
to
obtain
the
Top-side
additional
Mark
AT89C51
AT89C51
features
listed in the
xxxx
xxxx-5
table
below:
Yyww
yyww
When lock
bit 1 is
Signature
(030H)
= 1EH (030) = 1EH
(031H)
= 51H (031) = 51H
(032H)
=F FH (032) = 05H
programmed, the logic level at the EA pin is sampled and latched during reset.
If the device is powered up without a reset, the latch initializes to a random
value, and holds that value until reset is activated. It is necessary that the
latched value of EA be in agreement with the current logic level at that pin in
order for the device to function properly.

Program Lock
Bits
MODE LB1
LB2
LB3
Protection Type
No program lock features
MOVC instructions executed from

external program memory are disabled
from
fetching code bytes from internal
memory, EA is sampled and latched on
reset,
and further programming of the Flash is
disabled
Same as mode 2, also verify is disabled
Same as mode 3,
execution is disabled
also
external
The above figure 3.5 signifies the lock bit protection modes
of 8951.

Before programming the AT89C51, the address, data and control signals
should be set up according to the Flash programming mode table and Figures.
To program the AT89C51, take the following steps.
Input the desired memory location on the address lines.
Input the appropriate data byte on the data lines.
Activate the correct combination of control signals.
Raise EA/VPP to 12V for the high-voltage programming mode.
Pulse ALE/PROG once to program a byte in the Flash array or the lock
bits
The byte-write cycle is self-timed and typically takes no more than 1.5 ms.
Repeat steps 1 through 5, changing the address and data for the entire array or
until the end of the object file is reached.
3.3.1 DATA POLLING

The AT89C51 features Data Polling to indicate the end of a write cycle.
During a write cycle, an attempted read of the last byte written will result in
the complement of the written datum on PO.7. Once the write cycle has been
completed, true data are valid on all outputs, and the next cycle may begin.
Data Polling may begin any time after a write cycle has been initiated.
3.3.2 READY/BUSY
The progress of byte programming can also be monitored by the
RDY/BSY output signal. P3.4 is pulled low after ALE goes high during
programming to indicate BUSY. P3.4 is pulled high again when programming
is done to indicate READY.

If lock bits LB1 and LB2 have not been programmed, the programmed
code data can be read back via the address and data lines for verification. The
lock bits cannot be verified directly. Verification of the lock bits is achieved by
observing that their features are enabled.
3.3.4 CHIP ERASE
The entire Flash array is erased electrically by using the proper

combination of control signals and by holding ALE/PROG low for 10 ms. The
code array is written with all 1s. The chip erase operation must be executed
before the code memory can be re-programmed.

The signature bytes are read by the same procedure as a normal
verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7
must be pulled to a logic low. The values returned are as following table 3.6.
(030H) = 1EH indicates manufactured by Atmel
(031H) = 51H indicates 89C51
(032H) = FFH indicates 12V programming
(032H) = 05H indicates 5V programming

Every code byte in the Flash array can be written and the entire array
can be erased by using the appropriate combination of control signals. The
write operation cycle is self timed and once initiated, will automatically time
itself to completion. All major programming vendors offer worldwide support
for the Atmel microcontroller series.

Figure 3.7 shows the addresses of Special Function Register.
ACC
B
ACCUMULATOR
B REGISTER
0E0H
0F0H
PSW
SP
DPTR
DPL
DPH
P0
P1
P2
P3
TMOD
TCON
TH0
TLO
TH1
TL1
SCON
SBUF
PCON
PROGRAM STATUS WORD

STACK POINTER
DATA POINTER 2 BYTES
LOW BYTE OF DPTR
HIGH BYTE OF DPTR
PORT0
PORT1
PORT2
PORT3
TIMER/COUNTER
MODE
CONTROL
TIMER
COUNTER
CONTROL
TIMER 0 HIGH BYTE
TIMER 0 LOW BYTE
TIMER 1 HIGH BYTE
TIMER 1 LOW BYTE
SERIAL CONTROL
SERIAL DATA BUFFER
POWER CONTROL
0D0H
81H
82H
83H
80H
90H
0A0H
0B0H
89H
88H
8CH
8AH
8DH
8BH
98H
99H
3.5.1 TMOD (TIMER MODE) REGISTER
Both timers are the 89c51 share the one register TMOD. 4 LSB bit for
the timer 0 and 4 MSB for the timer 1. In each case lower 2 bits set the mode
of the timer, Upper two bits set the operations.
3.5.1.1 GATE
Gating control when set. Timer/counter is enabled only while the INTX
pin is high and the TRx control pin is set. When cleared, the timer is enabled
whenever the TRx control bit is set
3.5.1.2 C/T
Timer or counter selected cleared for timer operation (input from
internal system clock)
M1
M0
Mode bit 1
Mode bit 0
M1
M0
MODE
OPERATING
MODE
13
BIT
TIMER/MODE
16 BIT TIMER
MODE
8 BIT AUTO
RELOAD
SPLIT TIMER
MODE
3.5.2 PSW (PROGRAM STATUS WORD)

Below are the contents of PSW in figure 3.6 & details in table 3.9
CY
AC
PSW.7
PSW.6
F0
PSW.5
RS1
PSW.4
RS0
PSW.3
0V
PSW.2
--
PSW.1
PSW.0
CARRY FLAG
AUXILIARY
CARRY
AVAILABLE
FOR THE USER
FRO GENERAL
PURPOSE
REGISTER
BANK
SELECTOR BIT
1
REGISTER
BANK
SELECTOR BIT
0
OVERFLOW
FLAG
USER
DEFINABLE
BIT
PARITY FLAG
SET/CLEARED
BY HARDWARE
3.5.3 PCON POWER CONTROL REGISTER

Address: 87H (not bit addressable)
SMOD Serial mode bit used to determine the baud rate with Timer 1.
Baud Rate
If SMOD = 0 then N = 384. If SMOD = 1 then N = 192. TH1 is the high

byte of timer 1 when it is in 8-bit auto reload mode.
GF1 and GF0 are General purpose flags not implemented on the
standard device PD is the power down bit. Not implemented on the standard
device IDL activate the idle mode to save power. Not implemented on the
standard device.
D7
SMOD
D6
X
D5
x
D4
x
D3
GF1
D2
GF0
D1
PD
D0
IDL
There are two ways to increase the baud rate of data transfer in the 8051
To use a higher frequency crystal
To change a bit in the PCON register
PCON register is an 8 bit register. Of the 8 bits, some are unused, and some
are used for the power control capability of the 8051. The bit which is used
for the serial communication is D7, the SMOD bit. When the 8051 is powered
up, D7 (SMOD BIT) OF PCON register is zero. We can set it to high by
software and thereby double the baud rate. Table 3.11 shows the Baud Rate
comparison for XTAL
TH1
(DECIMAL)
-3
-6
-12
-24
MHZ
HEX
FD
FA
F4
E8
SMOD
=0
9600
4800
2400
1200
SMOD
=1
19200
9600
4800
2400
Table 3.11 Baud Rate Comparison for X TAL = 11.0592
3.5.4 TCON TIMER CONTROL REGISTER

Table 3.12 shows the TCON register.
D7
TF1
D6
TR1
D5
TF0
D4
TR0
D3
IE1
D2
IT1
D1
IE0
D0
IT0
Address: 88H (bit addressable)

TF1 Timer 1 overflow flag
TR1 Timer 1 run control bit
TR0 Timer 0 run control bit
IE1 External interrupt 1 edge flag. Set to 1 when edge detected.
IT1 Edge control bit for external interrupt 1. 1 = edge, 0 = level
IE0 External interrupt 0 edge flag. Set to 1 when edge detected
IT0 Edge control bit for external interrupt 0. 1 = edge, 0 = level
3.5.5 SCON SERIAL CONTROL REGISTER

Table 3.13 shows the SCON register.
D7
SM0
D6
SM1
D5
SM2
D4
REN
D3
TB8
D2
RB8
D1
TI
D0
RI
SM2 Enables multiprocessor communication in modes 2 and 3.

REN Receiver enable
TB8 Transmit bit 8. This is the 9th bit transmitted in modes 2 and 3.
RB8 Receive bit 8. This is the 9th bit received in modes 2 and 3.
TI Transmit interrupt flag. Set at end of character transmission. Cleared in
software.
RI Receive interrupt flag. Set at end of character reception. Cleared in
software.
SM0
SM1
Operati
on
Baud
rate
Shift
register
Osc/12
8-bit
UART
9-bit
UART
Set by
timer
Osc/12
or
Osc/64
Set by
timer
9-bit
UART
3.5.6 TMOD TIMER MODE CONTROL REGISTER

D7
Gate
D6
C/T
D5
M1
Timer 1
D4
M0
D3
Gate
D2
C/T
D1
M1
Timer 0
D0
M0
M1
0
M0
0
Mode
13-bit
mode
for
compatibility to 8048
family
16- bit Timer/Counter.
User must reload in
software
8-bit autoreload. TLx is
automatically reloaded
from THx
TL0 is 8-bit counter
controlled by Timer0
control bits. TH0 is 8bit counter controlled
by Timer1 control bits.
Timer 1 is stopped
3.5.7 IE INTERRUPT ENABLE REGISTER

Table 3.17 represents the IE register.
D7
EA
D6
X
D5
ET2
D4
ES
D3
ET1
D2
EX1
D1
ET0
D0
EX0
Address: 0A8H (bit addressable)

EA Global interrupt enable
x Not defined
ET2 Timer 2 interrupt enable
ES Serial port interrupt enable
EX1 External interrupt 1 enable
EX0 External interrupt 0 enable
3.5.8 IP INTERRUPT PRIORITY REGISTER

Table 3.18 represents the IP register.
D7
x
D6
x
D5
PT2
D4
PS
D3
PT1
D2
PX1
D1
PT0
D0
PX0
D1
C/T2
D0
CP/ RL2
Address: 0B8H (bit addressable)

x Not defined
PT2 Priority for timer 2 interrupt
PS Priority for serial port interrupt
PX1 Priority for external interrupt 1
PX0 Priority for external interrupt 0
3.5.9 T2CON TIMER 2 CONTROL REGISTER

Address: 0C8H (bit addressable)
EXF2 Timer 2 external flag.
D7
D6
D5
D4
TF2
EXF2
RCLK TCLK
D3
D2
EXEN2 TR2
RCLK Receive clock. When set causes the serial port to use timer 2 for
reception.
TCLK Transmit clock. When set causes the serial port to use timer 2 for
transmission.
C/ T2 - Counter/Timer select.if 0 use internal timer if 1 use external pin
CP/ RL2 - Capture/reload flag.

The instruction set is divided in to 5 categories. They are as follows:
1. Arithmetic instructions
2. Logic instructions.
3. Data transfer instructions.
4. Boolean variable manipulation instruction.
5. Program and machine control instruction.
We have listed all the instructions of microcontroller with description,
Bytes, & Cycles, which is figured out and described by next page.
Fig 3.11 Boolean Manipulation & Program & Machine

Control Operation
Instructions are explained in alphabetical order.
3.6.1 ACALL TARGET ADDRESS

Flags: None
Description: ACALL unconditionally calls a subroutine located at the
indicated address. The instruction increments the PC twice to obtain the
address of the following instruction, then pushes the 16-bit result onto the
stack (low-order byte first) and increments the stack pointer twice. The
destination address is obtained by successively concatenating the five highorder bits of the incremented PC, op code bits 7-5, and the second byte of the
instruction.
The subroutine called must therefore start within the same 2K block of
program memory as the first byte of the instruction following ACALL. No
flags are affected.
Example: Initially SP equals 07H. The label SUBRTN is at program
memory location 0345H. After executing the instruction ACALL SUBRTN at
location 0123H, SP will contain 09H, internal RAM location 08H and 09H
will contain 25H and 01H, respectively, and the PC will contain 0345H.
Operation: ACALL
(PC) (PC) + 2
(SP) (SP) + 1
((SP)) (PC7-0)
(SP) (SP) + 1
((SP)) (PC15-8)
(PC10-0) page address
Bytes: 2
Cycles: 2
3.6.2 ADD A, SOURCEBYTE

Function: Add
Flags: OV, AC, CY
Description: ADD adds the byte variable indicated to the accumulator, leaving
the result in the accumulator. The carry and auxiliary carry flags are set,
respectively, if there is a carry out of bit 7 or bit 3, and cleared otherwise.
When adding unsigned integers, the carry flag indicates an overflow occurred.
OV is set if there is a carry out of bit 6 but not out of bit 7, or a carry out of bit
7 but not out of bit 6; otherwise OV is cleared. When adding signed integers,
OV indicates a negative number produced as the sum of two positive operands,
or a positive sum from two negative operands. Four source operand addressing
modes are allowed: register, direct, register indirect, or immediate.
Example:
MOV A,#45H ; A = 45H

ADD A,#4FH
Result: A = 94H, CY = 0.
The following addressing modes are supported for the ADD instruction.
1. Immediate: ADD A, #data
Example: ADD A,#40H
2. Register: ADD A, Rn
Example: ADD A,R1
3. Direct: ADD A, direct
Example: ADD A, 20H ;Add data in RAM location 20H to A
4. Register-indirect: ADD A,@Ri
Example: ADD A,@R0 ;Add to A data pointed by R0
3.6.3 ADDC A,SOURCEBYTE

Function: Add with carry
Flags: OV, AC, CY
Description: ADDC simultaneously adds the byte variable indicated, the carry
flag and the accumulator contents, leaving the result in the accumulator. The
carry and auxiliary carry flags are set, respectively, if there is a carry out of bit
7 or bit 3, and cleared otherwise. When adding unsigned integers, the carry
flag indicates an overflow occurred.
OV is set if there is a carry out of bit 6 but not out of bit 7, or a carry out of bit
7 but not out of bit 6; otherwise OV is cleared. When adding signed integers,
OV indicates a negative number produced as the sum of two positive operands
or a positive sum from two negative operands.
Four source operand addressing modes are allowed: register, direct, register
indirect, or immediate.
Example:
mov a, #0C3H ; (A) 0C3H
mov R0,#0AAH ; (R0) 0AAH assume (CY) = 1
ADDC A,R0
Result : (A) = 6EH with (AC) = 0, (CY) = 1, (OV) = 1.
The addressing modes for ADDC are same as for ADD A,byte.
3.6.4 AJMP TARGET ADDRESS

Function: Absolute jump
Flags: None
Description: AJMP transfers program execution to the indicated address,
which is formed at runtime by concatenating the high-order five bits of the PC
(after incrementing the PC twice), op code bits 7-5, and the second byte of the
instruction. The destination must therefore be within the same 2K block of

program memory as the first byte of the instruction following AJMP.
Example: The labelJMPADR is at program memory location 0123H. The
instruction AJMP JMPADR is at location 0345H and will load the PC with
0123H.
3.6.5 ANL DEST-BYTE, SRC-BYTE

Function: Logical AND for byte variables
Flags: None
Description: ANL performs the bitwise logical AND operation between the
variables indicated and stores the results in the destination variable. No flags
are affected. The two operands allow six addressing mode combinations. When
the destination is a accumulator, the source can use register, direct, registerindirect, or immediate addressing; when the destination is a direct address, the
Note: When this instruction is used to modify an output port, the value used as
the original port data will be read from the output data latch, not the input pins.
Example:
If the accumulator holds 0C3H (11000011B) and register 0 holds 0AAH
(10101010B) then the instruction ANL A,R0 will leave 81H (10000001B) in
the accumulator.
For an ANL instruction there are a total of six addressing modes.
1. Immediate: ANL A, #data
Example: ANL A,#30H
2. Register: ANL A, Rn
Example: ANL A, R5
3. Direct: ANL A,direct
Example: ANL A,20H ; AND A with data in RAM location 20H
4. Register-indirect: ANL A, @Ri
Example: ANL A,@R1; AND A with data pointed by R0
In the next two addressing modes the destination is direct address while the
source is either A or immediate data.
5. ANL direct,A
Example: ANL 20H, A
6. ANL direct, #data
Example: ANL 40H, #30H
3.6.6 ANL C, SRC-BIT

Function: Logical AND for bit variables
Flags: CY
Description: In this instruction the carry flag bit is ANDed with a source bit
and the result is placed in carry. If the Boolean value of the source bit is a logic
0 then clear the carry flag; otherwise leave the carry flag in its current state.
Only direct bit addressing is allowed for the source operand. A slash (/)
preceding the operand in the assembly language indicates that the logical
complement of the addressed bit is used as the source value, but the source bit
itself is not affected.
3.6.7 CJNE DEST-BYTE, SRC-BYTE, TARGET

Function: Compare and jump if not equal
Flags: CY
Description: CJNE compares the magnitudes of the first two operands, and
branches if their values are not equal. The branch destination is computed by
adding the signed relative displacement in the last instruction byte to the PC,
after incrementing the PC to the start of the next instruction. The carry flag is
set if the unsigned integer value of dest-byte is less than the unsigned integer
value of src-byte; otherwise, the carry is cleared. Neither operand is affected.
The first two operands allow four addressing mode combinations: the
accumulator may be compared with any directly addressed byte or immediate
data, and any indirect RAM location or working register can be compared with
an immediate constant.
Example:
1. Immediate: CJNE A, #data, target
Example: CJNE A, #40,GO ; JUMP if A is not 40
2. Direct: CJNE A, direct, target
Example: CJNE A, 20H,GO ; JUMP if A !=(20H)
3. Register: CJNE Rn,#data,target
Example: CJNE R5,#70,GO ; jump if R5 is not 70
In the fourth addressing mode, any RAM location can be destination. The
RAM location is held by register R0 or R1.
4. Register-indirect: CJNE @Ri,#data,target
Example: CJNE @R1,#40,GO ;Jump if RAM location whose address is held
by R1 is not equal to 40.
3.6.8 CLR A
Function: Clear accumulator
Description: The accumulator is cleared (all bits set to zero).
Example: The accumulator contains 5CH. The instruction CLR A will leave
the accumulator set to 00H.
3.6.9 CLR BIT

Function: Clear bit
Description: The indicated bit is cleared (reset to zero). CLR can operate on
the carry flag or any directly addressable bit.
Example: Port 1 has previously been written with 5DH (01011101B). The
instruction CLR P1.2 will leave the port set to 59H (01011001B).
3.6.10 CPL A
Function: Complement accumulator
Description: Each bit of the accumulator is logically complemented (ones
complement). Bits which previously contained a one are changed to zero and
vice versa.
Example: The accumulator contains 5CH (01011100B). The instruction CPL
A will leave the accumulator set to 0A3H (10100011 B).
3.6.11 CPL BIT

Function: Complement bit
Description: The bit variable specified is complemented. A bit which had been
a one is changed to zero and vice versa. CPL can operate on the carry or any
directly addressable bit.
The instruction sequence
CPL P1.1
CPL P1.2
Will leave the port set to 5BH (01011011B).
3.6.12 DA A
Function: Decimal adjust accumulator after addition
Flags: CY
Description: DA A adjusts the eight-bit value in the accumulator resulting
from the earlier addition of two variables (each in packed BCD format),
producing two four-bit digits. Any ADD or ADDC instruction may have been
used to perform the addition. If accumulator bits 3-0 are greater than nine
(1010-1111), or if the AC flag is one, six is added to the accumulator
producing the proper BCD digit in the low order nibble. This internal addition
would set the carry flag if a carry-out of the low order four-bit field propagated
through all high-order bits, but it would not clear the carry flag otherwise. If
the carry flag is now set, or if the four high-order bits now exceed nine (10101111), these high-order bits are incremented by six, producing the proper BCD
digit in the high-order nibble. Again, this would set the carry flag if there was a
carryout of the high-order bits, but wouldnt clear the carry. The carry flag thus
indicates if the sum of the original two BCD variables is greater than 100,
allowing multiple precision decimal additions. OV is not affected. All of this
occurs during the one instruction cycle. Essentially; this instruction performs
the decimal conversion by adding 00H, 06H, 60H, or 66H to the accumulator,
depending on initial accumulator and PSW conditions.
Note: DA A cannot simply convert a hexadecimal number in the accumulator
to BCD notation, nor does DA A apply to decimal subtraction.
Example:
MOV A, #47H
ADD A, #38H
DA A
Result:
47H
+ 38H
7FH
(invalid BCD)
06H
(after DA A)
85H
(valid BCD)
In the above instruction, since the lower nibble was greater than 9, DA added 6
to A. If the lower nibble is less than 9 but AC=1, it also adds 6 to the lower
nibble.
3.6.13 DEC BYTE

Function: Decrement
Flags: None
Description: The variable indicated is decremented by 1. An original value of
00H will underflow to 0FFH. Four operand addressing modes are allowed:
1. Accumulator: DEC A
2. Register: DEC Rn
3. Direct: DEC direct
4. Register-indirect: DEC @Ri
3.6.14 DIV AB
Function: Divide
Flags: CY and OV
Description: DIV AB divides the unsigned eight-bit integer in the accumulator
by the unsigned eight-bit integer in register B. The accumulator receives the
integer part of the quotient; register B receives the integer remainder. The
carry and OV flags will be cleared.
Exception: If B had originally contained 00H, the values returned in the
accumulator and B register will be undefined and the overflow flag will be set.
The carry flag is cleared in any case.
Example:
MOV A,#35
MOV B,#10
DIV AB
Result: A=3 and B=5
3.6.15 DJNZ BYTE,TARGET

Function: Decrement and jump if not zero
Flags: None
Description: DJNZ decrements the location indicated by 1, and branches to
the address indicated by the second operand if the resulting value is not zero.
An original value of 00H wills underflow to 0FFH. The branch destination
would be computed by adding the signed relative-displacement value in the
last instruction byte to the PC, after incrementing the PC to the first byte of the
following instruction.
The following two formats are supported by this instruction.
1. Register: DJNZ Rn, target
Example: DJNZ R3, HERE
2. Direct: DJNZ direct, target
3.6.16 INC BYTE

Function: Increment
Flags: None
Description: INC increments the indicated variable by 1. An original value of
0FFH will overflow to 00H.
Four operand addressing modes are allowed:
1. Accumulator: INC A
2. Register: INC Rn
3. Direct: INC direct
4. Register-indirect: INC @Ri
3.6.17 INC DPTR

Function: Increment data pointer
Flags: None
Description: Increment the 16-bit data pointer by 1. A 16-bit increment
(modulo 216) is performed; an overflow of the low-order byte of the data
pointer (DPL) from 0FFH to 00H will increment the high- order byte (DPH).
This is the only 16-bit register which can be incremented.
Example:
MOV DPTR, #16FFH
DPTR=16FFH
INC DPTR
Result: DPTR=1700H
3.6.18 JB BIT,TARGET
Function: Jump if bit is set
Flags: None
Description: If the indicated bit is a one, jump to the target address indicated;
otherwise proceed with the next instruction. The branch destination is
computed by adding the signed relative-displacement in the third instruction
byte to the PC, after incrementing the PC to the first byte of the next
instruction. The bit tested is not modified.
Example:
HERE: JB P1.2,HERE ; stay here as long as P1.2=1
MOV P2,#20H ; Since P1.2=0 send 55H to P2
3.6.19 JBC BIT,TARGET

Function: Jump if bit is set and clear bit.
Flags: None
Description: If the indicated bit is one, branch to the target address while at
the same time clear the designated bit. The branch destination is computed by
adding the signed relative displacement in the third instruction byte to the PC,
after incrementing the PC to the first byte of the next instruction.
Note: When this instruction is used to test an output pin, the value used as the
original data will be read from the output data latch, not the input pin.
3.6.20 JC TARGET
Function: Jump if carry is set
Flags: None
Description: If the carry flag is set, branch to the target address indicated;
otherwise proceed with the next instruction.
3.6.21 JMP @A + DPTR

Function: Jump indirect
Flags: None
Description: The JMP instruction is an unconditional jump to a target address.
The target address provided by the total sum of register A and the DPTR
register.
3.6.22 JNB BIT,TARGET

Function: Jump if bit is not set
Flags: None
Description: If the indicated bit is a zero, branch
otherwise proceed with the next instruction. The
computed by adding the signed relative-displacement
byte to the PC, after incrementing the PC to the
instruction. The bit tested is not modified.
Example:
HERE: JNB P1.2,HERE; stay here as long as P1.2=0
MOV P2,#20H; Since P1.2=1 send 55H to P2
to the target address;

branch destination is
in the third instruction
first byte of the next
3.6.23 JNC TARGET

Function: Jump if carry is not set
Flags: None
Description: If the carry flag is a zero, branch to the target address; otherwise
proceed with the next instruction. The branch destination is computed by
adding the signed relative-displacement in the second instruction byte to the
PC, after incrementing the PC twice to point to the next instruction. The carry
flag is not modified.
3.6.24 JNZ TARGET

Function: Jump if accumulator is not zero
Flags: None
Description: If any bit of the accumulator is a one, branch to the indicated
address; otherwise proceed with the next instruction. The branch destination is
computed by adding the signed relative-displacement in the second instruction
byte to the PC, after incrementing the PC twice. The accumulator is not
modified.
3.6.25 JZ TARGET
Function: Jump if accumulator is zero
Flags: None
Description: If all bits of the accumulator are zero, branch to the address
indicated; otherwise proceed with the next instruction. The branch destination
is computed by adding the signed relative-displacement in the second
instruction byte to the PC, after incrementing the PC twice. The accumulator is
not modified. No flags are affected.
3.6.26 LCALL 16-BIT ADDR

Function: Long call
Flags: None
Description: LCALL calls a subroutine located at the indicated address. The
instruction adds three to the program counter to generate the address of the
next instruction and then pushes the 16-bit result onto the stack (low byte
first), incrementing the stack pointer by two. The high-order and low-order
bytes of the PC are then loaded, respectively, with the second and third bytes
of the LCALL instruction. Program execution continues with the instruction at
this address. The subroutine may therefore begin anywhere in the full 64
Kbyte program memory address space.
Example: Initially the stack pointer equals 07H. The labelSUBRTN is
assigned to program memory location 1234H. After executing the instruction
LCALL SUBRTN at location 0123H, the stack pointer will contain 09H,
internal RAM locations 08H and 09H will contain 26H and 01H, and the PC
will contain 1234H.
3.6.27 LJMP 16-BIT ADDR

Function: Long jump
Flags: None
Description: LJMP causes an unconditional branch to the indicated address,
by loading the high order and low-order bytes of the PC (respectively) with the
second and third instruction bytes. The destination may therefore be anywhere
in the full 64K program memory address space.
Example: The labelJMPADR is assigned to the instruction at program
memory location 1234H. The instruction LJMP JMPADR at location 0123H
will load the program counter with 1234H.
3.6.28 MOV DEST-BYTE, SRC-BYTE

Flags: None
Description: The byte variable indicated by the second operand is copied into
the location specified by the first operand. The source byte is not affected. No
other register or flag is affected.
There are fifteen possible combinations for this instruction. They are as
follows:
Examples:
(a) Register A as the destination. This can have the following formats.
1. MOV A, #data
Example: MOV A,#10H
2. MOV A, Rn
Example: MOV A,R5
3. MOV A, direct
Example: MOV A,50H
4. MOV A, @Ri
Example: MOV A,@R0
(b) Register A is the source. This can have the following formats.
1. MOV Rn, A
2. MOV direct, A
3. MOV @Ri, A
(c) Rn is the destination
1. MOV Rn, #immediate
2. MOV Rn, A
3. MOV Rn, direct
(d) The destination direct address
1. MOV direct, #data
2. MOV direct, @ri
3. MOV direct, A
4. MOV direct, Rn
(e) Destination is an indirect address held by R0 and R1.
1. MOV @Ri, #data
2. MOV @Ri, A
3. MOV @Ri, direct
3.6.29 MOV DEST-BIT, SRC-BIT

Function: Move bit data
Flags: None
Description: The Boolean variable indicated by the second operand is copied

into the location specified by the first operand. One of the operands must be
the carry flag; the other may be any directly addressable bit. No other register
or flag is affected.
Example: MOV P1.2,C ;copy carry bit to port bit P1.2
3.6.30 MOV DPTR, #DATA16

Function: Load data pointer with a 16-bit constant
Flags: None
Description: The data pointer is loaded with the 16-bit constant indicated. The
16 bit constant is loaded into the second and third bytes of the instruction. The
second byte (DPH) is the high-order byte, while the third byte (DPL) holds the
low-order byte. This is the only instruction which moves 16 bits of data at
once.
Example: MOV DPTR, #434FH ;DPTR=434FH
3.6.31 MOVC A, @A + BASE-REG

Function: Move code byte
Flags: None
Description: The MOVC instructions load the accumulator with a code byte,
or constant from program memory. The address of the byte fetched is the sum
of the original unsigned eight-bit accumulator contents and the contents of a
sixteen-bit base register, which may be either the data pointer or the PC. In the
latter case, the PC is incremented to the address of the following instruction
before being added to the accumulator; otherwise the base register is not
altered. Sixteen-bit addition is performed so a carry-out from the low-order
eight bits may propagate through higher-order bits.
Example:
MOVC A, @A + DPTR ; mov data at A+DPTR into A
MOVC A, @A + PC ; mov data at A+PC into A
3.6.32 MOVX DEST-BYTE, SRC-BYTE

Function: Move external
Flags: None
Description: The MOVX instructions transfer data between the accumulator
and a byte of external data memory, hence theX appended to MOV. This
instruction allows us to access externally connected memory. There are two
types of instructions, differing in whether they provide an eight bit or sixteenbit indirect address to the external data RAM as explained bellow.
(a) The 16-bit external memory address is held by the DPTR register.
MOVX A,@DPTR
This moves into the accumulator a byte from external memory whose address
is pointed by DPTR.
MOVX @DPTR, A
This moves the content of accumulator to the external memory location whose
address is held by DPTR.
(b) The 8-bit address of external memory is held by R0 or R1
MOVX A,@Ri
This moves to the accumulator a byte from external memory whose 8-bit
address is pointed by R0 or R1.
MOVX @Ri,A
This moves a byte from register A to an external memory whose 8-bit address
is held by R0 or R1.
3.6.33 MUL AB
Function: Multiply
Flags: OV, CY
Description: MUL AB multiplies the unsigned eight-bit integers in the
accumulator and register B. The low-order byte of the sixteen-bit product is
left in the accumulator, and the high-order byte in B. If the product is greater
than 255 (0FFH) the overflow flag is set; otherwise it is cleared. The carry flag
is always cleared.
Example:
MOV A,#5
MOV B,#7
MUL AB
Result: A=35=23H, B=0
3.6.34 NOP
Function: No operation
Flags: None
Description: This performs no operation and execution continues with the
next instruction. It is sometimes used for timing delays to waste clock cycles.
This instruction only updates the PC to point to the next instruction following
NOP.
3.6.35 ORL DEST-BYTE, SRC-BYTE

Function: Logical OR for byte variables
Flags: None
Description: ORL performs the bitwise logical OR operation between the

indicated variables, storing the results in the destination byte.
The two operands allow six addressing mode combinations. When the
destination is the accumulator, the source can use register, direct, registerindirect, or immediate addressing; when the destination is a direct address, the
Example: If the accumulator holds 0C3H (11000011B) and R0 holds 55H
(01010101B) then the instruction ORL A,R0 will leave the accumulator
holding the value 0D7H (11010111B).
1. Immediate: ORL A, #data
Example: ORL A,#30h
2. Register: ORL A, Rn
Example: ORL A, R5
3. Direct: ORL A,direct
Example: ORL A,20H; OR A with data in RAM location 20H
4. Register-indirect: ORL A, @Ri
Example: ORL A,@R1; OR A with data pointed by R0.
3.6.36 ORL C, SRC-BIT
Function: Logical OR for bit variables
Flags: CY
Description: In this instruction the carry flag bit is ANDed with a source bit
and the result is placed in carry. If the Boolean value of the source bit is logic 0
then clear the carry flag; otherwise leave the carry flag in its current state.
Only direct bit addressing is allowed for the source operand. A slash (/)
preceding the operand in the assembly language indicates that the logical
complement of the addressed bit is used as the source value, but the source bit
itself is not affected. No other flags are affected.
3.6.37 POP DIRECT

Function: Pop from stack
Flags: None
Description: This copies the byte pointed by SP to the location whose direct
address indicated, and decrements SP by 1. Notice that this instruction
supports only direct addressing mode. Therefore, instruction such as POP A,
POP R3 is illegal.
Example:
POP 0E0H; Where E0H is the RAM address belonging to Register A.

Operation:
(direct) ((SP))
(SP) (SP) 1
3.6.38 PUSH DIRECT

Function: Push onto stack
Flags: None
Description: This copies the indicated byte onto the stack increments SP by 1.
Notice that this instruction supports only direct addressing mode. Therefore,
instruction such as PUSH A, PUSH R3 is illegal.
Example:
PUSH 0E0H; Where E0H is the RAM address belonging to Register A.
Operation:
(SP) (SP) + 1
((SP)) (direct)
3.6.39 RET
Flags: None
Description: This instruction is used to return from a subroutine. RET pops
the high and low-order bytes of the PC successively from the stack,
decrementing the stack pointer by two. Program execution continues at the
resulting address, generally the instruction immediately following an ACALL
or LCALL.
3.6.40 RETI
Function: Return from interrupt
Flags: None
Description: This instruction is used to return from an interrupt service
routine. RETI pops the high and low-order bytes of the PC successively from
the stack, and restores the interrupt logic to accept additional interrupts at the
same priority level as the one just processed. The stack pointer is left
decremented by two. The PSW is not automatically restored to its pre-interrupt
status. Program execution continues at the resulting address, which is generally
the instruction immediately after the point at which the interrupt request was
detected. If a lower or same-level interrupt is pending when the RETI
instruction is executed, that one instruction will be executed before the
pending interrupt is processed.
3.6.41 RL A
Function: Rotate accumulator left
Flags: None
Description: The eight bits in the accumulator are rotated one bit to the left.
Bit 7 is rotated into the bit 0 position.
instruction RL A leaves the accumulator holding the value 8BH (10001011B)
with the carry unaffected.
3.6.42 RLC A
Function: Rotate accumulator left through carry flag
Flags: CY
Description: The eight bits in the accumulator and the carry flag are together
rotated one bit to the left. Bit 7 moves into the carry flag; the original state of
the carry flag moves into the bit 0 position.
Example: The accumulator holds the value 0C5H (11000101B), and the carry
is zero. The instruction
RLC A leaves the accumulator holding the value 8AH (10001010B) with the
carry set.
3.6.43 RR A
Function: Rotate accumulator right
Flags: None
Description: The eight bits in the accumulator are rotated one bit to the right.
Bit 0 is rotated into the bit 7 position.
instruction RR A leaves the accumulator holding the value 0E2H (11100010B)
with the carry unaffected.
3.6.44 RRC A
Function: Rotate accumulator right through carry flag
Flags: CY
Description: The eight bits in the accumulator and the carry flag are together
rotated one bit to the right. Bit 0 moves into the carry flag; the original value
of the carry flag moves into the bit 7 position.
Example: The accumulator holds the value 0C5H (11000101B), the carry is
zero. The instruction
RRC A leaves the accumulator holding the value 62H (01100010B) with the
carry set.
3.6.45 SETB BIT

Function: Set bit
Flags: None
Description: SETB sets the indicated bit to one. SETB can operate on the
carry flag or any directly addressable bit of a port, register, or RAM location.
Example:
SETB P1.2
SETB ACC.2
SETB C ; carry flag CY=1
3.6.46 SJMP TARGET

Function: Short jump
Flags: None
Description: Program control branches unconditionally to the address
displacement in the second instruction byte to the PC, after incrementing the
PC twice. Therefore, the range of destinations allowed is from 128 bytes
preceding this instruction to 127 bytes following it.
Example: The label RELADR is assigned to an instruction at program
memory location 0123H. The instruction SJMP RELADR will assemble into
location 0100H. After the instruction is executed, the PC will contain the value
0123H.
3.6.47 SUBB A, SRC-BYTE

Function: Subtract with borrow
Flags: OV, AC, CY
Description: SUBB subtracts the src-byte and the carry flag together from the
accumulator, leaving the result in the accumulator. The steps for subtraction
perform by the internal hardware of the CPU are as follows:
Take 2s complement of the src-byte.
Add this to register A.
Invert the carry.
This instruction sets the carry flag according to the following.

CY
If dest>source
0
the result is positive
If dest=source
0
the result is 0
If dest < source
1
the result is negative in 2s compliment
1. Immediate: SUBB A, #data
Example: SUBB A,#30h ; A = A 30H CY

2. Register: SUBB A, Rn
Example: SUBB A, R5 ; A = A R5 CY
3. Direct: SUBB A,direct
Example: SUBB A,20H ; A data at (20H) CY
4. Register-indirect: SUBB A, @Ri
Example: SUBB A,@R1 ; A data at (R1) CY
3.6.48 SWAP A
Function: Swap nibbles within the accumulator
Flags: None
Description: SWAP A interchanges the low and high-order nibbles (four-bit
fields) of the accumulator (bits 3-0 and bits 7-4). The operation can also be
thought of as a four bit rotate instruction.
Example:
MOV A, #25H
SWAP A
Result: A = 52H
3.6.49 XCH A, BYTE

Function: Exchange accumulator with byte variable
Flags: None
Description: This instruction swaps the content of register A and the source
byte. The source byte can be any register or RAM location.
Example:
MOV A, #49H; A = 49H
MOV R2, #30H; R2 = 30H
XCH A,R2
Result: A=30H, R2=49H
1. Register: XCH A, Rn
Example: XCH A, R5
2. Direct: XCH A, direct
Example: XCH A, 20H
3. Register-indirect: XCH A, @Ri
Example: XCH A,@R1
3.6.50 XCHD A,@Ri

Function: Exchange digit
Flags: None
Description: XCHD exchanges the low-order nibble of the accumulator (bits
30), with that of the internal RAM location indirectly addressed by the
specified register. The high-order nibbles (bits 7-4) of each register are not
affected.
Example: R0 contains the address 20H. The accumulator holds the value
36H. Internal RAM location 20H holds the value 75H. The instruction XCHD
A, @ R0 will leave RAM location 20H holding the value 76H and 35H in the
accumulator.
3.6.51 XRL DEST-BYTE, SRC-BYTE

Function: Logical Exclusive OR for byte variables
Flags: None
Description: XRL performs the bitwise logical Exclusive OR operation
between the indicated variables, storing the results in the destination.
Example:
MOV A, #28H
XRL A, #08H
Result: A = 20H
For XRL instruction there are total of 6 addressing modes. In four of them the
accumulator must be the destination. They are as follows:
1. Immediate: XRL A, #data
Example: XRL A,#30h
2. Register: XRL A, Rn
Example: XRL A, R5
3. Direct: XRL A,direct
Example: XRL A,20H ; XOR A with data in RAM location 20H
4. Register-indirect: XRL A, @Ri
Example: XRL A,@R1 ; XOR A with data pointed by R0
In the next two addressing modes the destination is direct address while the
source is either A or immediate data.
5. XRL direct,A
Example: XRL 20H, A
6. XRL direct, #data
Example: XRL 40H, #30H
CHAPTER - 4
4.1 INTRODUCTION
In MPS we you will be developing code for the C8051F120 EVB
(evaluation board). This board is from Silicon Laboratories (SiLabs). For that
purpose, you will be using a x86 based PC (your laptop, a desktop, or co
processor card in a Sun Ultra 10 workstation) to write and compile the
controller programs. This type of development is called Cross Platform
Development. After generating the machine code for the target environment
and before you can run it you must download it to the C8051F120.
When doing cross platform development, extra knowledge of the target
environment is needed. It is important to be able to answer the following
questions:
What memory resources does the execution environment have?
128 Kbytes of FLASH ROM that extends from 00000 to 1FFFFH and 8
Kbytes of RAM. The compiler - and more specifically the linker - has been
configured to make use of this memory address space.
Are we dealing with only hardware or is there an interface program we
have to go through?
All communication to the C8051F120 evaluation board is currently
through the IDE (integrated development environment) from Silicon
Laboratories running on the PC.
The SiLabs IDE is a convenient way to edit, compile, and download
source code written for the microcontroller. While SiLabs provides a nice
interface for making source code changes and easily downloading them to the
development boards, it lacks the actual compiler portion which converts C
code to hex files, the common format used by the 8051. To do this, a free and
widely used open source tool called Small Device C Compiler (SDCC) is used.
SDCC compiles the C code written, and automatically optimizes and converts
it to hex. Due to its popularity, support for SDCC in the SiLabs IDE comes
standard, making it easy and convenient to use.
Compilers are programs used to convert a High Level Language to

object code. Desktop compilers produce an output object code for the
underlying microprocessor, but not for other microprocessors. I.E the
programs written in one of the HLL like C will compile the code to run on
the system for a particular processor like x86 (underlying microprocessor in
the computer). For example compilers for Dos platform is different from the
Compilers for UNIX platform.
So if one wants to define a compiler then compiler is a program that
translates source code into object code. The compiler derives its name from the
way it works, looking at the entire piece of source code and collecting and
reorganizing the instruction. See there is a bit little difference between
compiler and an interpreter. Interpreter just interprets whole program at a time
while compiler analyzes and execute each line of source code in succession,
without looking at the entire program.
The advantage of interpreters is that they can execute a program
immediately. Secondly programs produced by compilers run much faster than
the same programs executed by an interpreter. However compilers require
some time before an executable program emerges. Now as compilers translate
source code into object code, which is unique for each type of computer, many
compilers are available for the same language.

A cross compiler is similar to the compilers but we write a program for the
target processor (like 8051 and its derivatives) on the host processors (like
computer of x86)
It means being in one environment you are writing a code for another
environment is called cross development. And the compiler used for cross
development is called cross compiler
So the definition of cross compiler is a compiler that runs on one computer
but produces object code for a different type of computer. Cross compilers are
used to generate software that can run on computers with a new architecture or
on special-purpose devices that cannot host their own compilers. Cross
compilers are very popular for embedded development, where the target
probably couldn't run a compiler. Typically an embedded platform has
restricted RAM, no hard disk, and limited I/O capability. Code can be edited
and compiled on a fast host machine (such as a PC or UNIX workstation) and
the resulting executable code can then be downloaded to the target to be tested.
Cross compilers are beneficial whenever the host machine has more resources
(memory, disk, I/O etc) than the target. 8051 SDCC Compiler is one such
compiler that supports a huge number of host and target combinations. It

supports as a target to 8 bit microcontrollers like Atmel and Motorola etc.

There are several advantages of using cross compiler. Some of them are
described as follows
By using this compilers not only can development of complex
embedded systems be completed in a fraction of the time, but reliability
is improved, and maintenance is easy.
Knowledge of the processor instruction set is not required.
A rudimentary knowledge of the 8051s memory architecture is
desirable but not necessary.
Register allocation and addressing mode details are managed by the
compiler.
The ability to combine variable selection with specific operations
improves program readability.
Keywords and operational functions that more nearly resemble the
human thought process can be used.
Program development and debugging times are dramatically reduced
when compared to assembly language programming.
The library files that are supplied provide many standard routines (such
as formatted output, data conversions, and floating-point arithmetic) that
may be incorporated into your application.
Existing routine can be reused in new programs by utilizing the modular
programming techniques available with C.
The C language is very portable and very popular. C compilers are
available for almost all target systems. Existing software investments
can be quickly and easily converted from or adapted to other processors
or environments.
4.4 INSTALLING SDCC
To install SDCC, follow the simple instructions below:
1. Download the latest snapshot under the Windows package with

installer section. A copy can also be obtained from the course
website.
2. Open the executable that was just downloaded and allow the
installation wizard to step you through the process of installing
SDCC on your computer. It is recommended that you leave all of
the configuration options and installation paths the same as
suggested by the installation wizard, so that it will be easier to

assist you should problems arise.
3. To ensure SDCC was properly installed, click on: Start MenuAll
Programs and ensure that SDCC shows up on your programs list. If
it does, you have successfully installed SDCC.
To ensure SDCC was properly installed, click on: Start MenuAll

Programs and ensure that Silicon Laboratories shows up on your
programs list. If it does, you have successfully installed the SiLabs IDE.
To configure SDCC as the compiler in the SiLabs IDE, follow the

instructions below:
1. Click on: StartAll ProgramsSilicon LaboratoriesSilicon
Laboratories IDE
2. Once open, click on: ProjectsTool Chain Integration
3. You will see a Select Tool Vendor dropdown box. Select SDCC from
this menu.
4. Next, you will notice that the Assembler tab is selected by default.
Click on Browse to tell SiLabs where SDCC is installed. If you kept
all the paths to the default as recommended, the path should be:
C:\Program Files\SDCC\bin\asx8051.exe
5. After the assembler path is configured, you will need to configure the
compiler path. To do this, click on the Compiler tab. Once again,
click Browse and select the path to where SDCC is installed. If you
kept all the paths to the default, the full path should be: C:\Program
Files\SDCC\bin\sdcc.exe
6. Finally, to configure the linker, select the Linker tab. Click Browse
and select the path where SDCC is installed. The full path for a
default installation should be: C:\Program Files\SDCC\bin\sdcc.exe
7. Once you have made these changes, click OK. It is very important
that you not change anything outside of what has been mentioned
above, especially the command line flags passed to SDCC.
8. You have successfully set up SiLabs IDE to use SDCC!
1. To create a new project, click on: ProjectNew. This will create an

empty project.
2. Add a new C file to the project by clicking on: ProjectAdd Files
to Project. Give your new file a name, such as myprog.c.
3. The file will now be part of the project, and can be compiled. Save
the project by clicking on: ProjectSave Project.
You will be using the SDCC 2.7 cross compiler. The compiler
generates executable files with the extension .exe from the C source files.
To create an executable program that runs on the C8051F120

processor from C code, there are three steps that must be taken. First the
compiler takes the C source file (.c) and creates an object file (.hex). A
linker takes the object file from the compiler and adds in the language
library routines to create a link file. Finally a hex converter (or loader)
takes the link file and generates a downloadable executable file that can
be passed to the C8051F120 by the IDE. The IDE program downloads
the .out file into the C8051F120 for execution.
Fortunately there are menu items that will perform all these
operations. For a C source file in an opened IDE Project, the menu
commands to generate the .exe download file are:
1. To compile your project, first verify that all of your code is correct. If
its not, dont worry, the compiler will catch your mistakes.
2. Click on: ProjectAssemble/Compile File (<Ctrl><F7> or
icon) this will compile your project source code. The window at the
bottom of the IDE will alert you of any errors or warnings it finds in
your code. If there are errors, correct them first before moving on to
the next step. If there are warnings, you may or may not want to
correct them, depending on the nature of the warning.
3. Next click on: ProjectBuild/Make Project(<F7> or icon) This
will link your compiled file. Any errors detected by the linker will be
displayed.
Transferring the Executable Machine Code to the C8051F120
4. After successfully building your project, you will want to
download it to the development board. Before doing this, you will
need to configure the adapter used to download the source code
and establish the connection. To do this, click on:
OptionsConnection Options Once the window opens, select the
USB Debug Adapter and click OK.
5. To establish the connection to the 8051 you must click on:
DebugConnect This will connect the IDE to the development
board through the USB Debug Adapter.
6. Click on: DebugDownload Object File (<Alt><D> or icon)
Select the file you just compiled, and click Download. This will
download the code to the development board.
Finally, to execute your code on the C8051F120, click on: DebugGo
We have two packages through which the C8051F120 board may

communicate with the PC using the RS232 UART ports - HyperTerminal
and ProComm Plus. To begin the process, start either HyperTerminal or
ProComm Plus as a dumb terminal to the EVB.
Run the program HYPERTRM.EXE from Program Files

Accessories HyperTerminal.
Create a new connection configured for a direct connection to COM1
(no modem) with 115200 bits per second, 8 data bits, no (none) parity, 1
stop bit, and no (none) flow control (handshaking).
Connect a DB-9 serial cable from the PC card serial port to the serial
port on the EVB.
In order to work correctly, your project files must be in the

C:\MPSfiles directory. The header files (.h) are in C:\Program
Files\SDCC\include and the compiler (sdcc.exe), linker and make file
(makebin.exe) are located
in C:\Program Files\SDCC\bin.
Normal termination of a program occurs when the last line in main() is

executed. This is done at the end of a program by calling the function:
return;
at which point the program will stop but the Halt button in the IDE must
still be selected.

These are the steps to develop 8051 project using Keil
1. Create source files in C or assembly.
2. Compile or assemble source files.
3. Correct errors in source files.
4. Link object files from compiler and assembler.
5. Test linked application.
Now let us start how to work with Keil.
Compilers produce hex files that we download in to the ROM of the micro
controller. The size of the hex file produced by the compiler is one of the main
concerns of micro controller programmers for two reasons:
1. Micro controllers have limited on-chip ROM
2. The code space for the 8051 is limited to 64k bytes.
While assembly language produces a hex file that is much smaller than C.
Programming in assembly language is tedious and time consuming. C
programming, on the other hand, is less time consuming and much easier to
write. One statement in C belongs to several statements in assembly language.
However if we learn easily instructions we can easily deal with C

programming. Some of the assembly instructions are discussed below.[5]

ACALL addr11
Description: ACALL unconditionally calls a subroutine located at the
indicated address. The instruction increments the PC twice to obtain the
address of the following instruction, then pushes the 16-bit result on to the
stack(low-order byte first) and increments the stack pointer twice. The
destination address is obtained by successively concatenating the five highorder bits of the incremented PC, epode bits 7-5, and the second byte of the
instruction. The subroutine called must therefore start within the same 2K
block of the program memory as the first byte of the instruction following
ACALL. No flags are affected.
CLR A
Function: clear accumulator
Description: The accumulator is cleared (all bits reset to zero). No flags are
affected.
CPL A
Function: Complement accumulator.
Description: Each bit of the accumulator is logically complemented (ones
complemented). Bits which previously contained a one are changed to a zero
and vice-versa. No flags are affected.
DJNZ <byte>, <rel-addr>

Function: Decrement and jump if not zero.
Description: DJNZ decrements the location indicated by 1, and branches to
the address indicated by the second operand if the resulting value is not zero.
An original value of 00H wills underflow to 0FFH. No flags are affected. The
branch destination would be computed by adding the signed relativedisplacement value in the last instruction byte to the PC, after incrementing the
PC to the firs-t byte of the following instruction. The location decremented
may be a register or directly addressed byte.
JB bit,rel
Function: jump if bit set
Description: If the indicated bit is one, jump to the address indicated;

otherwise proceed with the next instruction. The branch destination is
computed by adding the signed relative-displacement in the third instruction
byte to the PC, after incrementing the PC to the first byte of the next
instruction. The bit tested is not modified. No flags are affected.
JNB bit,rel
Function: jump if bit not set
Description: If the carry bit is zero, branch to the indicated address; otherwise
proceed with the next instruction. The branch destination is computed by
adding the signed relative-displacement in the third instruction byte to the PC,
after incrementing the PC to the first byte of the next instruction. The bit tested
is modified. No flags are affected.
LJMP addr16
Function: Long jump
Description: LJMP causes an unconditional branch to the indicated address, by
loading the high order and low-order bytes of the PC (respectively) with the
second and third instruction bytes. The destination may therefore be anywhere
in the full 64K program memory address space. No flags are affected.
MOV <dest-byte>, <src-byte>

Description: The byte variable indicated by the second operand is copied into
the location specified by the first operand. The source byte is not affected. No
other register or flag is affected. This is by far the most flexible operation.
Fifteen combinations of source and destination addressing modes are allowed.
RET
Description: RET pops the high and low-order bytes of the PC successively
from the stack, decrementing the stack pointer by two. Program execution
continues at the resulting address, generally the instruction immediately
following an ACALL or LCALL. No flags are affected.
SETB <bit>
Function: set bit
Description: SETB sets the indicated bit to one. SETB can operate on the
carry flag or any directly addressable bit. No other flags are affected.
SJMP rel
Function: short jump
Description: program control branches unconditionally to the address
displacement in the second instruction byte to the PC, after incrementing the
PC twice. Therefore, the range of destinations allowed is from 128 bytes
preceding this instruction to 127 bytes following it.
4.9 ASSEMBLER & COMPILER

Software is to be written in the assembly code in the assembler. For this
project we use 8051 IDE assembler + compiler. The Various process for
assembling, compiling and simulating are shown below by series of figures.

MAIN:
KEYCHECK:
JNB P3.0,OK
JNB P3.4,WRONG
JNB P3.5,WRONG
JNB P3.7,WRONG
JNB P3.1,WRONG
JNB P3.2,WRONG
JNB P3.3,WRONG
SJMP KEYCHECK
OK:
ACALL DELAY1
JNB P3.0,WRONG
JNB P3.1,OK1
JNB P3.2,WRONG
JNB P3.3,WRONG
JNB P3.4,WRONG
JNB P3.5,WRONG
JNB P3.7,WRONG
SJMP OK
;
;
;
OK1:
JNB P3.0,WRONG
JNB P3.1,WRONG
JNB P3.2,OK2
JNB P3.3,WRONG
JNB P3.4,WRONG
JNB P3.5,WRONG
JNB P3.7,WRONG
SJMP OK1
OK2:
JNB P3.2,$
ACALL DELAY
;
;
;
JNB P3.0,WRONG
JNB P3.1,WRONG
JNB P3.2,WRONG
JNB P3.3,OK3
JNB P3.4,WRONG
JNB P3.5,WRONG
JNB P3.7,WRONG
OK3:
CLR P1.3
; BUZZER
CLR P1.0
SETB P1.1
ACALL DELAY1
SETB P1.3
; BUZZER OFF
SETB P1.0
SETB P1.1
ACALL DELAY1
SETB P1.0
CLR P1.1
ACALL DELAY1
SETB P1.0
SETB P1.1
LJMP MAIN
DELAY1:
MOV R3,#00
MOV R2,#00
MOV R1,#12
DELAY:
DJNZ R3,DELAY
DJNZ R2,DELAY
DJNZ R1,DELAY
RET
WRONG:
ACALL DELAY
CLR BUZ
CLR RELAY
ACALL DELAY
SETB RELAY
ACALL DELAY
CLR RELAY
ACALL DELAY
SETB RELAY
In the Gas sensor, we use IC 555 along with sensor as a main

component. Pin no 4 and pin no 8 is connected to the positive supply. Pin no 1
is connected to the negative voltage. One capacitor is grounded from the pin
no 5 for noise cancellation. Output is available on the pin no 3. Sensor is
connected to the pin no 2. In the case of Gas sensor, Pin no 2 is negative bias
through the 33k ohm resistor and pin no 3 is positively biased. Infrared LED is
directly connected to the positive and negative supply through the 470 ohm
resistor.
In normal stage when Gas is detected by sensor then pin no 2 is

positively biased. If pin no 2 is positive then negative output is available on the
pin no 3. Now when gas concentration rises then pin no. 2 is now gets its
voltage from only 33 k ohm resistor. If pin no 2 is become negative then
output is shifted to the pin no 3. When positive output is available on the pin
no 3 and with the help of this voltage NPN transistor is ON and NPN transistor
provide a negative voltage as a pulse to the microcontroller. Microcontroller
allows the auto dial up using the relay and starts an exhaust fan to fan out
excess gas concentration. It also allows sending an ON signal to APR 9600
which will start to play recording message in few seconds for Gas. In that mid
time hands free dials last redialed number of the mobile phone which provides
info to the concerned people.
In the case of Fire sensor, we use IC 555 along with Heat sensor as a
main component. Pin no 4 and pin no 8 is connected to the positive supply. Pin
no 1 is connected to the negative voltage. One capacitor is grounded from the
pin no 5 for noise cancellation. Output is available on the pin no 3. Sensor is
connected to the pin no 2. In the heat sensor, Pin no 2 is negative bias through
the 33k ohm resistor and pin no 3 is positively biased. Infrared LED is directly
connected to the positive and negative supply through the 470 ohm resistor.
Fig 4.6 Fire Sensor with MCU
In normal stage heat is detected by sensor then pin no 2 is positively

biased. If pin no 2 is positive then negative output is available on the pin no 3.
Now when temperature rises above the nominal room temperature then pin no.
2 is now gets its voltage from only 33 k ohm resistor. If pin no 2 is become
negative then output is shifted to the pin no 3. When positive output is
available on the pin no 3 and with the help of this voltage NPN transistor is
ON and NPN transistor provide a negative voltage as a pulse to the
microcontroller. Microcontroller allows the auto dial up using the relay and it
also allows sending an ON signal to APR 9600 which will start to play
recording message in few seconds for Gas. In that mid time hands free dials
last redialed number of the mobile phone which provides info to the concerned
people. Note that exhaust fan will remain in its idle state of OFF in case of
heat/fire detection & prevention.
Note that microcontroller sense only negative input to the microcontroller.
CHAPTER - 5
5.1 APR 9600

Digital voice processing chips with different features and coding
techniques for speech compression and processing are available on the market
from a number of semiconductor manufacturers. Advanced chips such as Texas
instruments TMS320C31 can implement various voice-processing algorithms
including code-excited linear prediction, adaptive differential pulse-code
modulation, A law (specified by California Council for International Trade),
law (specified by Bell Telephone) and vector sum-excited linear prediction. On
the other hand, APR9600 single chip voice recorder and playback device from
Aplus Integrated Circuits makes use of a proprietary analogue storage
technique implemented using flash nonvolatile memory process in which each
cell is capable of storing up to 256 voltage levels. This technology enables the
APR9600 to reproduce voice signals in their natural form. The APR9600 is a
good standalone voice recorder or playback IC with nonvolatile storage and
playback capability for 5 to 60 seconds. It can record and play multiple
messages at random or in sequential mode. The user can select sample rates
with consequent quality and recording time trade-off. Microphone amplifier,
automatic gain control (AGC) circuits, internal anti-aliasing filter, integrated
output amplifier and messages management are some of the features of the
APR9600 chip.
5.1.2 FEATURES
Single-chip, high-quality voice recording & playback solution

No external ICs required
Minimum external components
Non-volatile Flash memory technology
No battery backup required
User-Selectable messaging options
Random access of multiple fixed-duration messages
Sequential access of multiple variable-duration messages
User-friendly, easy-to-use operation
Programming & development systems not required
Level-activated recording & edge-activated play back switches
Low power consumption

Operating current: 25 mA typical
Standby current: 1 uA typical
Automatic power-down
Chip Enable pin for simple message expansion

The APR9600 device offers true single-chip voice recording, nonvolatile storage, and playback capability for 5 to 60 seconds. The device
supports both random and sequential access of multiple messages. Sample
rates are user-selectable, allowing designers to customize their design for
unique quality and storage time needs. Integrated output amplifier, microphone
amplifier, and AGC circuits greatly simplify system design. The device is ideal
for use in portable voice recorders, toys, and many other consumer and
industrial applications.
APLUS integrated achieves these high levels of storage capability by
using its proprietary analog/multilevel storage technology implemented in an
advanced Flash non-volatile memory process, where each memory cell can
store 256 voltage levels. This technology enables the APR9600 device to
reproduce voice signals in their natural form. It eliminates the need for
encoding and compression, which often introduce distortion.

APR9600 block diagram is included in order to describe the devices
internal architecture. At the left hand side of the diagram are the analog inputs.
A differential microphone amplifier, including integrated AGC, is included onchip for applications requiring use. The amplified microphone signals fed into
the device by connecting the ANA_OUT pin to the ANA_IN pin through an
external DC blocking capacitor. Recording can be fed directly into the
ANA_IN pin through a DC blocking capacitor, however, the connection
between ANA_IN and ANA_OUT is still required for playback. The next
block encountered by the input signal is the internal anti-aliasing filter. The
filter automatically adjusts its response according to the sampling frequency
selected so Shannons Sampling Theorem is satisfied. After anti-aliasing
filtering is accomplished the signal is ready to be clocked into the memory
array. This storage is accomplished through a combination of the Sample and
Hold circuit and the Analog Write/Read circuit. These circuits are clocked by
either the Internal Oscillator or an external clock source. When playback is
desired the previously stored recording is retrieved from memory, low pass
filtered, and amplified as shown on the right hand side of the diagram. The
signal can be heard by connecting a speaker to the SP+ and SP- pins. Chipwide management is accomplished through the device control block shown in
the upper right hand corner. Message management is provided through the
message control block represented in the lower center of the block diagram.
More detail on actual device application can be found in the Sample
Application section. More detail on sampling control can be found in the
Sample Rate and Voice Quality section. More detail on Message management
and device control can be found in the Message Management section.

5.4.1 MESSAGE MANAGEMENT GENERAL DESCRIPTION
Playback and record operations are managed by on-chip circuitry. There
are several available messaging modes depending upon desired operation.
These message modes determine message management style, message length,
and external parts count. Therefore, the designer must select the appropriate
operating mode before beginning the design. Operating modes do not affect
voice quality; for information on factors affecting quality refer to the Sampling
Rate & Voice Quality section. The device supports five message management
modes (defined by the MSEL1, MSEL2 and /M8_OPTION pins shown in
Figures 1 and 2):
Random access mode with 2, 4, or 8 fixed-duration messages

Tape mode, with multiple variable-duration messages, provides two
options:
- Auto rewind
- Normal
Modes cannot be mixed. Switching of modes after the device has
recorded an initial message is not recommended. If modes are switched after
an initial recording has been made some unpredictable message fragments
from the previous mode may remain present, and be audible on playback, in
the new mode. These fragments will disappear after a Record operation in the
newly selected mode. Table 1 defines the decoding necessary to choose the
desired mode.
An important feature of the APR9600 Message management capabilities
is the ability to audibly prompt the user to change in the device's status through
the use of "beeps" superimposed on the device's output. This feature is enabled
by asserting a logic high level on the BE pin.

Random access mode supports 2, 4, or 8 Message segments of fixed
duration. As suggested recording or playback can be made randomly in any of
the selected messages. The length of each message segment is the total
recording length available (as defined by the selected sampling rate) divided
by the total number of segments enabled (as decoded in Table1). Random
access mode provides easy indexing to message segments.
5.4.2.1 FUNCTIONAL DESCRIPTION OF RECORDING IN RANDOM
ACCESS MODE
On power up, the device is ready to record or playback in any of the
enabled message segments. To record,/CE must be set low to enable the device
and /RE must be set low to enable recording. You initiate recording by
applying a low level on the message trigger pin that represents the message
segment you intend to use. The message trigger pins are labeled
/M1_MESSAGE - /M8_OPTION on pins 1-9 (excluding pin 7) for message
segments
1-8
respectively. Note:
Message
trigger
pins
of
M1_MESSAGE,/M2_NEXT, /M7_END, and /M8_OPTION, have expanded
names to represent the different functionality that these pins assume in the
other modes. In random access mode these pins should be considered purely
message trigger pins with the same functionality as /M3, /M4, /M5, and /M6.
For a more thorough explanation of the functionality of device pins in different
modes please refer to the pin description table that appears later in this
document. When actual recording begins the device responds with a single
beep (if the BE pin is high to enable the beep tone) at the speaker outputs to
indicate that it has started recording. Recording continues as long as the
message pin stays low. The rising edge of the same message trigger pin during
record stops the recording operation (indicated with a single beep).If the
message trigger pin is held low beyond the end of the maximum allocated
duration, recording stops automatically (indicated with two beeps), regardless
of the state of the message trigger pin. The chip then enters low-power mode
until the message trigger pin returns high. After the message trigger pin returns
to high, the chip enters standby mode. Any subsequent high to low transition
on the same message trigger pin will initiate recording from the beginning of
the same message segment. The entire previous message is then overwritten by
the new message, regardless of the duration of the new message. Transitions
on any other message trigger pin or the /RE pin during the record operation are
ignored until after the device enters standby mode.
5.4.2.2 FUNCTIONAL DESCRIPTION OF PLAYBACK RANDOM

ACCESS MODE
On power up, the device is ready to record or playback, in any of the
enabled message segments. To playback,/CE must be set low to enable the
device and RE must be set high to disable recording & enable playback. You
initiate playback by applying a high to low edge on the message trigger pin
that represents the message segment you intend to playback. Playback will
continue until the end of the message is reached. If a high to low edge occurs
on the same message trigger pin during playback, playback of the current
message stops immediately. If a different message trigger pin pulses during
playback, playback of the current message stops immediately (indicated by
one beep) and playback of the new message segment begins. A delay equal to
8,400 cycles of the sample clock will be encountered before the device starts
playing the new message. If a message trigger pin is held low, the selected
message is played back repeatedly as long as the trigger pin stays low. A
period of silence, of duration equal to 8,400 cycles of the sampling clock, will
be inserted during looping as an indicator to the user of the transition between
the end and the beginning of the message.
5.4.3 TAPE MODE

Tape mode manages messages sequentially much like traditional
cassette tape recorders. Within tape mode two options exist, auto rewind and
normal. Auto rewind mode configures the device to automatically rewind to
the beginning of the message immediately following recording or playback of
the message. In tape mode, using either option, messages must be recorded or
played back sequentially, much like a traditional cassette tape recorder
5.4.3.1 FUNCTION DESCRIPTION OF RECORDING IN TAPE MODE
USING THE AUTO REWIND OPTION
On power up, the device is ready to record or playback, starting at the
first address in the memory array. To record, /CE must be set low to enable the
device and /RE must be set low to enable recording. A falling edge of the
/M1_MESSAGE pin initiates voice recording (indicated by one beep).A
subsequent rising edge of the /M1_MESSAGE pin during recording stops the
recording (also indicated by one beep). If the M1_MESSAGE pin is held low
beyond the end of the available memory, recording will stop automatically
(indicated by two beeps). The device will then assert a logic low on the
/M7_END pin until the /M1 Message pin is released. The device returns to
standby mode when the /M1_MESSAGE pin goes high again. After recording
is finished the device will automatically rewind to the beginning of the most
recently recorded message and wait for the next user input. The auto rewind
function is convenient because it allows the user to immediately playback and

review the message without the need to rewind. However, caution must be
practiced because a subsequent record operation will overwrite the last
recorded message unless the user remembers to pulse the /M2_Next pin in
order to increment the device past the current message. A subsequent falling
edge on the /M1_Message pin starts a new record operation, overwriting the
previously existing message. You can preserve the previously recorded
message by using the /M2_Next input to advance to the next available message
segment. To perform this function, the /M2_NEXT pin must be pulled low for
at least 400 cycles of the sample clock. The auto rewind mode allows the user
to record over the just recorded message simply by initiating a record sequence
without first toggling the /M2_NEXT pin. To record over any other message
however requires a different sequence. You must pulse the /CE pin low once to
rewind the device to the beginning of the voice memory. The /M2_NEXT pin
must then be pulsed low for the specified number of times to move to the start
of the message you wish to overwrite. Upon arriving at the desired message a
record sequence can be initiated to overwrite the previously recorded material.
After you overwrite the message it becomes the last available message and all
previously recorded messages following this message become inaccessible. If
during a record operation all of the available memory is used, the device will
stop recording automatically,(double beep) and set the /M7_END pin low for a
duration equal to 1600 cycles of the sample clock. Playback can be initiated on
this last message, but pulsing the /M2_Next pin will put the device into an
"overflow state". Once the device enters an overflow state any subsequent
pulsing of /M1_MESSAGE or /M2_NEXT will only result in a double beep
and setting of the /M7_END pin low for a duration equal to 400 cycles of the
sample clock. To precede from this state the user must rewind the device to the
beginning of the memory array. This can be accomplished by toggling the /CE
pin low or cycling power. All inputs, except the /CE pin, are ignored during
recording.
5.4.3.2 FUNCTION DESCRIPTION OF PLAYBACK IN TAPE MODE
USING AUTO REWIND OPTION
On power-up, the device is ready to record or playback, starting at the
first address in the memory array. Before you can begin playback, the /CE
input must be set to low to enable the device and /RE must be set to high to
disable recording and enable playback. The first high to low going pulse of the
/M1_MESSAGE pin initiates playback from the beginning of the current
message; on power up the first message is the current message. When the
/M1_MESSAGE pin pulses low the second time, playback of the current
Message stops immediately. When the /M1_MESSAGE pin pulses low a third
time, playback of the current message starts again from its beginning. If you
hold the /M1_MESSAGE pin low continuously the same message will play
continuously in a looping fashion. A 1,540ms period of silence is inserted
during looping as an indicator to the user of the transition between the
beginning and end of the message. Note that in auto rewind mode the device
always rewinds to the beginning of the current message. To listen to a
subsequent message the device must be fast forwarded past the current
message to the next message. This function is accomplished by toggling
the /M2_NEXT pin from high to low. The pulse must be low for least 400
cycles of the sampling clock. After the device is incremented to the desired
message the user can initiate playback of the message with the playback
sequence described above. A special case exists when the /M2_NEXT pin goes
low during playback. Playback of the current message will stop, the device
will beep, advance to the next message and initiate playback of the next
message. (Note that if /M2 Next goes low when not in playback mode, the
device will prepare to play the next message, but will not actually initiate
playback).
If the /CE pin goes high during playback, playback of the current
message will stop, the device will beep, reset to the beginning of the first
message, and wait for a subsequent playback command. When you reach the
end of the memory array, any subsequent pulsing of /M1_MESSAGE or
/M2_NEXT will only result in a double beep. To precede from this state the
user must rewind the device to the beginning of the m memory array. This can
be accomplished by toggling the /CE pin low or cycling power.
5.4.3.3 FUNCTIONAL DESCRIPTION OF RECORDING IN TAPE
On power-up, the device is ready to record or playback, starting at the
first address in the memory array. Before you can begin recording, the /CE
input must be set to low to enable the device and /RE must be set to low to
enable recording. On a falling edge of the /M1_MESSAGE pin the device will
beep once and initiate recording. A subsequent rising edge on the /M1 Message
pin will stop recording and insert a single beep. If the /M1_ MESSAGE pin is
held low beyond the end of the available memory, recording Stops
automatically, and two beeps are inserted; regardless of the state of the
/M1_MESSAGE pin. The device returns to the standby mode when the
/M1_MESSAGE pin is returned high. A subsequent falling edge on the
/M1_MESSAGE pin starts a new record operation in the memory array
immediately following the last recorded message, thus preserving the last
recorded message. To record over all previous messages you must pulse the
/CE pin low once to reset the device to the beginning of the first message. You
can then initiate a record sequence, as described above, to record a new
message. The most recently recorded message will become the last recorded
message and all previously recorded messages following this message will
become inaccessible. If you wish to preserve any current messages it is
recommend that the Auto Rewind option be used instead of the Normal option.
If the Normal option is necessary the following sequence can be used. To
preserve current messages you must fast forward past the messages you want
to keep before you can record a new message. To fast forward when using the
Normal option you must switch to play mode and listen to messages
sequentially until you arrive at the beginning of the message you wish to
overwrite. At this stage you should switch back to record mode and overwrite
the desired message. The most recently recorded message will become the last
recorded message and all previously recorded messages following this
message will become inaccessible. All inputs, except /CE, are ignored during
recording.
5.4.3.4 FUNCTIONAL DESCRIPTION OF PLAYBACK IN TAPE
On power-up or after a low to high transition on /RE the device is ready
to record or playback starting at the first address in the memory array. Before
you can begin playback of messages, the /CE input must be set to low to
enable the device and /RE must be set to high to enable playback. The first
high to low going pulse of the /M1_MESSAGE pin initiates playback from the
beginning of the current message. When the /M1_MESSAGE pin pulses from
high to low a second time, playback of the current message stops immediately.
When the /M1_MESSAGE pin pulses from high to low a third time, playback
of the next message starts again from the beginning. If you hold the
/M1_MESSAGE pin low continuously, the current message and subsequent
messages play until the one of the following conditions is met: the end of the
memory array is reached, the last message is reached, the /M1_message pin is
released. If the last recorded message has already played, any further
transitions on the /M1_MESSAGE pin will initiate a double beep for warning
and the /M7_END pin will go low. To exit this state you must pulse the /CE
pin high and then low once during standby to reset the pointer to the beginning
of the first message.
5.5
MICROPROCESSOR
MANAGEMENT
CONTROLLED
MESSAGE
The APR9600 device incorporates several features design help simplify

microprocessor controlled message management When controlling messages
the microprocessor essentially toggles pins as described in the message
management sections described previously. The /BUSY, /STROBE, and
/M7_END pins are included to simplify handshaking between the
microprocessor and the APR9600.The /BUSY pin, when low, indicates to the
host processor that the device is busy and that No commands can be accepted.
When this pin is high the device is ready to accept and execute commands
from the host. The /STROBE pin pulses low each time a memory segment is
used. Counting pulses on this pin enables the host processor too accurately
determine how much recording time has been used, and how much recording
time remains. The APR9600 has a total of eighty memory segments. The
/M7_END pin is used as an indicator that the device has stopped its current
record or playback operation. During recording a low going pulse indicates
that all memory has been used. During playback a low pulse indicates that the
last message has played. Microprocessor control can also be used to link
several APR9600 devices together in order to increase total available recording
time. In this application both the speaker and microphone signals can be
connected in parallel. The microprocessor will then control which device
currently drives the speaker by enabling or disabling each device using its
respective /CE pins. A continuous message cannot be recorded in multiple
devices however because the transition from one device to the next will incur a
delay that is noticeable upon playback. For this reason it is recommended that
message boundaries and device boundaries always coincide.
5.6 SIGNAL STORAGE

The APR9600 samples incoming voice signals and stores the
instantaneous voltage samples in non-volatile FLASH memory cells. Each
memory cell can support voltage ranges from 0 to 256 levels. These 256
discrete voltage levels are the equivalent of 8-bit (28=256) binary encoded
values. During playback the stored signals are retrieved from memory,
smoothed to form a continuous signal, and then amplified before being fed to
an external speaker.

According to Shannon's sampling theorem, the highest possible
frequency component introduced to the input of a sampling system must be
equal to or less than half the sampling frequency if aliasing errors are to be
eliminated. The APR9600 automatically filters its input, based on the selected
sampling frequency, to meet this requirement. Higher sampling rates increase
the bandwidth and hence the voice quality, but they also use more memory
cells for the same length of recording time. Lower sampling rates use fewer
memory cells and effectively increase the duration capabilities of the device,
but they also reduce incoming signal bandwidth. The APR9600 accommodates
sampling rates as high as 8 kHz and as low as 4 kHz. You can control the
quality/duration trade off by controlling the sampling frequency. An internal
oscillator provides the APR9600 sampling clock. Oscillator frequency can be
changed by changing the resistance from the OscR pin to GND. Table 5.2
summarizes resistance values and the corresponding sampling frequencies, as
well as the resulting input bandwidth and duration.
Resistance
(k ohm)
Sampling
Frequency(kHz)
Input
Bandwidth (kHz)
Duration(sec)
84
4.2
2.1
60
38
6.4
3.2
40
34
32

The APR9600 device has an integrated AGC. The AGC affects the
microphone input but does not affect the ANA_IN input. The AGC circuit
insures that the input signal is properly amplified. The AGC works by applying
maximum gain to small input signals and minimum gain to large input signals.
This assures that inputs of varying amplitude are recorded at the optimum
signal level. The AGC amplifier is designed to have a fast attack time and a
slow decay time. This timing is controlled by the RC network connected to pin
19. A value of 220K and 4.7uF has been found to work well for the English
language. Be aware that different languages, speakers from different countries,
and music may all require modification of the recommended values for the
AGC RC network.

The following reference schematics are included as examples of how a
recording system might be designed. Each reference schematic shows the
device incorporated in one of its three main modes: Random Access, Tape
mode Normal option, and Tape mode Auto Rewind option. Note that in
several of the applications either one or all of the /BUSY, /STROBE, or
/M7_END pins are connected to LEDs as indicators of device status. This is
possible because all of these pins and signals were designed to have timing
compatible with both microprocessor interface and manual LED indication. A
bias must be applied to the electrets microphone in order to power its built-in
circuitry. The ground return of this bias network is connected to the /Busy.
This configuration saves power when record mode. Both pins 18 and 19,
MicIn and MicRef, must be AC coupled to the microphone network in order to
block the DC biasing voltage. Figure 3 shows the device configured in random
access mode. The device is using eight Message segments, the maximum
available, in this mode. Note that message trigger pins that are not used, for
modes with less than eight segments, can be left unconnected with the
exception of pin /M8_OPTION which should be pulled to VCC through a
100k resistor.
Table 5.3 shows the Pin Description & Functionality of APR 9600 in different
modes.

The following table 5.4 , 5.5, 5.5 list Absolute Maximum Ratings, DC
Characteristics, and Analog Characteristics for the APR9600 device.

Use a good quality 8 Ohm speaker with a cavity such as speakers for
computer sound systems. Do not use a bare speaker which gives you
degraded sound.
For better sound replay quality, speak with a distance to the on-board
microphone and speak clearly. Also keep the background noise as low as
possible.
For even better sound replay quality, use microphone input or Audio
Line In input. If Audio Line In is used, the amplitude of input signal
should be < 100 mV p-p.
CHAPTER - 6

6.1 CONCLUSION
Sensor technologies are developing fast with time and innovative
technology. This field is one of the most interesting areas to be discovered
continuously. So many new sensor designs will come out and develop in future
hence increasing the competitiveness between researchers. This project is a
minor contribution to instill the interest of people. It also gives a very basic
understanding which will be a good learning process to the beginner. The
hardware and software part of this project is working based on the objectives
mentioned before and based on the conduct test or experiments held towards
the end this project, the results are stable and working as it should be. This
project can be concluded that the target to develop the security system based
GSM has achieved. GSM technology capable solution has proved to be
controlled remotely, provide home security and is cost effective as compared
to the previously existing systems without Gas sensor and Fire sensor in one
product or circuit.
designed keeping this particular aspect in mind. The security system is made
fool proof to the maximum extent possible. In this project we make use of a
microcontroller as the main controller to control the input and the output that
reach the controller. There is a large scope in the future enhancements that can
be provided along with this project like actuating a fire detection alarm or
sensing a leakage of gas etc.
We conclude that we have 100% successfully fulfilled our project and
we have confidence that our project will provide full security for Industries,
Hotels, Restaurants, Homes. Hence we can conclude that the required goals
and objectives of Interactive Dial up based Home Security System have been
achieved. The security system with 3 combinations function has been
implemented. This project will benefit all the people in monitoring their
property even when they are away from home with low cost of home security
system. It is most advantageous as compared to other alternatives available for
providing security since it is an integrated system. In this project security plays
an important role with low cost and with many advantages. The system is
simple, secure, reliable and fast. It can be operated by anyone who knows
nothing about its software and effective.
So, our project will help a lot everywhere because of its security and
alertness. We will still develop and extend our project to maximum level to
safeguard the places and extend the service with good response.
6.2 RESULT
This project is microcontroller based project. A Gas sensor is used to
detect dangerous gas leaks in the home kitchen, large scale industries,
manufacturing plants, skyscrapers, lodge, hotels etc. Mainly since its a small
unit we can ideally implement to detect dangerous gas leaks in the kitchen. For
large scale, we have to implement complex circuitry with same logic. The
sensor can also sense LPG leak in your car or in a service station, storage tank
environment. This unit can be easily incorporated into an alarm unit, to sound
an alarm. The sensor has excellent sensitivity combined with a quick response
time. When GAS leakage is detected above 8 ppm, the sensor sends electrical
signal to microcontroller which in turn sends ON signal exhaust fan, alarm,
auto dial up and APR. So the four systems start working simultaneously to
enhance security & preserve accidents. First the exhaust fan will start that will
try to reduce the concentration of the gas so that any incident can be avoided;
secondly the alarm will start and will warn the people of surrounding areas.
Lastly, the auto dial up will start working and will call to the to the authorized
person using cellular network called GSM specifically to the last called
number or stored number of the mobile telephony, and lastly the APR with the
help of speaker will give the message of gas leakage to the called person.
Another feature that we added to our project is a fire sensor. A fire
sensor will start working in case if there occurred fire due to some sparking or
blazes elements present there, then fire sensor will do the same work as done
by gas sensor. It will send signals to the microcontroller which in turn will give
signal to alarm and the alarm will start. Also it will give signal to the APR and
auto dial up system. The auto dial up system as said above will call the last
caller and the speaker connected to APR will give the message about the fire.
6.3 LIMITATION
Only Detection, not Blockage
The major limitation of the project is that it can only detect the gas leakage
and can alert about it but it cant stop the leakage.
High Sensitivity of Heat Sensor
The fire sensor that we used is highly sensitive, in case of normal heat in
the kitchen or industry it will start working and alarm will be on.
Beside these limitations there are some limitations of gas sensor used.
There are some conditions that must be prohibited while using gas sensor.
They are as follows:
Exposure to Organic Silicon Steam
Organic silicon steam cause sensors invalid, sensors must be avoid
exposing to silicon bond, fixture, silicon latex, putty or plastic contain silicon
environment.
High Corrosive Gas
If the sensors exposed to high concentration corrosive gas (such as H2Sz,
SOXCl2, HCl etc), it will not only result in corrosion of sensors structure, also it
cause sincere sensitivity attenuation.
Alkali, Corrosive Alkali Metals Salt, Halogen Pollution
The sensors performance will be changed badly if sensors be sprayed
polluted by alkali metals salt especially brine, or be exposed to halogen such
as florin.
Touch Water
Sensitivity of the sensors will be reduced when spattered or dipped in
water.
Freezing
Do avoid icing on sensors surface, otherwise sensor would lose sensitivity.
Applied Voltage Higher
Applied voltage on sensor should not be higher than stipulated value,
otherwise it cause down-line or heater damaged, and bring on sensors
sensitivity characteristic changed badly.
6.4 FUTURE SCOPE

A relay contact may be used to operate a camera when it detects an
intruder which helps in finding the intruders identity easily.
As the system is flexible to dial any previously stored number, this
system can be used in any places wherever security is needed like
industries, hotels, houses, and shops, restaurants etc.
A more advancement can be brought to the system using the
computer control, so the entire process can be analyzed effectively.
By adding LCD display and with slight changes, we can update
information, which was dumped in microcontroller.
Entry faces identification with web camera.
A water sprinkling system can also be connected to it.
More dial up option up to 25 last redial list are available which can
be implemented for better security results.
BIBLIOGRAPHY
[1] Adel S. Sedra, Kenneth Carless Smith, Microelectronic Circuits

, Volume 1, Oxford University Press, 2004
[2] Muhammad Ali Mazidi, Rolin McKinley, Janice Gillispie Mazidi, The
8051 Microcontroller and Embedded Systems Using Assembly and C,
Second edition, Pearson Education India, 2007
[3] U.A.Bakshi and A.P.Godse, Linear Integrated Circuits, Technical
Publications Pune, First Edition 2010.
[4] M. Gopal, I.J. Nagrath, Control Systems Engineering 4/e, New Age
Publications (Academic), India
[5] Dogan Ibrahim, Microcontroller Projects in C for the 8051, Newnes
(June 2000)
[6] Datasheet Catalog, www.datasheetcatalog.com
[7] All Datasheet, www.alldatasheet.com/
[8] Fairchild Semiconductor, www.fairchildsemi.com
[9] Atmel Technology, http://www.atmel.com/
[10] Electronic for You, www.electronicsforu.com
[11] How Stuff Works, http://www.howstuffworks.com
[12] Aplus Integrated Circuit Inc., http://www.aplusinc.com.tw/
[13] Google Books, books.google.co.in

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Pollution detection system with intelligent

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY,

ELECTRONICS AND COMMUNICATION ENGINEERING

Under the esteemed guidance of

(Internal Guide Name), Asst. Professor

ABDUL KALAM INSTITUTE OF TECHNOLOGICAL SCIENCES

ABDUL KALAM INSTITUTE OF TECHNOLOGICAL

Head of the Department

INSTITUTE OF TECHNOLOGICAL SCIENCESin partial

fulfillment of the requirement for the award of degree of Bachelor of Technology in

great source of inspiration to my work.

For the award of the degree of

Krishna Institute of Management & Technology

Rishabh Singh (0838131029)

DEPARTMENT OF ELECTRONICS & COMMUNICATION

This is to certify that the project entitled "Pollution detection system

Head of the Department

continuous encouragement and supervision throughout the course of

2.2.1 AT89C51 MICRO CONTROLLER

3.2 ARCHITECTURE OF 8951 FAMILY 26

4.3.1 WHY DO WE NEED CROSS COMPILER? 75

5.5 MICROPROCESSOR CONTROLLED MESSAGE

Table 3.11 Baud Rate Comparison for XTAL = 11.0592 MHZ42

Fig 3.9 Logic Operation

AGC Automatic Gain Control

is available for each sensor at the corresponding wiring terminals.

electronic sensors to detect the smoke, heat or flames and providing

last decade due to advances in sensor, microelectronics and

When a deoxidizing gas is introduced in the equation (such as

damaged accidentally or on purpose the monitoring station will

full wave rectifier is used to rectify the ac output of secondary of

status checking. To provide the public with a cost effective wireless

have secondary storage devices such as the CDROM or the floppy

AT89C51 Micro controller

2.2.1 AT89C51 MICRO CONTROLLER

compatible with the industry standard MCS-51 instruction set and

positive supply. Pin no 1 is connected to the ground pin. Pin no 7 is

Fig 2.1 Gas & Fire Sensor using 555 IC

Fig 2.2 Structure & Configuration of Gas Sensor

Power of Sensitivity body (Ps): PS=Vc2Rs/ (RS+RL) 2

2.5.5 CONDITIONS THAT MUST BE AVOIDED

Soldering flux: Rosin soldering flux contains least chlorine

An ALARM is used to indicate detection in home as well as in

Fig 2.4 Basic Relay Block with Handsfree

Fig 2.5 Pin Diagram of IC 7805?

Pin No Function Name

2.14 DIGITAL VOICE PROCESSOR USING APR 9600

memory process in which each cell is capable of storing up to 256

applied to pin 2. Output is taken from pin 3. Pin 4 is usually

Fig2.7 555 Monostable-Multivibrator-Operation

3.1 AT89C51 MICROCONTROLLER

monolithic chip, the ATMEL AT89C51 is a powerful microcomputer

Fig 3.1 Basic Architecture of AT89C51 Microcontroller

communication, hardware interrupts, timer inputs and read/write

Fig 3.2 Pin Diagram of Micro controller 8951

20 Ground (0V). Ground

Program store enable; Read from external program memory.

Low-order address bits when interfacing with external memory.

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The

P3.0 RXD (serial input port)

Fig 3.3 Oscillator connection

Data Data Data Data