PSoC Creator Example Project

CSD ADC Single Voltage Input Example Project

1.0

Features
ADC as a voltage ADC, with input range from 0 to 3.3 V
Perform a simple two-point calibration to improve ADC accuracy
PWM control using potentiometer
Sends measurement to a host (PC) using UART
General Description
This is a PSoC Creator example project. Analog to digital converters are important to all mixed
signal designs. With a couple of external resistors, the PSoC 4000 can be configured as an
ADC. This project demonstrates a voltage ADC, how to perform a two-point calibration, and how
the firmware can interpret the input to control a PWM and send data using UART.

Development Kit Configuration

The instructions below describe a stepwise procedure to be followed for testing this design with
the CY8CKIT-040 with a CY8CKIT-019 attached. Two external resistors are required: 1M and
220k. One external double-throw switch is recommended. This design can be validated on
any other PSoC 4000 development platforms.
1. Use jumper J9 on the CY8CKIT-040 to select 3.3 V.
2. Attach the CY8CKIT-019. (Some of the 019 pins will not have a corresponding socket on
the 040. This is okay.)
The CY8CKIT-040 and the CY8CKIT-019 have different labels for their pins. For this
reason, both labels are noted, with the 019 kit first and the 040 following in parentheses,
in these instructions. The bottom of the 040 kit also shows both labels.
3. Connect the 220k resistor from A3 (P0.4) to GND (GND).
4. Connect the 1M resistor from the middle of the double-throw switch to D0 (P0.5).
5. Connect the top switch terminal to A1 (P0.1), and make sure the switch is up.
6. Connect the bottom switch terminal to the potentiometer POT (or other voltage input).
7. Connect an oscilloscope to D3 (P3.2) the PWM output.

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PSoC Creator Example Project

CSD ADC Single Voltage Input Example Project

8. Connect D13 (P1.7) to P12.6 (P12.6).

9. Connect the development kit to the PC using a USB cable.
10. Build the ADC_VoltageInp project and program the device.
If you didnt remember to connect P0.1 (A1) through the switch, through the 1M
resistor to D0 (P0.5), the calibration will be in error. Set the switch up and press the
Reset button on the CY8CKIT-040.
11. Wait a moment for the ADC to calibrate.
12. Throw the switch to connect the input voltage to the 1 M resistor.
13. Adjust the potentiometer to raise and lower the input voltage.
14. Observe the change in the duty-cycle of the PWM on the oscilloscope.
15. Open the serial-port data-viewer such as Brays Terminal and observe the measured and
calibrated voltages.
The CY8CKIT-040 programming/debugging channel is connected to the UART pin
(P12.6). This will cause Terminal to receive erroneous data during chip programming.
This is not an error and will not affect the expected results.
It is possible to unsolder the resistor R57 to disconnect the programming/debugging
channel from P12.6. This example project does not contain instructions to perform such
a modification.
Figure 1. Development Kit Configuration

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CSD ADC Single Voltage Input Example Project

Project Configuration
This example project primarily uses the CSD ADC, SW Tx UART, and PWM components. It also
uses Pins, a Clock, a 7bit IDAC, and an Analog Mux. Shown in Figure 2 is the Top Design
schematic of this project.
Figure 2. Top Design Schematic

Component Configuration
PSoC 4000 ADC Component
The ADC component has no parameters and requires no configuration.

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PSoC Creator Example Project

CSD ADC Single Voltage Input Example Project

TCPWM Component
The purpose of the TCPWM is to output a pulse stream with a duty cycle that is dependent on
the input voltage. The TCPWM component is configured to be a PWM, as shown in Figure 3.
Selecting the PWM radio button enables the PWM tab seen in Figure 3.
Figure 3. TCPWM Configuration tab

The configuration for the PWM tab is shown in Figure 4. The duty cycle is determined by the
Period and Compare parameters. Its initial duty cycle is 100%, but is adjusted by firmware as
the project runs.

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CSD ADC Single Voltage Input Example Project

Figure 4. TCPWM PWM tab

SW Tx UART Component
This component is placed to send the converted voltage information to the external host via
UART. Note that this component is only a transmitter. By default, in this project, the BaudRate
parameter is set to 115,200. The configuration for the SW Tx UART is shown in Figure 5.

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PSoC Creator Example Project

CSD ADC Single Voltage Input Example Project

Figure 5. SW Tx UART Basic tab

IDAC Component
The PSoC 4000 has two internal IDACs, and the IDAC component has options to configure it as
either 8-bit or 7-bit. However, the 8-bit hardware is used internally by the ADC component, so
the Resolution parameter of this IDAC must be 7-bit. The Polarity, Value, and Range
parameters can be fully specified, their value does not affect the ADC. Only the Resolution
parameter must be set (to 7-bit), and the IDAC must be enabled (such as by a call to the
IDAC_Start() API). The default configuration of the IDAC can be seen in Figure 6. IDAC
Configure TabFigure 6.

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CSD ADC Single Voltage Input Example Project

Figure 6. IDAC Configure Tab

Project Description
When initialized, the ADC performs a self-calibration (no input) using the ADCs API. Then a
two-point calibration is performed in firmware.
The input voltage is an unknown. Assuming the ADC interprets the input with some offset and
gain error, ti can be modeled as a linear equation:
. Where y is the measured
voltage, m is some gain error, x is the unknown true voltage, and b is a voltage offset. We can
calculate values for m and b by using two known voltages for inputs.
The input is set to a low-driven pin and measured by the ADC, then set to a high-driven pin and
measured. This gives the two points needed for calibration
Using the known voltages of low and high-driven pins (Defined in main.c as VSS_MV = 1mV and
VDD_MV = 3408mV.), an offset and a gain adjustment are calculated.
To calculate the offset, first find the slope between the two input points.

Then use the second point and the slope-intercept formula to calculate the offset.

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PSoC Creator Example Project

CSD ADC Single Voltage Input Example Project

Once the offset is calculated, a slope adjustment is calculated.

All future measurements are adjusted to meet the calibration by applying the offset first, then the
gain adjustment.

These calculations are described in the code of main.c, using actual variable names and some
minor adjustments for integer arithmetic. The offset and gain adjustment values are sent over
UART before the project enters an infinite loop.
Inside the infinite loop, the ADC takes a measurement. The measurement is adjusted to the twopoint-calibrated value. Then both values are sent over UART, and the PWM duty cycle is set to
be the ratio of measured input voltage to maximum.

UART Data Viewing

PSoC 5LP device on the CY8CKIT-040 kit acts as a USB-UART Bridge. PSoC 4 device sends
the voltage conversion message to the PSoC 5LP device using UART. PSoC 5LP translates it
to a USB packet and sends the data to the PC with USB enumerated as a virtual COM port. For
viewing this data, use the serial port viewer tools such as Brays Terminal with the following
settings in the tool:
Baud Rate

: 115200bps

Data Bit

: 8 bits

Parity

: None

Stop

: 1 bit

Flow Control : None

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PSoC Creator Example Project

CSD ADC Single Voltage Input Example Project

Figure 7. Terminal settings for receiving on UART

The calibration message will be:

<cr><lf>Voltage Offset: <offset><cr><lf>
Gain Adjust: <gain adjustment><cr><lf>
Switch to source under test.<cr><lf>

The measurements messages will be:

Voltage in mV. Uncalibrated vs Calibrated: <UnCalibrated>, <Calibrated><cr><lf>

Expected Results
The output pin of the PWM is also connected to the CY8CKIT-040 red LED which is active low.
At low input voltage, the PWM duty cycle will be small and the LED will appear to be constantly
on. As input voltage increases, the duty cycle will increase and the LED will begin blinking. As
input voltage increases further, the LED will be lit for decreasing amounts of time, causing it to
appear to dim.
The UART transmission of a sweep over a 3.3 V range is shown in Figure 8.

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PSoC Creator Example Project

CSD ADC Single Voltage Input Example Project

Figure 8. Terminal expected result

The output of the PWM of a different sweep over a 3.3 V range is shown in Figure 9. The PWM
updates at the same time the UART transmits, which is every 500 ms.
Figure 9. Logic Analyzer PWM expected result

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Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in lifesupport systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress product in a life-support systems application
implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
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