NTD78N03

Power MOSFET
25 V, 78 A, Single NChannel, DPAK
Features

Low RDS(on)
Optimized Gate Charge
PbFree Packages are Available

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V(BR)DSS

Applications

Desktop VCORE
DCDC Converters
Low Side Switch

RDS(on) TYP

ID MAX

4.6 @ 10 V

25 V

78 A

6.5 @ 4.5 V
D

MAXIMUM RATINGS (TJ = 25C unless otherwise noted)

Parameter
DraintoSource Voltage
GatetoSource Voltage
Continuous Drain
Current (Note 1)

TC = 25C

Power Dissipation
(Note 1)

TC = 25C

Unit

25

VGS

"20

ID

14.8

TC = 85C

NChannel
G
S

11.5
PD

2.3

4
ID

TC = 85C

11.4

1 2

8.8

TC = 25C

PD

1.4

Continuous Drain
Current (RqJC)

TC = 25C

ID

78

Power Dissipation
(RqJC)

TC = 25C

Pulsed Drain Current

Current Limited by Package

TC = 85C

tp = 10 ms
TA = 25C

Drain to Source dV/dt

Operating Junction and Storage Temperature
Source Current (Body Diode)

56
PD

64

IDM

210

IDmaxPkg

45

dV/dt

8.0

V/ns

TJ, Tstg

55 to 175

IS

78

Single Pulse DraintoSource Avalanche

Energy (VDD = 24 V, VGS = 10 V,
L = 5.0 mH, IL(pk) = 17 A, RG = 25 W)

EAS

722.5

mJ

Lead Temperature for Soldering Purposes

(1/8 from case for 10 seconds)

TL

260

JunctiontoCase (Drain)

RqJC

1.95

C/W

JunctiontoAmbient Steady State (Note 1)

RqJA

65

JunctiontoAmbient Steady State (Note 2)

RqJA

110

THERMAL RESISTANCE

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in
sq [1 oz] including traces).
2. Surfacemounted on FR4 board using the minimum recommended pad size.

Semiconductor Components Industries, LLC, 2006

September, 2006 Rev. 6

1
2

3
CASE 369AA
CASE 369D
DPAK
DPAK
(Bend Lead) (Straight Lead)
STYLE 2
STYLE 2

2 3

CASE 369AD
IPAK
(Straight Lead)

MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain

4
Drain

4
Drain
YWW
78
N03G

TC = 25C
Steady
State

YWW
78
N03G

Power Dissipation
(Note 2)

Value

VDSS

YWW
78
N03G

Continuous Drain
Current (Note 2)

Symbol

2
1 2 3
1 Drain 3
Gate Source Gate Drain Source 1 2 3
Gate Drain Source
Y
WW
78N03
G

= Year
= Work Week
= Device Code
= PbFree Package

ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.

Publication Order Number:

NTD78N03/D

NTD78N03
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)
Symbol

Test Condition

Min

DraintoSource Breakdown Voltage

V(BR)DSS

VGS = 0 V, ID = 250 mA

25

DraintoSource Breakdown Voltage

Temperature Coefficient

V(BR)DSS/TJ

Parameter

Typ

Max

Unit

OFF CHARACTERISTICS

Zero Gate Voltage Drain Current

GatetoSource Leakage Current

IDSS

V
24

VGS = 0 V,
VDS = 20 V

mV/C

TJ = 25C

1.5

TJ = 125C

10

IGSS

VDS = 0 V, VGS = "20 V

VGS(TH)

VGS = VDS, ID = 250 mA

mA

"100

nA

3.0

ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
DraintoSource On Resistance

Forward Transconductance

VGS(TH)/TJ

1.0

1.6
5.0

RDS(on)

mV/C

VGS = 10 V, ID = 78 A

4.6

6.0

VGS = 4.5 V, ID = 36 A

6.5

7.8

VDS = 10 V, ID = 15 A

22

gFS

mW

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance

Ciss

1920
VGS = 0 V, f = 1.0 MHz,
VDS = 12 V

Output Capacitance

Coss

Reverse Transfer Capacitance

Crss

420

Total Gate Charge

QG(TOT)

25.5

Threshold Gate Charge

QG(TH)

GatetoSource Charge

QGS

GatetoDrain Charge

QGD

VGS = 4.5 V, VDS = 20 V,

ID = 20 A

2250

960

pF

35

2.4
nC

5.3
18.2

SWITCHING CHARACTERISTICS (Note 4)

TurnOn Delay Time
Rise Time
TurnOff Delay Time
Fall Time

td(on)

11

tr

68

td(off)

VGS = 4.5 V, VDS = 20 V,

ID = 20 A, RG = 3.0 W

tf

ns

23
42

DRAINSOURCE DIODE CHARACTERISTICS

Forward Diode Voltage

VSD

Reverse Recovery Time

tRR

Charge Time

ta

Discharge Time

tb

Reverse Recovery Time

VGS = 0 V,
IS = 20 A

TJ = 25C

0.83

TJ = 125C

0.7

1.0

39
VGS = 0 V, dIs/dt = 100 A/ms,
IS = 20 A

17.8

ns

21

QRR

33

Source Inductance

LS

2.49

Drain Inductance

LD

nC

PACKAGE PARASITIC VALUES

0.02
Ta = 25C

Gate Inductance

LG

3.46

Gate Resistance

RG

1.0

3. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%.

4. Switching characteristics are independent of operating junction temperatures.

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2

nH

NTD78N03
100
VGS = 4 V

80

3.8 V

4.5 V
5V

3.6 V

9V

3.4 V

70
60
50

3.2 V

40
30

3V

20

TJ = 25C

10

2.6 V

0
0

10

Figure 1. OnRegion Characteristics

Figure 2. Transfer Characteristics

0.01
VGS = 10 V

0.008

TJ = 125C

0.007

0.006

TJ = 25C

0.005
0.004
0.003

TJ = 55C

0.002

20

30

40

50

60

70

80

TJ = 25C

0.01

VGS = 4.5 V

VGS = 10 V
0.005

0
55

60

65

70

75

80

ID, DRAIN CURRENT (A)

Figure 3. OnResistance versus

Drain Current and Temperature

Figure 4. OnResistance versus Drain Current

and Gate Voltage

3
2.5

0.015

ID, DRAIN CURRENT (A)

100000
VGS = 0 V

ID = 78 A
VDS = 4.5 V
10000

IDSS, LEAKAGE (nA)

RDS(on), DRAINTOSOURCE RESISTANCE

(NORMALIZED)

0.001

VGS, GATETOSOURCE VOLTAGE (V)

0.009

0
10

160
150 VDS 10 V
140
130
120
110
100
90
80
70
60
50
TJ = 125C
40
30
TJ = 25C
20
TJ = 55C
10
0
1
2
0
3
4

VDS, DRAINTOSOURCE VOLTAGE (V)

RDS(on), DRAINTOSOURCE RESISTANCE (W)

RDS(on), DRAINTOSOURCE RESISTANCE (W)

ID, DRAIN CURRENT (AMPS)

ID, DRAIN CURRENT (AMPS)

90

2
1.5
1

TJ = 150C
TJ = 125C

1000

100

0.5
0
50

25

25

50

75

100

125

150

175

10

10

15

20

TJ, JUNCTION TEMPERATURE (C)

VDS, DRAINTOSOURCE VOLTAGE (V)

Figure 5. OnResistance Variation with

Temperature

Figure 6. DrainToSource Leakage

Current versus Voltage

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3

25

VDS = 0 V

VGS = 0 V

TJ = 25C

C, CAPACITANCE (pF)

5000
Ciss
4000
Crss
3000
2000

Ciss

1000

Coss

0
10

Crss
5

VGS

VDS

10

15

20

25

20

QT
VDS

15

VGS

10

Q2

Q1

2
ID = 20 A
TJ = 25C
0

VDS, DRAINTOSOURCE VOLTAGE (V)

6000

VGS, GATETOSOURCE VOLTAGE (V)

NTD78N03

10

15

20

25

30

0
35

Qg, TOTAL GATE CHARGE (nC)

GATETOSOURCE OR DRAINTOSOURCE VOLTAGE (V)

Figure 8. GatetoSource and

DraintoSource Voltage versus Total Charge

Figure 7. Capacitance Variation

80

1000

t, TIME (ns)

100

IS, SOURCE CURRENT (AMPS)

VDS = 20 V
ID = 20 A
VGS = 4.5 V
tr
tf
td(off)
td(on)

10

10
RG, GATE RESISTANCE (OHMS)

100

Figure 9. Resistive Switching Time

Variation versus Gate Resistance

EAS, SINGLE PULSE DRAINTO

SOURCE AVALANCHE ENERGY (mJ)

I D, DRAIN CURRENT (AMPS)

10 ms
100
100 ms
1 ms
VGS = 20 V
SINGLE PULSE
TC = 25C

10 ms
dc

RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT

0.1
0.1

50
40
30
20
10
0.6
0.7
0.8
0.9
1.0
1.1
VSD, SOURCETODRAIN VOLTAGE (V)

1.2

Figure 10. Diode Forward Voltage versus Current

1000

10

60

0
0.5

1
1

VGS = 0 V
70 T = 25C
J

1
10
VDS, DRAINTOSOURCE VOLTAGE (VOLTS)

100

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

800
ID = 78 A

700
600
500
400
300
200
100
0
25

50
75
100
125
150
TJ, STARTING JUNCTION TEMPERATURE (C)

175

Figure 12. Maximum Avalanche Energy versus

Starting Junction Temperature

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4

NTD78N03
di/dt
IS
trr
ta

tb
TIME
0.25 IS

tp
IS

Figure 13. Diode Reverse Recovery Waveform

Rthja(t), EFFECTIVE TRANSIENT

THERMAL RESISTANCE

1000

MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT

DUTY CYCLE
100

D = 0.5
0.2
0.1
0.05
0.02
0.01

10

P(pk)
t1

0.1

t2
DUTY CYCLE, D = t1/t2

SINGLE PULSE

RqJA(t) = r(t) RqJA

D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) TA = P(pk) RqJA(t)

0.01
1E05

1E04

1E03

1E02

1E01
t, TIME (seconds)

1E+00

1E+01

1E+02

1E+03

Figure 14. Thermal Response Various Duty Cycles

ORDERING INFORMATION
Package

Shipping

DPAK

75 Units/Rail

NTD78N03G

DPAK
(PbFree)

75 Units/Rail

NTD78N03T4

DPAK

Order Number
NTD78N03

NTD78N03T4G

DPAK
(PbFree)

NTD78N031

DPAK Straight Lead

NTD78N031G

DPAK Straight Lead

(PbFree)

NTD78N0335

DPAK3 Straight Lead

(3.5 " 0.15 mm)

NTD78N0335G

DPAK3 Straight Lead

(3.5 " 0.15 mm)
(PbFree)

2500 Tape & Reel

75 Units/Rail

75 Units/Rail

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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5

NTD78N03
PACKAGE DIMENSIONS

DPAK (SINGLE GUAGE)

CASE 369AA01
ISSUE A

T
C

B
V

NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.

SEATING
PLANE

R
4

A
S

DIM
A
B
C
D
E
F
H
J
L
R
S
U
V
Z

Z
H

J
L
D 2 PL
0.13 (0.005)

INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.025 0.035
0.018 0.024
0.030 0.045
0.386 0.410
0.018 0.023
0.090 BSC
0.180 0.215
0.024 0.040
0.020

0.035 0.050
0.155

STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN

SOLDERING FOOTPRINT*
6.20
0.244

2.58
0.101

5.80
0.228

3.0
0.118

1.6
0.063

6.172
0.243

SCALE 3:1

mm
inches

*For additional information on our PbFree strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

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6

MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.63
0.89
0.46
0.61
0.77
1.14
9.80 10.40
0.46
0.58
2.29 BSC
4.57
5.45
0.60
1.01
0.51

0.89
1.27
3.93

NTD78N03
PACKAGE DIMENSIONS
DPAK
CASE 369D01
ISSUE B
C

B
V

NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.

R
4

DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z

Z
A

T
SEATING
PLANE

H
D
G

MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93

STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN

3 PL

0.13 (0.005)

INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155

3.5 MM IPAK, STRAIGHT LEAD

CASE 369AD01
ISSUE O
E

E3

L2

E2

A1

D2
D

L1

T
SEATING
PLANE

NOTES:
1.. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2.. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM TERMINAL TIP.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD GATE OR MOLD FLASH.

A1

b1
2X

A2
3X

b
0.13

E2

T
D2

DIM
A
A1
A2
b
b1
D
D2
E
E2
E3
e
L
L1
L2

MILLIMETERS
MIN
MAX
2.19
2.38
0.46
0.60
0.87
1.10
0.69
0.89
0.77
1.10
5.97
6.22
4.80

6.35
6.73
4.70

4.45
5.46
2.28 BSC
3.40
3.60

2.10
0.89
1.27

OPTIONAL
CONSTRUCTION

ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTD78N03/D