LABORATORY MANUAL

ELECTRONIC CIRCUITS LAB

(STUDENT VERSION )
2008-2009
 EXP . NO. 1. TWO STAGE RC-COUPLED AMPLIFIER

1. AIM:

To Design and study the response of a two stage RC-coupled amplifier and calculation of
gain and band width.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS
1. CRO (Dual channel)DC-20 MHz 1 No
2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii.COMPONENTS:

take from circuit used

3. THEORY:

As the gain provided by a single stage amplifier is usually not sufficient to drive
the load, so to achieve extra gain multi-stage amplifier are used. In multi-stage amplifiers
output of one-stage is coupled to the input of the next stage. The coupling of one stage to
another is done with the help of some coupling devices. If it is coupled by RC then the
amplifier is called RC-coupled amplifier.
Frequency response of an amplifier is defined as the variation of gain with
respective frequency. The gain of the amplifier increases as the frequency increases from
zero till it becomes maximum at lower cut-off frequency and remains constant till higher
cut-off frequency and then it falls again as the frequency increases.
At low frequencies the reactance of coupling capacitor CC is quite high and hence
very small part of signal will pass through from one stage to the next stage.
At high frequencies the reactance of inter electrode capacitance is very small and
behaves as a short circuit. This increases the loading effect on next stage and service to
reduce the voltage gain due to these reasons the voltage gain drops at high frequencies.
At mid frequencies the effect of coupling capacitors is negligible and acts like
short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit
becomes resistive at mid frequencies and the voltage gain remains constant during this
range.
4. CIRCUIT DIAGRAM:

Vcc 12.0

47 .0k

2.2 k

47 .0k

2.2 k
10.0u 10.0k 10.0u
8.94v 8. 94v

10 .0u
10.0k 10.0u
T1 !NPN T2 !NPN
2.05v 2.05v Vout+
1.4v 1. 4v
V

10 .0k

2.2 k
10 .0k
V in

1.0 k

1.0 k
10 0.0 u

10 0.0 u
10 .0k
5. PROCEDURE:

i.. Connect the circuit on bread board as shown in the circuit diagram.

ii. Measure base ,emitter and collector D.C voltages of both stages and compare
against estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vb2, Vc2, Ve2

iii. By keeping the amplitude of the input signal constant, vary the frequency from zero
to 1 MHz.

iv. Note down the amplitude of the output signal for corresponding values of input
frequencies.

v. Calculate the voltage gain in decibels.

vi. Plot in semi-log graph between gain vs frequency and calculate the band width.
6. OBSERVATIONS:

S.NO FREQUENCY VOUT GAIN= VOUT /VIN GAIN in dB

7. CALCULATIONS:

i. Determine lower cut-off frequency and upper cut-off frequency from the graph.

ii. Calculate Band width.

9. RESULT:

i. Lower cut-off frequency =

ii. Upper cut-off frequency =

iii. Band width =

15. QUESTIONS:

i. What are the advantages and disadvantages of multi-stage amplifiers?

ii. Why gain falls at HF and LF?

iii. Why the gain remains constant at MF?

iv. Explain the function of emitter bypass capacitor, Ce?

v. How the band width will effect as more number of stages are cascaded?

vi. Define frequency response?

vii. Give the formula for effective lower cut-off frequency, when N-number of stages
are cascaded.
viii. Explain the effect of coupling capacitors and inter-electrode capacitances on
overall gain.

ix. By how many times effective upper cut-off frequency will be reduced, if three
identical stages are cascaded?

x. Mention the applications of two-stage RC-coupled amplifiers.

 EXP.NO.2 SERIES VOLTAGE REGULATOR

1. AIM:

To design a transistorized series voltage regulator and study the regulation action for

i. Different values of input voltages

ii Different values of load resistors and also to find percentage regulation.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 Digit LCD hand held 1No

ii. COMPONENTS:

1. 1k Resistor 1 No.
2. 560 Resistor 1 No.
3. 1k , 2k , 4.7k, 10k (load resistors ) 1 No each.
4. Zener diode 1 No.
5. Transistor SL100 1 No.

All resistors are carbon / metal film W 5% unless otherwise specified.

3. THEORY:

Voltage regulator is a device designed to maintain the output voltage as nearly constant as
possible. It monitors the output voltage and generates feed back that automatically
increases are decreases the supply voltage to compensate for any changes in output
voltage that might occur because of change in load are changes in load voltages.
In transistorized series voltage regulator the control element is a transistor which
is in series with load. must be operated in reverse break down region, where it provides
constant voltage irrespective of changes in applied voltages.The output voltage of the
series voltage regulator is Vo = Vz Vbe.
 Since, Vz is constant, any change in Vo must cause a change in Vbe in order to
maintain the above equation. So, when Vo decreases Vbe increases, which causes
the transistor to conduct more and to produce more load current, this increase in
load causes an increase in Vo and makes Vo as constant. Similarly, the regulation
action happens when Vo increases also.

4. CIRCUIT DIAGRAM:

560.0 T1 !NPN
1.0k

Vout

Z1 BZD27-C5V1
+
V

1.0k
10 30v
Vin 1.0

5. PROCEDURE:

i. Connect the circuit as shown in the circuit diagram.

ii. Apply the input voltage from power supply.

iii. Measure base ,emitter and collector D.C voltages and compare against estimated
values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vz

iv. For a specific value of load resistor, vary the input voltage from 10 to a maximum
of 20 volts and not the values of output voltage.

v. Change the load resistor and repeat steps 2 and 3.

vi. Remove the load resistor and note down the voltage at no load.
vii. Find percentage regulation.
V NL V FL
Percentage regulation = x100
V FL
viii. Plot the graph for load regulation and line regulation.

6. OBSERVATIONS:

S.no Vin Output voltage

RL= RL= RL=

7. CALCULATIONS:

V NL V FL
Percentage load regulation = x100 =
V FL

Percentage Line Regulation = (change in output ) / (change in input) X 100

9. RESULT:

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

15. QUESTIONS:

i. Define voltage regulator.

ii. Give the advantages of series voltage regulator. .

iii.. Explain the feed back mechanism in series voltage regulator.

iv. In series voltage regulator which is control element and explain its function.

v. Define load and line regulation. What is ideal value ?.

vi. Which element determines output ripple ?

vii. What determines maximum load current allowed in this circuit ?

viii. Mention the applications of series voltage regulator.

ix. Define no load voltage and full load voltage.

x. Explain the term percentage regulation.

 EXP .NO. 3 SHUNT VOLTAGE REGULATOR

1. AIM:

To design a transistorized shunt voltage regulator and observing the regulation action for

i. Different values of input voltages

ii Different values of load resistors and also to find percentage regulation.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 Digit LCD hand held 1No

ii.COMPONENTS:

1. 1k Resistor 1 No.
2. 560 Resistor 1 No.
3. 1k , 2k , 4.7k, 10k (load resistors ) 1 No each.
4. Zener diode IN 4007 - 1No.
5. Transistor SL100 2No.

All resistors are carbon / metal film W 5% unless otherwise specified.

3. THEORY:

A voltage regulator is a device or a combination of devices, design to maintain the output

voltage of a power supply as nearly constant as possible even if there are changes in load
or in input voltage. In shunt voltage regulator transistor Q1 acts as control element, which
is in shunt with load voltage.
The output voltage is given as

Vo = Vz + VR1 = Vz + Vbe1 + Vbe2

The regulation action of the circuit is explained below :

Since Vz is constant, any changes in output voltage reflects a propositional
change in R1. If the output voltage decreases, voltage across R1 decreases which in turn
decreases the base voltage of Q2. As a result the base current of Q1 decreases which
allows the load voltage to rise and makes it constant the same regulation action follows
even if the output voltage increases.

4. CIRCUIT DIAGRAM:

180.0

1N3 78 5
Vdc 2 0.0

Vz = 6.3v RL = 1k,2k ,

1.0 k
T1 !NPN
4.7k ,10k
1.0 k

5. PROCEDURE:

i. Connect the circuit as shown in the circuit diagram.

ii. Apply the input voltage from power supply.

iii. Measure base ,emitter and collector D.C voltages and compare against
estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vb2 ,Vc2, Ve2
Vz

iv. For a specific value of load resistor, vary the input voltage from zero to a
maximum of 20 volts and note the values of output voltage.
 iv. Change the load resistor and repeat steps 2 and 3.

v. Remove the load resistor and note down the voltage at no load.

vi. Find percentage regulation.

V NL V FL
Percentage regulation = x100
V FL
vii. Plot the graph for load regulation and line regulation.

6. OBSERVATIONS:

VOLTAGE AT NO-LOAD =

S.no Vin Output voltage

RL= RL= RL=

7. CALCULATIONS:

V NL V FL
Percentage regulation = x100
V FL

9. RESULT:

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

15. QUESTIONS:
i. Mention the differences between shunt and series voltage regulators.

ii. What is the function of Q1 and Q2 in the shunt regulator .circuit ?

iii. Define the line regulation. And load regulation.

iv. What is current through zener in this circuit ?

v.. When is dissipation maximum in this circuit ?

vi. In the circuit of shunt voltage regulator which element is considered control
element and explain its function.

vii. Can you do the experiment without Q2 ?.

viii. How can you increase current range of regulator ?

ix. . If output is 1.4 v for input of 20v what was the wrongly connected ?

x. Mention the applications of shunt voltage regulator.

 EXP. NO. 4 SERIES FED CLASS-A POWER AMPLIFIER

1. AIM:

To design a series fed class-A power amplifier in order to achieve max out put ac power
and efficiency.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii. COMPONENTS:

1. 20k Resistor 1 No.

2. 1k Resistor 2 No.
3. 0.1 F/16 V Electrolytic Capacitor 2 No.
4. Transistor SL100 1No.

All resistors are carbon / metal film W 5% unless otherwise specified.

3. THEORY:

The above circuit is called as series fed because the load RL is connected in series with
transistor output. It is also called as direct coupled amplifier.
ICQ = Zero signal collector current
VCEQ = Zero signal collector to emitter voltage
Power amplifiers are mainly used to deliver more power to the load. To deliver more
power it requires large input signals, so generally power amplifiers are preceded by a
series of voltage amplifiers.
In class-A power amplifiers, Q-point is located in the middle of DC-load line. So output
current flows for complete cycle of input signal. Under zero signal condition, maximum
power dissipation occurs across the transistor. As the input signal amplitude increases
power dissipation reduces.
The maximum theoretical efficiency is 25%.
4.CIRCUIT DIAGRAM:

Vcc 5.0

20 .0k

1.0 k
2.83v 100.0n
100.0n +
iL
T1 !NPN A +
666mv V
Vin

1.0 k
Vout

5. PROCEDURE:

i. Make the connections as per the circuit diagram.

ii. Measure base ,emitter and collector D.C voltages of both stages and compare
against estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
i.
iii. Apply the input at input terminals of the circuit from the function generator.

iv. Keep the input signal at constant frequency under mid frequency region and
adjust the amplitude such that output voltage undistorted.

v. Calculate the power efficiency and compare it with theoretical efficiency.

6. OBSERVATIONS:

Efficiency is defined as the ratio of AC output power to DC input power

DC input power = Vcc x ICQ

AC output power = VP-P2 / 8RL

7. CALCULATIONS:

Under zero signal condition:

Vcc = IBRB + VBE

IBQ =( Vcc - VBE ) / RB

ICQ = x IBQ

VCE = Vcc - ICRC

9. RESULT:

The maximum input signal amplitude which produces undistorted output signal is
_________

The practical efficiency of the circuit is ________

15. QUESTIONS:

i. Differentiate between voltage amplifier and power amplifier

ii. Why power amplifiers are considered as large signal amplifier?

iii. When does maximum power dissipation happen in this circuit ?.

iv. What is the maximum theoretical efficiency?

v. Sketch wave form of output current with respective input signal.

vi. What are the different types of class-A power amplifiers available?

vii. What is the theoretical efficiency of the transformer coupled class-A power
amplifier?

viii. What is difference in AC, DC load line?.

ix. How do you locate the Q-point ?

x. What are the applications of class-A power amplifier?

 EXP. NO. 5 TRANSFORMER COUPLED CLASS-A POWER AMPLIFIER

1.AIM:

To design a transformer coupled class-A power amplifier in order to achieve

maximum out put AC power and efficiency.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii. COMPONENTS :

1. 1k Resistor 1No.
2. 10k Resistor 1No.
3. 100K Resistor 1No.
4. 0.1 F/16 V Electrolytic Capacitor 1 No.
5. Impedance matching Transformer 1 No.
6. Transistor SL100 1No.

All resistors are carbon / metal film W 5% unless otherwise specified.

3. THEORY:

In direct coupled class-A power amplifier, power is wasted in load resistance which
leads to decrease in efficiency. To achieve maximum efficiency we can use
transformer to couple the load. Since transformer is used for impudence matching
which facilitates the coupling between lower resistance and source impudence? Due
to AC coupling no DC power is wasted in the load resistor. The load DC resistance of
transformer primary allows any desired level of collector current, while transferring
only variations to RL. By this way the efficiency is increased. The maximum
theoretical efficiency of transformer coupled power amplifier is 50%.
 Efficiency is defined as the ratio of AC output power to DC input power
DC input power = Vcc x ICQ
AC output power = VP-P2 / 8RL

4. CIRCUIT DIAGRAM:

+
A Ic
Vcc 12.0 Vout
T/ F +

1.0k
100.0k
V
11.49v
100.0n
T1 !NPN
626mv
10.0k

Vin

5. PROCEDURE:

i. Make the connections as per the circuit diagram.

ii. Measure base, emitter and collector D.C voltages and compare against
estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1

iii. Apply the input at input terminals of the circuit from the function
generator.
 iv. Keep the input signal at constant frequency under mid frequency region
and adjust the amplitude such that output voltage undistorted.

v. Calculate the power efficiency and compare it with theoretical efficiency.

6. OBSERVATIONS:

Efficiency is defined as the ratio of AC output power to DC input power

DC input power = Vcc x ICQ

AC output power = VP-P2 / 8RL

7. CALCULATIONS:

Input DC power = Vcc x ICQ

Output AC power = Vrms x Irms

= VPP2 / 8RL

OutputACpower
= InputDCpower

9. RESULT:

a) The maximum input signal amplitude which produces undistorted output

signal is _________
 15. QUESTIONS:

i. Differentiate between voltage amplifier and power amplifier

ii. Explain impedance matching provided by transformer?

iii . How do you determine ratings for transistor in this circuit ?.

iv. What is the maximum theoretical efficiency of this amplifier ?

v. What is the range of conduction angle of output current with respective input
signal?

vi.. Sketch DC load line and AC load line for this amplifier.

vii. What is collector voltage of transistor with no and maximum signal?

viii. How is DC and AC power measured in this circuit?

ix. For class-A operation how did you locate the Q-point.

x. What are the applications of class-A power amplifier?

 EXP. NO. 6 COMPLEMENTARY-SYMMETRY CLASS-B POWER
AMPLIFIER

1. AIM:

To design a complementary-symmetry class-B push-pull power amplifier in

order to achieve maximum out put AC power and efficiency.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii.COMPONENTS:

1. 8 W 5% CF Resistor 1 No.
2. 1 F /16 V Electrolytic Capacitor 1 No.
3. Transistors - SL100 1 No.
4. Transistor SK 100 1 No.

3. THEORY:

Power amplifiers are designed using different circuit configuration with the sole
purpose of delivering maximum undistorted output power to load. Push-pull
amplifiers operating either in class-B are class-AB are used in high power audio
system with high efficiency.
In complementary-symmetry class-B power amplifier two types of transistors, NPN
and PNP are used. These transistors acts as emitter follower with both emitters
connected together.
In class-B power amplifier Q-point is located either in cut-off region or in
saturation region. So, that only 180o of the input signal is flowing in the output.
In complementary-symmetry power amplifier, during the positive half cycle of
input signal NPN transistor conducts and during the negative half cycle PNP
transistor conducts. Since, the two transistors are complement of each other and they
are connected symmetrically so, the name complementary symmetry has come
Theoretically efficiency of complementary symmetry power amplifier is 78.5%.
4.CIRCUIT DIAGRAM:

Vcc 5.0

SL100 !NPN

1.0u 0v Vout

Vin

8.0
SK100 !PNP +
V
Vee 5.0

PROCEDURE:

i. Connect the circuit has shown in the circuit diagram.

ii. Measure base ,emitter and collector D.C voltages of both transistors and
compare against estimated values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vb2, Vc2, Ve2

iii. Apply the input at input terminals of the circuit from the function
generator.

iv. Keep the input signal at constant frequency under mid frequency region
and adjust the amplitude such that output voltage undistorted.

v. Calculate the power efficiency and compare it with theoretical efficiency.

6. OBSERVATIONS:

Efficiency is defined as the ratio of AC output power to DC input power

DC input power = Vcc x ICQ

AC output power = VP-P2 / 8RL

7. CALCULATIONS:

Input DC power = Vcc x ICQ

Output AC power = Vrms x Irms

= VPP2 / 8RL

OutputACpower
= InputDCpower

9. RESULT:

The maximum input signal amplitude which produces undistorted output signal is
_________

The practical efficiency of the circuit is ________

15. QUESTIONS:

i. Differentiate between voltage amplifier and power amplifier

ii. Explain impedance matching provided by transformer?

Iii . Under what condition power dissipation is maximum for transistor in this circuit?

iv. What is the maximum theoretical efficiency?

v. Sketch current waveform in each transistor with respective input signal?

vi. How do you test matched transistors required for this circuit with DMM?.

vii. What is the theoretical efficiency of the complementary stage amplifier.

viii. How do you measure DC and AC out put of this amplifier?

ix. Is this amplifier working in class A or B. ?

x. How can you reduce cross over distortion?

 EXP. NO. 7 CLASS-C TUNED POWER AMPLIFIER

1. AIM:

To design class-C tuned power amplifier and to study the class-c tuned power amplifier.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 Digit LCD hand held 1No
5. Function generator ! MhZ 1 No.

ii.COMPONENTS :

1. 4.7k Resistor 1 No.

2. 10k Resistor 1 No.
3. 0.1 F/16 V Electrolytic Capacitor 1 No.
4.10 nF/16 V Electrolytic Capacitor 1 No.
5. 10 mH Inductor 1 No
6. Transistor SL100 1No.

All resistors are carbon / metal film W 5% unless otherwise specified.

3. THEORY:

The efficiency of output circuit of an amplifier increases as the operation is shifted from
class-A to B and then to C. In class-C amplifiers efficiency approaches 100%. But the
difficulty with class-C operation is harmonic distortion is more. It is tuned amplifier and
only one frequency fo is to be amplified and power to be handled Po is large. Since
efficiency is high and harmonic distortion will not be a problem since only one frequency
is to be amplified and the tuned circuit will reject the other frequencies.

The function of resonant circuits are:

1. To provide correct load impedance to the amplifier.
2. To reject unwanted harmonics.
3. To couple the power to load
The resonant circuits in tuned power amplifier are called tank circuits.
4. CIRCUIT DIAGRAM:

Vcc=+5V

10nF
10
m
H

10k
100nF

+
SL 100
DC INPUT VOLTAGE
Vout
4.7k
+

Vin

5. PROCEDURE:

i. Connect the circuit as shown in diagram.

ii. The input terminals are connected to function generator and output terminals are
connected to CRO.

iii. Apply the DC voltage (Vcc) from regulated power supply.

iv. Adjust the input frequency such that output voltage is a perfect since sinusoidal
waveform at a fixed frequency..

v. Note down corresponding output voltages at different frequencies.

vi. Plot the waveforms of both input and output

vii. The frequency at which the voltage is max and the frequency should be compared
with theoretical values.

6. OBSERVATIONS:

The value of Resonant frequency at which maximum gain occurred is _________.

7. CALCULATIONS:

Theoretical value of resonant frequency =____________________

9. RESULT:

The frequency at which the maximum amplification possible is _________.

15. QUESTIONS:

i. What are the different types of tuned circuits ?

ii. How do you measure DC and AC power in the class C amplifier ?

iii. What is Q of Tuned circuit employed in circuit ?

iv. How is class C operation obtained in this circuit ?

v. State relation between resonant frequency and bandwidth of a Tuned

amplifier.

vi. Differentiate between Narrow band and Wideband tuned amplifiers ?

vii. How is harmonic distortion is reduced in class-C Tuned amplifiers?

viii. Sketch current waveform in the transistor..

ix. Calculate bandwidth of a Tuned amplifier whose resonant frequency is 15KHz

and Q-factor is 100.

x. Specify the applications of Tuned amplifiers.

 EXP.NO.8 VARIABLE SERIES VOLTAGE REGULATOR

1. AIM:

To design a transistorized variable series voltage regulator and study the regulation
action for
i. Different values of input voltages

ii Different values of load resistors

And also to find percentage regulation.

2. EQUIPMENTS AND COMPONENTS:

i.APPARATUS

1. CRO (Dual channel)DC-20 MHz 1 No

2. Bread Board - ! No. .
3. Regulated power supply- 0-30v 1 A, 1 No.
4. DMM 3 Digit LCD hand held 1No

ii. COMPONENTS:

1. 1.8k Resistor 1 No.

2. 4.7k Resistor 1 No.
3. 10k Resistor 1No
4. 10k variable Resistor 1 No
5. 1k , 2k , 4.7k, 10k (load resistors ) 1 No each.
6. Zener diode IN 5253 1 No.
7. Transistor SL100 2 No.

All resistors are carbon / metal film W 5% unless otherwise specified.

3. THEORY:

Voltage regulator is a device designed to maintain the output voltage as nearly constant as
possible. It monitors the output voltage and generates feed back that automatically
increases are decreases the supply voltage to compensate for any changes in output
voltage that might occur because of change in load are changes in load voltages.
In transistorized series voltage regulator the control element is a transistor which
is in series with load.
The main element used for regulation of output voltage is Zener diode, which
must be operated in reverse break down region, where it provides constant
voltage irrespective of changes in applied voltages.
 The output voltage of the series voltage regulator is Vo = Vz Vbe.
Since, Vz is constant, any change in Vo must cause a change in Vbe in order to
maintain the above equation. So, when Vo decreases Vbe increases, which causes
the transistor to conduct more and to produce more load current, this increase in
load causes an increase in Vo and makes Vo as constant. Similarly, the regulation
action happens when Vo increases also.

4. CIRCUIT DIAGRAM:

SL100

4.7k
10.0k
1.8k

SL100 RL 0.0
15-30V

ou
V

t
10.0k

5.1V

5. PROCEDURE:

i. Connect the circuit as shown in the circuit diagram.

ii. Apply the input voltage from power supply.
iii. Measure base ,emitter and collector D.C voltages and compare against estimated
values.

Estimated voltages Observed voltages

Vb1 ,Vc1, Ve1
Vz

iii. For a specific value of load resistor, vary the input voltage from 10 to a maximum
of 20 volts and not the values of output voltage.
iv. Change the load resistor and repeat steps 2 and 3.
v. Remove the load resistor and note down the voltage at no load.
vi. Find percentage regulation.
V NL V FL
Percentage regulation = x100
V FL
vii. Plot the graph for load regulation and line regulation.
6. OBSERVATIONS:

S.no Vin Output voltage

RL= RL= RL=

7. CALCULATIONS:

V NL V FL
Percentage load regulation = x100 =
V FL

Percentage Line Regulation = (change in output ) / (change in input) X 100

9. RESULT:

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

For RL = ----------------, Regulating range is____________

15. QUESTIONS:

i. Define voltage regulator.

ii. Give the advantages of series voltage regulator. .

iii.. Explain the feed back mechanism in series voltage regulator.

iv. In series voltage regulator which is control element and explain its function.

v. Define load and line regulation. What is ideal value ?.

vi. Which element determines output ripple ?

vii. What determines maximum load current allowed in this circuit ?

viii. Mention the applications of series voltage regulator.

ix. Define no load voltage and full load voltage.

x. Explain the term percentage regulation.