An Active Power Filter Implemented with
Multilevel Single-Phase NPC Converters
Pablo F. Acuna , Luis A. Moran, Fellow, IEEE , Christian A. Weishaupt
and Juan W. Dixon, Senior Member, IEEE
Department of Electrical Engineering
Universidad de Concepcion
Concepcion, CHILE
Tel.: +56 41 2203514
Email: lmoran@udec.cl
AbstractAn active power filter implemented with single phase
Neutral Point Clamped (NPC) multilevel converters is presented
and analyzed. The proposed active power filter is aimed to
compensate medium voltage power distribution systems. To take
advantage of the single-phase converter implementation, the
proposed active power filter allows for series connection of more
than one single-phase converter reaching higher blocking voltage
capabilities. Compared with the conventional three-phase NPC
topology, the proposed scheme presents lower line to line voltage
harmonic distortion as well as an independent control in each
phase. At this stage, simulated results confirm the viability of the
proposed active power filter and associated control strategy.
I. I NTRODUCTION
Reactive power compensation still remains one of the
major concerns in distribution systems operation [1]. In the
last decades, static var compensators (SVC) implemented
with thyristors have been proposed and presented as a good
alternative to replace the classical synchronous condensers
and passive shunt capacitors [2][3]. However, SVCs do
not address harmonics mitigation issues, and do not support
effectively power system in case of severe voltage drop.
To overcome both harmonics mitigation and reactive power
compensation, active power filters implemented with PWM
inverters have been proposed [4]. Even though active power
filters have been in the technical literature since the middle
of the 80s, their application in power system compensation
has not reach maturity. One of the major concerns that have
attempt against massive application of active power filters are
related with cost, reliability and rated power. However, the
fast development experienced in the design and construction
of medium voltage PWM converter topologies, especially for
motor drives applications, will help to overcome the lack of
confidence associated with active power filter applications.
Medium voltage PWM converters have been used in indus-
trial motor drives since the 90s. Different converter topolo-
gies, such as NPC, fly-back capacitors, power modules, have
already demonstrated that this technology is highly reliable
and cost effective for industrial applications [5][10]. Same
converter topologies but with an adequate control schemes can
also be used for active power filter implementations [11].
978-1-61284-972-0/11/$26.00 2011 IEEE 4367
Department of Electrical Engineering
Universidad Catolica de Chile
Santiago, CHILE
Tel.: +56 2 6864278
Email: jdixon@ing.puc.cl
In this paper an active power filter implemented with three
single-phase NPC PWM voltage-source inverters is presented
and analyzed. The proposed active power filter topology is
aimed to compensate reactive power and current harmonic
in medium-voltage power distribution systems. The use of
single-phase NPC converters increases converter flexibility
in order to reach higher voltage level and compensation
capacity. Moreover active power filters implemented with
modular single-phase converters can easily compensate current
unbalanced. Simulated results for steady state and transient
operating conditions prove the viability of the proposed active
power filter topology. In this paper the proposed active power
filter is described in terms of converter topology, power
converter design, control scheme design and modeling, and
compensation performance for current harmonics and reactive
power.
II. P ROPOSED T OPOLOGY AND M ATHEMATICAL M ODEL
A. Description
Figure 1(a) shows the proposed active power filter topology.
Three single-phase NPC PWM inverters connected in parallel
are used to compensate leading or lagging power factor and
current harmonic components. Each single-phase converter has
two legs with four IGBT as shown in Fig.1(b). The phase
voltage between one phase and the neutral presents three-level.
However, at the output line to line voltage a 5 level waveform
is achieved depending on the operating region of the converter
and the modulation index used (see Fig. 2).
The relevant voltage and current relationships are obtained
from Fig.1(b) and identified as (1) , (2) and (3), where mp1
, mp2 , mn1 and mn2 are the switching gating signals. Since
the power active filter is suitable for single-phase and three-
phase systems, the subscript k = {a, b, c} denotes the system
phases.
vpk
 
vfk1 mkp2 mkp1 mkn2 mkn1
 
= (1)
vnk
 (a) (b)

Fig. 1. The Proposed Active Power Filter Topology. (a) The three-phase configuration composed of multiple single-phase modules. (b) The single-Phase
NPC converter module.

B. Harmonic Reference Signal Generator

In order to generate the required current reference sig-
nals for line-current harmonics compensation, an harmonic
reference signal waveform (ish ) must be implemented. The
fundamental component of the line current is obtained using
the Second Order Generalized Integrator Phase-Locked-Loop
SOGI- PLL [12]. Each line current is introduced into a
SOGI block. The harmonic current components are generated
by subtracting the system line currents and the extracted
fundamental currents in each phase. The difference between
Fig. 2. Single-phase NPC converter output voltage 5 level waveform. current harmonics references and the measured output active
filter currents is processed in a linear PI controller. Each PI
controller output signal is applied to the gating signal generator
as part of the compensation reference current ik2 (4).
ikp = mkp2 mkp1 ik2


(2)
C. Modulation Technique

ikn = mkn2 mkn1 ik1 Neutral point unbalance is one of the inherent problems


(3)
of the NPC converter topologies [13][14]. Neutral point
Current harmonic compensation is achieved by injecting a
unbalance can be caused by asymmetries in the converter
complementary current component, at the load ac terminals.
firing pulses and can be reduced by changing the traditional
The reference current required for current harmonic compen-
SPWM technique. To modify the amplitude of the triangular
sation is obtained from the load current using a PLL. For
carrier signals, in addition to amplitude and phase of sinusoidal
dc voltage control and power factor correction, two decoupled
modulating signals, a third control variable (or degree of
linear control schemes derived from the dq0 state-space model
freedom) must be included in the modulation strategy through
are used. DC voltage unbalance control is achieved by using
an offset d, as shown in [15]. The objective is to adjust the
a modified SPWM technique to generate the required modu-
semiconductor switching time using carrier signals with vari-
lation signal (at fundamental frequency) that maintains the dc
able amplitude, changing the trajectory of the current absorbed
voltage constant and balanced, and the system power factor
from each of two dc capacitors. Therefore, this modulator
at the desired value. The compensation reference current is
scheme allows to control the voltage across each dc capacitor.
composed with harmonic components, iksh (for load current
For example, if the voltage at the lower capacitor vnk is
harmonic compensation), and a fundamental component ik2f
greater than the voltage at the upper capacitor vpk , the offset
(4) (for power factor compensation).
d compensates the unbalance by increasing the amplitude of
the lower switching signals. This dc capacitor voltage control
ik2 = iksh + ik2f (4) scheme, by changing the offset d in the modulation signals was

4368
presented in [15]. The final modulation signals are defined by III. P OWER C IRCUIT D ESIGN
the following expressions, The principal components of the active power filter topology
are the coupling reactors and the two dc capacitors. The
mkpn+ = P (dk , Mk ) sin (t k ) (5) coupling reactor must allow the di/dt at the converter output
current required to follow the reference waveform imposed by
the control system, and also must attenuate current harmonic
mkpn = N (dk , Mk ) sin (t k ) (6) component generated by the converter modulation technique.
The dc capacitors must be able to store the small amount of
The coefficients P (dk , Mk ) and N (dk , Mk ) are given by active power required to keep the dc voltage constant under
(7), transient operating conditions.

dk

A. Coupling Reactor Design
Mk2 dk 2Mk2 sin1 Mk 2dk Mk2 d2k
P (dk , Mk ) = 2 Mk (1+dk
)(1+dk ) The design criteria used to define the inductance value of
d (7) the coupling reactor is based on the attenuation factor required
Mk2 2Mk2 sin1 Mk dk 2d2k Mk2 d2k
N (dk , Mk ) = 2 k
Mk (1+dk )(1+dk ) to compensate the high frequency current harmonic compo-
The equivalent modulation signals (5) and (6) are sinusoidal nent associated to the inverter switching frequency. Since the
functions and can be represented by continuous functions in converter operates as a voltage source active power filter, the
dq0 reference frame. coupling reactor must be small enough to not distorted the
current harmonic component that must be compensated. In
D. Equivalent model in abc and dq0 frame this case, the inductance is calculated using the following
The single phase mathematical model in the abc stationary expression (11).
frame defines an equivalent system model where the state
variables are the dc voltage unbalance (v k = vpk vnk ) and v
u  vf 1k 2
uX
the total dc voltage (vpn k
= vpk + vnk ) as shown in Fig. 1(b). 1
Lf = t (11)
The differential equations that represents the proposed model 2 2isn T HDi k6=1 k
are obtained from:
where isn is the rated load current, T HDi is the permissible
total harmonic distortion, and vf 1k is the value of the kth
 v k
 
dik k
vP Rf k 1
 k k voltage harmonic component at the converter output.
dt = Lf Lf i2 2Lf
2 CC
mpn+ mpn k
vpn
dv k mk pn+ i2
k
(8) B. DC Capacitors
dt = Cdc
k
dvpn k
mpn i2 k The total dc capacitor value is obtained using (12). With
dt = Cdc this value, each dc capacitor is able to store enough energy
Applying the time-variant single-phase transformation pro- to supply the instantaneous power required by the ac system
posed in [16], the system model can be written as, during half a cycle without changing the dc voltage value in
more than 5%.
dq k
   k
d(i2 ) 0 k (v dq
)
  k
R
= idq
2 + PLCC Lff idq
2 T vsm is
dt 0 f
Cdc (12)
2 (v v2
dc min )
  k  k   v k  dc
1 dq dq
2Lf mpn+ mpn k
vpn (9) where vsm is the ac system phase to neutral peak value, is
d k d k q k q k
dv k (mpn+ ) (i2 ) +(mpn+ ) (i2 ) is the rms load current, T is the ac system period, vdc is the
dt = Cdc dc voltage reference value and v is the minimum voltage
k k k k dc min
k
dvpn (mdpn ) (id2 ) +(mqpn ) (iq2 )
dt = Cdc allowed at the dc side.
The resulting model is nonlinear due to the multiplication IV. C ONTROL S CHEME D ESIGN
between the state variables and system inputs. In order to A. Linearization
control the system power factor and to maintain the dc
In order to use linear control technique, the active power
capacitor voltages balanced and constant, the following output
filter must be linearized. The system equations 9 has the
signals are defined:
form x = f (x, u, p) , where the vector x represents the state
    variables (id2 ,iq2 ,v,vpn ) , the vector u the input signals (M
1 (iqP CC ) 1 (iq2 +iqL ) , ,d ) and the vector p the active power filter perturbations
y1 = P CC = tan = tan
(idP CC ) (id2 +idL ) d
((vpcc q
,vpcc ,idL ,iqL )). By using this linearization procedure,
k (10)
y2 = vpn the following equivalent linearized model is obtained.
k
y3 = v
The displacement power factor angle is used as an output x = A [x xo ] + B [u uo ] + E [p po ]
(13)
to differentiate between leading and lagging power factor. y = C [x xo ] + D [u uo ] + F [p po ]

4369
 where the matrices are obtained from the Jacobians of direct current is the more incidental in the behavior of the dc
the nonlinear functions evaluated at the operating point. The voltage, therefore a new subsystem of equations is obtained
requirements to achieve the equilibrium condition is d = 0 and given by:
and v = 0. Due to the linearization method, two naturally
decoupled subsystems are obtained. Each matrix subsystem is id2 id2
     
d M
composed by the elements of the originals matrix. dt q = An q + Bn +
i2 d i2
vP CC
id2 id2 v q

A11 A12 A14 P CC

d q q En
idL
dt
i2 = A21 A22 A24 i2 +
q
vpn A41 A42 A44 vpn  iL (16)
id2
    
| {z } P CC M
An y = = C n q + D n

vPd CC
id2 i2
(14)

B11 B12 d

  q vP CC
M + E vP dCC

B21 B22 v q
iL
+Fn P CC
B41 B42 idL
iqL
iqL
| {z }
Bn
d
dt [v] = [B33 ] [d] The degree of coupling, between the input variable M
The two subsystems can be controlled independently. The and the output variable P CC id2 , can be obtained
offset d will be used to control v (dc capacitor voltage with the RGA method (relative gain array); which is calculated
unbalance) since is the only variable that has implications for based on the transfer function as:
the dynamic behavior of the voltage differences between the  
capacitors. In order to control the dc voltage and the system 
1
T
11 12
power factor, the coupling between input and output variables = Hn (0) Hn (0) = (17)
21 22
must be evaluated.
This analysis shows that the displacement power factor
B. DC Voltage Unbalance Control angle P CC must be controlled with the modulating sig-
As shown in the previous section, in order to control the nal amplitude M ; and the direct current id2 with the
neutral point unbalance the input signal d must be changed. modulating signal phase-shift . In order to tune each
Expression (14) allows to obtain the transfer function between loop independently and to obtain steady state decoupling, the
v and d as: inclusion of a static decoupler is proposed.
Finally, the proposed control scheme is shown in Fig. 3.
cos (0 ) id20 +
  
1 2 (M0 4) V. S IMULATED R ESULTS
Hm (s) = (15)
s Cdc sin (0 ) iq20 In order to prove the compensation effectiveness of the
Expression 15 shows that the transfer function consists of proposed scheme a 10 MVA electrical system was simulated.
a pure integrator with a gain that depends on the selected The proposed active power filter was tested with a non- linear
compensator operating point. Since the system has a pole at load rated at 5 MVA and 4.16 kV. The active power filter
the origin, only a proportional controller is necessary to control parameters are: vpn = 7600 V, Cdc =2200 F, Rf = 0.02
the dc voltage unbalance and achieve zero steady state error. and Lf = 2.5 mH. A distorted ac current was selected as
The control scheme used to mitigate the dc voltage unbalance a representative non linear load in order to verify the active
of the NPC converters connected to each phase compares power filter operation effectiveness. Simulations are performed
a zero reference signal with the voltage difference between considering a switching frequency of 1.35 kHz and digital
the two dc capacitors. This error signal is compensated by a PI controllers with trapezoidal approximation and a sampling
proportional controller that delivers the offset d to be applied frequency of 10 kHz using the software PSIM.
to the modulation scheme. Figure 4 compares the selected waveforms obtained with
(a) a shunt active power filter implemented with a three-phase
C. DC Voltage and PCC Power Factor Control NPC converter and (b) with the proposed single-phase NPC
The displacement power factor angle control at the PCC converter. Both figures show the load current waveform, the
and the converter dc total voltage control are performed on the active power filter current reference signal, the non-linear load
subsystem shown in 14. However, since the dynamic of vpn is current, the inverter output voltage, the power system voltage
much slower than the direct and quadrature current injected by and the compensated system current.
the compensator, a cascade configuration is used. The control The proposed converter topology reduces the dv/dt at the
strategy has a master loop that controls the total dc voltage out put voltages, and the voltage THD has the harmonic
and a slave loop that controls the capacitor current. Moreover, components that are compensated. The single phase converter
considering that there must be an equal number of inputs and topology double the output voltage magnitude with the same
outputs signals for the application of SISO controllers, and the semiconductor blocking voltage, as shown in Fig. 4. The

4370
 Fig. 3. Proposed active power filter control scheme.

(a) (b)

Fig. 4. Simulated active power filter waveforms. (a) Three-phase NPC APF. (b) Single-phase NPC APF.

current generated by the proposed active power filter has a
fundamental component, which is used to compensate the
system power factor. Moreover, with the proposed active
power filter topology, the system THDi can be reduced below
5 % (simulated results show a THDi = 2.4%), with a 2.5 mH
coupling reactor. Same THDi can be achieved using a three-
phase NPC converter but with a coupling reactor equals to 8.3
mH.
Another point of comparison is the coupling reactor size. As
mentioned in section III-A, the inverter output voltage, with
larger level numbers (five), push switching voltage harmonics
(around 27th) at higher frequencies, reducing the coupling re-
actor inductance value. It is also possible to compare the output
voltage harmonic components of each converter topology, with
respect to the fundamental component, vf 1f , as shown in Fig
5. If an air core reactor is considered the physical dimensions
can be calculated using 18. For the proposed topology (using
simulated parameters), the air core reactor can be reduced by
50% in the diameter, which translate in 75 % reduction in
the total volume, for the same number of turns, n1 , and same

4371
 tion to harmonic mitigation and reactive power compensation
in medium voltage power distribution systems.
ACKNOWLEDGMENT
The authors wish to thank the financial support from the
Chilean Fund for Scientific and Technological Development
(FONDECYT) through projects 1080237 and 1110592.
(a) R EFERENCES
[1] J. Dixon, L. Morn, J. Rodriguez, R. Domke, Reactive Power Com-
pensation Technologies: State-of-the-Art Review, Proceedings of the
IEEE, vol. 93, issue 12, pp. 2144-2164, Dec. 2005.
[2] S. Teleke, T. Abdulahovic, T. Thiringer and J. Svensson, Dynamic
Performance Comparison of Synchronous Condenser and SVC, IEEE
Transactions on Power Delivery, vol. 23, issue 3, pp. 16061612, July.
2008.
[3] Jizhong Zhu; Kwok Cheung; Hwang, D.; Sadjadpour, A.; , Operation
Strategy for Improving Voltage Profile and Reducing System Loss,
Power Delivery, IEEE Transactions on , vol.25, no.1, pp.390-397, Jan.
(b) 2010.
[4] Bilgin, H. F.; Ermis, M.; Kose, K. N.; Cetin, A.; Cadirci, I.; Acik, A.;
Fig. 5. Log converter output voltage harmonic spectrum expressed as the Demirci, T.; Terciyanli, A.; Kocak, C.; Yorukoglu, M.; , Reactive-Power
harmonic-to-fundamental ratio. (a) Three-phase NPC APF. (b) Single-phase Compensation of Coal Mining Excavators by Using a New-Generation
NPC APF. STATCOM, Industry Applications, IEEE Transactions on , vol.43,
no.1, pp.97-110, Jan.-feb. 2007
TABLE I [5] Hatti, N.; Hasegawa, K.; Akagi, H.; , A 6.6-kV Transformerless Motor
C OMPENSATION PARAMETERS Drive Using a Five-Level Diode-Clamped PWM Inverter for Energy
Savings of Pumps and Blowers, Power Electronics, IEEE Transactions
on , vol.24, no.3, pp.796-803, March 2009
Parameter Three-phase NPC APF Single-phase NPC APF
[6] Corasaniti, V.F.; Barbieri, M.B.; Arnera, P.L.; Valla, M.I.; , Hybrid
THDi is 5.68 % 2.4 %
Power Filter to Enhance Power Quality in a Medium-Voltage Distribu-
THDv vf 1 26.83 % 25.87 %
tion Network, Industrial Electronics, IEEE Transactions on , vol.56,
THDv vf 1f 6.99 % 0%
dv no.8, pp.2885-2893, Aug. 2009
dt max
6700 V 3350 V [7] Verma, V.; Singh, B.; Chandra, A.; Al-Haddad, K.; , Power Conditioner
for Variable-Frequency Drives in Offshore Oil Fields, Industry
Applications, IEEE Transactions on , vol.46, no.2, pp.731-739, March-
april 2010
altitude, l1 , as compared with the one required using three- [8] Malinowski, M.; Gopakumar, K.; Rodriguez, J.; Perez, M.A.; , A
phase NPC converter. Survey on Cascaded Multilevel Inverters, Industrial Electronics, IEEE
Transactions on , vol.57, no.7, pp.2197-2206, July 2010.
[9] Abu-Rub, H.; Holtz, J.; Rodriguez, J.; Ge Baoming; , Medium-Voltage
Multilevel ConvertersState of the Art, Challenges, and Requirements in
d21 n21 Industrial Applications, Industrial Electronics, IEEE Transactions on
Lair = (18)
18d1 + 40l1 , vol.57, no.8, pp.2581-2596, Aug. 2010.
[10] Rodriguez, J.; Bernet, S.; Steimer, P.K.; Lizama, I.E.; , A Survey
Table I shows the compensation effectiveness of the pro- on Neutral-Point-Clamped Inverters, Industrial Electronics, IEEE
posed active power filter scheme implemented with single Transactions on , vol.57, no.7, pp.2219-2230, July 2010.
[11] Vodyakho, O.; Mi, C.C.; , Three-Level Inverter-Based Shunt Active
phase NPC converters and one implemented with a three-phase Power Filter in Three-Phase Three-Wire and Four-Wire Systems,
NPC converter. The advantages of the proposed scheme are Power Electronics, IEEE Transactions on , vol.24, no.5, pp.1350-1363,
relevant especially in the reductions obtained in the THDi and May 2009
[12] Fedele, G.; Picardi, C.; Sgro, D.; , A Power Electrical Signal Track-
dv/dt. ing Strategy Based on the Modulating Functions Method, Industrial
Electronics, IEEE Transactions on , vol.56, no.10, pp.4079-4087, Oct.
VI. C ONCLUSION 2009.
[13] Donghua Chen, Shaojun Xie, Review of the control strategies applied to
An active power filter implemented with three single phase active power filters, IEEE International Conference on Electric Utility
Deregulation, Restructuring and Power technologies, (DRPT 2004), vol.
NPC multilevel converters was presented and analyzed in this 2, pp. 666-670, 5-8, April 2004.
paper. One of the main advantages of the proposed topology is [14] Srikanthan, S.; Mishra, M.K.; , DC Capacitor Voltage Equalization in
related with the flexibility introduced by the three single phase Neutral Clamped Inverters for DSTATCOM Application, Industrial
Electronics, IEEE Transactions on , vol.57, no.8, pp.2768-2775, Aug.
converters allowing current harmonics and reactive power 2010
compensation reaching higher blocking voltage capabilities. [15] J. E. Espinoza, J. R. Espinoza, and L.A. Morn,A systematic controller-
Moreover, the use of single phase NPC multilevel converters design approach for neutral-point-clamped three-level inverters, IEEE
Trans. on Industrial Electronics, vol. 52, no. 6, pp. 15891599, December
improves the output voltage waveforms, reducing the low 2005.
frequency voltage harmonics associated with the converter [16] Jerson R. Reyes, Jose R. Espinoza and Cristian A. Sepuilveda, Operat-
topology. ing Region of Single-Phase UPQCs, in Conf Rec. PESC05, Recife,
Brazil, June 12 - 16, 2005.
The proposed active filter constitutes an alternative to con-
ventional three-phase active power filters offering a new solu-

4372

Powered by TCPDF (www.tcpdf.org)