Geh 6373 Load Commutated Inverter User's Manual

GEH-6373
Innovation Series
AC Drives
Load Commutated Inverter

Users Manual
Innovation Series
AC Drives
Publication: GEH-6373
Issue date: 1998-03-31
Load Commutated Inverter

Users Manual
1998 by General Electric Company, USA.
All rights reserved.
Printed in the United States of America.
These instructions do not purport to cover all details or variations in equipment, nor to
provide every possible contingency to be met during installation, operation, and
maintenance. If further information is desired or if particular problems arise that are not
covered sufficiently for the purchasers purpose, the matter should be referred to GE
Industrial Control Systems.
This document contains proprietary information of General Electric Company, USA and
is furnished to its customer solely to assist that customer in the installation, testing,
operation, and/or maintenance of the equipment described. This document shall not be
reproduced in whole or in part nor shall its contents be disclosed to any third party
without the written approval of GE Industrial Control Systems.
GeniusTM, Field ControlTM, LogicMaster TM, and Series 90TM are trademarks
of GE Fanuc Automation North America, Inc.
InnovationTM is a trademark of General Electric Company.
TeflonTM is a trademark of E.I. DuPont de Nemours and Co., Inc.
Windows is a registered trademark of Microsoft Corporation.
Load Commutated Inverter, Users Manual GEH-6373
Safety Symbol Legend
WARNING
Indicates a procedure, practice, condition, or statement that, if not strictly

observed, could result in personal injury or death.
CAUTION
Indicates a procedure, practice, condition, or statement that, if not strictly

observed, could result in damage to or destruction of equipment.
Note
Indicates an essential or important procedure, practice, condition, or statement.
Safety Symbol Legend a

GEH-6373 Innovation Series AC Drives
WARNING
This equipment contains a potential hazard of electric shock or burn. Only

personnel who are adequately trained and thoroughly familiar with the
equipment and the instructions should install, operate, or maintain this
equipment.
Isolation of test equipment from the equipment under test presents

potential electrical hazards. If the test equipment cannot be grounded to the
equipment under test, the test equipments case must be shielded to prevent
contact by personnel.
To minimize hazard of electrical shock or burn, approved grounding

practices and procedures must be strictly followed.
WARNING
To prevent personal injury or equipment damage caused by equipment

malfunction, only adequately trained personnel should modify any
programmable machine.
b Safety Symbol Legend

Table of Contents
Section Heading Page Section Heading Page

Section 1, Equipment Overview Section 4, Serial Communications Monitor
1-1. Introduction to the LCI ......................................1 4-1. Introduction ..................................................... 23
1-2. Hardware Design ...............................................1 4-2. Equipment Requirements ................................ 23
1-2.1. Power Conversion Components......................1 4-3. How to Use the Monitor.................................. 23
1-2.2. Control Components .......................................1 4-3.1. Command Conventions ................................ 23
1-3. User Interfaces ...................................................2 4-3.2. Glossary of Symbol Names .......................... 24
1-4. Technical Characteristics...................................2 4-3.3. Data Types.................................................... 24
1-5. Operating Environment.................................... 2 4-3.4. Control Characters........................................ 24
1-5.1. Temperature and Humidity ........................... 2 4-3.5. Monitor Control............................................ 24
1-5.2. Elevation ....................................................... 2 4-4. Monitor Functions ............................................ 24
1-6. Related Documents .......................................... 4 4-4.1. Help .............................................................. 24
1-7. Technical Assistance ....................................... 4 4-4.2. Table Display ............................................... 25
4-4.3. Peek/Poke ..................................................... 27
Section 2, Functional Description 4-4.4. Capture ......................................................... 29
2-1. LCI System Basics .............................................5 4-4.5. Analog Output .............................................. 31
2-1.1. Power Conversion...........................................5 4-4.6. EEPROM Management ................................ 32
2-1.2. Excitation Voltage Controller.........................6 4-4.7. Flash Memory............................................... 33
2-1.3. Microprocessor-Based Control .......................6 4-4.8. Product Specific Functions .......................... 34
2-2. Power Converter Operation ...............................6 4-5. Test Modes ...................................................... 36
2-3. Control Operation ..............................................9 4-5.1. Test Mode Terminate ................................... 36
2-3.1. Synchronization ..............................................9 4-5.2. Simulator Mode............................................ 36
2-3.2. Commutation...................................................9 4-5.3. Crowbar Test Mode...................................... 36
2-3.3. Force Commutated Operation/Modes...........10 4-5.4. Gate Test Mode ............................................ 37
2-3.4. Load Commutated Mode ..............................10 4-5.5. Cell Status Monitor ...................................... 37
2-3.5. Torque Control..............................................13 4-5.6. Exciter Test Only ......................................... 37
2-3.6. Phase-Locked Loop.......................................15 4-5.7. Hardware Overcurrent Test.......................... 38
2-4. Twelve-Pulse Operation...................................15 4-5.8. Bridge Alpha Command............................... 38
2-4.1. Shutdown Operations....................................15 4-5.9. Speed Loop Test........................................... 38
Section 3, Control Electronics 4-5.10. Current Loop Test ...................................... 38
3-1. Introduction......................................................17 4-5.11. Flux Loop Test ........................................... 38
3-2. PLC-Based Control ..........................................17 4-6. Diagnostic Boot Monitor................................. 39
3-2.1. Control Cabinet Configuration .....................17 4-6.1. Using the Diagnostic Boot Monitor .................39
3-2.2. Control ..........................................................19 Section 5, Software Tuneup Variables...................41
3-3. UC2000V-Based Control.................................19
3-4. Board Descriptions ..........................................19 Section 6, Alarms and Faults
3-4.1. ADMA Daughterboard (DS200ADMA) ......19 6-1. Introduction ..................................................... 99
3-4.2. DDTB Board (DS200DDTB) .......................20 6-2. How to Reset ................................................... 99
3-4.3. DSPC Board (DS200DSPC ..........................20
3-4.4. FCGD Board (DS200FCGD)........................20
3-4.5. FCGE Board (IS200FCGE) ..........................20
3-4.6. FGPA Board (DS200FGPA).........................20
3-4.7 FHVA Board (DS200FHVA) ........................21
3-4.8. NATO Board (DS200NATO).......................21
3-4.9. SNPA Board (DS200SNPA).........................21
3-4.10. VPBL Board (DS200VPBL).......................21
Table of Contents i
Table of Contents Continued
Section Heading Page Section Heading Page

Section 7, Preventive Maintenance Section 8, Component Replacement
7-1. Introduction................................................... 113 8-1. Tools/Materials Needed ................................117
7-2. Maintenance Schedule .................................. 113 8-2. Before Starting ..............................................117
7-3. Maintenance Record ..................................... 113 8-3. Replacing Bridge Components......................118
7-4. Tools/Materials Needed................................ 113 8-3.1. Bridge Structure Overview.........................118
7-5. Power-On Checks ......................................... 114 8-3.2. SCR Replacement.......................................120
7-6. Power-Off Checks......................................... 114 8-3.3. Heatsink, Capacitor, and Resistor
7-6.1. Before Starting Maintenance ..................... 114 Replacement ..................................................121
7-6.2. Cleaning the Equipment............................. 114 8-4. Replacing Printed Wiring Boards .................121
7-6.3. Loose Connections..................................... 115 8-4.1. Handling Precautions .................................121
7-6.4. Damaged Insulation ................................... 116 8-4.2. Replacement Procedures ............................121
7-6.5. Contactors and Relays................................ 116
7-6.6. SCR Assembly Clamp Pressure................. 116 Appendix A, Warranty and Renewal Parts
7-6.7. Liquid-Cooling Filter, Deionizer Cartridge116 A-1. Introduction ..................................................123
7-6.8. Secondary Motors ...................................... 116 A-2. Identifying the Part .......................................123
7-7. Short Circuit Damage ................................... 116 A-2.1. Renewal Parts Quotation ...........................123
A-2.2. Part Number Structure...............................124
A-3. Warranty Terms............................................125
A-4. How to Order Parts.......................................125
A-4.1. Understanding the Drive Nameplate .........125
ii Table of Contents
List of Figures
Figure/Title Page Figure/Title Page

1-1. Typical LCI Lineup............................................3 6-1. 12-Pulse Source, Cabinet 1 ........................... 109
1-2. LCI System Components ...................................3 6-2. 4kV Load, Cabinet 2 ..................................... 109
2-1. Simplified LCI System One-Line Diagram .......5 6-3. Dual-Channel, 12-Pulse, Channel A, Cab. 1 . 110
2-2. LCI Control Block Diagram ..............................6 6-4. Dual-Channel, 12-Pulse, Channel B, Cab. 2 . 110
2-3. Bridge Leg Conduction Sequence .....................7 6-5. 4 kV, 6-Pulse Source, Cabinet 1.................... 111
2-4. Load Converter Voltage and Current.................8 6-6. 4 kV, 6-Pulse Load, Cabinet 2 ...................... 111
2-5. LCI-Driven Synchronous Motor Diagram; 6-7. 2.3 kV, Cabinet 1........................................... 111
Leading Power Factor ........................................9 6-8. 6 kV, 6-Pulse Source, Cabinet 1.................... 112
2-6. Forced Commutation Firing Mode ..................11 6-9. 6 kV, 6-Pulse Load, Cabinet 2 ...................... 112
2-7. Load Voltage and Current In Load 8-1. Two SCRs & Typical Support, Front View .. 118
Commutated Mode..........................................12 8-2. View of Bridge Showing Heatsink Array ..... 119
2-8. LCI System Regulator Block Diagram ............13 8-3. Heatsink Spreader Tool Placement, Side
2-9. Flux Wave Zero-Crossing................................14 View............................................................... 120
3-1. Example of LCI Control Board Operation.......18 A-1. Sample Part Number for Order-Specific
4-1. Sample Monitor Screen, Table Function .........26 Assembly ...................................................... 124
4-2. Sample Monitor Screen, Peek/Poke A-2. Sample Part Number for Component ........... 124
Function............................................................28 A-3. Sample Board Part Number.......................... 124
4-3. Sample Monitor Screen, Capture Function......30 A-4. Typical Drive Nameplate ............................. 125
4-4. Sample Monitor Screen, Analog Output A-5. Sample Drive ML (Catalog) Number........... 125
Function............................................................31
4-5. Sample Monitor Screen, EEPROM Function ..32
4-6. Sample Monitor Screen, Flash Memory
Function............................................................33
4-7. Sample Monitor Screen, Product Specific
Function............................................................35
List of Tables
Table/Title Page Table/Title Page

4-1. Display Table Function Syntax........................25 7-1. Alarms ............................................................ 100
4-2. Peek/Poke Function Syntax .............................27 7-2. Faults ............................................................. 103
4-3. Capture Function Syntax .................................29 7-3. Detail Fault Messages ................................... 106
4-4. Analog Output Function Syntax ......................31
4-5. EEPROM Management Function Syntax ........32
4-6. Flash Management Function Syntax................33
4-7. Product Specific Function Syntax....................34
4-8. EEPROM Simulator Values ............................36
List of Figures/Tables iii

1 Equipment 1-1. Introduction to the LCI

Overview The LCI is an ac adjustable-speed drive used to con-
trol synchronous motors from near zero to rated speed.
The drive consists of static power conversion and
This manual describes the load commutated inverter microprocessor-based control equipment. Varieties of
(LCI) of the Innovation Series of GE ac drives. The power bridge configurations are supported.
purpose of the manual is to assist the user in operating
and maintaining this drive. Functionally, the LCI is a current-controlled, liquid-
cooled, regenerative inverter. It uses two non-
Section 1 introduces LCI features and defines the reversing dc bridges with phase-controlled thyristors
manuals contents. Its purpose is to present a general in both the input and output power converters. During
product overview for the reader, as follows: normal (not regenerating) operation, the input bridge
Section Heading Page provides a controlled current to feed a dc link reactor.
The output converter is commutated by the load.
1-1. Introduction to the LCI .................................... 1
1-2. Hardware Design ............................................. 1
1-2.1. Power Conversion Components.................... 1 1-2. Hardware Design
1-2.2. Control Components ..................................... 1
1-3. User Interfaces ................................................. 2 The LCI consists of two functional sections: power
1-4. Technical Characteristics................................. 2 conversion and control. The hardware for these is
1-5. Operating Environment.................................... 2 typically enclosed in four cabinets, designated as
1-5.1. Temperature and Humidity ........................... 2 follows (see Figure 1-1):
1-5.2. Elevation ....................................................... 2 Control Pump
1-6. Related Documents .......................................... 4
1-7. Technical Assistance ....................................... 4 Source Bridge Load Bridge
Section 2, Functional Description. Provides an LCI Figure 1-2 shows the functional relationship of the
theory of operation. LCI hardware components.
Section 3, Control Electronics. Describes the boards
used to control the LCI. 1-2.1. Power Conversion Components
Section 4, Serial Communications Monitor. De- The power conversion hardware consists of a line-
scribes how to use the Monitor for tuneup and test. commutated, phase-controlled thyristor bridge (source
bridge) that feeds a load commutated thyristor bridge
Section 5, Software Tuneup & Public Variables. (load bridge) through a dc link reactor. Liquid-cooled
Identifies system variables and their locations. heatsinks provide thermal protection. Power conver-
Section 6, Alarms and Faults. Describes these sion is controlled by microprocessor-based program-
indicators for use in troubleshooting. mable electronics that reside in both the bridge
cabinets and control cabinet.
Section 7, Preventive Maintenance. Provides
guidelines for keeping the LCI in good operating
condition. 1-2.2. Control Components
Section 8, Component Replacement. Provides The LCIs main control functions are provided by a
guidelines for replacing components during repair. module of printed wiring boards in a VME rack.
These boards contain programmable microprocessors
Appendix A, Warranty and Renewal Parts. Con- with companion circuits, plus the drive software.
tains information on how to identify and obtain war-
ranty and spare parts. This module connects with the DS200DDTB I/O
board (control cabinet), the excitation voltage con-
Refer to the Table of Contents for the organization of troller, and the user interfaces defined in section 1-3.
these sections. I/O is through plugs located at the board front con-
nectors. The module requires +5, 15, and 24 V dc,
which are provided by a base-mounted power supply.
Section 1, Equipment Overview 1

Additional control components are included on firing 1-5. Operating Environment

control and interface boards, located in the bridge
cabinets. Fiber-optic cables connect the main control The LCI is designed to operate in typical utility and
module to the power converter bridge. industrial environments. However, environments that
include excessive amounts of any of the following
elements reduce drive performance and life:
1-3. User Interfaces
Dust, dirt, or foreign matter
The basic LCI supports three user interfaces
Vibration or shock
Programmable Controller (GE Fanuc Series 90-
30 PLC or Innovation Series Controller) Moisture or vapors
Optional diagnostic display module (AFE Data- Rapid temperature changes

panel Model K) Gaseous/caustic fumes
Serial Communications Monitor terminal Power line fluctuations
The programmable controller is used to customize I/O, Electromagnetic radiation or noise introduced by:
sequencing, and speed references per application
requirements. The PLC connects to the LCI control Radio frequency signals, typically from portable
through the Series 90 Protocol (SNP) serial link. The transmitters near the equipment or its wiring.
Innovation Series Controller is mounted in the LCI,
and offers additional interface options. Stray high voltage or high frequency signals,
typically produced by arc welders, unsup-
The AFE Datapanel display is a local interface option pressed relays, contactors, or brake coils oper-
that allows the user to display and modify regulator ating near exciter control circuits.
and logic variables and regulator constants. This
module is typically mounted on the control cabinet To ensure proper performance and normal operational
door and connected to the PLC. life, the equipments operating environment should be
maintained within the limits defined below. (For
The Serial Communications Monitor enables an storage guidelines, refer to publication GEI-100256,
operator to read and modify drive tuneup values and Receiving, Handling, and Storage of Innovation Series
diagnostic tests. It is accessed by connecting a com- Equipment.)
patible display/terminal to the LCI control.
1-5.1. Temperature and Humidity
1-4. Technical Characteristics Ambient operating temperature range:
Feature Type/Value 0 C (32 F) to 50 C (122 F)
Power thyristors Silicon-controlled rectifiers
(SCRs)
Note
Equipment ratings are based on an ambient
Line supply unit 6-pulse or series 12-pulse bridge
temperature of 40 C (104 F). The equip-
Bridge structure Heatsink/SCR dual-stack ment must be derated for higher ambient
Cooling Liquid-cooling loop temperatures.
Maximum operating temperature: 50 C (122 F)
Supply voltage:
6-pulse converter 2300, 4160, or 6600 V ac Maximum relative humidity: 95% non-condensing
12-pulse converter 2080 or 3300 V ac each
Supply frequency 50 or 60 Hz 1-5.2. Elevation
Maximum elevation: 3300 ft above mean sea level
Supply phase 3-phase
Output voltage 0 2300, 4160, or 6600 V ac Higher elevations require derating the equipment.
Standards UL, CSA (consult factory), CE
2 Section 1, Equipment Overview

Control Source Load Pump
Pulse Type Dimensions (meters) Weight

Volts (estimated
Source Load W D H lbs)
Figure 1-1. Typical
2300 6 6 4.0 1.4 2.3 4400
LCI Lineup
2300 12 12 5.6 1.4 2.3 7400
4160 6 or 12 6 5.6 1.4 2.3 7400
Synchronous
Motor
AC
In Tach
Source Load
Bridge Bridge
Excitation
Voltage
Controller
Series 90-30 Tach

PLC or Main Signal
Innovation Control
Series Controller Module
Display DS200DDTB Figure 1-2.

I/O Module
LCI System Components
Section 1, Equipment Overview 3

1-6. Related Documents 1-7. Technical Assistance

The following publications may also apply to your For assistance, contact:
LCI configuration:
General Electric Company
GEI-100256, receiving and storage instructions Product Service Engineering
1501 Roanoke Blvd.
GEH-6124, installation and startup instructions
Salem, VA 24153-6492 USA
for standard LCI
Phone: 001-540-387-7595
GEH-6125, installation and startup instructions Fax: 001-540-387-8606
for static starter LCI
GEH-6374, liquid-cooling system
Printed wiring board publications (see Section 3
for identification)
GE Fanuc publications for Series-90 equipment
AFE Technologies publication for the Datapanel
equipment
Additionally, the following documents provide
requisition-specific information about the cus-
tomers equipment:
System drawings, including outlines and ele-
mentary diagrams
Renewal Parts listing (see Appendix A)
GE Industrial Control Systems supplies the applica-
ble documents to its customers to support the
equipment provided in a requisition system.
The contract documents define the terms of the
document distribution.
4 Section 1, Equipment Overview

2 Functional 2-1. LCI System Basics

Description The LCI is a static, adjustable frequency drive system.
It uses application-specific, microprocessor-based
software to control the speed of a synchronous ma-
Section 2 of this manual is a functional description of chine (motor or generator). The basic LCI is a 6-pulse
the LCI. Its purpose is to provide a basic technical configuration that consists of two functional sections:
overview of the operating theory, to help the user bet- a power converter assembly and a control assembly
ter understand how to run and maintain the drive.
Figure 2-1 is a simplified one-line diagram of a single
This description requires the reader to be already fa- channel LCI. Sections 2-1.1 through 2-1.3 describe the
miliar with the principles of power conversion and function of the components shown. Sections 2-5 and
microprocessor-based control. This section is organ- 2-6 cover 12-pulse configurations.
ized as follows:
Section Heading Page 2-1.1. Power Conversion
2-1. LCI System Basics ........................................... 5 The LCI power converter is made up of a rectifier
2-1.1. Power Conversion......................................... 5 that feeds an inverter through a dc link reactor. A
2-1.2. Excitation Voltage Controller....................... 6 transformer isolates the LCI from the ac system bus
2-1.3. Microprocessor-Based Control ..................... 6 and provides the correct voltage at the rectifier termi-
2-2. Power Converter Operation ............................. 6 nals. The transformers internal impedance limits the
2-3. Control Operation ............................................ 9 magnitude of any downstream bus faults.
2-3.1. Synchronization ............................................ 9
2-3.2. Commutation................................................. 9 The rectifier is a line commutated, phase-controlled
2-3.3. Force Commutated Operation/Modes......... 10 thyristor bridge that functions as a source converter.
2-3.4. Load Commutated Mode ............................ 10 Its microprocessor-controlled gating produces a vari-
2-3.5. Torque Control............................................ 13 able dc voltage output to the dc link reactor. The re-
2-3.6. Phase-Locked Loop..................................... 15 actor smoothes the current and keeps it continuous
2-4. Dual-Channel, 12-Pulse Configuration.......... 15 over the systems operating range.
2-4.1. Shutdown Operations.................................. 16 The reactor output is fed to the inverter, which is a
2-5. Series 12-Pulse Configuration ....................... 15 load commutated thyristor bridge. The inverter is also
microprocessor-controlled and functions as a load
converter (see section 2-2.1.1). The inverter produces
a variable frequency ac output to a synchronous mo-
tors stator terminals.
DC LINK SYNCHRONOUS MACHINE

ISOLATION RECTIFIER INVERTER
TRANSFORMER (SOURCE) REACTOR (LOAD)
AC
LINE FIELD
MICRO- EXCITATION
PROCESSOR VOLTAGE
BASED CONTROL CONTROLLER
Figure 2-1. Simplified LCI System One-Line Diagram
Section 2, Functional Description 5

2-1.1.1. Power Flow Reversal. The LCIs rectifier Speed reference signal
and inverter bridges use the same power hardware and
are both controlled by microprocessor-based elec- Process commands, such as stop and start
tronics. Their functions can be reversed by reversing The LCI control evaluates the process commands and
their power flow. In this case, the synchronous motor internal status signals to determine whether the LCI
is braked by pumping its energy back into the ac line. should be in a stopped, started, alarmed, or faulted
Because of this reversing capability, the line side condition.
bridge (labeled rectifier in Figure 2-1), can also be If in a started condition, the control provides gate sig-
called the source converter; the machine side bridge nals to the thyristor bridges and the excitation voltage
(labeled inverter) can be called the load converter. controller. These signals are low-level and are condi-
tioned in the power bridge circuitry to provide the
2-1.2. Excitation Voltage Controller necessary isolation and power level.
The synchronous motor field is usually excited by a
brushless exciter coupled to the motor shaft. The 2-2. Power Converter Operation
brushless exciter is a wound rotor induction motor. Its
rotor voltage is rectified to supply field current to the
synchronous motor. Note
The LCI control cabinet includes a static excitation The system elementary diagrams contain de-
voltage controller to supply stator voltage for the tails on the source and load bridge configu-
ration for each customer requisition.
brushless exciter. The LCIs electronic control (see
section 2-1.3) gates/controls this voltage controller. The power bridges are 6-pulse, 2-way types. (See sec-
This controls the excitation to produce the required tions 2-4 and 2-5 for 12-pulse bridge configurations.)
machine flux. It also provides field overcurrent and The elementary diagram shows the physical arrange-
undercurrent protection. ment of the thyristors (SCRs) in the power bridges.
The bridge legs fire in the order that they are num-
For applications with slip-ring excitation, the LCI
bered (see Figure 2-2). The synchronous machine sta-
supports control of a dc bridge exciter from the same
tor voltages transfer the source converter current from
control hardware as the brushless exciter uses.
one leg to the next.
For applications using an external ac or dc exciter,
the control fully supports any external excitation that FIRE 1 FIRE 3 FIRE 5 FIRE 1
is compatible with a simple set of control signaling.
120
2-1.3. Microprocessor-Based Control 1 3 5 1
(Refer to Figure 2-3.) The LCIs microprocessor- CONDUCTS CONDUCTS CONDUCTS CONDUCTS
based electronics control firing of both the source and 6 2 4 6

load bridges. It processes input signals for this func-
CONDUCTS CONDUCTS CONDUCTS CONDUCTS
tion as follows:
Attenuated source and load bus voltage signals:
To synchronize source and load thyristor firing FIRE 2 FIRE 4 FIRE 6 FIRE 2
For voltage feedback

For overvoltage and undervoltage detection Figure 2-2. Bridge Leg Conduction Sequence
Attenuated source and load current signals from
current transducers:
For regulator current feedback
Electronic overcurrent detection
Software-implemented fault detection
6 Section 2, Functional Description

Microcomputer
(DSPC Board)
High Speed I/O

(ADMA/DDTB Board)
Series 90 Protocol Series 90-30 PLC

(SNPA Board) (Option)
(Option)
Innovation Series Controller Genius Bus

(UCVA Board)
(Option)
Field I/O
Fiber-Optic Gate & Status

Source A Bridge Control
(FCGD Board) Current Feedback
Voltage Feedback

Source B Bridge Control
(Option)
Voltage Feedback

Load A Bridge Control
Voltage Feedback

Load B Bridge Control
(Option)
Voltage Feedback
Internal (AC/DC) Exciter

Control Gate, Current, & Voltage Signals
(FCGE Board) (Option)
Figure 2-3. LCI Control Block Diagram

Figure 2-4 shows the process of switching motor/ When the voltage across the thyristor is positive, it
inverter current from one leg to the next. The princi- can be triggered into conduction.
ples apply to both the rectifier bridge and inverter
bridge. This phase-controlled switching is based on It does not permit current flow in the reverse di-
the following two thyristor characteristics: rection. Thus, in an alternating voltage circuit, thy-
ristor conduction stops and reverse voltage begins
to appear when the current becomes zero.
Figure 2-4. Load Converter Voltage and Current

Current transfer must be completed before voltage In actual practice, the motor field excitation is fixed in
crossover with a positive margin angle. This angle the speed range of approximately 0 10%. It is con-
must be long enough to allow the previously conduct- trolled to produce a desired profile of motor flux at
ing leg thyristors to recover to their blocking state be- higher speeds.
fore forward voltage is applied.
At speeds greater than 10%, the LCI operates in a
This is why the fundamental component of current flux-regulated mode. It adjusts the output of its static
must lead the voltage for the inverter/motor, but lag exciter voltage controller (EVC) to maintain motor
the voltage for the rectifier/source. For successful flux at the desired level.
commutation, angle = 180 = 180 must
always be less than 180, with a practical limit at
2-3. Control Operation
155. A practical minimum value for for the inverter
bridge is 25. Therefore, the motor power-factor angle 2-3.1. Synchronization
is always greater than zero.
When operating in any mode (see sections 2-3.3 and
The LCI control system must conform to the charac- 2-3.4), the electronic control must synchronize firing
teristics of the synchronous machine operating at of both the source and the load converters. It synchro-
leading power factor. Figure 2-5 shows a phasor dia- nizes these to the ac line and synchronous machine
gram for a synchronous machine operating at leading bus voltages, respectively, using attenuated bus-to-
power factor. ground signals as its primary feedback. The control
combines these inputs to produce line-to-line analog
voltages for both converters. It then integrates these
DIRECT AXIS
voltages to obtain flux signals.
IS
The flux signals zero-crossings are then used in syn-
chronizing the phase-locked loop for firing control of
ID both converters. At low speed, before the phase-
locked loop is effective on the load side and if tach
EG I D X AD
position mode is not enabled, the zero-crossing marks
are used as a timing reference for firing in force com-
IQ XAQ mutated operation.
QUADRATURE
IQ EF
AXIS 2-3.2. Commutation
The LCIs source side converter always operates line
Figure 2-5. LCI-Driven Synchronous Motor commutated. Therefore, the ac line voltage transfers
Diagram; Leading Power Factor conduction from one thyristor to the next. The load
side converter may operate either force commutated
With a fixed amount of field excitation, the machine
(see section 2-3.3) or load commutated (see section
voltage characteristic is mainly a function of the rotor
2-3.4), depending on motor speed and flux level.
field-excitation, Ef1, and the de-magnetizing action of
direct-axis current. This produces the IDXAD2 voltage As the synchronous machines rotor (field) rotates, the
in opposition to the voltage produced by field excita- near-sinusoidal shaped field flux cuts the stator wind-
tion. ings. This produces a set of three sinusoidal voltages
in the stator. These sinusoidal voltages are angularly
As shown, an increase in stator current IS results in
displaced by 120 electrical degrees. The magnitude of
higher direct-axis current, which increases IDXAD3.
this counter-electromotive force (cemf) is proportional
This, in turn, decreases the motor voltage EG4 avail-
to speed and field strength.
able for commutation, thereby increasing displacement
angle . This increase of angle further increases At low speeds, the induced emf is insufficient to
stator current, and so on, until equilibrium is reached commutate the thyristors in the load side converter.
at a new operating point. Therefore, in this mode, the load converter must oper-
ate force commutated.

2-3.3. Force Commutated Operation/Modes At approximately 5% of motor speed, the load phase-
locked loop can lock. Inverter firing resolution in-
Force commutated operation is used:
creases to 0.35, ending segment firing mode.
When starting the synchronous motor from zero
Force commutated operation continues until the syn-
During low speed until the motor cemf is sufficient chronous motor reaches a frequency with enough emf
for load commutation to commutate the load side converter. At this point,
the control changes to load commutated operation.
(See Figure 2-6.) In force commutated operation, con-
duction of the load converter is stopped by phasing the 2-3.3.2. Starting With Tach. For LCIs using a pulse
source converter to inversion limit until the dc link tach for applications with high starting torque, the tach
(reactor) current is zero. Thus, the dc link current is pulses are counted to keep track of the rotor position.
chopped into 60-wide segments of motor frequency Starting from standstill does not depend on zero-
(angle). crossings of motor flux.
There are several modes of force commutated opera- The LCI ramps up stator current until it detects shaft
tion. These can be separated into two types: rotation. At that point, it freezes current and fires the
thyristors based on the rotor position determined from
Modes where the digital pulse tach is used to track the tach count. This continues for several firings to
rotor position ensure that the motor is rotating. Then the speed
Modes where the tach is not used regulator is enabled.
During initial startup (commissioning) of the LCI, the The speed regulator then controls stator current to
tach is deselected until initial operating checks are produce the correct torque to accelerate the motor as
completed. required. Force commutated operation continues until
there is enough motor cemf to commutate the load
2-3.3.1. Starting Without Tach. In this mode, the side converter.
starting current must be large enough to accelerate the
motor to about .5 Hz in one or two inverter firings.
This is approximately the minimum frequency at 2-3.4. Load Commutated Mode
which the LCI can reliably sense motor flux and begin Load commutated operation (mode) requires that the
to control torque and speed. motor be operated at a leading power factor. This
When a start from standstill is initiated, the LCI ap- ensures commutation of the load converter.
plies a fixed current level at a fixed frequency to the The LCI control keeps the motor power factor, and
motors stator. The frequency is set by tuneup therefore torque-per-ampere, as high as possible. It
STFREQ and the starting current level is set by tuneup does this by firing the load converter as close to the
CRSTART (see section 5). inversion limit as possible, while maintaining suffi-
When the LCI control senses that flux has reached cient margin for successful commutation of current
sufficient magnitude, it transitions into the segment from one thyristor to the next.
firing mode of forced commutated operation. In this For successful commutation, the volts-seconds re-
mode: quired are proportional to product of the load current
and motor inductance. The LCI controls commutation
Inverter firing is synchronized to crossovers of the
and firing time by processing the following three val-
motor flux
ues:
The motor is operated near unity power factor to
obtain maximum torque Motor (load) current
Inverter firing is adjustable in 30 steps or seg- Motor commutating inductance (a constant stored
ments in the microprocessor system memory)
The speed regulator becomes active Available volt-seconds from the integrated line-to-
line motor voltages

Using the current and inductance, the control seconds to determine the latest possible time to fire.
calculates the amount of commutation volt-seconds This gives a specified margin after commutation com-
required. The control then uses this value of volt- pletes.
seconds and the latest calculation of available volt-
+
IA 0
-
+
IB 0
-
+
IC 0
-
+
I LINK 0
-
LOAD CONVERTER 3 4 5 6 1 2
LEGS CONDUCTING 4 5 6 1 2 3
FIRING TO ESTABLISH
OUTLINED AREA ABOVE PHASE-ON OCCURS
SHOWN IN DETAIL
WITH SOURCE WITH FIRING OF A NEW
CONTROLLING ACTION THYRISTOR LEG PAIR.
+
0
-
LINK VOLTAGE FIRING LEVEL
AT SOURCE TO MAINTAIN
THYRISTOR BRIDGE LINK AND MOTOR
OUTPUT
INVERTING TO
SHUTOFF
LINK
CURRENT
+
0
-
Figure 2-6. Forced Commutation Firing Mode

Figure 2-7 shows the relationship of the system volt- At high load on the motor, the apparent power factor
ages, currents, and flux waves. The commutating seen by the power source increases. This is because
notch identified in the A-C line-to-line voltage is the source converter firing angle advances (is reduced)
equal in amplitude to the simultaneous commutating to obtain more current. The harmonics in the current
bump on the B-C voltage. The corresponding notch and the resultant harmonics in the voltage, caused by
in the A-B voltage is twice this amplitude (A and B commutation notching, decreases.
are the two lines commutating together at this instant);
The fundamental control strategy is to increase motor
the notch area is twice the commutating inductance
current in response to a load torque increase. The dc
per phase times the current. The voltage at the com-
link voltage on the source side is then increased, rais-
mutating point, where the lines are temporarily con-
ing motor current so that it keeps motor speed con-
nected by the thyristor legs, is practically zero during
stant.
commutation; the line-to-line voltage is only the for-
ward voltage drops of the conducting thyristor legs.
LOAD LINE-NEUTRAL VOLTAGES
POWER FACTOR ANGLE,

BETWEEN CENTERS OF
VOLTAGE & CURRENT WAVES
CURRENT INTO LOAD,

NUMBERS REPRESENT
INVERTER LEGS
CONDUCTING & COMMUTATING
Figure 2-7. Load Voltage ANGLE OF OVERLAP,

and Current in Load (COMMUTATION ANGLE)
Commutated Mode MARGIN ANGLE,
LOAD LINE-LINE VOLTAGES
COMMUTATING VOLT-SECONDS=
COMMUTATING INDUCTANCE X
STATOR CURRENT
PEAK VOLT-SECONDS AVAILABLE

(READ BY PROCESSOR TO
CALCULATE LATEST TIME FOR NEXT
FIRING)
LOAD "FLUX" WAVES
EXCESS VOLT-SECONDS AFTER COMMUTATION

(COMMUTATION MARGIN)

2-3.5. Torque Control optional tachometer. The result is used to develop a

speed error input to the speed regulator, which outputs a
(Refer to Figure 2-8.) The speed reference from the
torque command.
process controller is compared to a speed feedback
derived from the integrated motor voltage or an
Figure 2-8. LCI System

Regulator Block Diagram

The torque command signal is applied to both the To regenerate the drive, the load side thyristors fire
source and load side control. Since motor torque is a full advance (point X in Figure 2-9). At this time,
function of flux, current, and the angle between them, the source side controls current by reversing the dc
torque can be controlled either of two ways: voltage to match the rectified motor voltage.
By adjusting stator current magnitude from the
source side at a fixed load firing angle
LINE-TO-NEUTRAL VOLTAGE
VAN VBN VCN
X
X=
By maintaining a constant current and varying the CELL 1

FULL
ADVANCE
displacement angle (firing delay angle) on the load Y=
side CELL 1
FULL
RETARD
However, at any one time, only one of these means can Z

Z=
INVERSION
actively control the torque. LIMIT
The torque command to the source side control is ap-
INTEGRATED LINE-TO-LINE VOLTAGE

Y
plied to a maximum and minimum current limiter. The VCA VAB VBC
minimum current level is set to maintain continuous

current in the dc link. The minimum current is usually
set at 0.2 per unit (pu) of rated dc current.
The minimum current limit also affects the load firing
angle (therefore, motor power factor) whenever the
torque command produced by the speed regulator is less
than the minimum current limit. In this case, the load
firing angle (and motor power factor) is varied as a
function of the torque command, while stator current is Figure 2-9. Flux Wave Zero-Crossing
held constant. Thus, torque is controlled by adjusting
motor power factor whenever the torque command is The drive current command is the greater of the ab-
lower than minimum current limit. solute value of the torque command (from the speed
regulator) and the minimum current limit. The current
The minimum current limit may also be dynamically
command is compared with current feedback and the
increased by the action of the voltage limit regulator.
error is applied to the current regulator.
This regulator reduces stator voltage by simultaneously
increasing current and decreasing power factor. The The current regulator controls the firing of the thyris-
voltage limit regulator is used mostly in applications tors in the source converter (rectifier). Thus, the
where the field excitation is fixed. source control adjusts the dc link voltage as required
to produce the current and torque needed to drive the
When the torque command is greater than the mini-
load.
mum current limit, the load firing angle functions as
follows:
Note
If motoring, the load angle is at its inversion limit.
The load firing control reverses the polarity
If regenerating (braking), the load angle is at its of dc link voltage if braking torque is re-
rectifying limit. quired.
When motoring, the load control adjusts the firing
delay angle to be as late as possible to maintain a
fixed commutation safety margin (usually 20). This
fire-as-late-as-possible control adapts to changes in
stator current and voltage to maintain the margin angle
constant.

2-3.6. Phase-Locked Loop Operation 2-4. Dual-Channel, 12-Pulse

The source and load controls use a phase-locked loop Configuration
(PLL) to track bus voltage angle. This enables the LCI
to fire the thyristors at specific angular displacements (Refer to Figure 2-10.) A dual-channel, 12-pulse LCI
from the ac bus voltages. is configured as two identical, separate 6-pulse drives
operating from a common source. This allows two
The PLL uses the zero-crossings of reconstructed motors to be combined into one frame, reducing both
3-phase flux waves as a timing reference. At each the motor and installation costs.
flux wave crossing, it is possible to determine the an-
gular position within the present cycle of phase A-to- Twelve-pulse operation best uses the motor and drive
neutral of the ac bus voltage. capabilities. It minimizes the harmonics present in
each 6-pulse channel, canceling 5th and 7th harmon-
The PLL uses the FCGD board (see Section 3) to ics. Other higher-order harmonics also cancel, but
capture the time and polarity of each zero-crossing of their amplitudes are much smaller.
the 3-phase flux waves. The control maintains a run-
ning estimate of electrical degrees based on elapsed Note
time and rate of change of the electrical angle. As each Refer to the system elementary diagrams for
zero-crossing occurs, the corresponding electrical de- the exact configuration and detail of each
grees and timing are compared to the control estimate. customers system.
From the comparison, an error in the estimated de-
grees is determined and applied to the PLL regulator. The transformers feeding the two drives (channels)
The regulator increases or decreases the rate of change are identical, except their windings are 30 apart. This
of the angle, to drive the error toward zero. design enables the drives to operate as follows:
The control determines a firing angle for each thy- With the same current and firing angle
ristor. Using the estimated electrical degrees, it calcu-
lates the time when the drive will be at the desired The firing reference angles shifted by 30 between
firing angle. The control then places a firing command the two channels
and time to activate into FCGD board registers, which Equal source-side converter voltage, but 30 apart
completes the firing process. in the two channels
Reduced harmonic distortion on the power system
and higher harmonic frequencies
Load Bridge
Source Bridge
Load
Source Bridge
Load Bridge
Figure 2-10.
Dual-Channel,
Exciter 12-Pulse LCI

The two motors use a common magnetic frame and a 2-5. Series Twelve-Pulse
common field. This causes the load side converter
voltage to be equal in amplitude and frequency be-
Configuration
tween the two drive channels. (Refer to Figure 2-11.) Some LCIs are configured for
The load motors stator winding is separated into two series 12-pulse operation of the source converter. This
identical windings, but isolated and phase-shifted 30. is done primarily to reduce the harmonic distortion
This reduces the torque pulsation amplitude while imposed by the drive on the power system. Twelve-
raising the torque pulsation frequency. The result is pulse operation eliminates half the harmonics pro-
smoother torque for equal current. duced by a 6-pulse system, starting with the 5th and 7th
harmonics.
Inter-channel communication allows one channel to
be master and the other the follower (also called Note
slave). The follower takes its torque reference from Refer to the system elementary diagrams for
the master, enabling the two motor winding currents to the exact configuration and detail of each
be balanced. Thus, the channels deliver equal power, customers system.
take equal current, and fire at the same relative firing
angle. The 12-pulse converter consists of two identical SCR
bridges connected in series. Each bridge is operated at
approximately half the motor voltage. The ac sources
2-4.1. Shutdown Options for the two bridges are supplied from delta and wye
Some dual-channel, 12-pulse systems allow one chan- transformer secondary windings and displaced in
nel to be shut down for maintenance while the motor phase by 30.
continues to run on the other channel (with reduced
torque and usually reduced speed range). When the
out-of-service channel is ready for operation, it can be
returned to service without interrupting the LCI sys-
tem.
However, dual-channel, 12-pulse systems that use a
single control to operate both power converter chan-
nels cannot run with one channel shut down.
12-Pulse
Source Bridges
Load
Bridge
Load
Figure 2-11. Series 12-Pulse LCI

3-1. Introduction
3 Control
Electronics The LCI control electronics consist of microprocessor-
based printed wiring boards and components config-
ured to manage the bridge firing functions. There are
Section 3 of this manual describes the LCI control two control architecture options available for the LCI:
electronics, as follows: using the Series 90 TM -30 Programmable Logic Con-
Section/Topic Page troller (PLC) or the Innovation Series Controller, as
described below.
3-1. Introduction.................................................... 17
3-2. PLC-Based Control........................................ 17
3-2.1. Control Cabinet Configuration.................... 17 3-2. PLC-Based Control
3-2.2. Bridge Interface Boards .............................. 19
3-3. Innovation Series Controller .......................... 19 In the PLC-based LCI, most bridge control boards are
3-4. Board Descriptions......................................... 19 mounted in a VMEbus rack inside the LCIs control
3-4.1. ADMA Daughterboard (DS200ADMA) .... 19 cabinet. The LCIs source cabinet includes additional
3-4.2. DDTB Board (DS200DDTB) ..................... 20 control boards that provide interface functions for the
3-4.3. DSPC Board (DS200DSPC ........................ 20 power conversion.
3-4.4. FCGD Board (DS200FCGD)...................... 20
3-4.5. FCGE Board (IS200FCGE) ........................ 20 3-2.1. Control Cabinet Configuration
3-4.6. FGPA Board (DS200FGPA)....................... 20
3-4.7 FHVA Board (DS200FHVA) ...................... 21 (Refer to Figure 3-1.) The VMEbus rack includes the
3-4.8. NATO Board (DS200NATO)..................... 21 following printed wiring boards:
3-4.9. SNPA Board (DS200SNPA)....................... 21 DS200DSPC Digital Signal Processor Control
3-4.10. UCVA Board (DS200UCVA) .................. 21 board
3-4.11. VPBL Board (DS200VPBL)..................... 21
DS200ADMA Analog-to-Digital Module
The board descriptions within this section provide an Daughterboard
overview of the board function within the LCI control DS200SNPA SNP Protocol Interface Daughter-
electronics. For a more detailed description of each board
boards circuitry and application data, refer to the DS200FCGD Firing Circuit Gate Distribution and
following publications: Status Board
Board identification Publication
DS200FCGE Exciter Gating and Control Board
DS200ADMA......................................... GEI-100218
DS200DDTB.......................................... GEI-100219 DS200VPBL Backplane Board
DS200DSPC........................................... GEI-100220 3-2.1.1. Control and Processing. The DS200DSPC
DS200FCGD .......................................... GEI-100221 (DSPC; see section 3-4.3) board contains all of the
IS200FCGE ............................................ GEI-100233 control code and configurable software.
DS200FGPA........................................... GEI-100223
DS200FHVA.......................................... GEI-100224 The PLC is provided with a Genius Bus controller.
DS200NATO.......................................... GEI-100225 All digital and analog I/O is wired through Field
DS200SNPA........................................... GEI-100226 Control I/O blocks hosted by one or more Genius
DS200UCVA ............................................GEH-6371 Bus Interface Units (BIU). The PLC also contains a
DS200VPBL .......................................... GEI-100227 communications co-processor that supports two Series
90 Protocol (SNP) serial links. One is to the
SNPA/DSPC daughterboards (see section 3-4.9). The
other is to an optional local display (see Section 4,
Serial Communications Monitor.
Section 3, Control Electronics 17

NATO
Link Reactor
FHVA
3-Phase Input
FHVA MS
M
FHVA
FHVA
INTER-
FACE FGPA
Source Bridge Load Bridge Exciter Bridge
DDTB
(Fast I/O)
SNPA ADMA
FCGE
Series
FCGD
FCGD
FCGD
FCGD
UCVA
90-30 PLC
DSPC
SA* SB* LA* LB*
Field
Display
Control I/O
VPBL
Control Cabinet
* SA = Source A
SB = Source B
Notes: LA = Load A
-- Either Series 90-30 PLC & SNPA Board or UCVA is used. LB = Load B
-- Display is optional.
-- FCGD-SB & FCGD-LB are used based on power bridge configuration.
-- FCGE is used with internal exciter only.
Figure 3-1. Example of LCI Control Board Interconnections
18 Section 3, Control Electronics

3-2.1.2. Communication and I/O. The bridge control 3-3. Innovation Series Controller
communicates over an SNP serial link to a Series 90-
30 PLC. The DSPC processor board is the VME bus (Refer to Figure 3-1.) The LCI with an Innovation
master. Series Controller differs from the PLC-based LCI in
two ways:
There are two supported daughterboards for the proc-
essor. The ADMA daughterboard provides high speed It adds the UCVA processor board to replace the
analog and digital I/O through the DDTB terminal PLC
board. The ADMA/DDTB board pair is always present
It eliminates the SNPA daughterboard
in any LCI control. It is the hardware path for contac-
tor control, which provides overcurrent and customer This configuration is used for higher performance
interlock protection independent of the DSPC opera- applications that require a faster data flow.
tion.
The DSPC remains the VMEbus master, controlling
The AFE Datapanel is provided as a door-mounted up to five power bridges. The UCVA is configured as
display option. a VME slave (follower). Remote I/O support is re-
quired on the UCVA to operate the controls and sen-
3-2.1.3. Firing Circuit Control. In the VME rack,
sors in the power bridge liquid-cooling system.
four double slots are used for two to four DS200FCGD
firing circuit boards. These control up to two source The AFE Datapanel display option is not available if
power bridges (labeled SA and SB) and two load the LCI uses the Innovation Series Controller.
power bridges (labeled LA and LB).
The final slot on the right holds an optional 3-4. Board Descriptions
IS200FCGE firing circuit board. The FCGE controls
either an ac or dc exciter package for the synchronous The LCIs printed wiring boards are described in detail
motor field. in their own individual publications. This section
provides a brief functional overview of each, listed
3-2.1.4. Control Partition Between DSPC and PLC.
alphabetically by board name, and identifies the
The LCI control software is designed so that the PLC
boards publications.
handles the features that most often change on a job-
per-job basis. This includes speed and torque reference Figure 3-1 shows board location and interconnections
selection, slow sequencing (such as the cooling system within the LCI. For a definition of the boards part
pumps and sensors), and customer control sequencing. number and how to identify printed wiring boards, see
The PLC receives extensive fault reporting from the Appendix A.
DSPC, which it can pass to the optional display or
customer communications. 3-4.1. ADMA Daughterboard (DS200ADMA)
The DSPC provides a number of non-volatile The ADMA connects to the DDTB I/O board via high
EEPROM values to the PLC adjusting parameters, density connectors and cables. It mounts on the DSPC
such as alarm to fault propagation timing. This simpli- motherboard. The ADMA/DSPC set buffers, filters,
fies setup and configuration by keeping all of the field and converts both analog and digital I/O.
tuneup values in one place.
For more detailed information on the ADMA, see
publication GEI-100218.
3-2.2. Bridge Interface Boards
The bridge includes boards that function as interfaces
between the control cabinet boards and the bridge
hardware. They condition and process signals, and
provide protective functions. These boards are:
DS200FGPA Gate Pulse Amplifier Board
DS200FHVA High Voltage Gate Interface Board
DS200NATO Attenuator Board

GEH-6373 Innovation SeriesAC Drives
3-4.2. DDTB Board (DS200DDTB) 3-4.5. FCGE Board (IS200FCGE)

The DDTB is a base-mounted interface board for The FCGE board functions as an interface between the
system connections of auxiliary I/O. These can include DSPC board and the LCIs motor excitation bridges.
voltage signals, contact I/O, current measurement The FCGE handles voltage and current feedback
signals, and current transformer (CT) input. The board conditioning and control gating power. The board is
provides signal conditioning, scaling, buffering, and plugged into the VMEbus connector on the racks
isolation functions. The DDTB connects to the ADMA VPBL backplane.
board, which is a DSPC daughterboard.
For more detailed information on the FCGE, see
For more detailed information on the DDTB, see publication GEI-100233.
3-4.6. FGPA Board (DS200FGPA)
3-4.3. DSPC Board (DS200DSPC)
The FGPA is the LCIs gate driver, switching power
The DSPC is the LCIs processor board. Its micro- supply, and SCR status monitor. The board receives
processor establishes a VME bus structure on which gating commands from the LCI control (via fiber-optic
the I/O is interfaced. The DSPC contains all the LCI cables). Each FGPA supplies gate power of sufficient
control code, plus all configuration data in a socket- magnitude and duration for one phase of an SCR
mounted EEPROM (electrically erasable read-only bridge. It sends this to CTs on the FHVA boards,
memory). Onboard RAM stores system data. which provide an interface to the SCRs.
The DSPC is the motherboard for the ADMA and The switching power supply circuit converts ac input
SNPA boards. to the dc control voltages required for status and gating
functions. It receives 120 V ac input from a power
For more detailed information on the DSPC, see
supply and produces the following voltages:
P5 (4.7 5.1 V dc) for logic power
3-4.4. FCGD Board (DS200FCGD) P15 (13.5 14.5 V dc) not monitored
The FCGD is an interface board between the LCI P40 (25 V dc) for gate back porch
control and the bridge. The board decodes SCR firing
information from the DSPC processor board , and P90 (80 V dc) to start gating
distributes cell gating signals for each bridge leg. The As a status monitor, the FGPA accumulates SCR
FCGD scales and processes bridge feedback signals, voltage information from the FHVA boards, and
then sends status information back to the DSPC. This transmits the data to the LCI control. This includes
information includes voltage, frequency, current, status of the switching power supply.
current difference, zero-crossing, commutation, flux,
ground fault, and overcurrent feedback. The FCGD For more detailed information on the FGPA, see
communicates with the DSPC via the VME backplane. publication GEI-100223.
It connects with bridge through fiber-optic cables.
For more detailed information on the FCGD, see
20 Section 3, Control Electronics

3-4.7. FHVA Board (DS200FHVA) 3-4.9. SNPA Daughterboard (D200SNPA)

The SNPA provides RS-232C and isolated RS-484
WARNING serial communication between the DSPC board and
the Series 90-30 PLC. This PLC uses a Series Ninety
This board contains a potential hazard of Protocol (SNP) type communications bus. The SNPA
electric shock or burn. Do not touch the board is a DSPC daughterboard, and is not used in LCIs with
or attempt to make measurements when the Innovation Series Controllers.
board is under power. When operating, the For more detailed information on the SNPA, see
FHVA is at SCR potential, which can be sev- publication GEI-100226.
eral thousand volts above ground.
The FHVA serves as an SCR gate interface and cell 3-4.10. UCVA Board (DS200UCVA)
voltage monitor. It provides an isolated path for gate
power from the FGPA board to the SCR with noise The UCVA board contains the processor that replaces
protection. The LCI uses one FHVA for every SCR. the PLC for LCIs using Innovation Series Controllers.
The FHVA includes current sensors to detect whether For more detailed information on the UCVA, see
the SCR is conducting or blocking voltage. It sends publication GEH-6371.
this cell status data to the FGPA board, and turns on its
red C STAT LED if blocking voltage is detected. 3-4.11. VPBL Board (DS200VPBL)
For more detailed information on the FHVA, see The VPBL board is a backplane for the J2 and J3
publication GEI-100224. sections of the control cabinets VME rack. The J2
section connects the following boards:
3-4.8. NATO Board (DS200NATO) DSPC board (slot J1)
UCVA processor board for Innovation Series
WARNING Controller applications
Up to four FCGDs (slots J5, J7, J9, and J11)
This board contains a potential hazard of
electric shock or burn. Do not touch the board FCGE exciter board (slot J13)
or attempt to make measurements when the
The J3 section provides connections that cannot be
board is under power. When operating, the
made on board fronts because of space restrictions.
NATO is at SCR potential, which can be sev-
These include connections to current transformers ,
eral thousand volts above ground.
interface boards, and a power supply.
The NATO board provides voltage feedback scaling
(attenuates) the SCR bridges ac and dc voltages. This For more detailed information on the VPBL, see
allows more accurate processing of voltage feedback. publication GEI-100227.
Stab connections provide options for selecting outputs
to the VPBL backplane board.
For more detailed information on the NATO, see

4 Serial Communications
Monitor
4-1. Introduction
The serial communications Monitor is an operator
interface program that provides direct access to the
LCIs tuneup values and diagnostic tests. It is designed
Section 4 of this manual describes the LCI Monitor to be run on a simple terminal and controlled by an
functions and commands. This information is pre- operator command instruction set. The Monitor is
sented as follows: commonly used as a tool during drive commissioning.
Section Heading Page
4-1. Introduction.................................................... 23 4-2. Equipment Requirements
4-2. Equipment Requirements............................... 23
4-3. How to Use the Monitor ................................ 23 Operator terminal: Simple ASCII terminal or com-
4-3.1. Command Conventions................................... 23 mon terminal emulator on a personal computer; with
4-3.2. Glossary of Symbol Names............................. 24 ANSI support.
4-3.3. Data Types ...................................................... 24
Connections: The Monitor program resides in mem-
4-3.4. Control Characters .......................................... 24
ory on the LCIs DS200DSPC board. It is accessed by
4-3.5. Monitor Control .............................................. 24
connecting boards serial communications port to the
4-4. Monitor Functions........................................... 24
4-4.1. Help................................................................. 24 operator terminal. Cable and connectors are provided
4-4.2. Table Display.................................................. 25 with the requisition as a kit (GE part no.
4-4.3. Peek/Poke........................................................ 27 IC690ACC901B).
4-4.4. Capture............................................................ 29
4-4.5. Analog Output................................................. 31
4-4.6. EEPROM Management .................................. 32
4-3. How to Use the Monitor
4-4.7. Flash Memory ................................................. 33 To use the Monitor, the cable must be connected
4-4.8. Product Specific Functions ............................. 34 between the DSPC board and the Monitor terminal.
4-5. Test Modes......................................................... 36 When the LCI control power is turned on, the LCI
4-5.1. Test Mode Terminate...................................... 36 Monitor automatically starts up and runs through
4-5.2. Simulator Mode .............................................. 36 selftest.
4-5.3. Crowbar Test Mode ........................................ 36
4-5.4. Gate Test Mode............................................... 37 When ready for user input, the Monitor displays an
4-5.5. Cell Status Monitor......................................... 37 onscreen prompt: LCI>
4-5.6. Exciter Test Only ............................................ 37
4-5.7. Hardware Overcurrent Test............................. 38 The user can now input (enter) the desired function
4-5.8. Bridge Alpha Command ................................. 38 command character. Section 4-4 lists and describes
4-5.9. Speed Loop Test ............................................. 38 each Monitor function.
4-5.10. Current Loop Test......................................... 38
4-5.11. Flux Loop Test.............................................. 38 4-3.1. Command Conventions
4-6. Diagnostic Boot Monitor ............................... 39
4-6.1. Using the Diagnostic Boot Monitor ................ 39 To access the Monitor functions, the operator must
enter a valid command (from the Monitor's instruction
Section 4 uses the following format and symbol con- set) at the operator terminal. A few data display com-
ventions to show Monitor commands and displays: mands use ANSI commands to move the screen cur-
sor.
Convention Indication
The following conventions apply for using Monitor
This Screen text or words and characters
typeface commands:
that are typed at the Monitor prompt.
The Monitor requires an entire command line,
This typeface A key; for example, Tab
terminated by pressing the Enter key.
Key-Key Press those keys at the same time; for
If only a portion of the command line is entered,
example, Ctrl-S
the Monitor prompts for the remaining parameters.
Key, Key Press and release the first key, then
press and release the next key; for All variable references are made by symbolic
example, F1, F2 name.
Section 4, Serial Communications Monitor 23

The format for a command line is: 4-4. Monitor Functions

Function Command Parameters
The LCI Monitor provides the following functions:
Function and Command are single ASCII charac-
Function Input See section
ters, which can be lowercase or capital.
Help H 4-4.1
Parameters include: Symbol + [offset]
Brackets [ ] indicate optional values. Table Display T 4-4.2
Symbol is a variable name. Peek/Poke P 4-4.3
Offset selects a specific element of a named ar- Capture C 4-4.4
ray. (Typically for factory use only.)
Analog Output A 4-4.5
Other parameters are covered with the function
descriptions in sections 4-4.1 through 4-4.8. EEPROM E 4-4.6
Flash Memory F 4-4.7
4-3.2. Glossary of Symbol Names
Product Specific U 4-4.8
To access an online glossary of symbol (variable)
names, key in the command: PL string. The U function allows the user to enter Test modes, as
For string, key in the known part of the symbol. described in section 4-5.
The Monitor compares the input string to its internal
symbol table, and presents a list of possible matches. 4-4.1. Help
For example, the command PL SP would reveal valid The Monitor includes an online Help function, ac-
symbols associated with speed. cessed by typing H.
When input by itself, H displays an overview of all
4-3.3. Data Types available functions.
Almost all symbols refer to floating point values and When followed by another function (for example, HP),
would be accessed using the F data type. The Monitor the Help function displays a detailed overview for that
supports the following data types: particular function. For examples of this usage, refer to
Data Type Input to Monitor the sample Monitor screens for each function (Figures
Signed integers I 4-1 through 4-6). Each begins with Help invoked.
Unsigned integers U
Floating F
Hexadecimal presentation
of unsigned integers H
The Monitor reserves the letter D for double precision
values, although there are none in the LCI.
4-3.4. Control Characters

The Monitor responds to a limited number of ASCII
non-printing codes, including the following:
Input to Monitor Result
Ctrl-S Control flow off (XOFF)
Ctrl-Q Control flow on (XON)
Esc Quit current action
^ Recall last command
24 Section 4, Serial Communications Monitor

4-4.2. Table Display Continuous display with this command is one of the
actions that depend on ANSI terminal control com-
The Table Display function allows the user to config-
mands.
ure a table of data on the Monitor screen. The table
can be updated continuously, providing a means to Table 4-1 lists syntax. Figure 4-1 shows an example.
monitor a set of values with the LCI running. Table
4-1 lists the valid inputs.
Table 4-1. Display Table Function Syntax
User Input Description of

Function
Function Command Param Param Param
Float add
T F symbol [+offset] row column
or modify table entry
Double add
T D symbol [+offset] row column
Integer add
T I symbol [+offset] row column
Unsigned add
T U symbol [+offset] row column
Hex add
T H symbol [+offset] row column
Initialize start a New
T N
table definition
T R row column Table Remove entry
T P [on|off] Print table continuously

Help function invoked for

Table Display function.
LCI> ht
T Table display setup and control- prints values to screen continuously
T [FDIUHRP] [Symbol(+offset), # Address] [row] [column].
Add entry by specifying data type(FDIUH), Address(symbol or #), Row, and Column.
Data types are Float, Double, Integer, Unsigned, and Hex
Remove entry with TR row column, Print table with TP, Stop display with <esc>
LCI> th
Enter Symbol or addr > fault_word
Enter Row number > 1
Enter Column number > 1
LCI> tf spdstp
LCI> tf sr_fbk 2 2
LCI> tp
1 fault_word
0
2 spdstp sr_fbk
+0.3385 +0
Press <ESC> to continue.[1;1H
LCI> tr
Figure 4-1. Sample Monitor Screen, Table Function

4-4.3. Peek/Poke To display a range of values, give the start

The Peek/Poke function allows the user to examine address as the first parameter followed by a
and change memory contents. In addition to the hexadecimal number to specify the range count.
normal data types supported in other functions, the To display the next or preceding value in mem-
type E is offered for EE tuneup values. When used, ory, use the + or - parameter.
the E command determines the correct numeric
format (float or integer) for display, based on the To replace a value on display, use the = pa-
data type of the EE tuneup value named. rameter.
If the LCI is constantly updating the contents of a For the C or A command, the resulting display uses
specified memory location, this information can be the pointers contained as part of the D/A control or
displayed in several ways: Capture functions (Circular List, see section 4-4.4).
Use the C parameter to display each new value If no column is specified for either of these com-
over the previous value (ANSI Monitor as- mands, the default displays six columns for the first
sumed). six pointer values associated with the command.
These commands make it easy to look at the same
Use the S parameter to display each new value data you have assigned to either diagnostic function.
on a new line.
Table 4-2 lists syntax. Figure 4-2 shows an example.
Table 4-2. Peek/Poke Function Syntax

Function Command Param Param Function
P F symbol [+offset] [ C (cont. display) Floating point peek/poke

S (scroll display)
, (range)
= value
+ (incr. addr)
- (decr. addr) ]
P D symbol [+offset] Reserved for Double precision floats
P I symbol [+offset] Integer peek/poke
P U symbol [+offset] Unsigned peek/poke
P H symbol [+offset] Hexadecimal peek/poke
P E EE RAM shadow peek/poke
P C [column] [ C, S ] Display variable from Capture columns
P A [channel] [ C, S ] Display variable from Analog channels
P L string Look for string in symbol table

LCI> hp
Peek/Poke: Memory Examine and Modify
P [DATA TYPE] [ NAME or Location ] (COMMAND MODIFIER)
P [FDIUHECALS] [symbol(+offset),#addr] ( CS=+- ,#range )
Float | symbolic name | C Continuous in one screen location
Double | (+ offset) | S Continuous on successive lines
Integer | or # address | +- Next, Previous Memory Address
Unsigned | | = Modify Value
Hex | | ,# Range count for block examine
EEPROM | |
- - - - - - - different second operand, no third operand - - - - - - - - -
Capture (Column #) Examine value assigned to Capture (column)
Analog (Column #) Examine value assigned to D/A (column)
Look text Search symbol table for names matching text
Symbol address # Lookup symbol name matching the address
LCI> pf sr_fbk
C3x (float *)0x0003390d = +0.000000
LCI> ph fault_word
C3x (void * *)0x00033a7f = 0
LCI> pe es.srgain
C3x (float *)0x00032f23 = +6.000000
LCI> pe es.fault_msk
C3x (int *)0x000335c0 = +0
LCI> pc
Column 1 Column 2
fault_word la_vmag
1 +0
LCI> pl
Enter String to match > fault
0x33a7f fault_word
0x35d2e fault_hist
LCI> ps 0x33a7f
Var=fault_word
Figure 4-2. Sample Monitor Screen, Peek/Poke Function

4-4.4. Capture If the test requires a value (<,>,=,!,B) then the L

The LCIs Capture or Circular List function controls command specifies that value. Note that the com-
the diagnostic feature that captures data and saves it parison type ! uses the common C language syntax
in a capture buffer for later display and analysis. for not equal to.
Typical capture operation involves selecting data, The B command specifies the Capture buffer length
determining a trigger, setting capture length, arming before and after the trigger. The X command speci-
and Monitoring the capture process, and examining fies a decimation factor for capturing data, and
the resulting data. defaults to a value of 1. This allows the user to
The Capture commands for selecting data are record values into the buffer only every X capture
equivalent to the table display setup, except that a times, effectively extending the time covered by the
row is not specified. The capture buffer is saved for buffer without excessive data being recorded.
printing when a trigger event occurs. The trigger is The status command S allows the user to obtain a
based on the data specified for row 1 using a test summary of capture buffer settings and the print
specified with the T command. command P displays the saved data after a trigger
occurs.
Table 4-3 lists syntax. Figure 4-3 shows an example.
Table 4-3. Capture Function Syntax

Function Command Param Param Param Function
C F symbol [+offset] column Floating point capture add entry

C D symbol [+offset] column Double capture add entry
C I symbol [+offset] column Integer capture add entry
C U symbol [+offset] column Unsigned capture add entry
C H symbol [+offset] column Hex capture add entry
C R column Capture Remove entry
C T 1 Capture Trigger type
Comparison type
C L Level Capture Level
C G Go-Arm trigger and clear buffers
C B Pre-trigger buffer Post-trigger Capture modify Buffer sizes
length buffer length
C X Decimation factor Capture decimation factor
C N Initialize- Start a New capture
definition.
C S Capture Status display
C P [lines] Capture Print buffers
1
Comparison type is one of {<, >, =, !(not equal to), M(anual), B(itmask)}.

LCI> hc
Capture or Circular List Setup and Control
The list retains columns of data values before and after a trigger event.
The C command sets up the column content, length, & trigger, plus display.
C(FDIUH) (symbol or #address) (column) adds the specified data to the list.
CR # removes an existing entry from the specified column.
The trigger operates on column 1 using a comparison to a reference level.
CT (<>=!MB) sets the trigger comparison type to less than the level, greater
than, equal, not equal, Manual, or Bitmap.
CL # sets the level or reference.
CB #1 #2 sets the list length to #1 samples before the trigger and #2 after.
CG arms the list to begin capturing data.
CS displays a summary of the capture status.
CP # prints the specified number of lines from a captured list.
LCI> ch
Enter Symbol or addr > fault_word
LCI> cf la_vmag 2
LCI> ct !
LCI> cl
Enter the Capture trigger level > 0
LCI> cb
Enter the Capture pretrigger buffer size > 5
Enter the Capture posttrigger buffer size > 2
LCI> cg
Trigger re-armed
LCI> cs
Column 1 Column 2
fault_word la_vmag
Pretrigger buffer size: 5, Posttrigger buffer size: 2
Pretrigger buffer cnt: 5, Posttrigger buffer cnt: 0
Decimation factor: 1
Trigger conditions: ! 0x0
No capture trigger yet.
LCI> ph fault_word
C3x (void * *)0x00033a7f = 0 =0x01
C3x (void * *)0x00033a7f = 1

CL triggered.
LCI> cp
Data Capture Buffer

###, Column 1 Column 2
fault_word la_vmag
-5, 0, 0
-4, 0, 0
-3, 0, 0
-2, 0, 0
-1, 0, 0
+0, 1, 0
+1, 1, 0
Figure 4-3. Sample Monitor Screen, Capture Function

4-4.5. Analog Output Notice that the range is specified as a zero value and
full scale value for both floating point and integer
The DSPC board contains six voltage output D/A
variables. These correspond to 0 V and 10 V output
converters used for diagnostic display of control
levels on the D/A.
values. The commands listed in Table 4-4 control the
assignment, range, and display of the first five chan- Table 4-4 lists syntax. Figure 4-4 shows an example.
nels. The sixth channel is fixed to display firmware
execution, and not available to the user.
Table 4-4. Analog Output Function Syntax

Function Command Param Param Param Param Function
A F symbol [+offset] channel zero max volt Float analog output add or
volt value modify entry
value
A I symbol [+offset channel zero max volt Integer analog output add or
volt value modify entry
value
A S Analog Status display
LCI> ha
Analog D/A converter diagnostic output setup and control
AF [symbol] [channel] [0-volt-value] [10-volt-value] assigns a Float output.
AI [symbol] [channel] [0-volt-value] [10-volt-value] assigns a integer output.
AS prints a Summary of the Analog output setup.
LCI> af
Enter Symbol or addr > sa_idc_link
Enter the Analog output channel number > 1
Enter zero volt value > 0
Enter +10 Volt value > 1.25
LCI> as
DSPC DAC Status Summary

DAC 1:sa_idc_link (float) 0V = 0 , 10V = 1.25
DAC 2:sr_fbk (float) 0V = 0 , 10V = 1.25
DAC 3:la_vmag (float) 0V = 0 , 10V = 1.25
DAC 4:spdstp (float) 0V = 0 , 10V = 1 Not available
DAC 5:fault_word (int) 0V = 0 , 10V = 1 to user.
DAC 6:stairstep (int) 0V = 0 , 10V = 2048
Figure 4-4. Sample Monitor Screen, Analog Output Function

4-4.6. EEPROM Management EE memory holds up to four full sets of tuneup values
for support of drives operating multiple motors. The
The DSPC board uses one EEPROM for saving tuneup
active tuneup set is selected by the system sequencing
parameters. At power-up, the values are copied to the
and is normally transparent to the Monitor user. It is
faster RAM (a RAM shadow) for use. Standard prac-
possible to specify a destination page number that
tice during drive tuneup is to first make changes to the
overrides the default value to copy one page of
RAM shadow. Then if the RAM values need to be
EEPROM values into the RAM shadow and back to a
made permanent, the EEPROM is updated.
different destination page. Restoring EEPROM to
This function includes commands to show differences shadow always uses the page number indicated by
between shadow and EE memory[C], save shadow to system sequencing .
EE [S], restore EE to shadow [R],.and copy all Table 4-5 lists valid inputs and syntax. Figure 4-5
shadow values to [U] and from [D] text streams on the shows an example.
Monitor port. This allows saving and restoring tuneup
values using a terminal that supports simple text file
transmits and receives.
Table 4-5. EEPROM Management Function Syntax

E S [page#] [YES] Save shadow to EEPROM

E R [YES] Restore EEPROM to shadow
E C Compare shadow to EEPROM
E U Upload shadow to DSPC port
E D Download shadow from DSPC port
LCI> he
EEPROM commands: S[p]R[p]CUD
Save (buffer to EE), Recall (EE to buffer),
Compare( buffer/ee), Upload/Download(buffer)
where: p = EE page # (0-3).
NOTE: Upload = send to DSPC
LCI> ec
Total Differences = 0
LCI> eu
Send records. <ESC> to end upload

0 variables loaded into shadow
LCI> ed
spare_0000 0 2048
spare_0001 1 0
rrmaxl 2 1
spare_0003 3 0
spare_0004 4 0
Aborted. (by user hitting <esc>)
Figure 4-5. Sample Monitor Screen, EEPROM Function

4-4.7. Flash Memory Software flow control support using XON/XOFF

characters is required of the sending program. In
The DSPC board contains Flash memory for non-
addition to the listed Monitor commands for flash
volatile program storage. The Monitor can download
downloads, the Monitor automatically detects attempts
updates to this program . It can also upload the con-
to initiate Zmodem transfers and implement them
tents of flash memory to the Monitor port. The Moni-
without the need of an explicit Monitor command. See
tor supports binary (text) downloads, as well as
Table 4-6 for a list of valid inputs.
Xmodem, Ymodem, and Zmodem error correcting
protocols when receiving flash images.
Table 4-6. Flash Management Function Syntax

F D sector [+offset] [length] Flash download sector to Monitor port.

F U ( ),X,Y,Z Flash upload using text, Xmodem,
Ymodem, Zmodem protocol.
LCI> hf
FLASH Memory Commands: [L|Bs|Es|D|U[m]]
List, Boot, Erase, Download, Upload
where: s=sector#, m=[binary],X/Y/Zmodem
NOTE: Upload = sent to DSPC
LCI> fl
32 Bit Flash Memory Words

Sector 0 contains 52174 words (79%).
Sector 1 is full.
Sector 3 is erased.
Sector 4 is erased.
Sector 5 is erased.
Figure 4-6. Sample Monitor Screen, Flash Memory Function

4-4.8. Product Specific Functions The R command is used to review code and board
revision status.
The standard set of Monitor functions is extended
through the U function call. The T command is used to See Table 4-7 for a list of valid inputs and syntax.
invoke test functions (see section 4-5). Figure 4-7 shows an example.
Table 4-7. Product Specific Function Syntax

Function Command Param Param Param Param Function
U T 0 Terminate any test mode.

U T 1 Reserved for future use
U T 2 [spdref] Simulator Mode
U T 3 Crowbar Test
U T 4 Bridge Period Leg Gate Test
U T 5 Bridge # Cells Cell Conduction Status
U T 6 Refer- Step
Step Exciter Only Operation
ence Period
U T 7 Bridge Hardware IOC Test
U T 8 Bridge Angle # Cells Bridge Alpha Gating
U T 9 Reserved for future use
U T 10 Step
Step Speed Reference Step Generator
Period
U T 11 Step
Step Current Reference Step Generator
Period
U T 12 Step
Step Flux Reference Step Generator
Period
U R Code & Hardware Revision Display

LCI> hu
UT Precedes LCI Product specific test functions.
UT 0 cancels any of the following tests.
UT 1 not assigned.
UT 2 [SPDREF] invokes simulator mode - not implemented yet.
UT 3 crowbar test circulates current without motor.
UT 4 [Bridge] [Period] [Cells] walks gating pulses through cells.
UT 5 [Bridge] [# Cells] displays conduction status for cells.
UT 6 [FieldRef] [Period] run exciter only with specified reference.
UT 7 hardware ioc test - not implemented yet.
UT 8 [Bridge] [Alpha] [# Cells] Open loop bridge gating at Alpha.
UT 9 Speed Regulator Auto-Tune; not implemented yet.
UT10 [SPDREF] [Period] injects step into speed regulator.
UT11 [CURREF] [Period] injects step into current regulator.
UT12 [FLXREF] [Period] injects step into flux regulator.
LCI> ur
Innovation_LCI R001_02_00_1 Jul 31 1997 17:11:20
Hardware detected at initialization:

PWA SN: 0004904258, DS200FCGDG1AAA, H1AAA
PWA SN: 0002013674, DS200SNPAG1AAA
PWA SN: 0008745897, DS200VPBLG1AB, DS200VPBLG1ABB
PWA SN: 0004898553, DS200DSPCH1AAA
PWA SN: 0003665203, DS200ADMAG1APR1, ENG1
PWA SN: 0004898775, DS200FCGDG1AAA, H1AAA
PWA SN: 0004546335 Enters into Test Mode
(see section 4-5)
LCI> ut10
Enter step in percent (0-25) > 1
Enter step period in milliseconds (500-50000) > 500
Test Mode Blocked - Invalid Operating Conditions
LCI> ut
Enter Test Number > 5
Select the bridge (1=SrcA, 2=SrcB, 3=LoadA, 4=LoadB, 5=Exciter) > 1
Select cell (1-6) > 1
Test Mode Blocked - Invalid Operating Conditions
Figure 4-7. Sample Monitor Screen, Product Specific Function

4-5. Test Modes Speed reference signals to the DSPC come through the
PLC with the addition of an optional value specified
Enter into the Monitors Test Modes by using the by the test invocation parameter [SPDREF]. This
Product Specific function input UT (section 4-4.8), parameter can be changed during the course of the
followed by the test number command, as described in simulation. This allows local generation of a speed
the following sections. Fault_mode must be 0 for all reference with the PLC command value at zero.
test modes.
All primary feedback signals can be simulated and
When a test is invoked, a text message is echoed to the displayed. The motor model does not include satura-
screen to identify the selected test. Figure 4-7 shows tion curves. The load model features friction, windage,
an example. inertia, and torque adjustments that are read from the
The Monitor provides the following Test modes: drive configuration in EEPROM. The relevant
EEPROM variables are listed in Table 4-8.
Test Mode Input See section
Test Mode Terminate UT0 4-5.1 Table 4-8. EEPROM Simulator Values
Simulator Mode UT2 4-5.2 Name Description Scaling

Crowbar Test Mode UT3 4-5.3 1.0 = 1 pu torque
SIM_WK2 Inertia load yields 1 pu speed
Gate Test Mode UT4 4-5.4 change per second
Cell Status Monitor UT5 4-5.5 1.0 = 1 pu torque on
SIM_TORQUE Torque load
motor base
Exciter Only Test UT6 4-5.6
1.0 = 1 pu torque @
Windage
Bridge Alpha Command UT8 4-5.7 SIM_WINDAGE
load (spd^2)
1 pu speed on motor
base
Speed Loop Test U10 4-5.8
1.0 = 1 pu braking
SIM_FRICTION Friction load
Current Loop Test UT11 4-5.9 torque on motor base
Flux Loop Test UT12 4-5.10 Enable Boolean permissive

SIM_ENABLE
simulator for simulator mode
4-5.1. Test Mode Terminate

4-5.3. Crowbar Test Mode
Monitor input: UT0
Monitor input: UT3
Key in the UT0 command to stop any test in progress.
Note
4-5.2. Simulator Mode This test is to be performed by those fairly
knowledgeable of the LCI and its operation.
Monitor input: UT2 [SPDREF] It is made with the PLC not in control
In this test mode, embedded simulations for the power (es.plc_enab = FALSE) and
converters, synchronous motor, and motor load create es.drv_config.fact_test = TRUE.
artificial feedback signals to test the motor control This test mode makes the source bridge regulate dc
algorithms. This test is used in system simulations and link current through a diametric (gated short) on the
to observe control signals without drive operation. All load bridge. The command immediately starts the link
cell gating is suspended during the simulator mode current. The primary use of the test is to operate the
test. LCI power bridges without applying power to the
motor or with the motor not connected.
The load bridge diametric is walked through each of
the three possible diametric pairs at 0.5 Hz using link
commutation mode. The current level defaults to the
current setpoint es.cr_istart where 1.0 equals 1 pu
current on the motor base.

4-5.4. Gate Test Mode The [BRIDGE] parameter specifies A (source A), B
Monitor input: UT4 [BRIDGE] [PERIOD]
(source B), or L (load).
[CELLS] The [# Cells] parameter specifies how many cell
Note status signals should be present for each series string.
The number may be between 1 and 6, and defaults to
This test is to be performed by those fairly six if not specified. The use of a parameter bypasses
knowledgeable of the LCI and its operation. the EEPROM values within the factory test fixture
It is made with the PLC not in control DSPC board.
(es.plc_enab = FALSE) and
es.drv_config.fact_test = TRUE. The status display uses a number 1 to indicate conduc-
tion and a number 0 to indicate blocking. The numbers
Gate Test Mode either gates cells in sequence, or gates appear on the screen in a continuously updated table
a given cell string periodically. This mode is used to display.
observe gate current on cells with bridge power re-
moved. It requires both the source and load contactors Positions of the 1s and 0s line up with physical loca-
to be opened. tions of cells in the bridge. When a bridge has fewer
than six cells in series, the number of digits per posi-
The [BRIDGE] parameter, which can be SA, SB, LA, tion is reduced accordingly.
or LB, specifies the source A, source B, load A, or
load B bridge.
4-5.6. Exciter Only Test
The [PERIOD] parameter specifies the gating time
Monitor input: UT6 [REFERENCE] [STEP]
for each string in milliseconds. The upper limit and [STEP PERIOD]
default value is 1.0.
Note
The [CELLS] parameter, when used, specifies a cell
string. Valid values are 0 through 6 with 0 gating all This test is to be performed by those fairly
strings in sequence and 1 through 6 selecting a single knowledgeable of the LCI and its operation.
string for test. It is made with the PLC not in control
(es.plc_enab = FALSE) and
When a single string is specified, the gating duty es.drv_config.fact_test = TRUE.
cycle of the cell string is 1 [PERIOD] turned on and
2 [PERIOD] turned off. When all strings are speci- This test sets up the integrated LCI motor exciter to
fied (cells = 0), each string is turned on in sequence for operate with the source and load bridges turned off.
one period. The scaling of [REFERENCE] is 1.0 = 1 pu voltage
for brushless systems or 1.0 = 1 pu current in dc
exciters.
4-5.5. Cell Status Monitor
To test the exciter regulator performance, it is possible
Monitor input: UT5[BRIDGE][# Cells] to add a step generator into the exciter reference.
The LCI can monitor the conduction status of each Magnitude should equal the second parameter, scaling
SCR in all primary power bridges. This test mode should equal the first, and the period in milliseconds
continuously monitors all cells in the specified bridge should be the third parameter.
for blocking status. It generates an alarm if feedback The invocation of UT6 sets up this operational mode,
signals from any cell indicates conduction. including starting of the test. The test is stopped by
The Cell Status Monitor is invoked during factory test invoking UT0.
with dc applied to a bridge, but may be used at any
time. Usually, it is only used in special cases during
normal drive operation. Under these conditions, all
cells should be blocking voltage and the feedback
signals should all actively indicate blocking.

4-5.7. Bridge Alpha Command 4-5.8. Speed Loop Test

Monitor input: UT8 [BRIDGE] [ALPHA] [# Monitor input: UT10 [STEP] [STEP PERIOD]
CELLS]
This test adds a square wave reference into the existing
Note speed reference for regulator response measurements.
This test is to be performed by those fairly The STEP value is 1.0 = 1 pu speed and the period is
knowledgeable of the LCI and its operation. specified in milliseconds.
It is made with the PLC not in control This test is always available and is terminated by UT0.
(es.plc_enab = FALSE) and The drive must be running through the normal start
es.drv_config.fact_test = TRUE. sequence for this test to be useful. Default values for
This test mode open-loop commands the bridge firing STEP and PERIOD are both 0.
alpha angle. It is primarily used for factory test and
development support when operating with a test load 4-5.9. Current Loop Test
wired to a bridge.
Monitor input: UT11 [STEP] [STEP PERIOD]
The [BRIDGE] parameter specifies SA (source A), SB
(source B), LA (load A), LB (load B) or E (exciter) This test adds a square wave reference into the existing
with E only valid for internal exciters controlled by an current reference for regulator response measurements.
FCGE board. The [ALPHA] angle is specified in The STEP value is 1.0 = 1 pu current and the period is
degrees. There are no default values for [BRIDGE] specified in milliseconds.
and [ALPHA]. Both values must be specified or no This test is always available and is terminated by UT0.
test is generated. Default values for STEP and PERIOD are both 0.
The [#CELLS] parameter is optional. It modifies the
cell status display that takes place during alpha test. 4-5.10. Flux Loop Test
Default value of #CELLS is 6, the maximum cell
Monitor input: UT12 [STEP] [STEP PERIOD]
count.
This test adds a square wave reference into the existing
The test display shows the type of test on the first line,
flux reference for regulator response measurements.
then the cell status indication, which has the same
The STEP value is 1.0 = 1 pu flux and the period is
format as UT4. The display then indicates current
specified in milliseconds.
feedback for both current sensors associated with the
bridge under test, as well as calculated dc link current This test is always available and is terminated by UT0.
feedback. All displayed information, except test type, Default values for STEP and PERIOD are both 0.
continuously updates on the screen.
Use utest_angle to control [ALPHA] when UT8 is
active.

4-6. Diagnostic Mode Boot 4-6.1. Using the Diagnostic Boot Monitor
Monitor This Monitor mode is intended for factory use only.
During power application, the DSPC goes through a The boot Monitor includes a subset of commands
simple boot Monitor before a drive application is previously documented for normal Monitor mode:
loaded. Help (section 4-4.1)
The boot sequence for DSPC is as follows: Peek/Poke (section 4-4.3)
1. The DSPC boots a microboot loader that verifies Flash Memory management (section 4-4.7)
basic functionality of SRAM on the board.
Program execution control
2. Following successful completion of these tests, the
program loads and enters the boot Monitor. All of these are the same as previously described
commands with the exception of the program execu-
3. The boot Monitor automatically detects if a valid tion control.
application is present in flash memory. After a brief
pause, it boots the application. The flash memory on the DSPC board consists of
segments that may contain code. The first segment
During the pause, press Esc to abort the application always contains the boot Monitor. The second and
load and remain in the boot Monitor. If no valid appli- following segments normally contain application code
cation is present in flash memory, the system remains for a product, in this case an LCI. Additional segments
in the boot Monitor. may be used for test code with instructions on their use
to be provided by factory personnel as needed.

5-1. Introduction
5 Software Tuneup
Variables The LCIs DSPC board contains configurable software
values (variables) in its socket-mounted EEPROM.
These values can be accessed and modified for tuneup
Section 5 of this manual lists and defines the LCI and testing using the serial communications Monitor,
application software variables. The variables are listed as described in Section 4.
alphabetically by acronym (name).
Variable Definition
ADMA_DAC1_OFST Offset for D-to-A 1.
Location: 1887 This is the offset adjustment for ADMA dac1, which is associated with sending the torque com-
Type: Integer mand to the other channel. When the cur_reg_cmnd is zero, 12 mA should be flowing in the
current loop. The default should be 0.0.
Units: counts
Range: 2047 (not Note that the receiver in the other channel has a 192.29 ohm resistor as a load; the voltage across
restricted) the resistor when 12 mA are flowing should be 2.31 volts. This can be measured at DDTB TB1-
X15 and TB1-X14.
ADMA_SLOT Slot position of ADMA daughterboard on the DSPC.
Location: 1839 Slot 1 is at the bottom of the DSPC.
Type: Unsigned
integer
Units: None
Range: 1 4
ADMA_VCO_10V_ Ratio for Scaling ADMA VCO2.
RATIO
One of the VCOs (2) on the ADMA/DDTB board set is expected to be driven from a 10volt
Location: 36 waveform. This VCO has an EE that allows the software to per unitize the VCO readings. This EE
Type: Float is the ratio of a max value for the VCO and a normal value for the VCO. The first represents the
instantaneous voltage that will saturate the VCO. The second represents the instantaneous
Units: None
voltage that is considered to be nominal (1 pu).
Range: None
This VCO is scaled to receive 5.0 V signals as maximum and minimum voltage signals. The
hardware scaling is such that 1 volt at the VCO is 2.0 volts at the terminals of the DDTB. There-
fore, the maximum instantaneous voltage is 10.0 volts. The nominal voltage can be 10.0 and
below. If it is 10.0, then the ratio will be 1.0 with no over-range. If it is 5.0, then the ratio will be 2.0;
with 2.0 pu over-range.
ADMA_VCO_VAC_ Ratio for Scaling ADMA VCO0 and VCO1.
RATIO
Two of the VCOs (0 and 1) on the ADMA/DDTB board set are expected to be driven from sinusoi-
Location: 35 dal voltage waveforms through pts. These VCOs share an EE that allows the software to per
Type: Float unitize the VCO readings. This EE is the ratio of a max value for the VCO and a normal value for
the VCO. The first that represents the instantaneous voltage that will saturate the VCO. The
Units: None second represents the instantaneous voltage at the peak of the voltage at nominal.
Range: None
These VCOs are scaled to receive 5.0 V signals as maximum and minimum voltage signals. The
hardware scaling is such that 1 volt at the VCO is 195.95 volts at the pt primary. Therefore, the
maximum instantaneous voltage is 979.57 volts. If the nominal voltage is 480 V ac, then the
nominal peak will read 1pu at the peak (678.82) of the ac. The ratio would be 1.443 for the exam-
ple just given.
ALARM_MSK Alarm word mask.
Location: 1894 This will mask selected alarm annunciations. It is to be used in unusual conditions to prevent
Type: selected alarms from occurring. If an invlim is associated with a particular bit, it will also be
alarm_word_type masked out.
Units: Bit-packed Refer to ALARM_WORD for bit mapping.
Range: None
Section 5, Software Tuneup Variables 41

Variable Definition
ABACCMAX Anti-backlash maximum acceleration.
Location: 0004 When the motor is rotating within gearbox backlash there is no load inertia on the shaft. This EE
Type: Float sets the acceleration threshold for detecting this condition. See also ABJSIM.
Units: pu
speed/second
Range: None
ABJSIM Anti-backlash simulated inertia.
Location: 0005 When high rates of acceleration are observed, the control assumes the motor shaft is discon-
Type: Float nected from the load inertia because of gearbox backlash. This EE sets the level of simulated
inertia that is applied to the torque command when this condition is detected.
Units: Seconds
Range: None 1.0 second of inertia = 1.0 pu torque / (1.0 pu speed / sec)
ANA1SCL Analog output 1 scaling.

Location: 2025 PLC uses this to scale the analog output 1. The output is located in the analog block at the field
Type: Integer I/O. The analog output is ranged from 4mA to 20mA or 0 V dc to 10Vdc. 0 count = 4mA;0 V dc,
20,000 counts = 20mA;10 V dc
Units: 0.1%
Range: 0 32767 See ANA4SCL for details.
(not restricted)
20,000 counts = 20mA;10 V dc
Units: 0.1%
(not restricted)
20,000 counts = 20mA;10 V dc
Units: 0.1%
(not restricted)
Location: 2022 PLC uses this to scale the four analog outputs located in the analog block at the field I/O. The
Type: Integer analog output ranges from 4mA to 20mA or 0 V dc to 10 V dc. 0 count = 4 mA 0 V dc, 20,000
counts = 20 mA 10 V dc
Units: 0.1%
Range: 0 32767 VAR VAR 1 pu D/A 4 20 mA
ANA4SCL
(not restricted) count 0 10 V dc
Where VAR is an integer variable in the PLC.

Assuming the D/A output is driving an analog meter with 10 V dc or 20 mA as full scale deflection.
1,000
ANA4SCL =
desired VAR pu at full scale deflection
Variable examples:
VAR 1 PU Count
Power 5000
Motor volts 20000
Speed 20000
Current 20000
42 Section 5, Software Tuneup Variables

Variable Definition
CL_ADDR01 Circular list variable address for Column 1.
Location: 1029 Circular list data capture column 1 variable address. The corresponding RAM shadow of this EE is
Type: Integer modified by the Monitor "ch","ci","cf" commands.
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None

Variable Definition
Units: None
Range: None
CL_ADDR10 Circular list variable address for Column 10) Circular list data capture column 10 variable ad-
dress. The corresponding RAM shadow of this EE is modified by the Monitor "ch","ci","cf" com-
Location: 1056 mands.
Type: Integer
Units: None
Range: None
Location: 1059 Circular list data capture column 11 variable address. The corresponding RAM shadow of this EE
Type: Integer is modified by the Monitor "ch","ci","cf" commands.
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None

Variable Definition
CL_FTL Circular list float trigger level.
Location: 1023 Trigger level for the circular list data capture function. When column 1 is of float type, the corre-
Type: Float sponding RAM shadow of this EE is modified by the Monitor "cl" command.
Units: None
Range: None
CL_ITL Circular list integer trigger level.
Location: 1024 Trigger level for the circular list data capture function. When column 1 is of integer type, the
Type: Integer corresponding RAM shadow of this EE is modified by the Monitor "cl" command.
Units: None
Range: None
CL_O05 Circular list offset from variable address for Column 5.
Location: 1043 Circular list data capture column 5 offset from specified variable address. The corresponding RAM
Type: Integer shadow of this EE is modified by the Monitor "ch", "ci", "cf" with offset entered via the "+" com-
mand modifier.
Units: None
Range: None
CL_OFFS01 Circular list offset from variable address for Column 1.
mand modifier.
Units: None
Range: None
mand modifier.
Units: None
Range: None
mand modifier.
Units: None
Range: None
mand modifier.
Units: None
Range: None
mand modifier.
Units: None
Range: None

Variable Definition
mand modifier.
Units: None
Range: None
mand modifier.
Units: None
Range: None
mand modifier.
Units: None
Range: None
Location: 1058 Circular list data capture column 10 offset from specified variable address. The corresponding
Type: Integer RAM shadow of this EE is modified by the Monitor "ch", "ci", "cf" with offset entered via the "+"
command modifier.
Units: None
Range: None
command modifier.
Units: None
Range: None
command modifier.
Units: None
Range: None
command modifier.
Units: None
Range: None
command modifier.
Units: None
Range: None

Variable Definition
command modifier.
Units: None
Range: None
command modifier.
Units: None
Range: None
CL_POSS Circular list post-trigger sample size.
Location: 1028 Circular list data capture post-trigger buffer size. The corresponding RAM shadow of this EE is
Type: Integer modified by the Monitor "cb" command.
Units: None
Range: None
CL_PRSS Circular list pre-trigger sample size.
Location: 1027 Circular list data capture pre-trigger buffer size. The corresponding RAM shadow of this EE is
Type: Integer modified by the Monitor "cb" command.
Units: None
Range: None
CL_TT Circular list trigger type.
Location: 1025 Trigger type for the circular list data capture function. Types are <, >, =, !=. The corresponding
Type: Integer RAM shadow of this EE is modified by the Monitor "ct" command. The numerical values corre-
sponding to each type are defined by the monitor code.
Units: None
Range: None
CL_DF Circular list decimation factor.
th
Location: 1026 This specifies every n sample to be captured. The corresponding RAM shadow of this EE is
Type: Integer modified by the Monitor "cx" command.
Units: None
Range: None
CL_TYPE01 Circular list variable type for Column 1.
Location: 1030 Circular list data capture column 1 variable type (such as integer, float, or hexadecimal). The
Type: Integer corresponding RAM shadow of this EE is modified by the Monitor "ch","ci","cf" commands.
Units: None
Range: None
Units: None
Range: None

Variable Definition
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None

Variable Definition
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None
Units: None
Range: None

Variable Definition
CR1FIM Current regulator 1st fire immediate current level.
Location: 192 Current level above which source fires at alpha of 0 degrees on the first firing after a forced
Type: Float commutation. This means that the source fires immediately after the current has fallen below
zero_ilmt.
Units: pu current
Range: None The dc link current I (amps) that results from firing at 0 degrees can be computed by solving the
equation given under CRALPH1 with the latter set to 0 or can be approximated by:
sqrt(2) * Ell
I=k* * [0.5 cos(es.cralph2+120)]
2PI*Fs*L
Where
Ell = source transformer secondary volts (rms)
Fs = source frequency in Hz
L = system inductance (reactor + 2 * (per phase machine
+ transformer Y-equiv. inductance))
k = 0.9 (approximate factor to account for IR and cell voltage drops and machine emf)
l (amps)
CRLFIM = * [0.5 cos(CRALPH2+120)]
1 pu dc link amps
Where
1 pu dc link amps = (1 pu rms machine amps) * 1.2825
If the needed data is unknown, set CR1FIM to 0.75 pu.
st
CRALPH1 Current regulator 1 fire alpha after forced commutation.
Location: 188 Variable used in source firing control to shorten time to re-establish current after a forced com-
Type: Float mutation. The variable sets the initial value of the firing angle such that the desired value of
current is obtained after the first firing.
Units: Degrees
Range: 0 90 (unre- The value for CRALPH1 can be obtained by numerically solving the integrated loop equation for
stricted) the simplified LCI power circuit:
(volt-sec from source) (opposing volt-sec) = flux in power circuit inductance
sqrt(2) * Ell (a2-a1+60)
* [cos(a1+60)-cos(a2+120)] [Ec+IR/2+Em] * = IL
2PI*Fs 360*Fs
Where
Ell = source transformer secondary volts (rms)
Fs = source frequency in Hz
a1 = es.cralph1 in degrees
a2 = es.cralph2 in degrees
Ec = total cell drop in volts = 4NE,
E = one cell drop (1.25 V) N = number of cells/leg
I = dc link current in amps
R = system resistance (reactor + 2 per phase machine Y-equiv. Resistance)
Em = machine emf at load commutation
= sqrt(2) * 0.866 * .075 * Fpu * Vm,
Fpu = pu field at .075 pu speed Vm = motor L-L volts (RMS)
L = system inductance (reactor + 2 per phase machine Y-equiv. Inductance + 2 per phase
transformer Y-equiv. inductance)

Variable Definition
nd
CRALPH2 Current regulator 2 fire alpha after forced commutation.
Location: 189 Variable used to precondition the current regulator to command a firing angle necessary to
Type: Float maintain the current level established by CRALPH1 after a forced commutation.
Units: Degrees (4NE+IR)+(.075Fpu * Vm)
Range: 0 90 (unre- CRALPH2 = acos + (Xtpu * Ipu/2)
stricted) 1.35 * Ell
Where
E = cell drop (1.25v)
N = number of cells/leg
Fpu = per unit field at .075 pu speed
I = current (amps) corresponding to current limit value
Ipu = value of current in pu
R = system resistance (mostly reactor)
Vm = motor L-L volts (RMS)
Ell = transformer secondary volts (rms)
Xtpu = transformer commutating reactance
Recommended range is 60 to 90 degrees.
CRGAIN Current regulator gain.
Location: 10 Source side current regulator gain. The variable's relationship to system parameters is given
Type: Float below.
Units: None CRGAIN = (0.95*IM*WC*R) / (VL-L)
Range: None IM = fund rms rated motor current
VL-L = rated rms L-L source volts
WC = desired regulator crossover
L = inductance in conducting path
= reactor + 2(load comm. inductance) + 2(transf. comm. inductance)
Set CRGAIN to (47.5*IM*WC*L) / (VL-L)
Set CRTC to 0.02
(Load and transformer quantities are per phase Y-equivalent.)
CRMIN Current regulator current lower limit.
Location: 9 This EE sets the minimum value of dc link current. Normally set to maintain continuous current.
Type: Float The link reactor is usually picked to maintain continuous current at 0.2 pu. The associated soft-
ware variable and its relationship to this EE is:
Units: pu bridge
current if (volt_limit regulator not active)
Range: None cur_lower_lmt = es.crmin
else
es.crmin < cur_lower_lmt < es.vlclim
For dual-channel load, the pu base for this value is the bridge rating(the value of current used to
calibrate the current feedback for the channel).
CRSRATE CRSTART rate limit for tach starting.
Location: 200 When the drive is doing a tach start , CRSRATE sets the rate at which the current reference
Type: Float ramps up from CRMIN to CRSTART in lac_mode = fc_tseg_fire.
Units: pu motor
amps/sec
Range: 0 2.0

Variable Definition
CRSTART Speed regulator output starting current command.
Location: 196 Value of current used in fixed fire for breaking away the load when the drive is doing a flux start.
Type: Float When the drive is doing a tach start, CRSTART sets the maximum current limit when
LAC_MODE = FC_TSEG_FIRE. The value of CRSTART should be that which would give the
Units: pu motor amps maximum allowable torque and current at stand still. For dual-channel or single channel load the
Range: 0 2.0 pu base for this value is on the motor rating.
CRTC Current regulator time constant.
Location: 11 Time constant used to stabilize the source side current regulator. The variable's relationship to
Type: Float system parameters is given below.
Units: Seconds Set CRGAIN to (47.5*IM*WC*L) /VL-L)
Range: None Set CRTC to 0.02
(Load and transformer quantities are per phase Y-equivalent.)
DRV_CONFIG Drive configuration word.
Location: 1893 The major hardware configuration of the drive is done through DRV_CONFIG. If a change is made
Type: drv_config_type to DRV_CONFIG, the system must be rebooted before the change will become active.
Units: None Bit 0 flwr_flux_enab. Set to command the field exciter in the follower channel to run.
Range: None Bit 2 fact_test. Set when invoking selected user tests; these tests include the gate test, alpha
test, fex only test, or crowbar test. Note PLC_ENAB must be set false before the tests will
activate.
Bit 3
Bit 4 tach_start_enab. Set for applications that use the tach for starting.
Bit 5 tach_spdfbk_enab. The speed feedback calculation will be based on the tach (the tach
must be available).
Bit 6 no_tach. No tach is available. If this bit is set, then neither tach_start_enab or
tach_spdfdbk_enab can be set.
Bit 7 dchan_external. Set if the drive has been calibrated as a dual-channel external drive.
Bit 8 no_internal_exc. There is no internal field exciter.
Bit 9 s12_pulse_enab. The source is defined as a series 12-pulse source. A typical LCI power
element is a single-channel with the source and load being in side-by-side cabinets con-
trolled by a single processor. The typical LCI has a standard 6-pulse source bridge and a
6-pulse load bridge. The source for the series 12-pulse consists of series source bridges in
the first cabinet and a standard 6-pulse load bridge in the second cabinet.
The internal dual- channel (BD) configuration has two channels running from the same
processor. The first cabinet contains a 6-pulse source bridge and a 6-pulse load bridge.
The second cabinet contains a 2nd 6-pulse source bridge and a 2nd 6-pulse load bridge
st
(electrically isolated from 1 channel. The single cabinet configuration is 1/2 of a BD,
which results in a smaller lineup.
Bit 10 sb_leads_sa. In series 12 pulse internal dual-channel applications, the ac voltage con-
nected to the source B (SB) bridge leads the ac voltage connected to the source A (SA)
bridge by 30 (bit false means SA leads SB by 30).
Bit 11 single_cabinet. Refer to Bit 9 (s12_pulse_enab) for details.
Bit 12 mstr. Upon power-up, this channel is the master in dual-channel applications.
Bit 13 dchan_internal. The drive is configured to be dual-channel running from a single DSPC (or
BDN). Refer to Bit 9 (s12_pulse_enab) for details.
Bit 14 no_tach_marker. This bit set if a tach with no marker pulse is connected to VPBL.

Variable Definition
DRV_CONFIG Bit 15 tach_hitorq_start. Set if a high starting torque for tach starts is required. The motor will be
(Continued) positioned to a known electrical position (the motor may momentarily move and rock to a
rest) on starts so that the motors electrical position can be precisely initialized to provide
the best power factor for starting.
Bit 16
Bit 17 lnplus1. This bit set if the load bridge has enough voltage margin to run with one cell
shorted.
Bit 18 snplus1. This bit set if the source bridge has enough voltage margin to run with one cell
shorted.
Bit 19 dc_exciter. Set if the exciter is a dc exciter. It is not set if the exciter is an ac exciter. It
should be set correctly for both internal and external exciters.
Bit 20 srciso. Used to control the sense of the source isolator coil on DDTB. If this bit not set, the
coil is energized when there are faults or problems. When this bit is set, the coil is ener-
gized when there are no faults or problems.
Bit 21 tapercl. The tapered current limit function for the speed regulator current command is
enabled.
Bit 22 tgear. The drive starts with a turning gear motor so that starts are made conditionally upon
the drive running at turning speed (TGFREQ).
Bit 23 hwseg. The drive has a tach/toothed-wheel feedback aligned on a motor segment bound-
ary with enough resolution and a marker to provide a 60 motor segment feedback for
starting.
Bit 24 lb_leads_la. In internal dual-channel applications, the motor voltage connected to the load
"b" bridge leads the motor voltage connected to the load "a" bridge by (bit false means SA
leads SB by 30).
DSPC_FLTMSK DSPC fault mask.
Location: 1895 This will mask selected fault annunciations associated with the DSPC misoperation word. It is to
Type: be used in unusual conditions to prevent selected faults from occurring. If an invlim is associated
DSPC_misop_type with a particular bit, it will also be masked out.
Units: Bit-packed
Range: None
EE_GROUP EE group identifier.
Location: 2046 This EE is a buffer to mark between EE groups. It should be the last EE in a group and should
Type: Integer contain the group number that is active.
Units: bit-packed Group 0 ==>> 0
Range: None Group 1 ==>> 1
Group 2 ==>> 2
Group 3 ==>> 3
EEPSSWD PLC password to Datapanel local control page.
Location: 2044 This EE sets the password used to access local control from the Datapanel. Default password is
Type: Integer 123.
Units: None
Range: 32768 to
32767

Variable Definition
EPLLGAIN Exciter PLL regulator gain.
Location: 020 The exciter phase-locked loop pu gain for the PLL regulator. Use the default settings for a 30
Type: Float rad/sec response, EPLLGAIN = 47.7, EPLLTC = .1. If a different response is desired ,e.g. to
desensitize the PLL for a distorted ac source, adjust EPLLGAIN and EPLLTC using the desired
Units: pu crossover w rad/sec in the following equations.
Range: 0 250.0
PLLGAIN = w**2/18.85
EPLLTC = 3/w
Proportional to the desired response.
EPLLTC Exciter PLL regulator lead time constant.
Location: 021 The exciter phase-locked loop time constant for the biphase PLL regulator. Use the default
Type: Float settings for a 30 rad/sec response, EPLLGAIN = 47.7, EPLLTC = .1.
Units: Seconds If a different response is desired (such as, to desensitize the PLL for a distorted ac source), adjust
Range: 0.0 1.0 EPLLGAIN and EPLLTC using the desired crossover w rad/sec in the following equations:
EPLLGAIN = w**2/18.85
EPLLTC = 3/w
Proportional to the desired response.
EPLLTIM Exciter PLL error time limit.
Location: 3 EPLLTIM is used to determine if the exciter recovers from an exciter PLL quality out-of-bounds or
Type: Float faults.
Units: Seconds A penalty counter is implemented such that every time a quality out-of-bounds is detected, the
Range: None penalty counter is decremented by 3. Every time a quality out-of-bounds is not detected, the
penalty counter is incremented by 1.
If the negative of the penalty counter exceeds EPLLTIM then a fault is declared.
counter trip point = EPLLTIM * 3 * 720 Hz
Nominal setting is 1.0 seconds.
EXDVDT_ENAB Exciter dv/dt compensation enable.
Location: 1898 If this Boolean EE is true, the dv/dt compensation circuit on the FCGE board is enabled, otherwise
Type: Unsigned it is disabled.
integer
Units: None
Range: 0 1
EXGNDFLMT Exciter ground fault limit.
Location: 38 A circuit on the FCGE board detects grounds on the output of a dc exciter. When the circuit's
Type: Float output exceeds EXIUNBLMT, a fault is declared. Relevant only for internal dc exciter systems.
Units: pu exciter volts
Range: None
EXIUNBLMT Exciter current unbalance limit.
Location: 37 A bandpass filter on the FCGE board detects unbalanced exciter current. When the filter's output
Type: Float is greater than the threshold defined by EXIUNBLMT a fault is declared. Relevant only for internal
exciter systems.
Units: pu exciter amps
Range: None

Variable Definition
FAULT_MSK Fault word mask.
Location: 1897 This will mask selected fault annunciations associated with fault word. It is to be used in unusual
Type: Unsigned conditions to prevent selected faults from occurring. Note the hardware faults that stop gating are
integer not masked. If an invlim is associated with a particular bit, it will also be masked out.
Units: Bit-packed
Range: None
FAULT2_MSK Fault Word2 mask.
Location: 1885 This will mask selected fault annunciations associated with fault word2. It is to be used in unusual
Type: uint conditions to prevent selected faults from occurring. If an invlim is associated with a particular bit,
it will also be masked out. Refer to FAULT_WORD2 for bit mapping.
Units: Bit-packed
Range: None
FC_LKSEG_SPD Force commutated idle mode segment fire speed limit.
Location: 177 In idle, if the motor is turning, the load-side PLL is not locked, the flux delay timer has expired, and
Type: Float speed is less than this limit, then re-start on the fly should be in either of the segment firing modes
(lac_mode = fc_tseg_fire or fc_fseg_fire). The default should be 0.0444.This value should ap-
Units: Per base speed proximately equal fcf_trxu_spd.
Range: 0 1.0 pu
FCDELAY Field delay time.
Location: 176 The time delay to allow the field to build up before attempting to turn the motor. This delay time is
Type: Float in seconds; the software sets a limit from FCDELAY, which is in milliseconds.
Units: seconds flddly_tmr_lmt = 1000 *es.fcdelay
Range: None
FCF_SFIRE_ICMD Force commutated flux segment firing current command.
Location: 164 Refer to SRINHFNG for details.
Type: Float
Units: pu motor A
Range: None
FCF_TRXD_SPD Force commutated flux transition down speed.
Location: 187 FCF_TRXD_SPD is used in the lac_mode transition logic to determine if speed is low enough to
Type: Float go from lac_mode = 3 to lac_mode = 2,i.e. from forced commutated PLL-based firing to forced
commutated flux segment-based firing.
Units: pu base speed
(FRQM) The default should be 0.0333 or 3.33% of base speed. This value is approximately the same
Range: 0 1.0 speed used for fct_trxd_time (different units) if tach starts are used.
FCF_TRXU_SPD Force commutated flux transition up speed.

Location: 186 FCF_TRXU_SPD is used in the lac_mode transition logic to determine if speed is high enough to
Type: Float go from lac_mode = 2 to lac_mode = 3, that is, from forced commutated flux segment-based firing
to forced commutated PLL-based firing.
(FRQM) The default should be 0.0444 or 4.44% of base speed. This value should also be used approxi-
Range: 0 1.0 mately for FC_LKSEG_SPD.
FCFTIME Exciter overcurrent firings.

Location: 1899 FCFTIME is used with FCLIM to determine if the exciter recovers from an overcurrent condition or
Type: Integer faults.
Units: None A penalty counter is implemented such that every time an overcurrent condition is detected at a
Range: None new firing, the penalty counter is incremented by 6. Every time an overcurrent condition is not
detected at a new firing, the penalty counter is decremented by one.
If the penalty counter exceeds the number established by FCFTIME, then a fault is declared.
Counter trip point = (FCFTIME - 1) * 6

Variable Definition
FCGAIN Spillover field current limit regulator gain.
Location: 075 This variable sets the gain of the proportional-only spillover field current regulator. The function
Type: Float works by reducing the flux regulator setpoint proportionally to the amount of field current in excess
of the threshold.
Units: (pu flux)/(pu
field current) pu flux setpoint reduction =
Range: FCGAIN(pu field current 0.94*es.FCLIM)
Typical setting is 3.0
See also FCLIM.
FCLIM Field overcurrent level.
Location: 076 For internal exciter systems, this variable sets the trip level for the field overcurrent function. For
Type: Float both internal and external exciter systems, the spillover field current limit threshold is set at 94% of
this value. See also FCGAIN.
Units: pu field current
Range: If the exciter current exceeds FCLIM, then an exciter overcurrent condition exists and the exciter
goes to inversion limit. If this happens often enough over a period of time, a fault will be declared;
the rate is determined by FCFTIME.
FCLOSS Field current loss limit.
Location: 45 This variable is one of two EE's associated with the "field loss fault" function. If the field current is
Type: Float below this limit for a time defined by FCLOSSTD, then a field loss fault is declared.
Units: pu field current Note that this is only applicable to internal field exciters (drv_config.no_internal_exc is false) and
Range: None external exciters with exciter current feedback supplied via DDTB, (reg_config.no_xex_ifb is
false.)
FCLOSSTD Field current loss time delay.
Location: 47 This variable is the time delay associated with the "field loss fault" function. Refer to FCLOSS for
Type: Float further details. The software uses a variable, floss_tmr_lmt, that is scaled in milliseconds. The
conversion is the following:
Units: Seconds
Range: None floss_tmr_lmt = 1000 * FCLOSSTD
FCT_TRXD_TIME Force commutated tach transition down time.

Location: 163 FCT_TRXD_TIME is used in the lac_mode transition logic to determine if the time between load
Type: Float firings is long enough to transistion from lac_mode = 6 to lac_mode = 5, that is. from forced
commutated tach angle-based firing to forced commutated tach segment-based.
Units: Seconds
Range: None The default should equal .0333 pu speed. For a 60 Hz base speed drive, that would be .083 sec
and .333 sec for a 15 Hz drive. Also, use this value approximately for FCF_TRXD_SPD.

Variable Definition
FDROOPK Flux droop constant.
Location: 078 If selected by EE.reg_config.snubber_flux_droop, the flux setpoint is limited to a maximum of:
Type: Float
Units: None 1
FDROOPK * sqrt
Range: fpu^3 * [2-cos^2(alpha)-cos^2(alpha+u)]
Where fpu = pu operating frequency, in Hz

alpha = angle of delay, in degrees
u = commutation overlap angle, in degrees
FDROOPK should be set to the smaller of K_AC_FILTER and K_SNUBBER.
Pa
k_ac_filter = sqrt
(2.25*Kc^2+1)*fb*Ca*Vll^2*osf
Where: Pa = ac filter maximum allowed power loss, in watts

Kc = coefficient of 12-pulse coupling, 0.6 typical
fb = base or rated frequency, in Hz
Ca = ac filter capacitance, in Farads
Vll = rated line-to-line volts
osf = factor to account for loss due to overshoot, 1.15 typical
Ps
k_snubber = sqrt
(3.375*Kc^2+1.75)*fb*Cs*Vll^2*osf/N^2
Where: Ps = snubber maximum allowed power loss, in watts

Cs = snubber capacitance, in Farads
N = number of series SCRs per bridge leg
FIRE_FLTMSK Firing fault word mask.
Location: 1896 This will mask selected fault annunciation associated with the firing fault word. It is to be used in
Type: Unsigned unusual conditions to prevent selected faults from occurring. If an INVLIM is associated with a
integer particular bit, it will also be masked out.
Units: Bit-packed
Range: None
FIX_FIRINGS Fixed firing counts.
Location: 1840 In lac_mode = FC_FIX_FIRE, a minimum number of firings must be done before the drive can
Type: Unsigned transistion out of this mode. The variable FIX_FIRINGS is this number. Note the code limits the
integer number of firings in this mode to the greater of this EE or 2.
Units: firing
Range: na
FLAGAIN Flux regulator adjustment gain.
Location: 214 Sets the integral gain of the source fire-as-early-as-possible regulator.
Type: Float The nominal setting is 0.1 (approximate closed loop response of 0.1 rad/sec.)
Units: None
See also FLEARLY, FLALIMP FLALIMN.
Range:

Variable Definition
FLALIMN Flux regulator negative adjustment limit.
Location: 220 Sets the negative limit of the source fire-as-early-as-possible regulator. The nominal setting is -05
Type: Float pu flux.
Units: pu flux See also FLALIMP, FLAGAIN, FLEARLY.
Range: 0 (-1)
(unrestricted)
FLALIMP Flux regulator positive adjustment limit.
Location: 215 Sets the positive limits of the source fire-as-early-as-possible regulator. The nominal setting is
Type: Float 0.05 pu flux.
Units: pu flux See also FLALIMN, FLAGAIN, FLEARLY.
Range:
FLDRGAIN Field current regulator gain.
Location: 227 Variable used to set the integral gain of the field current regulator. The following equation holds:
Type: Float FLDRGAIN = Wc * R * Ifn / MEV
Units: None
Where Wc = regulator crossover typically 10.0 r/s
Range: None
R = field resistance in ohms
Ifn = nominal machine field amps
MEV = rms dc volts applied to machine field when the field exciter is fully advanced.
FLDRTC Field current regulator lead.
Location: 228 Variable selecting the field current regulator stability time constant. Normally the value is selected
Type: Float equal to the machine field time constant.
Units: Seconds
Range: None
FLEARLY Source fire-as-early-as-possible regulator enable speed.
Location: 213 Sets the speed above which the source fire-as-early-as possible regulator becomes active. The
Type: Float SFAEAPR tries to maintain source firing at full advance to maximize power factor by adjusting
the setpoint of the flux regulator. The SFAEAPR also serves to reduce the flux setpoint when the
Units: pu base speed current regulator attempts to push source firing beyond maximum advance. The nominal setting
Range: not restricted is 0.5 pu speed. Function is enabled by reg_config.sfaeapr_en See also FLAGAIN, FLALIMP,
(recommended FLALIMN.
between 01. and 2.0)
FLPBRK1 Speed/flux profile 1st speed breakpoint.
Location: 210 See FLPMAX1 description.
Type: Float
(as defined by
es.FRQM)
Range: 0-
FLPBRK2 Speed/flux profile 2nd speed breakpoint.
Type: Float
(as defined by
es.FRQM)
Range: 0-

Variable Definition
FLPBRK3 Speed/flux profile 3rd speed breakpoint.
Type: Float
(as defined by
es.FRQM)
Range: 0-
FLPMAX1 Speed/flux profile flux setpoint MAX1.
Location: 207 The flux regulator pu setpoint as a function of pu speed is determined by three line segments
Type: Float defined by four points:
Units: pu flux ^
pu flux | p2
Range: 0- setpoint| *
| / \
| / \
| / \
* - - - - - - - - - * \
|p0 p1 * p3
| \
| \
| \
| \
| \
|
|
+---------------------------------------------------------->
pu base speed fdbk
The coordinates of the points are:

p0: (0 , FLPMAX1)
p1: (FLPBRK1 , FLPMAX1)
For speeds greater than flpbrk3, the flux setpoint is
FLPRK3 * FLPMAX3
pu speed
Type: Float
Units: pu flux
Range: 0-
Type: Float
Units: pu flux
Range: 0-
FLUXS Minimum allowable motor flux for starting.
Location: 156 For starting modes, FLUXS is used to determine if the magnitude of motor flux is high enough to
Type: Float transition to segment firing (lac_mode=fc_tseg_fire or lac_mode=fc_fseg_fire) and to enable the
load side PLL. FLUXS is being compared against mtr_flux_absum, which is the absolute value of
Units: pu Motor Flux the sum of the motor flux signals. The default value should be 0.6.
Range: None

Variable Definition
FNRGAIN Flux null regulator gain.
Location: 32 This EE is the gain of the source A and source B flux feedback offset nulling regulators. The
Type: Float offset is computed from the zero-crossing intervals for +ve and -ve half cycles. These regulators
are enabled when source voltage magnitude is above es.suvtol and in Idle or Self-Commutated
Units: None mode. The gain is normalized so that the regulator time constant is the reciprocal of the gain.
Range: None Suggested setting is 5.0 (0.2 sec response time.)
FRCLMP Flux regulator output clamp.
Location: 219 Sets the maximum advance angle of the exciter voltage controller.
Type: Float maximum desired EVC rms output voltage
Units: pu field exciter Set FRCLMP to
volts maximum available EVC rms output voltage
Range: 0 1.0 (not Maximum valid setting = 1.0
restricted)
FRFCCOMP Flux force commutated compensation.
Location: 225 This defines the field voltage boost as a function of commanded link current when in force com-
Type: Float mutated mode. The flux regulator is not running at this time.
per pu link current
Range: None
FRGAIN Flux regulator gain.
Location: 217 Variable used in the flux regulator to set the regulator integral gain. The following equation holds:
Type: Float FRGAIN = Wc / (GeqMEV)
Units:
Where
Range:
Wc = desired regulator crossover in r/s, typically 1 to 20
Geq = equivalent transfer gain from EVC output voltage to pu flux.
MEV = maximum exciter volts.
For dc exciters, Geq = 1/(RfldIfn)
For ac exciters, Geq = REG/(RfldIfn)
Where
Rfld = the machine field resistance in ohms
Ifn = nominal machine field amps
REG = rotating exciter voltage gain (Vsecondary/Vprimary)
FRQM Motor base frequency.
Location: 15 Two variables define the motor speed in Hz. The first defines the motor speed in Hz
Type: Float when the motor is at base speed. This variable is FRQM. The seccond variable defines the motor
Units: Hz speed in Hz when the motor is at maximum speed. This variable is FRQMM.
Range: None The speed regulator, speed based protectives, and the ramp references use a pu system based
on the speed as defined by FRQM. The speed reference generation up to SPDSTP is based on
the speed as defined by FRQMM.
FRQMM should never be set to a value less than FRQM.
FRQMKM Maximum frequency for constant load margin angle.
Location: 229 Load retard limit margin is selected by bit es.drv_config. Fixed_vsec_marg to be fixed volt sec-
Type: Float onds (bit=1) or fixed angle (bit=0). If fixed angle is selected, the margin is a constant angle given
by es.lmarg for frequencies less than FRQMKM. When the frequency exceeds this threshold, the
Units: pu (FRQMM) margin is held to the volt-second value in effect at the threshold frequency.
Range: None

Variable Definition
FRQMM Motor maximum frequency.
Location: 135 Refer to FRQM for details.
Type: Float
Units: Hz
Range: None
FRQS Rated line frequency.
Location: 17 Source side nominal frequency in Hz. Used for computing pu source voltage magnitude from PLL
Type: Float frequency in Hz and flux magnitude.
Units: Hz
Range: None
FRSCCOMP Flux self-commutated compensation.
Location: 226 This defines the field voltage boost as a function of commanded link current when in self com-
Type: Float mutated mode. The flux regulator is running at this time. Therefore, the compensation serves as a
feed-forward for the regulator.
per pu link current
Range: None
FRSTART Flux regulator starting level.
Location: 216 For units with dc exciters, and with field current feedback available (that is,
Type: Float drv_config.bit.no_internal_exc = 0 or reg_config.bit.no_xexc_ifb = 0), FRSTART is the reference
to a field current regulator that brings up the flux during starts. In this case, FRSTART has the
Units: pu field current units of pu field current.
Range:
For units without field current feedback available (that is, reg_config.bit.no_xexc_ifb = 1), or with
ac exciters, FRSTART is the reference to the flux regulator, which brings up the flux during starts.
The feedback to the regulator is derived by digitally applying a (1 + 1/(s * tau)) transfer function to
the flux feedbacks from the FCGD board to obtain a "pure integral" of the motor line-line voltages.
(Note that tau is the time constant of the FCGD h/w flux integrators.) In this case, FRSTART has
the units of pu motor flux.
If reg_config.const_exalph_start is set, then the above selections are overridden and a constant
exciter firing angle is applied during starts. In this case, FRSTART has the units of pu exciter volts,
that is, firing angle = arccos(FRSTART) (not linear if ac exciter).
See also REG_CONFIG, FLDRGAIN, FLDRTC.
FRTC Flux regulator lead.
Location: 218 Variable selecting the flux regulator stability time constant. Normally the value is selected equal to
Type: Float the machine field time constant.
Units: Seconds
Range:
GNDFLMT Ground fault threshold limit.
Location: 22 System grounds are detected by means of filters tuned to source frequency, load frequency and
Type: Float dc applied to the source neutral voltage. These detect grounds on (respectively) the source, the
load, and the dc link. Variable GNDFLMT sets the threshold for determining if the voltage repre-
Units: pu volts sents a fault level.
Range: None
The detected ground must be present continuously for a number of seconds specified by
es.gndftim.
GNDFTIM Ground fault time.
Location: 22 Sets the continuous time a ground fault must be detected before a fault is declared. See also
Type: Float GNDFLMT.
Units: Seconds
Range: None

Variable Definition
GPVAR01 PLC general purpose variable 1.
Location: 2019 PLC uses this as a general purpose variable for applications that may require additional integer
Type: int EEs.
Units: None
Range: -32768 to
32767 (not restricted)
GPVAR02 LC general purpose variable 2.
Type: int EEs.
Units: None
Range: -32768 to
GPVAR03 PLC general purpose variable 3.
Type: int EEs.
Units: None
Range: -32768 to
GSUVTD Gating source undervoltage delay.
Location: 49 This variable is the time delay associated with the gating supply undervoltage fault. If the gating
Type: Float supply undervoltage alarm is true for a specified time (GSUVTD), then the gating source under-
voltage fault is generated. The software uses a variable, gsuv_tmr_lmt, that is scaled in millisec-
Units: Seconds onds. The conversion is the following:
Range: None
gsuv_tmr_lmt = 1000 * es.gsuvtd
INT_SETTLE_TIME Settling time for flux integrators.
Location: 181 When the drive is starting from other than zero speed, it is important the flux integrator hardware
Type: Float on the FCGD is given time to settle out. The variable, int_settle_lmt, is based on
INT_SETTLE_TIME but it is scaled in milliseconds instead of seconds. When a "uv" condition
Units: seconds occurs, the variable int_settle_lmt is shortened from its normal value of (1000 * int_settle_time) to
Range: None 10msec.
The FCGD board has integrator capacitors that are configurable to account for low speed opera-
tion, which means the default value is dependent on the capacitor selection. The following are
some default values based on capacitors at various base frequencies.
Base Frequency int_settle_time Default
60 1.0
30 2.0
15 4.0
A fixed value of 1.0 is recommended it be used as a starting point.
INTOSTOL Flux integrator offset tolerance.
Location: 174 Sets the tolerance in pu flux for offsets on flux integrators to permit enabling the load phase locked
Type: Float loop during starting and to enable load firing if starting on-the-fly. Note offsets are calculated from
the positive and negative peaks of FBA and FCB thus a minimum of 180 degrees rotation is
Units: None required.
Range: 0.0 1.0

Variable Definition
LA_FACRNULL Reconstructed A-flux null.
Location: 1781 Refer to SA_FACRNULL for details.
Type: Integer
Units: None
Range: 0 255
LA_FBARNULL Reconstructed B-flux null.
Type: Integer
Units: None
Range: 0 255
LA_FCBRNULL Reconstructed C-flux null.
Type: Integer
Units: None
Range: 0 255
LA_FLUXCAP Capacitor for flux integrators..
Location: 1784 Refer to SA_FLUXCAP for details.
Type: Integer
Units: None
Range: 0x00 0x0F
LA_SCALE_I Scale phase current.
Location: 1790 This variable sets the scaling of the phase current MDACs on the FCGD board. The burden
Type: Integer resistor is chosen to provide 3.0 V dc for the hardware path; this path has an additional gain in it.
The MDACs are used to scale the software path for 3.0 V dc.
Units: None
Range: 0 255 Imotor * 1.2825 * Rburden * 4.02 255
IAS@TP19 = * = 3.0 V dc
LEM Ratio D
438.23 * Imotor * Rburden

D=
LEM Ratio
Where
D = LA_SCALE_I
Im = rated motor RMS amps
Rburden = burden resistor in ohms
LA_SCALE_IR IR compensation for line-to-line fluxes.
Location: 1789 This variable scales the current compensation to the input of the flux integrators on the FCGD
Type: Integer board.
Units: None Set D = 453.5 * 10E6 * F * C * Rpu,
Range: 0 255 Where
F = FRQM = rated base frequency
C = flux integrator capacitance selected by la_fluxcap
R = pu resistance

Variable Definition
LA_SCALE_IX IX compensation for line-to-line fluxes.
Location: 1792 This variable scales the current compensation added to the output of the flux integrators on the
Type: Integer FCGD board.
Units: None Set D = 628.6 * Xpu
Range: 0 255
LA_SCALE_VAC Scale line A to line C voltage.
Location: 1794 Refer to SA_SCALE_ VAC for details.
Type: Integer
Units: None
Range: 0 255
LA_SCALE_VBA Scale line B to line A voltage.
Type: Integer
Units: None
Range: 0 255
LA_SCALE_VCB Scale line C to line B voltage.
Location: 1797 Refer to SA_SCALE_VAC for details.
Type: Integer
Units: None
Range: 0 255
LA_SCALE_VDC Scale V dc dc link voltage.
Location: 1798 Refer to SA_SCALE_VDC for details.
Type: Integer
Units: None
Range: 0 255
LB_FACRNULL Reconstructed A-C flux null.
Type: Integer
Units: None
Range: 0 - 255
LB_FBARNULL Reconstructed B-A flux null.
Type: Integer
Units: None
Range: 0 - 255
LB_FCBRNULL Reconstructed C-B flux null.
Type: Integer
Units: None
Range: 0 - 255

Variable Definition
LB_SCALE_VAC Scale line A to line C voltage.
Type: Integer
Units: None
Range: 0 255
LB_SCALE_VBA Scale line B to line A voltage.
Type: Integer
Units: None
Range: 0 255
LB_SCALE_VCB Scale line C to line B voltage.
Location: 1779 Refer to SA_SCALE_VAC for details.
Type: Integer
Units: None
Range: 0 255
LCF_TRXD_SPD Load commutated flux transition down speed.
Location: 159 LCF_TRXD_SPD is used in the lac_mode transition logic to determine if the speed is low enough
Type: Float to go from lac_mode = 4 to lac_mode = 3, i.e. from load commutation to force commutation for
drives configured as flux-based starting.
(FRQM) The default should be 0.08 or 8% of base speed.
Range: None
LCF_TRXU_SPD Load commutated flux transition up speed.
Location: 158 LCF_TRXU_SPD is used in the lac_mode transition logic to determine if the speed is high enough
Type: Float to go from lac_mode = 3 or lac_mode = 0 to lac_mode= 4, i.e. to self-commutation mode for drives
configured as flux-based starting.
Range: None
LCT_TRXD_SPD Load commutated tach transition down speed.
Location: 161 LCT_TRXD_SPD is used in the lac_mode transition logic to determine if the speed is low enough
Type: Float to go from lac_mode = 4 to lac_mode = 6, i.e. from self-commutation to force-commutation for
drives configured as tach-based starting.
Range: None
LCT_TRXU_SPD Load commutated tach transition up speed.
Location: 160 LCT_TRXU_SPD is used in the lac_mode transition logic to determine if the speed is high enough
Type: Float to go from lac_mode = 6 to lac_mode = 4, that is, from force-commutation to load-commutation for
drives configured as tach-based starting.
Range: None

Variable Definition
LIM12P The pu load commutating reactance whose effect on reconstructed flux phase shift is coupled
from one set of windings to another on 12-pulse motors.
Location: 56
Type: Float This EE should be set between 0 and the pu load commutating reactance, depending on the
phase shift of reconstructed flux resulting from 12-pulse operation.
Units: pu reactance
Range: 0.0-.30 It is used to compute a correction on load firing equal to:
pu current 180
* LIM12P * degrees
pu flux PI
LIMARG The pu load commutating reactance.
Location: 57 Used to compute volt_sec_mtr to advance load-side firing for maintaining constant commutation
Type: Float boost of flux_sp as a function of load.
Units: pu reactance
Range: 0.03 30
LKLIMD Source-load current difference limit.
Location: 118 Sets allowable difference between source and load side current. If the difference exceeds
Type: Float LKLIMD, then a current difference condition exists and an invlim bit is set. If this happens often
enough over a period of time, a fault will be declared; the rate is determined by STHRUTIM.
Units: pu amps
Range: None For a series 12-pulse drive, also sets the allowable difference between source A and source B
measurements of link current.
LKLIML Load side overcurrent limit.
Location: 166 If the load current exceeds LKLIML, then an overcurrent condition exists and an invlim bit is set. If
Type: Float this happens often enough over a period of time, a fault will be declared; the rate is determined by
LKOCTIM.
Units: pu amps
Range: None
LKLIMS Source side overcurrent limit.
Location: 167 If the source current exceeds LKLIMS, then an overcurrent condition exists and an invlim bit is set.
Type: Float If this happens often enough over a period of time, a fault will be declared; the rate is determined
by LKOCTIM.
Units: pu amps
Range: None
LKOCTIM Link overcurrent Firings.
Location: 1848 LKOCTIM is used with LKLIMS and LKLIML to determine if the drive recovers from an overcurrent
Type: Integer condition or faults.
Units: None A penalty counter is implemented such that every time an overcurrent condition is detected at a
Range: None new firing, the penalty counter is incremented by 6. Every time an overcurrent condition is not
detected at a new firing, the penalty counter is decremented by one.
If the penalty counter exceeds the number established by LKOCTIM, then a fault is declared.
Counter trip point = (LKOCTIM - 1) * 6
LMARG The commutation margin angle for the load side.
Location: 58 A fixed margin angle of 20 degrees is normally used.
Type: Float
Units: Degrees
Range: 0 30.0

Variable Definition
LP_ENAB DSPC local panel controls enabled.
Location: 1891 The local panel associated with the DSPC diagnostic port has several switches on it. One can be
Type: Unsigned used to turn the drive on, LP_START; a second can generate a soft reset, LP_RESET_PB. In
integer addition, this same diagnostic port has a reference pot, LP_SPEED_REF, on it that can be used
as the signal controlling SPDSTP.
Units: Boolean
Range: 0 1 The EE LP_ENAB enables or disables the drive responding to these signals. If LP_ENAB is false,
the drive will NOT respond to LP_START or LP_RESET_PB or LP_SPEED_REF.
It is recommended this Boolean be left in the false condition. It should only be used by very
knowledgeable people in a lab type environment.
LPLLGAIN Maximum gain of the load-side phase-locked loop.
Location: 061 The load-side phase-locked loop pu gain for the PLL regulator is derived from a fixed profile curve
Type: Float as a function of frequency. The curve is designed to give maximum response up to 30 rad/sec for
a gain of 15 for frequencies above 5 Hz. For frequencies below 5 Hz the response rolls off rapidly
Units: pu to approximately 10 rad/sec at 1.5 Hz. LPLLGAIN can be set to a value of less than 15.0 to limit
Range: 0 15.0 the max response of 30 rad/sec.
LPLLTC Minimum time constant of the load-side phase-locked loop).
Location: 062 The load-side phase-locked loop time constant for the PLL regulator is derived from a fixed profile
Type: Float curve as a function of frequency. The curve is designed to give maximum response up to 30
rad/sec for a time constant of .025 sec for frequencies above 5 Hz. For frequencies below 5 Hz
Units: Seconds the response rolls off rapidly to approximately 10 rad/sec at 1.5 Hz. LPLLTC can be set to a value
Range: 0.0 0.3 greater than .025 to limit the max response of 30 rad/sec.
LPLLTIM Load PLL error time limit.
Location: 19 LPLLTIM is used to determine if the drive recovers from a load PLL quality out-of-bounds or faults.
Type: Integer A penalty counter is implemented such that every time a quality out-of-bounds is detected, the
Units: Seconds penalty counter is decremented by 3. Every time a quality out-of-bounds is not detected, the
Range: None penalty counter is incremented by one.
If the negative of the penalty counter exceeds the trip point then a fault is declared.
Counter trip point = LPLLTIM * 18 * FRQMM
The time delay will be defined at top speed and is inversely proportional to speed otherwise.
MAXIFLDPU Maximum PU Value for External Field Exciter Feedback.
Location: 34 A 4 20 mA signal is used to receive the field current feedback when an external dc field exciter
Type: Float is used. This signal, xfld_ifbk, is via adc5 on the ADMA/DDTB board set. When 20 mA are
flowing in the receiver, xfld_ifbk should be at the pu value set into MAXIFLDPU. When 4 mA are
Units: None flowing, xfld_ifbk is 0.
Range: None
MAXTQPU Maximum pu value for torque reference between channels.
Location: 33 A pair of 4-20 mA signals go between the two channels in a dual channel application; these
Type: Float signals are associated with the current command. The channel that is master makes its current
command (speed regulator output) available to the other channel via a 4-20 mA pair driven from
Units: pu current dac1 on the ADMA/DDTB board set. The channel that is the follower senses this signal via adc4
Range: None on the ADMA/DDTB board set. Since either channel can be the master, the above must be
repeated in case the master and follower swap responsibilities.
The scaling of both the transmitter and receiver is based on this single EE, MAXTQPU. Both
channels MUST have this EE set for the same value.
The signal is bi-directional meaning the minimum value is the negative of the maximum value. 20
mA should exist in both the transmitter and receiver if the drive is commanding MAXTQPU. 4 mA
should exist in both the transmitter and receiver if the drive is commanding MAXTQPU.
The sending is cur_reg_cmnd as scaled by MAXTQPU via dac1 on the ADMA/DDTB board set.
The receiving is tqcmnd_foc via adc4 on the ADMA/DDTB board set.

Variable Definition
MKPHASE Number of electrical degrees at marker pulse.
Location: 184 Offset in electrical degrees of tach marker pulse. The offset is the angular displacement between
Type: Unsigned motor voltage phase a to neutral van(negative to positive transition) and the marker pulse when
integer the motor power angle is zero, i.e. the angle at which van leads the marker. Used in the compu-
tation of tach_edegrees for tach-based starting. If this value is less than 0 then it is assumed that
Units: degrees the marker offset is unknown and the global(tach_position_known) will never be set.
Range: -1 360
MON_GO_ENAB Monitor start/stop enable.
Location: 1890 MON_START is a Boolean that can be set through the monitor to start the drive. The main use of
Type: Unsigned this Boolean is during specific user tests (UTs) for those tests that actually start the drive.
integer MON_GO_ENAB is a Boolean that determines if MON_START is disabled or enabled. If
MON_GO_ENAB is false, then MON_START will NOT start the drive.
Units: Boolean
Range: 0 1 It is recommended MON_GO_ENAB be set true as a default for use with the UTs. It is NOT
recommended the drive be started by a user setting MON_START true through the monitor poke
integer command.
MOSTD Motor overspeed time delay.
Location: 109 Refer to MOSTOL for usage. Note the actual fault is timed in millisecond counts that are 1000
Type: Float times the value of MOSTD.
Units: Seconds mtros_tmr_lmt = 1000 * es.MOSTD
Range: 0 5.0 (not
restricted)
MOSTOL Motor overspeed tolerance.
Location: 116 The value of motor speed (based on FRQM) at which the motor overspeed fault is generated; the
Type: Float fault is generated if the motor speed is greater than MOSTOL for a given length of time defined by
MOSTD.
Units: pu (FRQM)
Range: 0 2.0 (not
restricted)
MOVTD Motor overvoltage time delay.
Location: 111 Refer to MOVTOL for usage. Note the actual fault is timed in millisecond counts that are 1000
Type: Float times the value of MOVTD.
Units: Seconds ldov_tmr_lmt = 1000 * es.movtd
Range: 0 5.0 (not
restricted)
MOVTOL Motor overvoltage tolerance.
Location: 115 The value of motor voltage (pu voltage) at which the load over voltage fault is generated; the fault
Type: Float is generated if motor voltage exceeds MOVTOL for a given length of time defined by MOVTD.
Units: pu volts
Range: 0 2.0 (not
restricted)
MRPM Motor maximum speed.
Location: 1853 Machine rpm (revolutions per minute) at FRQMM frequency. If this variable is changed, frqmm
Type: Integer must be changed also for the motor pole count to be calculated correctly. If not, the tach speed
and position calculations will not be correct.
Units: rpm
Range: 0 5000

Variable Definition
MTRFMIN Minimum allowable motor flux.
Location: 157 MTRFMIN is used to determine if the magnitude of motor flux is low enough to disable the load
Type: Float side PLL and to transition from flux start seg fire (lac_mode=fc_fseg_fire) to flux start fix fire
(lac_mode=fc_fseg_fire). MTRFMIN is being compared against mtr_flux_absum, which is the
Units: pu Motor Flux absolute value of the sum of the motor flux signals.
Range: None
NLCELLS Number series cells in load bridge leg.
Location: 1889 Number of cells in a series leg for the load bridge. A leg is a path from an ac point to a dc point.
Type: Unsigned This is used in the shorted cell logic to determine if an alarm or fault should be generated.
integer
Units: cells in series
Range: 1 6 (not
restricted)
NOTCHFD Notch filter damping.
Location: 26 Refer to NOTCHFF.
Type: Float
Units: None
Range: None
NOTCHFF Notch filter frequency.
Location: 25 The notch filter is a unity gain bandstop biquad filter that can be inserted between the speed
Type: Float regulator output and the current regulator Input. Its transfer function is:
Units: Hz s^2 + w^2
H(s)
Range: None s^2 + 2dw*s + w^2
Where: w = NOTCHFF * 2 * PI
d = NOTCHFD
If NOTCHFF = 0, the notch filter is bypassed.
w is limited within the range (0.1 - 30) * 2 * PI
NSCELLS Number series cells in source bridge leg.
Location: 1888 Number of cells in a series leg for the source bridge. A leg is a path from an ac point to a dc point.
Type: Unsigned This is used in the shorted cell logic to determine if an alarm or fault should be generated.
integer
Units: cells in series
Range: 1 6 (not
restricted)
PLC_ENAB PLC controls enabled.
Location: 1892 The LCI controls the motor as specified by information coming from a PLC. This variable controls
Type: Unsigned the enabling of inputs from the PLC. The majority of inputs are via the SNPA. If this variable is not
integer set; snpaio.SNPA_inputs sets the variables normally coming from the PLC to an "inactive" state.
This variable is also used to mask out the hardware signal plcok.
Units: None
Range: 0 1 Generally, the EE should be set true since it basically controls what the drive is doing. Some of
the Monitor User Tests are very basic; the system may not be at a point that will allow the PLC to
interact properly with the control (such as during factory test). For specific Monitor User Tests, the
EE must be set false.

Variable Definition
PLLTOL Load PLL error tolerance.
Location: 173 Sets the maximum allowable error(in degrees) in the load phase lock loop. If the error is ex-
Type: Float ceeded, then lxpll_err_cntr is decremented by 3 and a fault is declared if the PLL is in the closed-
loop state.
Units: Degrees
Range: 0 20.0
PU_AMP 1.0 pu channel amps.
Location: 2028 PLC uses this to calculate motor amps in engineering units for display on Datapanel homepage.
Type: Integer PU_AMP is defined as per channel rated current.
Units: amps
Range: 0 32767
(not restricted)
PU_MVOLT 1.0 pu motor in volts.
Location: 2027 PLC uses this to calculate motor voltage in engineering units for display on Datapanel home page.
Type: Integer PU_MVOLT is defined as the voltage at base speed.
Units: volts
Range: 0 32767
(not restricted)
PU_RPM Motor rpm at FRQMM frequency.
Location: 2026 PLC uses this to calculate motor RPM in engineering units for display on Datapanel home page.
Type: Integer FRQMM is defined as the maximum frequency.
Units: RPM
Range: 0 32767
(not restricted)
PU_SVOLT 1.0 pu source in volts.
Location: 2029 PLC uses this to calculate source voltage in engineering units for display on Datapanel home-
Type: Integer page. PU_SVOLT is defined as the nominal secondary voltage of the source transformer.
Units: Volts
Range: 0 32767
(not restricted)
REG_CONFIG Regulator configuration word, used to configure the regulators.
Location: 1886 Bit 0 fixed_vsec_marg (select fixed volt-sec margin on load)
Type: reg_config_type Value = 0: The load margin is a constant angle given by LMARG for frequencies less than
Units: None FRQMKM. When the frequency exceeds this threshold, the margin is held to the volt-
Range: None second value in effect at the threshold frequency.
Value = 1: Fixed volt second margin on load firing. This results in the load margin angle
increasing as the flux is decreased (that is, while operating above base frequency.)
Bit 1 sfaeapr_en (source fire-as-early-as-possible regulator enable)
The SFAEAPR tries to maintain source firing at full advance to maximize power factor by
adjusting the setpoint of the flux regulator. The SFAEAPR also reduces the flux setpoint
when the current regulator attempts to push source firing beyond maximum advance.
Value = 0: SFAEAPR is disabled
Value = 1: SFAEAPR is enabled

Variable Definition
st
REG_CONFIG Bit 2 adapt_cralph1 (adapt current regulator 1 fire angle)
(continued) st
Value = 0: 1 fire after forced commutation is at CRALPH1 unless commanded current is
greater than CR1FIM, in which case firing is at an angle of 0 degrees.
st
Value = 1: 1 fire after forced commutation is at CRALPH1 for commanded current equal
to CRMIN. For current levels between CRMIN and CR1FIM, the firing angle is interpolated
between CRALPH1 and 0 degrees.
Bit 3 spll_biphase (select biphase phase-locked loop (PLL) for source-side PLL)
Value = 0: Select zero-crossing PLL for source ac line synchronzation
Value = 1: Select biphase PLL for source ac line synchronization
Bit 4 no_xexc_ifb (no external exciter current feedback).
For external exciters, current feedback may be available via a 4-20 mA receiver on the
DDTB board. The signal is called xfld_ifbk and scaled according to MAXIFLD. Note that the
bit should be set to a 1 if there is an internal exciter.
Value = 0: Use the signal xfld_ifbk for exciter current feedback for protectives and possi-
bly regulators. No internal exciter should exist.
Value = 1: xfld_ifbk has no meaning and should not be used at all. If an internal exciter
exists, it will have its own current feedback for protectives and regulators.
Bit 5 const_exalph_start (constant exciter firing angle during start)
Value = 0: If the exciter is internal dc (drv_config.bit.dc_exciter = 1 and
drv_config.bit.no_internal_exc = 0) or external dc with current feedback
(drv_config.bit.dc_exciter = 1 and reg_config.bit.no_xexc_ifb = 0), then a field current regu-
lator brings up the field during a start, using FRSTART as a pu field current reference. Oth-
erwise, a flux regulator brings up the field, using FRSTART as a pu flux reference.
Value = 1: Apply a fixed excitation, using FRSTART as the cosine of the firing angle. (pu
exciter output for dc case.) See also FRSTART.
Bit 6 external_sync (select external input for motor sync-to-line).
Value = 0: Use SA FCGD voltage inputs for line phase and magnitude information.
Value = 1: Use PT inputs on DDTB for line phase and magnitude.
Bit 7 snubber_flux_droop (select light load flux setpoint droop)
Value = 0: No flux droop at light load.
Value = 1: Reduce flux setpoint at light load per ee.fdroopk.
Bit 8 Reset tach marker position known on motor group change
Value = 0: If a new motor EE group is sent to the drive, the drive will not reset its tach
marker position known Boolean, assuming that a new motor has not been selected and
thus the motors electrical position as determined from the last marker pulse is still valid
Value = 1: If a new motor EE group is sent to the drive, the drive will reset its tach marker
position known Boolean under the assumption that a new motor has been selected and
thus the motors electrical position is unknown until the next marker pulse is seen
Bit 9 inst_lvff_disable
Value = 0: Current regulator load voltage feed-forward has ripple cancellation component.
Value = 1: Current regulator load voltage feed_forward is dc only.
Bit10 fc_retlim_180
Value = 0: Load retard limit in force commutated firing is given by same firing margin cal-
culation as for load commutated firing.
Value = 1: Load retard limit in force commutated firing is 180. This allows more torque to
be produced at low speed.

Variable Definition
RR6PA0 Acceleration ramp for drive region 0 in 6-pulse.
Location: 232 Refer to RRBP0 for details.
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Location: 248 In the description for RRBP0, the description of how the acceleration/deceleration rates of the
Type: Float drive can be varied. The PLC can accomplish a similar result by commanding an emergency
speed reduction by setting FPLC_SRCFG.BIT.ESPDRQ. This family includes a 6-pulse accelera-
Units: pu/sec tion value, a 12-pulse acceleration value, a 12-pulse acceleration value, and a 12 pulse decelera-
(FRQM/sec) tion value. These acceleration/deceleration values are expressed in terms of pu (FRQM) per
Range: None second.
ESPDRQ acceleration/deceleration rates
RR6PA4, RR6PD4, RR12PA4, RR12PD4
RR6PD0 Deceleration ramp for drive region 0 in 6-pulse.

Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None

Variable Definition
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Location: 249 Refer to RR6PA4.
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None

Variable Definition
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None
Type: Float
Units: pu/sec
(FRQM/sec)
Range: None

Variable Definition
RRBP0 Drive region acc/dec setpoint 0.
Location: 125 Three variables are present to allow the selecting of regions of drive speed where different accel-
Type: Float eration/deceleration rates may be selected. These three variables are RRBP0, RRBP1, and
RRBP2; all three are based on FRQM.
Units: pu (FRQM)
Range: None Associated with these speed regions are four families of variables controlling the rate-of-change of
speed. Each family includes a 6-pulse acceleration value, a 12-pulse acceleration value, a 6-pulse
deceleration value, and a 12-pulse deceleration value. These acceleration/deceleration values are
expressed in terms of pu (FRQM) per second.
abs(speed) Acceleration/deceleration rates
< RRBP0 RR6PA0, RR6PD0, RR12PA0, RR12PD0
RRBP0 to RRBP1 RR6PA1, RR6PD1, RR12PA1, RR12PD1
RRBP1 to RRBP2 RR6PA2, RR6PD2, RR12PA2, RR12PD2
> RRBP2 RR6PA3, RR6PD3, RR12PA3, RR12PD3
Type: Float
Units: pu (FRQM)
Range: None
Type: Float
Units: pu (FRQM)
Range: None
RRCLBP1 Current limit breakpoint 1 static starter.
Location: 067 Speed/frequency breakpoint to switch from SRCL1 to SRCL2 in pu of FRQMM. See SRCL1 for
Type: Float illustration.
Units: pu (FRQMM)
Range:
Location: 068 Speed/frequency breakpoint to switch from SRCL2 to SRCL3 in pu of FRQMM. See SRCL1 for
Type: Float illustration.
Units: pu (FRQMM)
Range:
Location: 069 Speed/frequency breakpoint to begin ramp up of current limit from SRCL3 to SRCL4 in pu of
Type: Float FRQMM. See SRCL1 for illustration.
Units: pu (FRQMM)
Range:
Location: 070 Speed/frequency breakpoint where current limit is defined by SRCL4. See SRCL1 for illustration.
Type: Float
Units: pu (FRQMM)
Range:

Variable Definition
Location: 071 Speed/frequency breakpoint at which current limit begins ramp down from SRCL4 to 0. See
Type: Float SRCL1 for illustration.
Units: pu (FRQMM)
Range:
Location: 072 Speed/frequency breakpoint at which current limit reaches 0. See SRCL1 for illustration.
Type: Float
Units: pu (FRQMM)
Range:
RRCREEP Creep speed reference.
Location: 141 Variable controlling creep speed reference. This variable is based on FRQMM (not FRQM). This
Type: Float speed reference is selected when fplc_srcfg.bit.creep is set true by the PLC. The polarity of this
reference is controlled by fplc_srcfg.bit.reverse.
Units: pu (FRQMM)
Range: None
RRJOGF Jog forward reference.
Location: 142 Variable controlling jog forward speed reference. This variable is based on FRQMM (not FRQM).
Type: Float This speed reference is selected when fplc_srcfg.bit.jogf is set true by the PLC.
Units: pu (FRQMM)
Range: None
RRJOGR Jog reverse reference.
Location: 143 Variable controlling jog reverse speed reference. This variable is based on FRQMM (not FRQM).
Type: Float This speed reference is selected when fplc_srcfg.bit.jogr is set true by the PLC.
Units: pu (FRQMM)
Range: None
RRMAX6P Speed reference maximum clamp in 6-pulse.
Location: 140 This is the maximum clamp value for the speed reference when not running 12-pulse. It is set as a
Type: Float pu value of FRQMM.
Units: pu (FRQMM)
Range: None

Variable Definition
RRMAXL PLC local sreg reference maximum.
Location: 2 When the PLC is operating from its local panel, its authority on speed reference is limited by a
Type: Float maximum and minimum value set in the EEs. Both these values are expressed as pu values
based on FRQMM. This local panel should not be confused with the local panel associated with
Units: pu FRQMM the DSPC diagnostic connector.
Range: None
20000 counts on the PLC side is equal to RRMAXL; 0 counts on the PLC side is equal to
RRMINL. This reference is not activated in the DSPC until fplc_srcfg.bit.local is set.
Example:
FRQMM = 90 Hz; FRQM = 60 Hz
RRMAXL = 1.0; RRMINL = 0.066667
Max reference => 90 Hz; min reference => 6 Hz
RRMAXLP DSPC local panel SREG reference maximum.
Location: 123 When the DSPC is operating from its local panel, its authority on speed reference is limited by a
Type: Float maximum and minimum value set in the EEs. Both these values are expressed as pu values
based on FRQMM. This local panel should not be confused with the local panel associated with
Units: pu (FRQMM) the PLC.
Range: None
This reference is generated by a pot on the local panel that ranges from +10 V to -10 V +10 V on
the pot is equal to RRMAXLP; 0V on the pot is equal to RRMINL. This reference is not activated
until es.lp_enab is set true.
Example:
RRMAXLP = 1.0; RRMINL = 0.066667
RRMAXR Remote sreg reference maximum.
Location: 136 When the PLC is operating from one of its remote reference sources, its authority on speed
Type: Float reference is limited by a maximum and minimum value set in the EEs. Both these values are
expressed as pu values based on FRQMM.
Units: pu (FRQMM)
Range: None 20000 counts on the PLC side is equal to RRMAXR; 0 counts on the PLC side is equal to
RRMINR. This reference is not activated in the DSPC until fplc_srcfg.bit.remote is set.
Example:
RRMAXR = 1.0; RRMINR = 0.066667
RRMINL PLC local sreg reference minimum.
Location: 7 Refer to RRMAXL for details.
Type: Float
Units: pu FRQMM
Range: None
RRMINLP DSPC local panel sreg reference minimum.
Location: 124 Refer to RRMAXLP for details.
Type: Float
Units: pu (FRQMM)
Range: None

Variable Definition
RRMINR Remote sreg reference minimum.
Location: 137 Refer to RRMAXR for details.
Type: Float
Units: pu (FRQMM)
Range: None
RRMODE PLC user speed reference selector word.
Location: 2045 This EE defines the input mechanism for user speed reference in the PLC.
Type: Integer 0 => 0 to +10 V
Units: None 1 => 4 to 20 mA
Range: 0 3 (not 2 => -10 V to +10 V
restricted)
3 => from local panel
4 => Raise or lower
RRTG Turning gear reference.
Location: 144 Variable controlling the turning gear speed reference. This variable is based on FRQMM (not
Type: Float FRQM). This speed reference is selected when fplc_srcfg.bit.tgear is set true by the PLC.
Units: pu (FRQMM)
Range: None
SA_FACRNULL Reconstructed A-flux null).
Location: 1800 This variable controls the offset null for reconstructed A-C flux on the source A FCGD board. The
Type: Integer nominal setting is 127. Adjust with no bridge voltage present to obtain zero volts at the respective
reconstructed flux testpoint.
Units: None
Range: 0 255
SA_FBARNULL Reconstructed B-flux null).
Type: Integer
Units: None
Range: 0 255
SA_FCBRNULL Reconstructed C-flux null).
Type: Integer
Units: None
Range: 0 255
SA_FLUXCAP Capacitor for flux integrators..
Location: 1803 This variable selects the capacitance used by the integrators that provide flux feedback on the
Type: Integer FCGD board. There are 12 different capacitance selections available. It is desired to scale flux to
4.75 Vrms via a combination of capacitor selection and MDAC scaling (see SA_SCALE_VAC,
Units: None SA_SCALE_VBA and SA_SCALE_VAC.)
Range: 0x00 0x0F
SA_FLUXCAP: 0 1 2 3 4 5 6 7
capacitance (uF): 0.927 0.880 0.597 0.550 0.597 0.550 0.267 0.220
base freq (Hz): 14.20 15.00 22.11 24.00 22.11 24.00 49.40 60.0
SA_FLUXCAP: 8 9 A B C D E F
capacitance (uF): 0.817 0.770 0.487 0.440 0.487 0.440 0.157 0.110
base freq ( Hz): 6.16 17.14 27.10 30.00 27.10 30.00 84.00 120.0

Variable Definition
SA_SCALE_I Scale phase current.
Location: 1809 This variable sets the scaling of the phase current MDACs on the FCGD board. The burden
Type: Integer resistor is chosen to provide 3.0 V dc for the hardware path; this path has an additional gain in it.
The MDACs are used to scale the software path for 3.0 V dc.
Units: None
Range: 0 255 Imotor * 1.2825 * Rburden * 4.02 255
IAS@TP19 = * = 3.0 V dc
CT Ratio D
438.23 * Imotor * Rburden

D=
CT Ratio
Where
D = SA_SCALE_I or SB_SCALE_I
Im = rated motor RMS amps
Rburden = burden resistor in ohms Imotor * 1.2825 * Rburden * 4.02 255
SA_SCALE_IR IR compensation for line-to-line fluxes.
Units: None Set D = 453.5 * 10E6 * F * C * Rpu = SA_SCALE_IR
Range: 0 255 Where
F = frqs = rated line frequency
C = flux integrator capacitance selected by SA_FLUXCAP
R = pu resistance
SA_SCALE_IX IX compensation for line-to-line fluxes.
Units: None Set D = 628.6Xpu SA_SCALE_IX
Range: 0 255

Variable Definition
SA_SCALE_VAC Scale line A to line C voltage.
Location: 1814 The MDAC voltage calculations for ac voltages define the rms voltages for the flux integrators.
Type: Integer The flux integrators should be 4.75vrms at rated voltage and frequency. Note the integrator
capacitors (refer to SA_FLUXCAP) have a 5% tolerance that may require some adjusting the
Units: None MDAC for individual flux circuits. The suggested method is to calculate the MDAC theoretically
Range: 0 255 and adjust the MDACs to give the same rms voltage on each of the three flux waveforms on a
FCGD. If possible this should be done at very light currents to minimize the effect of IX and IR
reconstruction on the flux waveforms.
V11 * 1.3355 D
FBAR@TP7 = * * CintGain = 4.75 vrms
ATTN 255
906.965 * ATTN
D=
V11 * CintGain
Where
D = XX_SCALE_VAC, XX_SCALE_VBA, and XX_SCALE_VCB
Vll = rated line-line rms voltage
ATTN = attenuator ratio
CintGain = gain of hardware integrator at rated
(Rfb/Rin)
CintGain =
sqr[1 + (2 * PI * F * Rfb * Cint)^2]
Where
Rfb = 1M
Rin = 8.66k
F = frqs = rated line frequency (source)
F = FRQM = rated base frequency (load)
Cint = integrator capacitance
ATTN = 1998.33 @ 6900 V ac

ATTN = 1332.55 @ 4200 V ac
ATTN = 999.66 @ 3300 V ac
ATTN = 666.78 @ 2200 V ac
ATTN = 333.89 @ 1200 V ac
SA_SCALE_VBA Scale line B to line A voltage.
Location: 1815 Refer to SA_SCALE_ V ac for details.
Type: Integer
Units: None
Range: 0 255
SA_SCALE_VCB Scale line C to line B voltage.
Type: Integer
Units: None
Range: 0 255

Variable Definition
SA_SCALE_VDC Scale V dc - dc link voltage.
Location: 1817 The MDAC voltage calculations for the dc voltage define the dc voltage that should be 3.5 V dc at
Type: Integer EDO where EDO is 1.35Vll when the bridge is firing at an alpha of 0 degrees. Note this path is
used only for producing a per-unitized voltage testpoint and for use by the sigma-deltas.
Units: None
Range: 0 255 FCGD TP16 =>V dc (inverted)
The equation for the voltage at the above TP is the following:
V11rms * 1.35 D
0VD@TP16 = * = 3.5 V dc
ATTN 255
661.111 * ATTN
D=
V11
Where
D = SA_SCALE_VDC, SB_SCALE_VDC, LA_SCALE_VDC
Vll = rated line-line rms voltage
ATTN = attenuator ratio
ATTN = 1998.33 @ 6900 V ac
1332.55 @ 4200 V ac
999.66 @ 3300 V ac
666.78 @ 2200 V ac
333.89 @ 1200 V ac
SB_FACRNULL Reconstructed A-C flux null.
Type: Integer
Units: None
Range: 0 255
SB_FBARNULL Reconstructed B-A flux null.
Type: Integer
Units: None
Range: 0 255
SB_FCBRNULL Reconstructed C-B flux null.
Type: Integer
Units: None
Range: 0 255
SB_FLUXCAP Capacitor for flux integrators.
Location: 1822 Refer to SA_FLUXCAP for details.
Type: Integer
Units: None
Range: 0x00 0x0F

Variable Definition
SB_SCALE_I Scale phase current.
Location: 1828 Refer to SA_SCALE_I for details.
Type: Integer
Units: None
Range: 0 255
SB_SCALE_IR IR compensation for line-to-line fluxes.
Units: None Set D = 453.5 * 10E6 * F * C * Rpu
Range: 0 255 Where
F = frqs = rated line frequency
C = flux integrator capacitance selected by SB_FLUXCAP
R = pu resistance
D = SB_SCALE.IR
SB_SCALE_IX IX compensation for line-to-line flux.
Units: None Set D = 628.6 * Xpu = SB_SCALE.IX
Range: 0 255
SB_SCALE_VAC Scale line A to line C voltage.
Type: Integer
Units: None
Range: 0 255
SB_SCALE_VBA Scale line B to line A voltage.
Type: Integer
Units: None
Range: 0 255
SB_SCALE_VCB Scale line C to line B voltage.
Type: Integer
Units: None
Range: 0 255
SB_SCALE_VDC Scale V dc - dc link voltage.
Location: 1836 Refer to SA_SCALE_VDC for details.
Type: Integer
Units: None
Range: 0 255

Variable Definition
SIMARG Source impedance alpha margin for retard limit.
Location: 191 Variable controlling the source-side retard limit as a function of current. Compensates the firing as
Type: Float a function of link current for source commutating impedance. Set equal to pu source commutating
reactance on drive base.
Units: pu impedance
Range: None Source converter retard limit in degrees =
acos[cos(180 SMARG) + (pu I_link * SIMARG)]
SIMFR Simulator friction.
Location: 52 This variable sets friction as a function of speed of the mechanical simulator.
Type: Float
Units: pu torque / pu
speed
Range: None
SIMJ Simulator inertia.
Location: 51 This variable sets the system inertia of the mechanical simulator.
Type: Float
Units: Seconds
Range: None
SMARG Fixed margin from 180 degrees for retard limit.
Location: 190 Variable controlling the fixed source side margin when inverting. The normal fixed margin is 20
Type: Float degrees.
Units: Degrees Source converter retard limit in degrees equals
Range: 0 180 acos[cos(180 SMARG) + (pu I_link * SIMARG)]
SNPA_P1_ Protocol selection for Port 1 on SNPA daughterboard.
PROTOCOL
0 = disabled
Location: 1844 1 = SNP (Series 90 protocol) enable.
Type: Unsigned
integer
Units: None
Range: 0 1
SNPA_P2_ Protocol selection for Port 2 on SNPA daughterboard.
PROTOCOL
0 = disabled
Location: 1845 1 = SNP (Series 90) enable
Type: Unsigned
integer
Units: None
Range: 0 1
SNPA_SLOT Slot position of SNPA daughterboard on the DSPC board. Slot 1 is at the bottom of the board.
Location: 1843
Type: Unsigned
integer
Units: None
Range: 1 4

Variable Definition
SOVTD Source overvoltage time delay.
Location: 113 Refer to SOVTOL for usage. Note the actual fault is timed in millisec counts that are 1000 times
Type: Float the value of SOVTD.
Units: Seconds srcov_tmr_lmt = 1000 * es.sovtd
Range: 0 5.0 (not
restricted)
SOVTOL Source overvoltage tolerance.
Location: 119 The value of source voltage (pu voltage) at which the source overvoltage fault is generated; the
Type: Float fault is generated if source voltage exceeds SOVTOL for a given length of time defined by
SOVTD.
Units: pu volts
Range: 0 2.0 (not
restricted)
SPLLGAIN Source PLL regulator gain.
Location: 146 The source-side phase-locked loop (PLL) pu gain for the PLL regulator. For the zero-crossing
Type: Float based PLL (reg_config bit 3 = 0),, use the default settings for a 30 rad/sec response, SPLLGAIN =
15,SPLLTC = .025. If a different response is desired (such as to desensitize the PLL for a dis-
Units: pu torted ac source), adjust SPLLGAIN proportional to the desired response (to cut the response in
Range: 0 250.0 half, half SPLLGAIN and leave SPLLTC the same).
For the biphase form of the PLL (reg_config bit 3 = 1), use the default settings SPLLGAIN = 47.7,
SPLLTC = .1. If a different response is desired, adjust SPLLGAIN and SPLLTC using the desired
crossover w rad/sec in the folowing equations.
SPLLGAIN = w**2/18.85
SPLLTC = 3/w
SPLLTC Source PLL regulator lead time constant.
Location: 147 The source-side phase-locked loop time constant for the PLL regulator. For the zero-crossing
Type: Float based PLL (reg_config bit 3 = 0),, use the default settings for a 30 rad/sec response, SPLLGAIN =
15,SPLLTC = .025. If a different response is desired (such as to desensitize the PLL for a dis-
Units: Seconds torted ac source), adjust SPLLGAIN proportional to the desired response (to cut the response in
Range: 0.0 1.0 half, half SPLLGAIN and leave SPLLTC the same).
For the biphase form of the PLL (reg_config bit 3 = 1), use the default settings SPLLGAIN = 47.7,
SPLLTC = .1. If a different response is desired, adjust SPLLGAIN and SPLLTC using the desired
crossover w rad/sec in the folowing equations.
SPLLGAIN = w**2/18.85
SPLLTC = 3/w
SPLLTIM Source PLL error time limit.
Location: 18 SPLLTIM is used to determine if the drive recovers from a source PLL quality out-of-bounds or
Type: Integer faults.
Units: Seconds A penalty counter is implemented such that every time a quality out-of-bounds is detected, the
Range: None penalty counter is decremented by 3. Every time a quality out-of-bounds is not detected, the
penalty counter is incremented by one.
If the negative of the penalty counter exceeds SPLLTIM then a fault is declared.
Counter trip point = SPLLTIM * 18 * FRQS

Variable Definition
SQOPT1 Sequencing selection word1.
Location: 2043 This EE is used to configure the PLC. In some instances, the DSPC and PLC will share a bit. In
Type: sqopt1_type the case of the DSPC using a bit, it will be stated in the Bit definition. This does not preclude the
PLC from using the bit.
Units: None
Range: None Bit 0 xfmr_ok_msk. Mask transformer status input.
Bit 1 dclink_ok_mask. Mask dc link status input.
Bit 2 pcrot_a_msk. Mask pcr overtemperature alarm input.
Bit 3 pcrot_f_msk. Mask pcr overtemperature fault input.
Bit 4 runpm_msk. Mask run permissive input.
Bit 5 strtpm_msk. Mask start permissive input.
Bit 6 torque_msk. Mask torque input.
Bit 7 nstop_msk. Controls whether the customer can control the starting and stopping of the
drive with a single contact or whether a separate stop contact is required. When this bit is set, only
a single contact is required for the start/stop control.
Bit 8 strt_flt_enab. Selects start fault (excessive force commutation time) logic.
Bit 9 rstrt_flt_enab. Selects high speed restart fault logic. Used by the in the restart fault
logic.
Bit 10 filfuse_flt_enab. Selects blown filter fuse fault.
Bit 11 srciso_msk. Mask source isolator status in ready logic.
Bit 12 stat_start_enab. Selects static starter sequencing logic.
Bit 13 lodiso_sub. Substitute runx for load isolator.
Bit 14 pcl_mstr_sel. Selects PLC for control of master channel. Used by the DSPC for select-
ing which channel is the master.
Bit 15 fldcn_msk. If set, will always indicate that fldcn is true. Used by the DSPC. The DSPC
side forces mode_flag.bit.fldcn true if this bit is set.
SQOPT2 PLC sequencing selection word 2.
Location: 2042 This EE is a general purpose EE for use in the PLC only. It is intended to vary from requisition to
Type: Integer requisition; it will be defined on the requisition elementary.
Units: bit-packed
Range: None
SQSP1 Per unit speed for "motor above minimum speed" (MAMS).
Location: 28 The variable, MAMS, is set if the motor speed is above SQSP1. MAMS is used in the PLC logic; it
Type: Float is made available to the PLC through one of the bits in TPLC_SEQ1.
Units: pu speed To prevent chattering, a 1% hysteresis is included in the function; this 1% is only active when
(FRQM) resetting MAMS.
Range: None
SQTMR1 PLC timer preset.
Location: 2030 This is a timer preset value for a 0.1 second accuracy timer. (This is a spare and not used.)
Type: Integer
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds

Variable Definition
Type: Integer
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds
Location: 2031 This is a timer preset value for a 0.1 second accuracy timer. The timer controls the pump panel
Type: Integer coolant temperature fault.
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds
Type: Integer
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds
Location: 2033 This is a timer preset value for a 0.1 second accuracy timer. (This is a spare timer, not used.)
Type: Integer
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds
Type: Integer
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds
Location: 2035 This is a timer preset value for a 0.1 second accuracy timer. The timer controls the pump panel
Type: Integer coolant pressure fault.
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds
Type: Integer
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds

Variable Definition
Location: 2037 This is a timer preset value for a 0.1 second accuracy timer. The timer controls the start fault.
Type: Integer
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds
Type: Integer
Units: None
Range: 0 to 32767
corresponds to 0 to
3276.7 seconds
SRCL1 Speed regulator current limit 1 static starter.
Location: 063 If drv_config.ss_enab (static starter enable) is set, the speed regulator output clamp is obtained
Type: Float from the speed/current limit profile illustrated below:
Units: pu current
CURRENT
Range: LIMIT
^
| SRCL4
| --------
| /: :\
| / : : \
| / : : \
| SRCL3 / : : \
| +-------/ : : \
| SRCL2 | : : : \
| +-------+ : : : \
|SRCL1 | : : : : \
|-------+ : : : : \
| : : : : : \
+-------:-------:-------:----:------:----------:------>SPD
RRCLBP1 RRCLBP2 : RRCLBP4 : RRCLBP6
RRCLBP3 RRCLBP5
There is a 1% hysteresis switching between SRCL1, SRCL2, & SRCL3

Location: 064 See SRCL1.
Type: Float
Units: pu current
Range:
Type: Float
Units: pu current
Range:
Type: Float
Units: pu current
Range:

Variable Definition
SRCLFC Speed regulator current limit in forced commutation modes.
Location: 198 Speed regulator current command limit when drive operation is one of the forced commutation
Type: Float regions. A typical value is 0.2 pu. For dual-channel load, the pu base for this value is the channel
rating not the motor rating (that is, the value of current used to calibrate the current feedback for a
Units: pu channel).
Range: None
SRCLMF Speed regulator current limit for maximum frequency.
Location: 006 This is a taper function added to the SRCLSC clamp for metals applications. It (along with
Type: Float SRCLSC) controls the speed regulator clamp when in self-commutation mode. Refer to SRCLSC
for additional details.
Units: pu
Range: None If the value is 0, then there will be no taper function and SRCLSC will be the limit. This case is for
backward compatibility for those drives that did not have this EE.
CURRENT
LIMIT
^
| SRCLSC
| .----------------------------
| | :\
| | : \
| | : \
| | : \
| | : \
| | : \
| | : \ SRCLMF
|SRCLFC | : ----------
|-------+ : :
| : : :
+-------:---------------------------:-------:--------->SPD
self FRQM FRQMM
commutation
The equation for the taper is the following:
cl = (pu spd - FRQM/FRQM) * SLOPE + SRCLSC
(SRCLMF - SRCLSC)
slope =
(FRQMM/FRQM - FRQM/FRQM)
(SRCLMF - SRCLSC)
slope =
(topspd_ratio - 1.0)
cl = (pu spd - 1.0) * SLOPE + SRCLSC

SRCLSC Speed regulator current limit in load commutation modes.
Location: 199 Speed regulator current limit when drive operation is in load commutation up to FRQM. A typical
Type: Float value is 1.0pu. For dual-channel load the pu base for this value is the channel rating not the
motor rating (the value of current used to calibrate the current feedback for a channel).
Units: pu
Range: None
SRCUVTD Source undervoltage delay.
Location: 48 This variable is the time delay associated with the source undervoltage fault. If the source under-
Type: Float voltage alarm is true for a specified time (SRCUVTD), then the source undervoltage fault is
generated. The software uses a variable, srcuv_tmr_lmt, which is scaled in milliseconds. The
Units: Seconds conversion is the following:
Range: None
srcuv_tmr_lmt = 1000 * es.srcuvtd

Variable Definition
SRDROOP Speed regulator droop.
Location: 194 The speed regulator setpoint (1.0 pu = FRQM) is reduced by SRDROOP * pu_torque_command.
Type: Float Set SRDROOP to zero if this function is not required.
Units: pu speed/ pu
torque
Range: 0 3.
SRERRF Speed regulator error filter time constant.
Location: 206 The lag time constant of the double break speed regulator error filter (used in tachless mode). If
Type: Float the time constant is zero the filter is bypassed.
Units: secs
Range: 0 3.
SRETD Speed regulator error time delay.
Location: 30 This variable is a part of the "loss of speed control" alarm; it is the time portion. Refer to SRETOL
Type: Float for some details.
Units: Seconds This variable is translated into milliseconds for actual usage by the following relationship:
Range: None sre_tmr_lmt = 1000 es.sretd
SRETOL Speed Regulator Error Tolerance.
Location: 27 The SPDSTR signal is used as the input to the P+I regulator for the reference signal. Speed
Type: Float Feedback, SR_FBK, should follow this reference within the constraints of the speed regulator
gain.
Units: pu FRQM
Range: None If the difference between SR_FBK and SPDSTR, ABS(SR_FBK SPDSTR), exceeds this limit for
a given length of time, SRETD, then a loss of speed control alarm is annunciated.
SRGAIN Speed regulator gain.
Location: 204 The normal speed regulator gain is selected if fplc_srcfg.altsreg is false. The following equation
Type: Float defines the required gain:
Units: (2.264e-8) * (N**2) * (WK)**2 FRQMM
Range:0 100 SRGAIN = *
HP * (Tr)**2 FRQM
N = rated motor rpm
Tr = regulator response time
WK2 = total drive WK2 at motor shaft
HP = drive HP/channel
FRQMM = motor maximum frequency
FRQM = motor base frequency
SRGAIN_ALT Alternate speed regulator gain.
Location: 202 The alternate speed regulator gain selected by fplc_srcfg.altsreg. The following equation defines
Type: Float the required gain:
Units: (2.264e-8) * (N**2) * (WK)**2 FRQMM
Range:0 100 SRGAIN = *
HP * (Tr)**2 FRQM
N = rated motor rpm
Tr = regulator response time
WK2 = total drive WK2 at motor shaft
HP = drive HP/channel
FRQMM = motor maximum frequency
FRQM = motor base frequency

Variable Definition
SRINHFNG Firings spd reg is inhibited in lac_mode = C_FSEG_FIRE.
Location: 1841 For flux starts,the number of firings the speed regulator is inhibited when entering lac_mode =
Type: Unsigned FC_FSEG_FIRE. During this time the speed regulator P+I is not running; the current reference is
integer es.fcf_sfire_icmd. This variable is not active when transitioning from lac_mode = FC_PLL_FIRE to
FC_FSEG_FIRE.
Units: firings
Range: None For tach starts, the minimum number of firings for transition from FC_TSEG_FIRE (lac_mode=5)
to FC_TACH_FIRE(lac_mode=6).
SRINIT Speed regulator output initial value in lac_mode = FC_TACH_FIRE.
Location: 195 Value of current used in the speed regulator first pass logic to initialize the output of the speed
Type: Float regulator cur_reg_cmnd_tmp) when the drive has transitioned to lac_mode = fc_tach_fire (forced
commutation tach seg fire). For dual-channel or single channel, load the pu base for this value is
Units: pu motor amps the motor current rating.
Range: 0.0 3.0
SRMAXR Speed reference maximum clamp.
Location: 138 The speed reference has clamps associated with it to restrict its range. There are maximum and
Type: Float minimum clamps; these clamps are based on FRQMM (not FRQM). The minimum clamp is
SRMINR. There are two maximum clamps to account for 6-pulse versus 12-pulse operation. The
Units: pu (FRQMM) 12-pulse clamp is SRMAXR and the 6-pulse clamp is RRMAX6P.
Range: None
SRMINR Speed reference minimum clamp.
Location: 139 This is the minimum clamp value for the speed reference in pu FRQMM.
Type: Float
Units: pu (FRQMM)
Range: None
SRNFTC Speed feedback noise filter time constant.
Location: 175 Sets the time constant of the double-pole noise filter on the tach speed feedback. Used to remove
Type: Float noise from speed calculation. A value of 0 will bypass the filter.
Units: secs
Range: 0 10
SRTC Speed regulator lead time constant.
Location: 205 The normal speed regulator lead time constant selected if fplc_srcfg.altsreg is false.
Type: Float
Units: secs
Range: .05 3.0
SRTC_ALT Alternate speed regulator lead time constant.
Location: 203 The alternate speed regulator lead-time constant selected by fplc_srcfg.altsreg.
Type: Float
Units: secs
Range: .05 3.0
STFREQ lac mode fixed fire starting frequency.
Location: 197 The firing frequency to fire a cycle of firings (6) in load angle mode fixed fire (lac_mode=1).
Type: Float
Units: Hz
Range: .166 10

Variable Definition
STHRUTIM Shoot-thru firings.
Location: 1849 STHRUTIM is used with LKLIMD to determine if the drive recovers from a "shoot-thru" or faults.
Type: Integer A penalty counter is implemented such that every time a shoot-thru condition is detected at a new
Units: None firing, the penalty counter is incremented by 6. Every time a shoot-thru condition is not detected at
Range: None a new firing, the penalty counter is decremented by one.
If the penalty counter exceeds the number established by sthru_firings, then a fault is declared.
Counter trip point = (STHRUTIM - 1) * 6
STRT_PKFLX_TIME Peak flux at start waiting time.
Location: 185 The time delay from applying excitation to waiting for a peak flux condition to obtain motor seg-
Type: Float ment information from the flux waveforms. It should be set to just before the peak flux is reached
at Tpk.
Units: Seconds
In(Tf/Ti)
Range: None Tpk = if Tf <> = Ti; Tpk = Ti, if Tf = Ti
(1/Ti 1/Tf)
Where
Ti = the FCGD board flux integrator time constant = RC (R = 1.0 M, C selected by es.la_fluxcap)
Tf = the time constant of the field current regulator response.
Tpk can be obtained empirically by monitoring one of the load FCGD reconstructed flux testpoints
with an oscilloscope as the field is energized during a start.
SUVTOL Source undervoltage tolerance.
Location: 149 The value of source voltage (pu voltage) at which the source undervoltage fault is generated.
Type: Float Several portions of the logic require a value to define that the source voltage magnitude is accept-
Units: pu volts able, SUVTOL. One specific place is related to the source undervoltage function.
Range:
SYBCA Synchronization regulator function, bypass closing alarm timer.
Location: 262 If the bypass isolator doesnt close within a certain time after receiving the close command, an
Type: Float alarm occurs. This variable sets that time. The default should be 100 milliseconds.
Units: Seconds SYBCA_TMR_LMT = 1000 * SYBCA
Range: None
SYBCP Synchronization regulator function, predicted time for the bypass isolator to close.
Location: 261 For an open bypass transfer, the run command is removed (LCI stops making current) when the
Type: Float bypass isolator closes. For a closed transfer, an overlap time exists between the run command
and bypass closing (LCI still making current at the time of closing). The SYBCP variable sets the
Units: Seconds time for the run command to be removed, to allow open or closed transfer, as desired. The default
Range: None should be 100 milliseconds.
SYBCP_TMR_LMT = 1000 * SYBCP
SYGAIN Synchronization regulator gain.
Location: 254 The motor synchronization function matches the motor frequency, voltage, and phase to the line
Type: Float before closing a bypass contactor.
Units: Set SYGAIN equal to the desired phase regulator crossover in radians/sec. See also SYTC.
pu_spd_ref/pu_phase
_error
Range: None

Variable Definition
SYMCNT Synchronization regulator in-sync time.
Location: 260 This EE specifies the time the voltage and phase must be within tolerance before closing the
Type: Float bypass contactor.
Units: Seconds
Range: None
SYMTOTD Synchronization match timeout time delay.
Location: 013 This variable is associated with the synchronization function.
Type: Float The default should be 30 seconds.
Units: Seconds
SYMTO_TMR_LMT = 1000 * SYMTOTD
Range: 0 - 60 (not
restricted)
SYNCTRL Synchronization test control.
Location: 1882 The setting of this variable allows different test modes of the synchronization motor-to-line function
Type: uint (enumer- during commissioning.
ated) 0 = Disables synchronization function.
Units: None
1 = The synch function acts a normal, but proceeds only to the point that the motor speed is
Range: 0 - 5 matched to the bypass isolator input frequency.
2 = Same as SYNCTRL = 1, but proceeds to the point that the motor voltage magnitude is
matched to the bypass isolator input voltage magnitude.
3 = Same as SYNCTRL = 2, except proceeds to the point that the motor voltage magnitude is
matched to the bypass isolator input voltage phasing.
4 = Enables complete synchronization function, including closing of the bypass isolator.
5 = Special test mode that forces the bypass isolator to close. It is used to get the time between when the
bypass isolator receives the close command, and when it is closed. This test should be done only with the
bypass isolator racked out. This mode will not function unless the drive is not running and the motor and
source isolators are open.
SYOKTD Synchronization OK time delay.

Location: 008 Before commanding the bypass isolator to close, the voltage and phase of the LCI control must
Type: Float match that of the input to the bypass isolator for a minimum amount of time. This variable controls
that time.
Units: Seconds
Range: 0 - 1.0 (not The default should be 0.1 seconds.
restricted) SYNCOK_TMR_LMT = 1000 * SYOKTD
SYPADJ Synchronization regulator phase adjust.
Location: 256 This EE specifies the phase angle by which the source leads the motor voltage when the bypass
Type: Float contactor is to be closed. This adjustment compensates for transformer phase shifts (for example,
delta-wye), as well as contactor close times.
Units: Electrical degs.
Range: None
SYPTOL Synchronization regulator phase tolerance.
Location: 257 This EE specifies the phase angle difference in degrees to permit closing of the bypass contactor
Type: Float during motor sync to line.
Units: Electrical degs.
Range: None

Variable Definition
SYSPDTC Synchronization regulator speed time constant.
Units: Seconds To aid synchronization in those cases where there are cyclic torque disturbances of a frequency
Range: None greater than the speed regulator crossover, a term equal to SYSPDTCD/dt(sr_fdbk) s subtracted
from the output of the synchronization phase regulator. It should normally be set to zero.
SYTC Synchronization regulator time constant.
Units: Seconds This EE sets the lead of the phase regulator. It should be set equal to the speed regulator time
Range: None constant.
SYVADJ Synchronization regulator voltage adjust.

Location: 258 This EE is used by the voltage match function of motor line synchronization. It specifies the ratio of
Type: Float source to motor volts during synchronization.
Units: None
Range: None
SYVTOL Synchronization regulator voltage tolerance.
Location: 259 This EE specifies the pu voltage difference to permit closing of the bypass contactor during motor
Type: Float synchronization to line.
Units: pu motor
voltage
Range: None
TACHATD Tach alarm time delay.
Location: 031 A mismatch between sfb_tach and sfb_zcross greater than 2 pu is declared a tach fdbk not ok
Type: Float alarm after the time specified by TACHATD. This variable is translated into milliseconds for actual
usage by the following relationship:
Units: Seconds
Range: None tach_tmr_lmt = 1000 * TACHATD
TACHPPR Motor mounted tach pulses per revolution.

Location: 1852 Number of tach pulses generated by one mechanical revolution of the motor.
Type: Unsigned
integer
Units: Pulses/rev
Range: 1 32768
TACHPPR Motor mounted tach pulses per revolution.
Location: 1852 Number of tach pulses generated by one mechanical revolution of the motor.
Type: Unsigned
integer
Units: Pulses/rev
Range: 1 32768
TESTSIM Simulator test enable.
Location: 1884 This Boolean is to enable the simulator functionality. When set, much of the functionality in the
Type: uint control will be bypassed. Other portions will be simulated. This Boolean should be set before
invoking simulator mode or simulator mode will not become active.
Units: Boolean
Range: 0-1

Variable Definition
TGFREQ Static starter turning gear frequency.
Location: 12 The static frequency at turning gear speed for static starter applications with a turning gear.
Type: Float
Units: Hz
Range: 0 120.0
VEXAC_RATIO FCGE board ac voltage VCO (voltage-controlled oscillator) ratio.
Location: 39 This ratio is used to scale the VCO feedback associated with the line-to-line voltages. The VCOs
Type: Float associated with these voltages are based on the following hardware scaling:
Units: None +10.0 V => 2 MHz
Range: None 0.0 V => 1 MHz
-10.0 V => 0 MHz
Two values must be defined to determine the ratio. The first value is the nominal value that is the
peak value of the line-line voltage when the ac voltage is at nominal. The second value required to
scale the voltage VCOs is the voltage that will cause the VCOs to saturate (10 V times the attenu-
ator ratio).
Nominal = sqr(2) * Vll
where Vll = nominal line-line voltage (rms)
Maximum = 10 * ATTN
where ATTN = attenuation ratio (= 137 for NHVL/FCGE boards)
vexac_ratio = Maximum / Nominal
VFFD_RATIO Voltage feed forward load to source ac voltage ratio.
Location: 46 This variable is used to scale the load voltage feed forward in the current regulator. It is the ratio of
Type: Float the nominal ac load voltage to the nominal ac source voltage. This allows for differences between
the source and load nominal voltages.
Units: None
Range: None For 6-pulse source:
nominal load ac volts
VFFD_RATIO =
nominal source ac volts
For series 12-pulse sources:

nominal load ac volts
VFFD_RATIO =
nominal source A ac volts + nominal source B ac volts
VLCLIM Current lower limit, voltage limit maximum.

Location: 224 Variable controlling the maximum current limit called for by the voltage limit regulator. The
Type: Float nominal setting is 1.5 pu current.
Units: pu link amps
Range: None
VLDAC_RATIO FCGD ac voltage VCO ratio.
Location: 43 Refer to VSRCAC_RATIO for details.
Type: Float
Units: None
Range: None

Variable Definition
VLDDC_RATIO FCGD dc voltage VCO ratio.
Location: 44 Refer to VSRCDC_RATIO for details.
Type: Float
Units: volts
Range: None
VLGAIN Voltage limit regulator gain.
Location: 222 This is the gain for the voltage limit regulator. Normally set for a crossover Wc of 10 radians.
Type: Float The following equation holds if (Wc * VLTC >> 1) and (Wc << current regulator response)
Units: pu link amps VLGAIN = Wc * VLTC
per pu flux error
Nominal setting: VLGAIN = 20.0
Range: None
See also VLTC.
VLSPIL Voltage limit regulator spillover setpoint.
Location: 221 This is the spillover setpoint for the voltage limit regulator. The normal setting is 1.10 to 1.15 pu
Type: Float volts.
Units: pu motor volts
Range: Non
VLTC Voltage limit regulator time constant.
Location: 223 Variable controlling an adjustable lag in the forward loop of the voltage limit regulator. The filter is
Type: Float in the forward path of the voltage regulator and, therefore, affects stability.
Units: Seconds Nominal setting: VLTC = 2.0 seconds
Range: None See also VLGAIN.
VRGAIN Voltage regulator gain.

Location: 264 This EE is the gain of the motor terminal volts regulator that adjusts the flux regulator setpoint
Type: Float during motor synchronization to line. See also VRTC.
Units:
Range:
VRTC Voltage regulator lead.
Location: 265 This EE sets the lead of the terminal volts regulator. It should be set equal to the response time of
Type: Float the flux regulator. See also VRGAIN.
Units:
Range:

Variable Definition
VSRCAC_RATIO FCGD ac voltage VCO ratio.
Location: 41 This ratio is used to scale the VCO feedback associated with the line to neutral voltages. The
Type: Float software uses VCOs on the FCGD for phase voltage feedback. The VCOs sense the unscaled
phase voltages at TP22, TP23, and TP24 on the FCGD. The VCOs associated with phase volt-
Units: None ages are based on the following hardware scaling:
Range: None
+10.0 V => 2 MHz
0 V => 1 MHz
-10.0 V => 0 MHz
Two values must be defined to determine the ratio. The first value is the nominal value that is the
peak value of the line-line voltage when the ac voltage is at nominal. The second value required to
scale the phase voltage VCOs is the voltage that will cause the VCOs to saturate (10 V times the
attenuator ratio).
Nominal = sqr(2) * Vll / sqr(3)
Maximum = 10 * ATTN
where ATTN = attenuation ratio
Ratio = Maximum / Nominal
where ratio = VSRCAC_RATIO or VLDAC_RATIO
VSRCDC_RATIO FCGD dc voltage VCO ratio.
Location: 42 This ratio is used to scale the VCO feedback associated with the dc voltage. The software uses a
Type: Float VCO on the FCGD for dc voltage feedback. The VCO senses the unscaled dc voltage voltages at
TP1 on the FCGD. This VCO is based on the following hardware scaling:
Units: None
Range: None +10.0 V => 2 MHz
0 V => 1 MHz
-10.0 V => 0 MHz
Two values must be defined to determine the ratio. The first value is the nominal value that is
EDO. EDO is 1.35 * Vll. The second value required to scale the dc voltage VCO is that voltage
that will cause the VCO to saturate (10 times the attenuator ratio).
Nominal = Edo = 1.35 * Vll
Maximum = 10 * ATTN
where ATTN = attenuation ratio
Ratio = Maximum / Nominal
where ratio = VSRCDC_RATIO or VLDDC_RATIO
XQ Motor q-axis synchronous reactance.
Location: 14 SPC pu summation of the generator quadrature axis leakage reactance and magnetizing reac-
Type: Float tance. Used to calculate the rotor power angle when load-side is operating in tach-based firing
mode (lac_mode = 6). Used only when a tach is provided for speed feedback.
Units: pu
Range: 0 1.6 XQ = X1 + Xaq (in per unit)
ZERO_ILMT Zero current limit.

Location: 154 Several portions of the logic requires a value to define that the link current is zero, ZERO_ILMT. If
Type: Float the current of concern (load or source) is less than ZERO_ILMT, the current is assumed to be
zero. If it is above this value, the current is assumed to be non-zero. 48 counts out of 1024 counts
Units: pu amps (0.0469pu) should be used as a default.
Range: unrestricted

Variable Definition
ZSPDFLX Zero speed flux threshold.
Location: 201 ZSPDFLX is used in "idle" mode to determine if the magnitude of motor flux is too low; this would
Type: Float result in a start from zero speed. ZSPDFLX is being compared against mtr_flux_absum, which is
the absolute value of the sum of the motor flux signals. The default value should be 0.086 (ex-
Units: pu Absolute cluding static starter applications that are 0.2).
Sum of Motor Flux
Range: 0 2.0

6 Alarms and 6-1. Introduction

Faults The LCI software continually tests for unfavorable
running conditions when the drive is running. If a
problem is detected, the LCI outputs an alarm or fault
Section 6 of this manual lists standard LCI alarms and message on the Datapanel diagnostic display (located
faults with a brief description and troubleshooting on the control cabinet door). An operator can then
suggestions, where appropriate. This information is examine the message and clear it, as applicable.
presented as follows:
The time at which the first alarm and/or fault occur is
Heading Page displayed on the main alarm/fault screen.
6-1. Introduction.................................................... 99
Alarm conditions (see Table 6-1) do not shut down
6-2. How to Reset.................................................. 99
the LCI, but may indicate a pending problem that
Table 6-1. Alarms................................................ 100
requires action.
Table 6-2. Faults.................................................. 103
Table 6-3. Detail Fault Messages........................ 106 Fault conditions (see Table 6-2) shut down the LCI.
Refer to the system elementary ladder diagram for a If more than one fault occurs, the first fault is indi-
complete list of alarms and faults applicable to each cated with the flashing letters FLT preceding the
requisition system. diagnostic message.
Refer to the AFE Datapanel manual for information Detail Fault Message (see Table 6-3) is an option
on operating the diagnostic display module. available for some faults. This option displays more
information, or detail, for the fault.
For example, if an SCR shorts, the Detail Fault Mes-
sage identifies the SCR. Figures 6-1 through 6-9 show
the relationship between the fault message and the
SCR location in the cell or load bridge cabinets.
6-2. How to Reset

To reset the control after a fault or alarm condition,
the operator must first view all alarm and fault diag-
nostic messages. Then the displays Reset button will
become active, enabling the operator to clear the
alarms/faults.
Section 6, Alarms and Faults 99

Table 6-1. Alarms
Alarm Message Description
4-20MA REF LOSS Indicates that the 4-20 mA speed reference(if used) has dropped below 4 mA.
Check continuity of the external (user) reference circuit.
BLOWN FILTER FUSE Indicates that protective fuses for ac or dc bus R-C filters are blown. This alarm can be config-
ured as a fault by using an EEPROM variable.
Check fuses and filter components in the bridges as soon as possible.
COOLANT LEVEL Indicates that coolant is below the low level float switch in the coolant reservoir.
Add coolant and check for leaks.
COOLANT PRESS Indicates low differential coolant pressure across power converter bridges or loss of both
pump starters.
In the absence of other indications, check for presence of pump power and operation of
differential pressure switch in pump panel.
COOLANT RESIST Indicates that the coolant resistivity has decreased below the alarm level setting, normally 1
megohm cm.
Replace the mixed bed deionizer and carbon filter as soon as possible.
COOLANT TEMP Indicates that coolant water has exceeded the alarm setting, normally 155 F or the main
cooling fan has failed. If redundant cooling fans were supplied the backup cooling fan will
come on.
Verify the coolant temperature using the resistivity/temperature monitor mounted on the pump
panel door. Possible causes are main cooling fan off because of overload, heat exchanger
blocked or sized too small, temperature switch not calibrated or failed.
DSPC ALARMS Indicates that the DSPC has reported an alarm. DSPC alarms include loss of field exciter input
volts, rotor position not found, shorted cell, EE power-up, gate supply undervoltage, power
supply ac fail, motor voltage unbalanced, source undervoltage, loss of speed control, tach
feedback not okay, and FCGD misoperations. This alarm will be followed by another alarm
that details the source of the DSPC alarm.
EE POWERUP Indicates that a configuration problem has occurred in the EEPROM or a change was made in
the EEPROM that does not become effective until the drive is re-booted.
FCGD MISOP Indicates that a problem has occurred on one of the FCGD boards or a device that communi-
cates with the FCGD. This alarm will be followed by another alarm that details the source of
the misoperation.
GATE SUPPLY UV Indicates that the FGPA gate power supply monitor has detected an undervoltage. The FGPA
board sends its gate power supply status to the FCGD board via a fiber-optic cable. When a
gate supply undervoltage is detected, the DSPC will suppress the link current. If the gate
supply undervoltage persists for an adjustable TD, this alarm will turn into a fault.
Investigate the reason for the undervoltage. If necessary, replace the FGPA, fiber-optic cable,
and FCGD.
LD x FCGD STAT y (x=A or x=B, y=A, B, or C) Indicates failure of load A or B, phase A, B, or C gate power supply
GATE POWER located on the FGPA board in the load bridge cabinet.
Replace the indicated FGPA board.
LD x FCGD XLINKX NOT (x=A or x=B) Indicates a problem with the XLINKX (programmable logic device) located on the
OK FCGD board in slot 9 (load A) or slot 11 (load B).
This board should be replaced.
LD x FCSA (x=A or x=B) Indicates that the absence of the cable between the VPBL (VME rack back-
UNPLUGGED plane) and load A or load B, FCSA current sense board (located in bridge cabinet).
Check continuity of this cable.
100 Section 6, Alarms and Faults

Table 6-1. Alarms Continued
LD x LEM POWER NOT (x=A or x=B) Indicates failure of the control power supply or cables between the control power
OK supply and load A or load B current sense module (LEM).
LD x NATO (x=A or x=B) Indicates that the absence of the cable between the VPBL (VME rack back-
UNPLUGGED plane) and load A or load B, NATO attenuator board (located in bridge cabinet).
LINK REACTOR OT Indicates inductor overtemperature as sensed by a thermal switch in the link inductor coil(s). In
some cases, these signals are wired back to the user, and this alarm is not indicated on the
drive.
LOSS OF SPD CTRL Indicates that speed is not following the speed reference. This usually occurs because the
drive is overloaded and in current limit.
If this is the case, reduce load. If the overload was temporary, reset and continue.
MOTOR OVERTEMP This is an optional alarm indication of motor over-temperature from an externally supplied
monitor. In some cases, this signal is wired back to the user, and this alarm is not indicated on
the drive.
MTR VOLT UNBAL Indicates that an unbalance has been detected in the motor voltage feedback. The alarm
threshold is adjustable with an EEPROM variable.
Investigate the reason for the unbalance, possible causes are shorted motor windings and
faulty load voltage feedback.
NO FLD INPT VLTS Indicates that the source voltage to the field exciter has dropped below 70% of nominal. This
function also detects single phasing of the exciter and a problem with the FCGE PLL(phase-
locked loop). This function is not active when the drive is running.
Investigate reason for loss of voltage or loss of exciter voltage feedback, or replace the FCGE.
PC AC FAIL Indicates that the ac power to the VME control power supply has failed. This alarm may be
disabled with an EEPROM setting.
PCR OVERTEMP This alarm indicates high ambient temperature in the drive control house or room. When used,
the signal originates from an external thermostat.
ROTOR POS NOT FND Indicates that the control has failed to detect machine stator flux feedback after the exciter
energizes the field. This means the control is unable to determine the electrical position of the
machine rotor. The control will attempt a start using an assumed rotor position.
Investigate reason for low stator starting flux.
RUN/START PERM This is an optional alarm indication that the run or start permissive contact supplied by the
user is open.
SHORTED CELL(S) Indicates that the control has detected one or more shorted SCRs. Because of the n-1 feature,
the LCI will continue to run with up to one shorted SCR in each leg.
Investigate reason for shorted SCR, check snubber circuit and gate driver.
SOURCE UNDERVLTS Indicates a momentary dip of the source voltage to less than 70%(typical, adjustable) of
nominal. If the source undervoltage persists for an adjustable TD, this alarm will turn into a
fault.
Investigate reason for loss of voltage.
SRC x FCGD STAT y (x=A or x=B, y=A, B, or C) Indicates failure of source A or B, phase A, B, or C gate power
GATE POWER supply located on the FGPA board in the source bridge cabinet.
SRC x FCGD XLINKX (x =A or x=B) Indicates a problem with the XLINKX (programmable logic device) located on
NOT OK the FCGD board in slot 5 (source A) or slot 7 (source B).
This board should be replaced.

Table 6-1. Alarms Continued
SRC x FCSA (x=A or x=B) Indicates that the absence of the cable between the VPBL (VME rack back-
UNPLUGGED plane) and source A or source B, FCSA current sense board (located in bridge cabinet).
SRC x LEM POWER (x=A or x=B) Indicates failure of the control power supply or cables between the control power
NOT OK supply and source A or source B current sense module (LEM).
SRC x NATO (x=A or x=B) Indicates that the absence of the cable between the VPBL (VME rack back-
UNPLUGGED plane) and source A or source B, NATO attenuator board (located in bridge cabinet).
TACH FEEDBACK Indicates that the tach based drive speed does not match the flux zero crossing based drive
speed.
Possible causes are incorrect EEPROM setting for tach, bad tach, bad tach power supply, or
bad tach cable.
TRANSFORMER NOK Composite indication of a transformer alarm. Typical transformer alarms are over-temperature,
low oil level, and pressure relief. In some cases, these signals are wired back to the user, and
the alarm is not indicated on the drive.

Table 6-2. Faults
Fault Message Description
AC EXC CUR UNBAL Indicates that an unbalanced load is applied to the ac field exciter.
Check for open phase between the ac field exciter and the brushless exciter and for blown
exciter fuses or a shorted SCR, check the brushless exciter for shorted SCRs.
ADMA A/D NOT OK Indicates a failure on the ADMA daughterboard mounted on the DSPC, or a failure of the
ADMA to communicate with the DDTB.
Replace the ADMA.
COOLANT LEVEL Indicates coolant is below the low-low level float switch or above the high level float switch in
the coolant reservoir.
If low, add coolant and check for leaks, if high check water-water heat exchanger for failure.
COOLANT PRESS Indicates low differential coolant pressure across power converter bridges or loss of both
pump starters for an extended period of time (adjustable with EEPROM setpoint).
In the absence of other indications, check for presence of pump power, and operation of
differential pressure switch in pump panel.
COOLANT RESIST Indicates that the coolant resistivity has decreased below the fault level setting, normally 0.2
megohm cm.
Replace the mixed bed deionizer and carbon filter.
COOLANT TEMPER Indicates that coolant water has exceeded the fault setting, normally 170 F, or that both
cooling fans have failed.
Verify the coolant temperature using the resistivity/temperature monitor mounted on the pump
panel door. Possible causes are main cooling fan off because of overload, heat exchanger
blocked or sized too small, temperature switch not calibrated or failed.
DC EXC OVERVOLT Used only in dc field exciters. Indicates that the exciter output has exceeded 1.25 times Edo
(Edo=maximum exciter dc volts).
Check for open, intermittent, or arcing field circuit.
Check for field contactor opening under load.
DDTB HRDWRE JUMP Indicates that the hardware has detected an open DDTB hardware jumper. This jumper is
located on the DDTB boards terminal TB2-X7. Refer to sheet 1EX of the system elementary.
Check continuity.
DSPC FAULTS Indicates that the DSPC has reported a fault. DSPC faults include ac exciter current imbal-
ance, exciter overcurrent, source overcurrent, load overcurrent, source commutation failure,
load commutation failure, exciter PLL, source PLL, load PLL, de exciter overvoltage, high
speed restart fault, failure to start, source overvoltage, load overvoltage, motor os, DDTB
hardware disable, FCGD kill gating, m/s current imbalance, field loss, ground fault, source
undervoltage, ADMA not OK, FCGD fire fault, shorted cell, DSPC misoperation, and hardware
fault.
This fault will be followed by another fault message that details the source of the DSPC fault.
DSPC MISOP Indicates that the DSPC has reported a fault. DSPC faults include self test error, checksum
errors, power supply failure, bus time out, CPU watchdog, undefined interrupt, scheduler
overlap, stack error, SNPA faults, ADMA faults. More information will appear under the detail
fault messages (see Table 6-3).
EXCITER MISOP Indicates a problem has occurred on the FCGE board or a device that communicates with the
FCGE. More information will appear under the detail fault messages (see Table 6-3).
EXCITER OVERCUR Indicates that exciter current has exceeded the EEPROM setting.
Investigate the cause of the overcurrent.

Table 6-2. Faults Continued
EXCITER PLL Indicates that the exciter phase-locked loop has lost lock with the exciter source voltage feed-
back. This failure is most often caused by a failure in the voltage feedback attenuator circuits.
Check attenuator boards for open connectors or resistors and bad or dirty cables.
FAIL TO START For applications using a tachometer, this fault indicates rotation has not occurred 5 seconds after
application of stator current.
Check level of starting current, field excitation, turning gear speed (if used) and for any mechani-
cal binding in the system.
FCGD FIRE FAULT Indicates that there is an overflow of the pending register usage on one of the FCGD or the
FCGE board. A detail message should annunciate the exact board.
In the absence of other indications, replace the FCGD(E).
FCGD KILL GATING If any one of the FCGD or FCGE watchdog timer (8 ms) times out, the FCGD(E) will stop its
gating and open the source or load contactor. If this happens, an indicator on the FCGD lights.
Replace the FCGD.
FCGD Indicates a problem has occurred on one of the FCGD boards or a device that communicates
MISOPERATION with the FCGD. More information will appear under the detail fault messages (see Table 6-3).
FIELD LOSS Indicates exciter current has fallen below the EEPROM setting for field loss.
Check EEPROM setting.
Check wiring between the exciter and motor.
FILTER FUSE Indicates that protective fuses for ac or dc bus R-C filters are blown.
This fault can be configured as an alarm by using an EEPROM variable. Check fuses and filter
components in the bridges.
GATE SUPPLY UV Indicates that the FGPA gate power supply monitor has detected an undervoltage. The FGPA
board sends its gate power supply status to the FCGD board via a fiber-optic cable. When a gate
supply undervoltage is detected, the DSPC suppresses the link current. If the gate supply under-
voltage persists for an adjustable TD, this fault occurs.
Investigate the reason for the undervoltage. If needed, replace the FGPA, fiber-optic cable, and
FCGD.
GROUND FAULT Indicates a ground somewhere between (and including) the source isolation transformer and the
ac output buses including the motor. Also, failed load ac attenuator (NATO board).
Megger transformer, bridges, dc link inductor, and load ac buses.
HARDWARE FAULT Indicates one of the FCGDs or FCGE has reported a hardware fault. FCGD(E) hardware faults
include watchdog timer, hardware overcurrent, gate disabled, XKILL, system failure, kill gating
and trip. More information will appear under the detail fault messages (see Table 6-3).
HIGH SPD RESTART This fault is normally enabled for static starters and other applications where top speed is much
higher than base speed for the LCI. The fault indicates that a run command has been received
with the motor already turning at a speed above base speed.
LOAD CUR > SRC Indicates a misfiring of the source bridge resulting in a diametric commutation fault on the source
side of the dc link. In this type of fault, two opposite (diametric) SCR bridge legs are conducting
in the source bridge. During a diametric fault, the ac current into the faulted bridge goes to zero.
It is through comparison of the current signals from the source and load current sensors (CTs or
current sense modules) that the commutation fault is detected. If these independent measure-
ments of drive current differ by more than an amount set by EEPROM setting, a commutation
fault is detected.
Check all SCRs for shorts. Using gate test mode check all SCRs for proper gate current. An
improperly tuned drive can lead to commutation faults.
LOAD ISOLATOR When an output isolator is supplied and is controlled by the drive, this fault indicates that the
isolator did not close when commanded.

Table 6-2. Faults Continued
LOAD OVERCURR Indicates an overcurrent as detected by the load bridge current sense modules.
This fault is the symptom of many possible failures. Check all SCRs for shorts.
LOAD PLL Indicates that the load phase-locked loop has lost lock with the load voltage feedback. This
failure is most often caused by a failure in the voltage feedback attenuator circuits.
Check NATO attenuator boards for open connectors or resistors and bad or dirty cables.
M/S CURRENT On drives with a series 12-pulse source, this fault indicates an unbalance between the source
UNBAL bridge currents. Since the bridges are in series, their currents should be balanced at all times.
Check all SCRs for shorts. Using gate test mode, check all SCRs for proper gate current.
MOTOR OVERSPEED An indication of over-frequency derived from the load voltage feedback. Normally set to 1.05 pu
of maximum drive frequency.
If overspeed occurs at startup from rest, it is likely to be because of defective load attenuator
circuits. A mistuned speed regulator could also cause an overspeed fault.
MOTOR OVERVOLT Indicates load voltage is excessive (EEPROM setting typically set at 1.2 pu).
Recheck tuneup settings.
SHORTED CELL(S) Indicates that the control has detected more than one shorted SCR in an SCR leg. More informa-
tion will appear under the detail fault messages (see Table 6-3).
Investigate reason for shorted SCR, check snubber circuit and gate driver.
SOURCE OVERCURR Indicates an overcurrent as detected by the source bridge CTs.
This fault is the symptom of many possible failures. Check all SCRs for shorts.
SOURCE OVERVOLT Indicates source voltage is excessive (EEPROM setting typically set at 1.2 pu).
Recheck tuneup settings.
SOURCE PLL Indicates that the source phase-locked loop has lost lock with the source voltage feedback. This
failure is most often caused by a failure in the voltage feedback attenuator circuits.
Check attenuator boards, NATO, for open connectors or resistors and bad or dirty cables.
SOURCE Indicates that the source voltage has dropped below the undervoltage setpoint for an excessive
UNDERVOLT period of time. The setpoint and time are EEPROM adjustable. This function will also detect
single phasing of the source.
Investigate reason for loss of voltage.
SRC CUR > LOAD Indicates a load bridge misfiring, which caused a diametric commutation fault on the dc links
load side. In this type of fault, two opposite (diametric) SCR bridge legs are conducting in the
load bridge. During a diametric fault, the ac current into the faulted bridge goes to zero. The
current signals from the source and load current sensors (CTs or current sense modules) are
compared. If these independent measurements of drive current differ by more than an amount
set by EEPROM setting, a commutation fault is detected.
Check all SCRs for shorts. Using gate test mode check all SCRs for proper gate current. An
improperly tuned drive can lead to commutation faults.
START FAULT Indicates that the LCI has taken an excessive time to reach self commutated mode (mode 4)
during startup. Time limit is adjustable with an EEPROM variable.
Check level of starting current, field excitation, turning gear speed (if used), and for any me-
chanical binding in the system.
TACH FEEDBACK Indicates that a failure has occurred in the motor tachometer (if used).

Table 6-3. Detail Fault Messages
Detail Message Description
ADMA DDTB CABLE Indicates that the cable between the ADMA and DDTB boards is missing.
Check or replace this cable.
ADMA DETECT/CFG Indicates that the ADMA board was not initialized or configured properly.
In the absence of other indications, replace the ADMA (located on the DSPC board).
DSPC AC FAIL Indicates that the ac input to the control power supply has failed. This fault can be masked out
with an EEPROM setting.
Check the control power supply ac input, replace the control power supply.
DSPC CPU Not used.
WATCHDOG
DSPC P/S SYS FAIL Indicates that the control power supply has detected a failure. This fault can be masked out with
an EEPROM setting.
Check the control power supply ac input, replace the control power supply.
DSPC POWER The DSPC board includes a power supply monitor that compares the control supply voltages
SUPPLY against a reference. This fault indicates that one of the power supply buses is not within toler-
ance.
Check the control power supply voltages at the VME rack. If out of tolerance, replace the power
supply and/or power supply cable.
DSPC SCHED Indicates that one of the software tasks has taken longer to complete than expected and has
OVERLAP overrun.
DSPC SELFTEST Indicates failure of the DSPC board.
ERR
Replace the DSPC.
DSPC UNDEFINED Indicates that an improper interrupt of the microprocessor has occurred.
INTRPT
Check equipment for loose connections, arcing, or other abnormal sources of electrical noise. In
the absence of other indications, replace the DSPC board.
EE CHECKSUM ERR Indicates that the stored checksum does not agree with the calculated value.
Replace the DSPC board.
EXCITER GROUND For internal exciters, indicates a ground somewhere between (and including) the exciter isolation
transformer and the exciter buses including the stator of the rotating exciter. Also, failed
DS3800NHVL exciter attenuator board.
Megger transformer, exciter bridge, and exciter buses, including the motor.
EXCITER KILL GATE Indicates that the FCGE has stopped gating because of a watchdog or hardware overcurrent
fault occurring on any one of the FCGDs or FCGE.
Examine the LEDs on the FCGD and FCGE boards to determine which FCGD or FCGE initiated
the kill gating.
EXCITER SYS FAIL Not used.
EXCITER SYS FAULT Indicates that the FCGE has stopped gating because of a system fault such as hardware over-
current. This fault is wired -OR between the FCGD board(s) and the FCGE.
Examine the LEDs on the load FCGD board(s) to determine which board initiated the system
fault.
EXCITER XKILL Indicates that the hardware has detected opening of the DDTB hardware jumper, located on TB2-
X7. Refer to sheet 1EX of the system elementary.
Check continuity.

Table 6-3. Detail Fault Messages Continued
FCGE WATCHDOG Indicates that the FCGE has detected a watchdog problem and stopped gating.
In the absence of other indications, replace the source FCGE.
FCGE XLINK NOK Indicates a problem with the XLINKX (programmable logic device) located on the FCGD board in
slot 5 (source A) or slot 7 (source B).
Replace the FCGD board.
FIRING FAULT, x (x=SA, SB, LA, or LB) Indicates that there is an overflow of the pending register usage on one of
PEND OVERFLOW the FCGD or the FCGE board. The detail message should identify the exact board (x).
In the absence of other indications, replace the FCGD(E).
FLASH CHECKSUM Indicates that the stored checksum does not agree with the calculated value.
ERR
Replace the DSPC board.
GATE DISABLED Indicates that the FCGE has detected an abnormal condition and has stopped gating.
LD x FCGD STAT y (x=A or x=B, y=A, B, or C) Indicates failure of load A or B, phase A, B, or C gate power supply
GATE POWER located on the FGPA board in the load bridge cabinet.
LD x FCGD, STAT (x=A or B) Indicates failure of load A or B FCGD to read information from the FGPA board
READ NOK located in the power bridge cabinet.
Check fiber-optic cables between the FCGD and FGPA. Replace the FCGD and FGPA.
LOAD x GATE (x=A or B) Indicates that the FCGD hardware has detected some abnormal condition and has
DISABLED stopped gating.
LOAD x KILL GATING (x=A or B) Indicates that the FCGD has stopped gating because of a hardware overcurrent fault
on any one of the FCGDs or FCGE.
the kill gating.
LOAD x SYSTEM (x=A or B). Not used.
FAIL
LOAD x SYSTEM (x=A or B). Indicates that the FCGD has stopped gating because of a system fault such as
FAULT hardware overcurrent. This fault is wired -OR between the FCGD board(s) and the FCGE.
Examine the LEDs on the load FCGD to determine which board initiated the system fault.
LOAD x TRIP (x=A or B) Indicates that the FCGD initiated a trip of the load isolator because of a hardware
overcurrent fault on the load FCGD. If 12-pulse, either FCGD can initiate this trip.
LOAD x WATCHDOG Indicates that source FCGD has detected a watchdog problem and stopped gating.
In the absence of other indications, replace the source FCGD.
LOAD x XKILL (x=A or B) Indicates that the hardware has detected opening of the DDTB hardware jumper.
Refer to sheet 1EX of the system elementary, this jumper is on TB2-X7 of the DDTB module.
Check continuity.
LOAD x,HARDWARE (x=A or B) Indicates that the source FCGD hardware has detected an overcurrent condition and
OVERCURR stopped gating. This fault is a hardware protective backing up the software detected overcurrent.
This fault requires a power up reboot. The current feedback signals and the hardware overcur-
rent detectors are located on the FCGD board.
Verify the FCGD hardware overcurrent setpoint (pot setting) is correct, check all SCRs for shorts.
NHVL UNPLUGGED For internal exciters, indicates that the 34-pin ribbon cable between the VME rack (plug EXJV)
and the exciter (NHVL plug JA) is not connected.
Check this cable for continuity, check connectors for bent pins, replace the FCGE board.

Table 6-3. Detail Fault Messages Continued
SNPA DETECT/CFG Indicates that the SNPA communication board has not been initialized or configured properly.
In the absence of other indications, replace the SNPA daughterboard located on the DSPC.
SNPA HRTBT/CABLE Not used.
SOURCE x GATE (x=A or B) Indicates that the FCGD hardware has detected some abnormal condition and has
DISABLED stopped gating.
SOURCE x KILL (x=A or B) Indicates that the FCGD has stopped gating because of a watchdog or hardware
GATING overcurrent fault occurring on any one of the FCGDs or FCGE.
the kill gating.
SOURCE x SYSTEM (x=A or B). Not used.
FAIL
SOURCE x SYSTEM (x=A or B) Indicates that the FCGD has stopped gating because of a system fault such as
FAULT hardware overcurrent. For drives with series 12 pulse source, this fault is wired -OR between the
two FCGD boards.
Examine the LEDs on the source FCGD board(s) to determine which FCGD initiated the system
fault.
SOURCE x TRIP (x=A or B) Indicates that the FCGD initiated a trip of the source isolator because of a hardware
overcurrent fault on the source FCGD. If series 12 pulse, either FCGD can initiate this trip.
SOURCE x Indicates that source FCGD has detected a watchdog problem and stopped gating. In the ab-
WATCHDOG sence of other indications, replace the source FCGD.
SOURCE x XKILL (x=A or B) Indicates that the hardware has detected opening of the DDTB hardware jumper.
Refer to sheet 1EX of the system elementary, this jumper is on TB2-X7 of the DDTB module.
Check continuity.
SOURCE (x=A or B) Indicates that the source FCGD hardware has detected an overcurrent condition and
x,HARDWARE stopped gating. This fault is a hardware protective backing up the software detected overcurrent.
OVERCURR This fault requires a power up reboot. The current feedback signals and the hardware overcur-
rent detectors are located on the FCGD board.
Verify the FCGD hardware overcurrent setpoint (pot setting) is correct, check all SCRs for shorts.
SRC x FCGD STAT y (x=A or x=B, y=A, B, or C) Indicates failure of source A or B, phase A, B, or C gate power supply
GATE POWER located on the FGPA board in the source bridge cabinet.
SRC x FCGD, STAT (x=A or B) Indicates failure of source A or B FCGD to read information from the FGPA board
READ NOK located in the power bridge cabinet.
Check fiber-optic cables between the FCGD and FGPA, replace the FCGD and FGPA.
STACK ERROR Indicates an error has occurred in the processor stack. This fault will require a power up reboot.
VME BUS TIMEOUT Indicates a device on the VME data bus has failed to respond in a reasonable amount of time.
Replace VME boards one at a time until resolved.

Note
Figures 6-1 through 6-9 show the relationship between the Detail Fault Message and the SCR loca-
tion in the cell or load bridge cabinets. The cell identification format is [LEG][A/B][CELL].
For example, 1A3 refers to leg1 cell 3 (in other documents, this cell may be labeled 1T3).
Leg 1 Leg 4 Leg 3 Leg 6 Leg 5 Leg 2

1A3 1A2 1A1 4A1 4A2 4A3 3A3 3A2 3A1 6A1 6A2 6A3 5A3 5A2 5A1 2A1 2A2 2A3
Upper SCR Stack (Source A)

4B3 4B2 4B1 1B1 1B2 1B3 6B3 6B2 6B1 3B1 3B2 3B3 2B3 2B2 2B1 5B1 5B2 5B3
Lower SCR Stack (Source B)
Figure 6-1. Series 12-Pulse Source, Cabinet 1 (Left Cabinet)
Leg 1 Leg 3 Leg 5

1B4 1B3 1B2 1B1 3B4 3B3 3B2 3B1 5B4 5B3 5B2 5B1
Upper SCR Stack
Leg 4 Leg 6 Leg 2

4A4 4A3 4A2 4A1 6A4 6A3 6A2 6A1 2A4 2A3 2A2 2A1
Lower SCR Stack
Figure 6-2. 4 kV Load, Cabinet 2 (Right Cabinet)


Upper SCR Stack (Source A)

Lower SCR Stack (Source B)
Figure 6-3. Dual-Channel 12-Pulse, Channel A, Cabinet 1 (Left Cabinet)

Upper SCR Stack (Load A)

Lower SCR Stack (Load B)
Figure 6-4. Dual-Channel 12-Pulse, Channel B, Cabinet 2 (Right Cabinet)

Leg 4 Leg 6 Leg 2

4A1 4A2 4A3 4A4 6A1 6A2 6A3 6A4 2A1 2A2 2A3 2A4
Upper SCR Stack
Leg 1 Leg 3 Leg 5

1A1 1A2 1A3 1A4 3A1 3A2 3A3 3A4 5A1 5A2 5A3 5A4
Lower SCR Stack
Figure 6-5. 4 kV, 6-Pulse Source, Cabinet 1 (Left Cabinet)
Leg 1 Leg 3 Leg 5

1A4 1A3 1A2 1A1 3A4 3A3 3A2 3A1 5A4 5A3 5A2 5A1
Upper SCR Stack
Leg 4 Leg 6 Leg 2

4A4 4A3 4A2 4A1 6A4 6A3 6A2 6A1 2A4 2A3 2A2 2A1
Lower SCR Stack
Figure 6-6. 4 kV, 6-Pulse Load, Cabinet 2 (Right Cabinet)

Upper SCR Stack (Source)

Lower SCR Stack (Load)
Figure 6-7. 2.3 kV, Cabinet 1 (Single Cabinet)

Leg 4 Leg 6 Leg 2

Upper SCR Stack
Leg 1 Leg 3 Leg 5

Lower SCR Stack
Figure 6-8. 6 kV, 6-Pulse Source, Cabinet 1 (Left Cabinet)
Leg 1 Leg 3 Leg 5

Upper SCR Stack
Leg 4 Leg 6 Leg 2

Lower SCR Stack
Figure 6-9. 6 kV, 6-Pulse Load, Cabinet 2 (Right Cabinet)

7 Preventive
Maintenance
7-1. Introduction
Periodic preventive maintenance extends equipment
operating life and minimizes downtime. This involves
specific power-on and more intensive power-off
Section 7 of this manual defines practices and proce- checks, when permitted. With both checks, necessary
dures that help keep the drive in good running condi- repairs should be undertaken when needed.
tion. This information is organized as follows:
Section/Topic Page
7-2. Maintenance Schedule
7-1. Introduction................................................... 113
7-2. Maintenance Schedule .................................. 113 For maximum benefit, preventive maintenance needs
7-3. Maintenance Record ..................................... 113 to be performed at scheduled intervals by a qualified
7-4. Tools/Materials Needed ................................ 113 technician. The required frequency for each procedure
7-5. Power-On Checks ......................................... 114 depends on:
7-6. Power-Off Checks......................................... 114
How much the equipment is used
7-6.1. Before Starting Maintenance ..................... 114
7-6.2. Cleaning the Equipment............................. 114 Ambient environmental conditions (refer to Section
7-6.3. Loose Connections..................................... 115 1 for environmental specifications)
7-6.4. Damaged Insulation ................................... 116
The schedule should include an inspection of wiring
7-6.5. Contactors and Relays................................ 116
and components before re-applying power after an
7-6.6. SCR Assembly Clamp Pressure................. 116
overcurrent trip.
7-6.7. Liquid Cooling Filter and Deionizer
Cartridge..................................................... 116
7-6.8. Secondary Motors ...................................... 116 7-3. Maintenance Record
7-7. Short Circuit Damage.................................... 116
GE recommends that the customer keep a detailed
record of maintenance (such as a log book) for every
drive. This record is intended for two purposes:
WARNING
To verify that all equipment is routinely checked
This equipment contains a potential hazard To provide a history of equipment maintenance and
of electric shock or burn. Only adequately problems that will be useful for both preventing
trained persons who are thoroughly familiar and troubleshooting equipment failure
with the equipment and the instructions
should maintain this equipment. For example, the record should include the time and
date of the maintenance checks, detail any equipment
To prevent electric shock while servicing the defects found, and specify repairs or corrective action.
equipment, personnel must understand and
follow all safety requirements for working
around dangerous voltages. 7-4. Tools/Materials Needed
The tools and materials listed below may be needed
when performing preventive maintenance on the drive:
High quality tools, including screwdrivers and
pliers, designed specifically for working with
electrical wiring systems
Socket set
Wrench set
Fuse puller
Feeler gauge
Electrical tape
Section 7, Preventive Maintenance 113

Fine file 7-6. Power-Off Checks

Clean dry cloth Power-off checks involve cleaning the equipment and
Soft-bristled brush (such as a paintbrush) checking for wear and damage through visual inspec-
tion and functional tests.
Mild solution of distilled water and household or
laboratory detergent (see section 7-6.2.2, step 4a)
7-6.1. Before Starting Maintenance
Isopropyl alcohol (see section 7-6.2.2, step 4b)
Insulation resistance tester
WARNING
High voltage detector (such as a tic tracer using
an insulated pole of appropriate length)
Power must be de-energized before per-
Source of dry, low-pressure compressed air (less forming any adjustments, servicing, or other
than 15 psu) act requiring physical contact with the elec-
trical components or wiring.
Vacuum cleaner with non-metallic nozzle and
finely woven, high efficiency filter Before starting, the equipment must be prepared as
Replacement components, if required, including follows:
fuses, wiring, and cabling 1. De-energized
2. Tagged and locked out
7-5. Power-On Checks
3. Discharged (the dc link has a minimum discharge
The following preventive maintenance procedures time of 5 minutes)
need to be conducted with power on within the control
4. Tested for zero voltage (using an approved tester
cabinet, only.
for the voltage level being measured)
WARNING 5. Safety grounded

Do not deviate from these conditions. If safety re-
With power applied, dangerous voltages exist quirements cannot be met completely, or if you do not
in the equipment circuitry. understand them, do not work on the equipment.
Some LCIs include a fan in the control cabinet, which

7-6.2. Cleaning the Equipment
should be checked as follows:
1. While the equipment is running, open the control CAUTION

cabinet door. The fan should be located underneath
the VME rack. Build up of dust on electrical components
2. Without touching any circuitry, look to see that and wiring can damage components and
the fan is still running. cause misoperation.
3. If it is not running, turn off power to the equip-
ment, then replace the fan. (The fan is held in place 7-6.2.1. Dust Removal. Build-up of dust on compo-
by four screws.) nents can increase operating temperature, reducing
their normal life. On standoff insulators, it can
collect enough moisture to produce a current path from
bus bars to chassis ground.
Dust (especially metallic dust) on wire surfaces can
cause tracking between connector pins. Tracking is
usually capacitive in nature and involves a build-up of
electrical charge along the wire surface. This can cause
intermittent problems that are hard to find.
114 Section 7, Preventive Maintenance

Check for and remove accumulated dust as follows: 7-6.3. Loose Connections
1. Clean bus bars and standoff insulators with a clean Vibration during equipment operation can loosen
dry cloth do not use any solvents. mechanical and electrical connections, causing inter-
mittent equipment failure. Additionally, dust and
2. Using a fine-filtered vacuum cleaner with a non-
moisture can accumulate in loose connections. This
metallic nozzle, remove dust and dirt from wiring
can cause loss of low-level signals at terminal boards
and electrical components.
and also thermal runaway at bus connections.
Note 1. Check all hardware and electrical connections, and
Make sure that the air source is directed so tighten if needed.
that dust and foreign matter is removed 2. Tighten or replace any loosened crimp-style lugs.
rather than relocated.
3. Tighten or replace all loose or missing hardware.
CAUTION 4. Inspect printed wiring boards for correct seating,
and check that any plugs, wiring, and bus connec-
tors are tight.
Do not use high-pressure compressed air,
which may damage components.
CAUTION
7-6.2.2. Printed Wiring Boards. If boards in a mod-
ule are dirty: To prevent component damage caused by
static electricity, treat all boards with static
1. Vacuum to remove dust from around the board
sensitive handling techniques. Use a ground-
slots/connections (before unplugging). A soft-
ing strap when handling boards or compo-
bristled brush may be used to loosen dirt.
nents.
2. Remove the boards per the instructions in Section
8. Be sure to observe personal and equipment
7-6.4. Damaged Insulation
safety instructions.
Wires and cables with damaged insulation are danger-
3. Again, vacuum to remove dust from around the
ous when carrying electricity. They can also intermit-
board slot/connections.
tently short, causing equipment and functional failure.
4. Vacuum the boards, using a soft brush, if neces-
1. Check all wires and cables for fraying, chipping,
sary, to help loosen dust. If excessively dirty, nicks, wear, or rodent damage.
boards may need to be washed, as follows:
2. Check all wires and cables for signs of overheating
a. Use a soft-bristled brush to scrub the board in a
or carbonization.
lukewarm (37.7 C, 100 F), mild solution of
distilled water and household or laboratory de- 3. Repair minor low voltage insulation damage with a
tergent. good grade of electrical tape. If a damaged cable
carries high voltages, replace the cable.
Harsh chemicals and solutions will damage the
board. Do not use solvents containing ammonia, 4. Replace any cables or wires that have more than
aldehydes, alkalis, aromatic hydrocarbons, or mild damage.
ketones.
b. Rinse thoroughly by dipping the board several
times in fresh, lukewarm, distilled water. Do not
soak the board.
c. Dry the board by shaking off excess water, im-
mersing and agitating the board in isopropyl al-
cohol, then air drying for a few hours.
5. Re-insert the boards per instructions in section 8-4.
Section 7, Preventive Maintenance 115

7-6.5. Contactors and Relays 7-6.7. Liquid Cooling Filter and Deionizer
Cartridge
1. If possible, manually trip the device to ensure that
it works properly. The LCIs liquid cooling assembly includes an acti-
vated charcoal filter and a deionizer that keep coolant
2. Inspect contacts on open (as opposed to sealed)
clean and non-conductive.
contactors and relays. Discoloration and rough
contact surfaces are normal. Replace both the filter and the deionizer cartridge at
the same time, per the instructions in GEH-6374,
3. If beads have formed because of severe arcing:
Liquid Cooling for LCI With DS200 Boards.
a. Dress the contact faces with a fine file. Do not
use emery cloth or sandpaper.
7-6.8. Secondary Motors
b. Identify and correct the cause of arcing.
Refer to the manufacturers documents for mainte-
c. Refer to the components publication for de- nance instructions for the pump and blower motors.
tailed instructions on maintenance, repair, and
replacement procedures.
Note
Blower motors are used on liquid cooling sys-
7-6.6. SCR Assembly Clamp Pressure tems that use a liquid-to-air heat exchanger.
CAUTION 7-7. Short-Circuit Damage

If a short-circuit occurs, overcurrent protective devices
The spring nuts have been factory-set to de- on the circuit should cut off power to the equipment.
fine a 44,000 Newton (10,000 lb) load with a This normally prevents electrical damage, except at the
3.2 mm (0.125 in) gap. The spring nut posi- point of the short. However, the heat produced by an
tion is then fixed with LOCTITE adhesive. electrical arc can carbonize some organic insulating
Do not attempt to move this nut. materials, which then lose insulating qualities.
1. Make sure that the LCI has been turned off for at After repairing the cause of the short and before re-
least 30 minutes to allow the entire unit to attain applying power:
room temperature. 1. Inspect the system thoroughly for damage to con-
2. Using a feeler gauge, examine the clamp gap ductors, insulation, or equipment. Replace, if
between the spring nut and the frame (see Section found.
8, Figure 8-1). 2. Check insulation resistance.
The clamp gap should be 0.125 in. 0.005 in. 3. Inspect the overcurrent protection devices for
(3.2 mm 0.2 mm). damage to insulation and contacts (see sections
7-6.4 and 7-6.5). Replace or repair, as needed.
4. Check and replace any open fuses.
116 Section 7, Preventive Maintenance

8 Component 8-1. Tools/Materials Needed

Replacement The tools and materials listed below may be needed
when replacing drive components:
Section 8 of this manual provides guidelines for High quality tools, including screwdrivers and
replacing components during repair. It is organized as pliers, designed specifically for working with
follows: electrical wiring systems
Section Heading Page Socket set

8-1. Tools/Materials Needed............................... 117 Wrench set, including torque wrench
8-2. Before Starting............................................. 117
High voltage detector (such as a tic tracer using
8-3. Replacing Bridge Components .................... 118
an insulated pole of appropriate length)
8-3.1. Bridge Structure Overview ....................... 118
8-3.2. SCR Replacement ..................................... 120 Fine abrasive paper
8-3.3. Heatsink, Capacitor, and Resistor Clean dry cloth
Replacement ................................................. 121
8-4. Replacing Printed Wiring Boards ................ 121 Heatsink spreader tool (GE part 246B9953BPG1)
8-4.1. Handling Precautions ................................ 121 Clear silicone oil GE SF1154 (GE part
8-4.2. Replacement Procedures........................... 121 304A9908P1)
Publication GEH-6374, the LCI liquid cooling
WARNING system manual
This equipment contains a potential hazard 8-2. Before Starting

of electric shock or burn. Only adequately
trained persons who are thoroughly familiar
with the equipment and the instructions WARNING
should maintain this equipment.
Power must be de-energized before per-
To prevent electric shock while servicing the
forming any adjustments, servicing, or other
equipment, personnel must understand and
act requiring physical contact with the elec-
follow all safety requirements for working
trical components or wiring.
around dangerous voltages.
Before starting, the equipment must be prepared as
follows:
1. De-energized
2. Tagged and locked out
3. Discharged (the dc link has a minimum discharge
time of 5 minutes)
4. Tested for zero voltage (using an approved tester
for the voltage level being measured)
5. Safety grounded
Do not deviate from these conditions. If safety re-
quirements cannot be met completely, or if you do not
understand them, do not work on the equipment.
Section 8, Component Replacement 117

8-3. Replacing Bridge Components The SCR stack is clamped at 44,000 Newtons (10,000
pounds) so that the total load on the two parallel
8-3.1. Bridge Structure Overview stacks is 88,000 Newtons (20,000 pounds). The clamp
(Refer to Figures 8-1 and 8-2.) An insulating I-beam assembly is supported from the side frames of the
supports the SCR stacks liquid-cooled heatsinks in bridge independently of the SCR stacks.
the vertical and horizontal position. The heatsinks are This structure allows the clamp force to be completely
tin-plated copper. They are bolted to the I-beam with removed with all components remaining in position.
spring washers, which allow a lateral sliding motion. The heatsinks can then be moved laterally and the
A glass-reinforced plastic SCR support holds the SCRs replaced like books on a shelf.
SCRs in place. This support registers on an insulator The insulators and wire supports are positioned by roll
bolted to the heatsinks with another set of spring pins in the bus bars and the clamp pivot. When clamp
washers, and is supported by the heatsink support. force is removed, they are free to rotate. In some
cases, there are slots to permit removal by sliding the
component past the roll pin.
.......
Heatsinks SCR SCR

Support
Insulator
Connection
for Liquid-
Coolant Hose
Clamp
Heatsink Head
Support
Clamp
Torque
Nut
Teflon
Insulator
Clamp Gap
3.2 mm (0.125")
Jam Nut Spring Nut
Spring
Washers
44,000 Newtons
(10,000 Pounds) Detail of Clamp Pivot
Figure 8-1. Two SCRs and Typical Support, Front View
118 Section 8, Component Replacement

LiquidCoolant
Hose to Heatsink
Heatsink
SCR
Capacitor
Assembly
I-Beam
Hose in Front of
SCR Support Heatsink Support
Capacitor Assembly
Figure 8-2. View of Bridge Showing Heatsink Array

8-3.2. SCR Replacement 4. Clean the heatsink surface with fine abrasive
paper, then wipe thoroughly with a clean cloth.
Refer to Figures 8-1 and 8-2, if needed during the
following procedures. Hard cleaning may expose bare copper, but this
does not impair performance.
1. Open the bridge module doors, left-hand door first,
and support them in a full-open position. 5. Remove the plastic SCR support from the old SCR
and install on the replacement SCR.
Take care not to stress wire and fiber-optic cables
at the hinge and not to damage electronic compo- 6. Clean the replacement SCR mounting surface with
nents. fine abrasive paper to remove oxides and wipe
thoroughly with a clean cloth.
2. Loosen the two clamp torque nuts to remove all
load, then rotate through two additional turns. 7. Lightly coat the surfaces with GE SF1154 silicone
oil (GE part no. 304A9908P1).
The clamp gap decreases from 3.2 mm (0.125 in)
to 0, and the spring nut assumes all of the load 8. Install the replacement SCR and position by snap-
from the spring washers. ping the SCR support onto the heatsink support.
3. Remove the SCR as follows: 9. Connect the gate and cathode leads to the FHVA
board.
a. Unplug the gate and cathode leads at the FHVA
board. 10. Remove the heatsink spreader tool.
b. Insert the heatsink spreader tool (GE part num- 11. Verify that all SCRs, insulators, and wire sup-
ber 246B9953BPG1) on opposite sides of the ports are in alignment within 2.2 mm (.09 in).
SCR (see Figure 8-3), then use it to remove
The wire supports must be aligned vertically.
pressure from the SCR.
12. Tighten the torque clamp nuts until the clamp gap
c. Grasp the SCR support and slide the SCR from is 3.2 mm (.125 in).
the stack.
13. The jam nuts are used to secure the Teflon rod
d. If the SCR sticks to the heatsink, rotate it to free insulator. Tighten against the Teflon insulator
it. one turn beyond handtight.
* Long & Short

Heatsinks
SCR
Heatsink *
Spreader
Tool
Heatsink
Support
* Points of Tool
O n Opposite SCR Support
Sides of SCR
I-Beam
Figure 8-3. Heatsink Spreader Tool Placement,

Side View

8-3.3. Heatsink, Capacitor, and Resistor 8-4. Replacing Printed Wiring

Replacement
Boards
Refer to Figures 8-1 and 8-2, if needed, during the
following procedures. Because of upgrades, printed wiring boards of differ-
ent revision levels may not contain identical hardware.
Removal: However, GE ensures backward compatibility of
1. Drain the cooling system, per the instructions in replacement boards.
publication GEH-6374.
2. Remove the hose to the heatsink and the hoses 8-4.1. Handling Precautions
required to remove the capacitor assembly next to
the heatsink. CAUTION
3. Remove the capacitor assembly.
4. Remove the SCR adjacent to the heatsink, as To prevent component damage caused by
described in the SCR replacement procedures. static electricity, treat all boards with static-
sensitive handling techniques.
5. Remove the locknuts and washers mounting the
heatsink to the I-beam and heatsink support, and Printed wiring boards may contain static-sensitive
remove the heatsink. components. Therefore, GE ships all replacement
boards in antistatic bags. Use the following guidelines
Installation:
when handling boards:
1. Replace the heatsink, and secure as follows:
1. Store boards in antistatic bags or boxes.
a. Install the flat washer, first followed with the
2. Use a grounding strap when handling boards or
spring washers concave face against the flat
board components.
washer.
b. Tighten the locknut against the spring washer, 8-4.2. Replacement Procedures
then back off 1/2 turn.
2. Replace the SCR as described in the SCR replace- WARNING
ment procedure (section 8-3.2).
3. Replace the capacitor assembly and snubber wires. To prevent electric shock, turn off power to
the board, then test to verify that no power
4. Replace hose and clamps. Avoid reclamping the
exists in the board before touching it or any
hose.
connected circuits.
5. Fill per the instructions in publication GEH-6374,
then check for leaks. Removal:
1. Prepare the drive as defined in section 8-2.
2. Open the drives cabinet door. Test any electrical
circuits before touching them to ensure that
power is off.

3. Carefully disconnect all cables, as follows: 3. To install a board into a rack:

a. Slide the board into the correct slot in the rack.
CAUTION
CAUTION
To prevent damage to cable and wire connec-
tions, hold only the connector, not the cable,
Boards that mount in the rack are mechani-
when pulling them.
cally keyed so that they can only be installed
To prevent equipment damage, do not re- into the correct slot. Do not attempt to defeat
move, insert, or adjust board connections or override these interlocks. Doing so will
while power is applied to the equipment. damage the electronics.
For a cable with a pull tab, carefully pull the b. Begin seating the board by firmly pressing the
tab. top and bottom of the board at the same time
with your thumbs.
For a screw terminal connector, loosen the
screw at the top of each terminal and gently pull c. Finish seating the board in the slot by starting
each wire free. and then tightening the screws at the top and
bottom of the board. Tighten the screws
For a fiber-optic connector, press and hold the
latch on the mating cable connector while pull- evenly to ensure that the board is seated
ing. squarely.
4. Carefully remove the board, as follows: 4. To install a board that is seated with standoffs:
Some boards are mounted on standoffs with a. Place the board onto the standoff in the same
screws. Remove the screws to release the board. orientation as the board that had been removed.
For boards mounted within a rack, loosen the b. Secure the boards by replacing and tightening
screws at the top and bottom of the board, near the screws that had been removed.
the board ejector tabs. (The screws are captive 5. Reconnect all cables, making sure that they are
in the board front and should not be removed.) properly seated at both ends.
The board can then be unseated by raising the
ejector tab.
Installation:
1. On the replacement (new) board, set all jumpers,
pots, and switches in the exact position as those on
the board being replaced.
If a board revision has added or eliminated a con-
figurable component, or readjustment is needed,
refer to the individual board publication.
2. If the board contains onboard software, refer to the
individual board publication for instructions.

A-1. Introduction
A Warranty and
Renewal Parts When ordering a replacement part for a GE drive, the
customer needs to know:
Appendix A of this manual provides information to How to accurately identify the part
help the user identify and obtain replacement parts. It If the part is under warranty
is organized as follows:
How to place the order
Section Heading Page
A-1. Introduction................................................. 123 This information helps ensure that GE can process the
A-2. Identifying the Part...................................... 123 order accurately and as soon as possible.
A-2.1. Renewal Parts Quotation.......................... 123 To minimize system downtime if repair is needed, GE
A-2.2. Part Number Structure ............................. 124 recommends that the customer keep a set of spare
A-3. Warranty Terms ........................................... 125 parts onhand. The Renewal Parts Quotation (see sec-
A-4. How to Order Parts ..................................... 125 tion A-2.1) lists recommended spares.
A-4.1. Understanding the Drive Nameplate........ 125
A-2. Identifying the Part

A drive component, or part, is identified by its as-
signed part number and description. The part num-
ber is normally found on a nameplate on the
component. The description is included in the system
Renewal Parts Quotation.
A-2.1. Renewal Parts Quotation

The Renewal Parts Quotation is a separate document
that lists the parts of a complete system. This list ap-
plies specifically to the equipment furnished on a
customers particular application (requisition) at the
time of shipment. It includes:
Part numbers and descriptions
Quantity used
Recommended spares to keep onhand
Normal delivery cycle for obtaining each part
GE provides the Renewal Parts Quotation with the
drives custom instructions. If this document is
missing, contact the nearest GE sales office or service
representative to obtain a replacement copy. You need
to provide the following information (see Figure A-4)
to correctly identify the system:
Requisition number
Material List number
Item number
Appendix A, Warranty and Renewal Parts 123

A-2.2. Part Number Structure A-2.2.3. Components. Components are the basic
A GE part number is structured so that different por- parts that make up assemblies. They represent the
lowest discrete level of a system. Component part
tions of the number identify the type of equipment
numbers consist of a combination of alphanumeric
and location of manufacture. A part falls into one of
characters that define the class and specific item.
four categories:
Figure A-2 shows a sample.
Order-specific assemblies Major assemblies or 104X 109 1ADO38
items that make up a specific drive; constructed
from common assemblies Item or rating (500 V, 3.2 A FNQ)
Component type (fuse)
Common assemblies Subassemblies used in
many GE drive products, not just a specific drive Component
Components Individual parts that make up as-

semblies Figure A-2. Sample Part Number for Component
Printed wiring boards A-2.2.4. Printed Wiring Boards. A printed wiring
These categories and the makeup of their part numbers board is identified by an alphanumeric part (catalog)
are defined below. number stamped near its edge. Figure A-3 describes
the structure of a boards part number.
A-2.2.1. Order-Specific Assemblies. These parts
make up the particular drive. Other items obtained Note
specifically for the order may also use a similar part All digits are important when ordering or
number structure, which provides information about replacing any board.
the equipment (see Figure A-1).
The factory may substitute later versions of
boards based on availability and design en-
3V XYZ999 PR 001
hancements. However, GE Industrial Control
Unit identification number Systems ensures compatibility of replace-
Assembly type 1 ment boards.
Component
Identifies manufacturer as GE Industrial IS 200 FCGE G# A A A
Control Systems, Salem, VA
Artwork revision 1
1PR for standard product; LU for lineup;
CA for case Functional revision 1
Functional revision 2
Figure A-1. Sample Part Number for Group (variation) 3

Order-Specific Assembly Functional acronym
Assembly level 4
A-2.2.2. Common Assemblies. Common assemblies
are subassemblies used as components of order- Manufacturer ( DS & IS for GE in Salem, VA)
specific assemblies. Common assemblies are not de- 1Backward compatible
signed for a particular drive, but provide a function 2Not backward compatible
used in other GE products. 3G = normal coating; H = conformal coating
4200 indicates a base-level board; 215 indicates a

A common assembly part number consists of the num-
ber 36 followed by an alphanumeric character. It may higher-level assembly or added components (such
contain up to 14 characters. as PROM)
For example, 36C774524AAG48 is the part number

for a drive cable. Figure A-3. Sample Board Part Number
124 Appendix A, Warranty and Renewal Parts

A-3. Warranty Terms A-4.1. Understanding the Drive Nameplate
The GE Terms and Conditions brochure details prod- (Refer to Figure A-4.) The drives nameplate, located
on the back of the door, provides information that spe-
uct warranty information, including warranty period
cifically identifies the drive or cabinets components
and parts and service coverage. The brochure is in-
and configuration. This is important when ordering
cluded with customer documentation. It may be ob-
parts or documents, or contacting GE for assistance.
tained separately from the nearest GE Sales Office or
authorized GE Sales Representative. The material list (ML) number (also called catalog
number) is a unique number structured to provide in-
formation about the equipment (see Figure A-5). The
A-4. How to Order Parts ML number links the equipment to its requisition,
Parts still under warranty may be obtained directly drawings, components, materials, specification item,
from the factory: and shipping documents.
General Electric Company

Product Service Engineering
1501 Roanoke Blvd.
Salem, VA 24153-6492 USA
Phone: 001-540-387-7595
Fax: 001-540-387-8606
Renewals (spares or those not under warranty) should

be ordered by contacting the nearest GE Sales or
Service Office. Be sure to include:
Complete part number and description
Drive serial number Figure A-5. Sample Drive ML (Catalog) Number
Drive Material List number
Item Number
Requisition DATA NAMEPLATE

Number Serial Number Shop order
REQ# 35833558 ITEM# HD100 & date code for GE Factory
ML# 3VOMF604LU001 SERIAL# PNOMF604LU001001 identification
Material List NI WATER-COOLED LCI 12/6P 11,200HP 4KV
Number DRAWINGS: ELEM: 259B1446AA OUTL: 259B1430
LAYO: 259B1446AE MISC: 259B1446AC
INST: 3VOMF604IB01 MISC:
Associated VOLTS 4160 (V) VOLTS 4160 (V)
Drawings and PWR AMPS 1435 (A) PWR AMPS 1371 (A) Power Application
Instructions IN HERTZ 60 (HZ) OUT POWER 11,200(HP )
Data
PHASE 3 (PH) FREQ .5 TO 60 (HZ)
PH, ROTATION
OVRLD CAP 115 %, 60 SEC SERVICE FACTOR 1.00
MOTOR FIELD: VOLTS, AMPS
MAX. SYM S.C.C.: 2200 AMPS AT VOLTS MAX
NEMA SERVICE CAT: NEMA ENCL TYPE
FREQUENCY TOC 0000 AMPS. 000 SEC
VOLTAGE TOC MIN.LEV. 0000 AMPS
VOLT UNBAL AMB.COMP.
Figure A-4. Typical Drive Nameplate
Appendix A, Warranty and Renewal Parts 125

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Geh 6373 Load Commutated Inverter User&#39;s Manual

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Geh 6373 Load Commutated Inverter User&#39;s Manual

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GEH-6373

Load Commutated Inverter

Load Commutated Inverter

Printed in the United States of America.

Safety Symbol Legend

Indicates a procedure, practice, condition, or statement that, if not strictly

Indicates a procedure, practice, condition, or statement that, if not strictly

Safety Symbol Legend a

This equipment contains a potential hazard of electric shock or burn. Only

Isolation of test equipment from the equipment under test presents

To minimize hazard of electrical shock or burn, approved grounding

To prevent personal injury or equipment damage caused by equipment

b Safety Symbol Legend

Section Heading Page Section Heading Page

Table of Contents Continued

Section Heading Page Section Heading Page

Figure/Title Page Figure/Title Page

Table/Title Page Table/Title Page

List of Figures/Tables iii

1 Equipment 1-1. Introduction to the LCI

Section 1, Equipment Overview 1

Additional control components are included on firing 1-5. Operating Environment

Optional diagnostic display module (AFE Data- Rapid temperature changes

Standards UL, CSA (consult factory), CE

2 Section 1, Equipment Overview

Control Source Load Pump

Pulse Type Dimensions (meters) Weight

Series 90-30 Tach

Display DS200DDTB Figure 1-2.

Section 1, Equipment Overview 3

1-6. Related Documents 1-7. Technical Assistance

4 Section 1, Equipment Overview

2 Functional 2-1. LCI System Basics

DC LINK SYNCHRONOUS MACHINE

Figure 2-1. Simplified LCI System One-Line Diagram

Section 2, Functional Description 5

2-1.3. Microprocessor-Based Control 1 3 5 1

based electronics control firing of both the source and 6 2 4 6

For voltage feedback

6 Section 2, Functional Description

High Speed I/O

Series 90 Protocol Series 90-30 PLC

Innovation Series Controller Genius Bus

Fiber-Optic Gate & Status

Fiber-Optic Gate & Status

Fiber-Optic Gate & Status

Fiber-Optic Gate & Status

Internal (AC/DC) Exciter

Figure 2-3. LCI Control Block Diagram

Section 2, Functional Description 7

Figure 2-4. Load Converter Voltage and Current

8 Section 2, Functional Description

Section 2, Functional Description 9

10 Section 2, Functional Description

Figure 2-6. Forced Commutation Firing Mode

Section 2, Functional Description 11

LOAD LINE-NEUTRAL VOLTAGES

POWER FACTOR ANGLE,

CURRENT INTO LOAD,

Figure 2-7. Load Voltage ANGLE OF OVERLAP,

LOAD LINE-LINE VOLTAGES

PEAK VOLT-SECONDS AVAILABLE

LOAD "FLUX" WAVES

EXCESS VOLT-SECONDS AFTER COMMUTATION

Geh 6373 Load Commutated Inverter User's Manual

Geh 6373 Load Commutated Inverter User's Manual