2/3/2017 WhatsTheDifferenceBetweenCTS,MultisourceCTS,AndClockMesh?

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HOME > NEWS > PRODUCTS > WHATS THE DIFFERENCE BETWEEN CTS, MULTISOURCE CTS, AND CLOCK MESH?

WhatsTheDifferenceBetweenCTS,MultisourceCTS,
AndClockMesh?
HarveyToyama|ElectronicDesign Mar14,2012

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Uptonow,therehavebeentwomainmethodsofclockdistributionforlarge,high UnderstandingtheAirPods'
performancedesigns:conventionalclocktreesynthesis(CTS)andclockmesh.
Rise
MultisourceCTShasemergedasanewmethodthatisahybridofthesetwo.Thisarticle
Q&A:WhatsNewintheWireless
explainsthedifferencesbetweenCTS,multisourceCTS,andclockmeshdistribution
AudioMarket?
technologies.
InterviewwithJawadHaider,Marvell
TableofContents Semiconductor

1.KeyDifferencesBetweenCTS,MultisourceCTS,AndClockMesh
2.AmountOfSharedPath
3.OCVBenefitOfSharedClockPath
4.MeshFabric
1.PowerTradeoffDifferences
2.AttachingToTheFabric ReadNow
3.MeshLessMultisourceCTS
5.DesignComplexity
6.TimingAnalysis What'sNew
7.Conclusions
ElectronicDesign'sProductsofthe
8.References
Week
ByElectronicDesignStaff
KeyDifferencesBetweenCTS,MultisourceCTS,AndClockMesh
TherearefourkeydifferencesbetweenconventionalCTS,multisourceCTS,andclock
mesh:sharedpath,meshfabric,designcomplexity,andtiminganalysis.Eachsubsequent
sectiondiscusseseachofthethreeclockdistributionmethodswithrespecttothesekey
differences.Atthecompletionofthearticle,youwillknowthedifferencesandbebetter
equippedtotryanewmethodthatmaybebettersuitedtoyournextdesignstart.

AmountOfSharedPath
ReadNow
Themostobviousdifferenceisthestructuraldepthofthesharedpathbetweentheclock
rootandthesinks.Consideranexampleofthesamesetofsinksaddressedbyeachofthe
threeclockdistributionmethods(Fig.1).

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2/3/2017 WhatsTheDifferenceBetweenCTS,MultisourceCTS,AndClockMesh?|ProductscontentfromElectronicDesign
1.ThemostobviousdifferencebetweenCTS,multisourceCTS,andclockmeshstructuresisthedepthofthesharedpath

betweentheclockrootandthesinks.Shownhereisthesamesetofsinksaddressedbyeachofthethreeclock

distributionmethods(fromleft:conventionalCTS,multisourceCTS,andclockmesh).

Aconventionalclocktree,shownatleft,ischaracterizedbyanorganictreestructurefrom
theclockrootthatbranchesouttoeachofthesinksinthedesign.Thereisunlimited
depthforbothbufferandclockgatinglevels.Mostofthesinksinthedesignsharevery
fewpathsbacktotheclockrootsofew,infact,thatforanytwosinksinthedesign,the
onlyreliablysharedpartofthepathistherootbuffer.

MultipleclocktreesofsmalltomoderatedepthprimarilydistinguishmultisourceCTS,
shownatcenter.Therearetypicallybetweenthreeandninelevelsofclockgatingand
buffers.Themultipleclocktreesareatthebottomofthestructurebelowthemeshgrid
andallofthestructureabovethemeshformasharedpathbacktotheclockroot.A FusingSensors
substantialportionoftheoverallinsertiondelayoftheclockisintheformofashared
path. TDKSwearsbySensorFusionin
$1.3BillionDealforInvenSense
Clockmesh,shownontheright,ischaracterizedbyanextremelyshallowlogicdepth
belowthemesh,usuallyjustasinglebufferorclockgatedirectlydrivingthesinks.Mostof ByJamesMorra
theinsertiondelayinaclockmeshdesignisalarge,sharedpathfromtheroottothe
mesh.

OCVBenefitOfSharedClockPath
Therespectivelogicdepths(unlimited,moderate,andveryshallow)areinverselyrelated
tothelevelofsharedpathbetweenthesinksandtheclockroot.Pathsharingreducesthe
impactofonchipvariation(OCV)effectsonthedesignbecausewhenthesinkssharethe
sameclockpathtotheroot,anyprocessvariationoccurrenceinthatpathaffectsboth ReadNow
flopsequallyandalltimingassumptionsarepreserved.Intheabsenceofpathsharing,
onemustincreasetheclockmarginbyaderatingfactortoaccountforthepossibilitythat
eitherorboththelaunchandcaptureflipflopsexperienceaprocessvariation JoinOurNewsletter
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Wemaydefinetheextramarginbymultiplyingtheinsertiondelayofthenonshared ElectronicDesignToday(ViewSample)
pathbyaderatingscalar,typicallybetween7%and10%.Worseyet,itisappliedina
rangeofplusorminusthederatingfactor.Wethenaddtheproducttothetimedskewof Enteryouremailaddress...

thedesignandderatetheclockfrequencyperformanceofthedesign.
Selectyourcountry...
Thecurrenttechnologynodesencouragelargedesignswithmanydifferentfunctions.As
Enteryouremailabovetoreceivemessagesaboutofferings
designsgrowlarger,theimpactofOCVderatingincreases.Ofthethreeclockdistribution byPenton,itsbrands,affiliatesand/orthirdpartypartners,
consistentwithPentonsPrivacyPolicy.
methods,conventionalCTSisthemostadverselyaffectedbyOCVderating,andthe
growingtrendistomoveawayfromconventionalCTSforhighspeeddesigns. Subscribe
Ontheotherextreme,thesinksinaclockmeshdesignsharetheoverwhelmingmajority
oftotalclockpath.Theresultisthatthemeasuredclockskewincreasesverylittledueto
OCVderating,preservingthehighperformanceofthedesign.Thisisthemainreason
thatclockmeshdesignhaslongbeenthepreferredclockdistributionmethoddeployed
byperformanceorientedprocessordesigns,whetherarithmeticandlogicalunits(ALUs)
orgraphicalprocessingunits(GPUs).

MultisourceCTSfallsbetweenconventionalCTSandclockmeshwithregardtothe
amountofsharedpath.ThehighflexibilityofmultisourceCTSenablesthedesignerto
tradeofftheclockleveldepthofthemultipletreesagainsttheOCVimmunityofthe
design.MultisourceCTShasotherareasofflexibilitythatwewilldiscusslater.

MeshFabric
ThemeshfabricisanotherobviousdifferencebetweenconventionalCTSandthetwo
othermethodologies.ClockmeshandmultisourceCTSbothuseameshfabric,though
thereisalargedifferenceinthedensityofthemeshdeployed. SearchPartsFast

Clockmeshusesadensemeshfabricasthefinalcomponentofthesharedpathofthe
design.Thisfabricistypicallyaboutasdenseasthepower/groundmeshesandconsumes Searchbynumberormanufacturer
significantroutingresources.Mostimplementationsplacethefabricatthehighest SEARCH
routinglayers.Thisminimizestheimpactondatasignalrouting,whichusuallytakes
placeatlowerlevels,whileconcurrentlytakingadvantageofthelowresistanceofthe

widerredistributionlayer(RDL)orotherhighermetallayersforhighspeedroutes. poweredby:

Themeshfabricprovidesuniformityacrossitsentireexpanse.Themultiplydrivenfabric
smoothesoutthearrivaltimedifferencesoftheclockateachdrivingpoint.Theeffective

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2/3/2017 WhatsTheDifferenceBetweenCTS,MultisourceCTS,AndClockMesh?|ProductscontentfromElectronicDesign
resultisthattheclockskewatthefabriciszero.Theskewcomponentofthedesignisthus
limitedtothewiresegmentattachingthebufferorclockgatetothefabricandthewires
andflopstherebydriven.Thisexplainstheultralowskewvaluesachievedwithclock
mesh. ConnectWithUs
ThemultisourceCTSmeshfabricisoneordertotwoordersofmagnitudelessdensethan
theclockmeshfabric(Fig.2).Onemusttakegreatercarewithmultisourcetechnologyto
ensurethattheskewperformanceatthefabricmeetsthedesignobjectives. TwitterFacebook
RSS

2.ThemultisourceCTSmeshfabric(atright)isoneordertotwoordersofmagnitudelessdensethantheclockmesh

fabric.

BothclockmeshandmultisourceCTShavemoreimmunitytoinsertiondelaybecausethe
prevalenceofsharedpathminimizestheportionoftheinsertiondelaythatisexposedto
theOCVderating.Bothmethodsalsobenefitfromahighlystructuredbuffertopology
thatdrivesthefabric.

WenormallyconfigurethepremeshdriversasmultilevelHTrees.AnHTree,asthe
nameimplies,istypicallyaconfigurationoffivedriversthattracethecenterand
endpointsofanHpattern(Fig.3).Noticetheclockrootbufferatthecenterofthe
design.Forvisibility,theroutesonthetwoHlayersareindifferentcolors.Inthis
example,thetoplevelHlaysonitsside,whilethefourlowerlevelHstructures,
showninpurple,areinanormalHorientation.

3.InthisexampleofHTreerouting,notetheclockrootbufferatthecenterofthedesign.Forvisibility,theroutesonthe

twoHlayersareindifferentcolors.Here,thetoplevelHlaysonitsside,whilethefourlowerlevelHstructures(in

purple)areinaclassicHorientation.

PowerTradeoffDifferences
ThecoarsepitchofthemultisourceCTSmeshfabrichasthebenefitofusingconsiderably
lesspowerthantheextremelyfinepitchofaclockmeshfabric.Becausethereisoneorder
totwoordersofmagnitudelessmetalinthemultisourceCTSfabric,thereductioninthe
powerrequirementisconsiderable.Whereasclockmeshconsumesbetween20%and40%
morepowerthanthesamedesignimplementedwithconventionalCTS,amultisource
designwillhavepowernumbersmuchclosertoconventionalCTSthanclockmesh.

Furthermore,multisourceCTSallowsgreaterclockgatingdepth,enablingmorecomplex
clockgatingschemes,whichcontributestoadditionalpowersavings.Theflexibilityof

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2/3/2017 WhatsTheDifferenceBetweenCTS,MultisourceCTS,AndClockMesh?|ProductscontentfromElectronicDesign
multisourceCTSenablesclockgatingcomplexityandmeshfabricdensitytradeoffsversus
power.Thisisnotpossibleinaclockmeshapproach.

AttachingToTheFabric
AnotherdifferencebetweenmultisourceCTSandclockmeshishowthedesignlogic
attachestothemeshfabric.Inclockmesh,thedensefabricdefinesrelativelysmallbins
thatcontainclusterorsubclusteramountsoflogic.Thesestructuresofbuffersorclock
gatesandthesinkstheydriveareoftencalledtwigstokeepwithinthearborealmetaphor
oftreesandbranches.

Onemayattachclockmeshtwigsbyeithercombroutesorfishboneroutestothe
horizontalandverticalspinesofthemesh(Fig.4).Combroutingminimizestheskewbut
tradesthisbenefitoffagainstroutingresources.Formostdesigns,fishboneroutingisthe
bettertradeoff.

4.Onemayattachclockmeshtwigsbyeithercombroutesorfishboneroutestothehorizontalandverticalspinesofthe

mesh.Combroutingminimizestheskewbuttradesthisbenefitoffagainstroutingresources.Formostdesigns,fishbone

routingisthebettertradeoff.

Whethertheroutingmethodiscomborfishbone,clockmeshtwigsattachtothenearest
pointalonganyspinetoattachtothemeshfabric.

Bycontrast,multisourceCTSoffersmuchlargerlogicgroupingsthatarethemselvessmall
clocktrees.MultisourceCTSclocktreesattachtothecoarsemeshfabricatlocations
calledtappoints,whicharedefinedtoprovidelowskewandinsertiondelay.Wetypically
createtappointsattheintersectionofthespinesofthecoarsemeshfabric(Fig.5).

5.MultisourceCTSclocktreesattachtothecoarsemeshfabricatlocationscalledtappoints,whicharedefinedto

providelowskewandinsertiondelay.Wetypicallycreatetappointsattheintersectionofthespinesofthecoarsemesh

fabric.Shownisadesignwithseventappointsdefined.

EachtappointisthelocalrootofoneofthemultisourceCTSclocktrees.Therootbuffer
normallyattachestotheintersectionswithstackedviasdirectlytotheinputpinofthe
buffer.

Inclockmeshthereisnoconceptofassigningsinkstoaclockrootbecausethefabricisso
denseandeachtwigissmall.ButinmultisourceCTS,tappointassignmentisan
importantstep.Inadditiontoshowingthetappointsatgridintersections,Figure5
showsdistinctlycolorizedareasthathavebeenassignedtothetappointwithinthe
colorizedboundary.Thetappointsaretheclocktreeroots,andtheassignedsinksdefine
theboundariesofeachclocktree.

MeshLessMultisourceCTS
ThereareevendifferenceswithinthemultisourceCTScategory.Onemayimplement
multisourceCTSwithoutameshfabricatall.Inthiscase,theHTreeendpointsarethe
tappointstowhichthesinksineachregionareattached.

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2/3/2017 WhatsTheDifferenceBetweenCTS,MultisourceCTS,AndClockMesh?|ProductscontentfromElectronicDesign
MeshlessmultisourceCTSoffersdesignersyetanothersetoftradeoffs.Inthiscase,the
tradeoffisbetweenOCVtoleranceandtheeaseoftheflow.Theflowiseasierbecause
thereisnoneedtodeterminethecorrectpitchofthemeshfabric.Itisalsoeasierbecause
timingthedesignissimpler.

DesignComplexity
Thethirdareaofdifferenceamongthesemethodsishowthecomplexityoftheclock
gatingplanandthefloorplaninfluencestheeffectivenessoftheclockdistribution
approach.ConventionalCTSisthemostaccommodatingapproachfordealingwith
designcomplexity.Itisthebaselineagainstwhichtojudgeclockmeshandmultisource
CTS.

Clockmeshisthemostrigidofthethreeapproaches.Anidealclockmeshdesignhasno
RAMs,ROMs,orotherhardblocks.Indeed,itisaflatseaofgates.Thisisidealforclock
meshbecausetherearenoobstructionsthatpreventtheplacementofpremeshHTree
bufferssuchthateachHisideal.ThelackofobstructionsalsoenablestheHTreeroutes
tobeperfectlystraight,makingiteasiertoensureanidealbalancedHTree.Clockmesh
alsobenefitsfromashallow,uniformdesigntopologybelowthemeshfabrictocomply
withthelimitoftwolevelsofclockbuffersorclockgating.

Asinotherareasofdifference,multisourceCTSfallsbetweenconventionalCTSandclock
meshwithrespecttoitshandlingofdesigncomplexity.Thedepthofthemultisource
clocktreestoleratesmostclockgatingplanswell,andthesmallerpremeshHTree
meansfewerdriverstoaccountforamidRAMsandhardblocksinthefloorplan.

TimingAnalysis
InconventionalCTS,weperformtiminganalysiswithstandardtiminganalysistools,both
theacceptedsignoffstatictimingenginesandthesimilartimingenginesembedded
withintheplaceandroutetools.ThismakesconventionalCTStheeasiestmethodtotime
througheverystageoftheflow.

Inthemeshtopologies,circuitsimulationisrequiredtotimethemultiplydrivenmesh
fabrics.Thisaddsalevelofcomplexitytotheclockmeshandmultisourceflowsthatmay
atfirstseemprohibitive.However,thestandardisforautomationwithintheplaceand
routetooltolaunchthesimulationrunandthenannotatethetimingvaluesontothe
designforsubsequentstatictimingreportsandanalyses.Whilethismitigatesthecircuit
simulationlearningcurvesomewhat,itcannotcompletelyobviatesomeexposuretothe
underlyingsimulatortechnology.

Conclusions
Asnewtechnologynodesenableincreasinglylargerandmorefeaturerichdesigns,the
choiceofclockdistributionmethodologybecomesevermoreimportant.Conventional
CTS,whichhastraditionallybeenthedefaultchoiceforalldesigns,maynolongerbethe
optimalchoicewhenanextremelyhighclockfrequencyisrequired.

Thus,itisagoodideatobroadentheclockdistributionskillsettoincludeclockmesh
andmultisourceCTStechnologies.Experiencewiththesemethodologiesenables
designerstomakethemostoptimaldesignchoicegiventhedesigngoals:clockfrequency,
OCVtolerance,powerconsumption,flowease,andtimetomarketpressure.

Thethreetechnologiesexploredinthisarticlecoverthepolarextremeswithconventional
CTSdeliveringgoodtoverygoodclockfrequency,moderateOCVperformance,bestlow
powerprofile,andbesteaseofuse.Ontheotherextreme,clockmeshexhibitsthebest
clockfrequencyperformance,thebestOCVtolerance,theworstlowpowerprofile,and
thelowesteaseofuse.

ManydesignersarefindingthatmultisourceCTSoffersanattractive,flexiblesolution
betweenthetwoextremesofconventionalCTSandclockmesh.Knowingthedifferences
betweenthesethreeclockdistributionmethodswillenabletheoptimalimplementation
foryournextdesign.

References

1.MallikDevulapalliandYuichiKawahara,ClockMeshVariationRobustness:Benefitsand
Analysis,http://www.designreuse.com/articles/21019/clockmeshbenefits
analysis.html
2.HaroonGauhar,StephanieMiller,AshutoshMujumdar,DermotODriscoll,Yuichi
Kawahara,MallikDevulapalli,JasonBinney,andTomChau,StructuredMethodsfor

http://electronicdesign.com/products/whatsdifferencebetweenctsmultisourcectsandclockmesh 5/7
2/3/2017 WhatsTheDifferenceBetweenCTS,MultisourceCTS,AndClockMesh?|ProductscontentfromElectronicDesign
Delay,Power,andVariation,
https://www.synopsys.com/news/pubs/snug/sanjose08/binney_final.pdf
3.HarveyToyama,ClockMeshforMainstreamDesigns,http://www.synopsys.com/cgi
bin/protected/iccwp/pdfr.cgi?file=clock_mesh_wp_V4.pdf
4.HarveyToyama,MultiSourceCTSDeliversFlexibleHighPerformanceandVariation
Tolerance,http://www.synopsys.com/cgibin/protected/iccwp/pdfr.cgi?
file=multiSource_cts_wp_v2.pdf

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